First GRUNDIG with isolated Chassis from Mains, this because of isolations requirements for featuring external connectivity with VCR and audio devices.
This CHASSIS don't shares much with earlier models. Line deflection stages and signal stages and other parts are differently designed and developed even if they're a classic Technology type design or that era employing Thyristor devices.
Viewing of the MAIN POWER SUPPLY TRANSFORMER 9068-301.01 + 29301-086.11 (Netz Platte) which explains in part the high weight of the set.
Which such Trafo you can power up almost a House.
GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) Remote control television with external data bus connection,
Remote Control With MOS IC's For TV Sets: THE GRUNDIG AV FEATURE CONNECTOR TECHNOLOGY:A television receiver is provided for use as a picture display terminal for electronic peripheral equipment, where a control system with a data-bus is built into the television receiver for multitude of commands and in which the television receiver is intended to be used in addition to the normal direct reception of televised pictures for other possible applications. The television receiver can serve as a monitor for a picture tape recorder, which is equipped for recording independently of the television receiver. A complete television receiving set is provided with automatic transmitter seeking mechanism and electronic channel storage.
1. A system for the use of a television receiver for external control of electronic peripheral devices, said television being of the type including a built-in integrated circuit remote control receiver, said remote control receiver being divided into two sections, one section being allocated to the remote control of the receiving and reproduction sections of the television receiver and the other section being allocated to a databus having nothing to do with the television receiver receiving and reproduction sections; an output terminal of said databus comprising an adaptor connector between said television receiver and an external peripheral device; a peripheral device external to the television receiver; cable means connecting the output of said databus with said peripheral device; and a decoder interposed between said databus output terminal and peripheral device for converting data from said databus into a form suitable for controlling functions of said peripheral device.
2. A television receiver as a picture terminal according to claim 1, in which said external coupling includes a connecting cable between the external connections of the television set and the peripheral device forming a unitary unit together with a decoder which transforms the data from the data collector into a code which directly controls the functions of the peripheral device.
3. A television receiver as a picture terminal according to claim 1 or 2, in which the peripheral device is a picture taping device which operates for recording independently from the television set which acts as a monitor.
4. A television receiver as a picture terminal according to claim 1, in which the functions controlled by said first commands include the on-off switching, picture, sound and channel selection of the television receiver and the functions controlled by said second commands include electronic program storage and changeover functions.
Description:
Integrated circuits are pre
sently known in the art for the convenient operation of television receivers, whereby the functions of on-off switching, channel selection, picture (video) and sound (audio) can be remotely controlled by the received telecontrol signal. In particular, the following function can be operated by such a system: Switching on and off of the equipment, calling for different program channels, variations and basic adjustments of sound level, brightness and color saturation, silencing of the sound as well as inserting of time references. With a known and presently available operating system up to 16 channels can be installed, so that it is possible, to select directly that number of programs and to tune the receiver to the appropriate channel. Television receivers available today in many designs provide for up to 30 remotely controlled channels or channels controlled by the received signal (tele-signal) to properly operate. Additionally, infrared control is also becoming popular. These controls provide commands by means of a databus so that the operation of the various functions is possible with the provision of additional commands.
It is further known to equip peripheral equipment such as video tape recorders with a so-called electronic-tap-key rather than keys with a long throw so that all parts which are susceptable to mechanical wear are eliminated and replaced by digital controls.
It has become of interest to connect the peripheral equipment such as the video tape recorder to the television receiver so that both can be conveniently operated. With the development of new concepts simplification of design becomes critical for ease of operation and reduction of expense.
A
television receiver as a picture display terminal for electronic peripheral devices wherein a remote control system with a data collector is installed for receiving a plurality of commands and in which only a portion of the commands is used for the remote control functions of the receiving and display portions of the television set, while another portion of the commands is used for adjusting the functions of an electronic peripheral device which may be coupled with a television set, and that the data collector is electrically coupled by means of an external coupling of the television set with the corresponding stages of the peripheral device. The FIGURE is a diagrammatic showing of a television receiver and electronic periphery device incorporating the invention.
A television receiver and electronic peripheral device incorporating the invention are shown in the FIGURE. The television receiver 10 can be used as a picture display terminal for peripheral device 12. This provides the advantage, that by means of a single tele-control signal, the control of functions of the receiving and displaying sections of the television receiver can be accomplished as wel
l as the control functions of the peripheral equipment 12, which is connected to the receiver. The peripheral device does not require a separate tele-control system since that which is already installed in the television receiver can be used. To accomplish this, portion A of the available commands A, B of the tele-control system 11 are used for the function of the television receiver 10. The remaining portion B of the available commands A, B, which is made available at databus or data collector 14 is used for the control of functions of the peripheral equipment. The databus, which is coordinated with the peripheral equipment, and which is built into the tele-control system of the television receiver, is connected electrically to external terminal 16 of the television receiver. The external terminals at television receivers and peripheral equipment are relatively inexpensive. The primary expenses result from the necessary cable connections between the external terminals of the television receiver and the peripheral equipment, as well as the auxiliary apparatus, such as decoder 18, which decodes the data from the databus 14 and prepares it for the peripheral equipment. These expenses are reduced by simplified design, in which the connecting cables 20 and 22 together with the auxiliary apparatus or decoder 18 are combined in one component or building block. This building block can be offered as an accessory to the user of television receivers with peripheral equipment.
The invention can be used with especial advantage in connecting a television receiver with a picture tape recorder as a peripheral equipment. The picture tape recorder is equipped preferably for recording independently from the television receiver, so that the latter serves as a monitor only. With such a switching combination it is possible, for example, to accomplish this with a single control system, and by the help of a tele-control system, which is built into the television receiver, to operate the channel selection and drive mechanism control, the control for an electronic switch clock and programming of the switch commands of the picture tape recorder as well as the control of the function of the receiving and displaying unit of the receiver. In this way it is possible to use the tele-control of a television receiver additionally for the tele-control of the picture tape recorder without substantial higher expenses.
This CHASSIS was mounted even in these following models:
GRUNDIG SUPER COLOR 8442
GRUNDIG SUPER COLOR 8642
GRUNDIG SUPER COLOR 8242
GRUNDIG SUPER COLOR W 8242
GRUNDIG SUPER COLOR 8942
GRUNDIG SUPER COLOR 8142
RGB BAUSTEIN 29301-046.02 (MATRIX + RGB AMPLIFIER WITH TDA2800)
FARB BAUSTEIN 29301-024.01 (LUMINANCE+CHROMINANCE WITH TDA2510+TDA2521/2)
NF BAUSTEIN 29301-004.21 (AUDIO STAGE) ( TDA4290 + TDA2030)
ZF BAUSTEIN 29301-002.56 (IF MODUL WITH TDA2840 + TBA120T + TBA1440G + SN29767NA)
ABSTIMM-ANZ BAUSTEIN 29301-059.13 (OSD SEARCH BAR WITH UAA190)
SL SUCHLAUF BAUSTEIN 29301-045.13 .15 (TUNING SEARCH WITH SN29799 + TMS3753 + TM3894)
TP EMPFAENGER 29301-047.21 (IR REMOTE RECEIVER WITH TDA4050 OR DISCRETES)
VERTIKAL BAUSTEIN 29301-009.03 (FRAME OSC UNIT) (BSV57B)
O/W DIODEN BAUSTEIN 29301-041.01
HORIZONTAL BAUSTEIN 29301-008.05 (SYNCH + LINE OSC WITH TDA2591)
REGEL BAUSTEIN 29301-035.04 (LINE DEFL. REGULATION UNIT WITH SN74LS221N)
TBA
120T (Siemens) SIF (Sound IF)REGEL BAUSTEIN 29301-035.04 LINE DEFL. REGULATION UNIT WITH SN74LS221N
The ’221 and ’LS221 devices are dualmultivibrators with performance characteristics
virtually identical to those of the ’121 devices.
Each multivibrator features a negative-transitiontriggered
input and a positive-transition-triggered
input, either of which can be used as an inhibit
input.
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input
pulse. Schmitt-trigger input circuitry (TTL hysteresis) for B input allows jitter-free triggering from inputs with
transition at rates as slow as 1 V/s, providing the circuit with excellent noise immunity, typically of 1.2 V. A high
immunity to VCC noise, typically of 1.5 V, also is provided by internal latching circuitry.
Once fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing
components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration
relative to the output pulse. Output pulse length can be varied from 35 ns to the maximum by choosing
appropriate timing components. With Rext = 2 kΩ and Cext = 0, an output pulse typically of 30 ns is achieved
that can be used as a dc-triggered reset signal. Output rise and fall times are TTL compatible and independent
of pulse length. Typical triggering and clearing sequences are shown as a part of the switching characteristics
waveforms.
Pulse-width stability is achieved through internal compensation and is virtually independent of VCC and
temperature. In most applications, pulse stability is limited only by the accuracy of external timing components.
Jitter-free operation is maintained over the full temperature and VCC ranges for more than six decades of timing
capacitance (10 pF to 10 µF) and more than one decade of timing resistance (2 kΩ to 30 kΩ for the SN54221,
2 kΩ to 40 kΩ for the SN74221, 2 kΩ to 70 kΩ for the SN54LS221, and 2 kΩ to 100 kΩ for the SN74LS221).
Throughout these ranges, pulse width is defined by the relationship: tw(out) = CextRext In2 ≈ 0.7 CextRext. In
circuits where pulse cutoff is not critical, timing capacitance up to 1000 µF and timing resistance as low as 1.4 kΩ
can be used. Also, the range of jitter-free output pulse widths is extended if VCC is held to 5 V and free-air
temperature is 25°C. Duty cycles as high as 90% are achieved when using maximum recommended RT. Higher
duty cycles are available if a certain amount of pulse-width jitter is allowed.The variance in output pulse width from device to device typically is less than ±0.5% for given external timing
components. An example of this distribution for the ’221 is shown in Figure 3. Variations in output pulse width
versus supply voltage and temperature for the ’221 are shown in Figures 4 and 5, respectively.
Pin assignments for these devices are identical to those of the SN54123/SN74123 or SN54LS123/SN74LS123
so that the ’221 or ’LS221 devices can be substituted for those products in systems not using the retrigger by
merely changing the value of Rext and/or Cext; however, the polarity of the capacitor must be changed.
FUNCTION TABLE
(each monostable multivibrator)
INPUTS OUTPUTS
CLR A B Q Q
L X X L H
X H X L H
X X L L H
H L ↑ † †
H ↓ H † †
↑‡ L H † †
† Pulsed-output patterns are tested during
AC switching at 25°C with Rext = 2 kΩ, and
Cext = 80 pF.
‡ This condition is true only if the output of
the latch formed by the two NAND gates
has been conditioned to the logic 1 state
prior to CLR going high. This latch is
conditioned by taking either A high or
B low while CLR is inactive (high).
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1): ’LS221 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
’221 5.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 73°C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 82°C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C
HORIZONTAL BAUSTEIN 29301-008.05 TDA2591 SYNCHRO AND HORIZONTAL DEFLECTION CONTROL FOR COLOR TV SET
DESCRIPTION
The TDA2591 is a circuit intended for the horizontal
deflection of color TVsets, supplied with transistors
or SCR’S.
The TDA2591 and TDA2593 are integrated line
oscillator ‘_circuits for colour television receivers using
thyristor or transistor line deflection output stages.
The _circuits incorporate a line oscillator ‘which is
based on the threshold switching principle, a line de-
flection output stage capable of direct drive of thyristor
deflection circuits, phase comparison between the
oscillator voltage and both the sync pulse and line
flyback pulse. Also included on the chip is a switch for
changing the filter characteristic and the gate circuit
when used for VCR.
The TDA2593 generates a sandcastle pulse (at pin
7) suitable for use with the TDA.2532.
.LINE OSCILLATOR(two levels switching)
.PHASE COMPARISON BETWEEN SYNCHRO-
PULSE AND OSCILLATOR VOLTAGE Ø 1, ENABLED BY AN INTERNAL PULSE,
(better parasitic immunity)
PHASE COMPARISON BETWEEN THE FLYBACK
PULSES AND THE OSCILLATOR VOLTAGE Ø2
.COINCIDENCE DETECTOR PROVIDING A LARGE HOLD-IN-RANGE.
.FILTER CHARACTERISTICS AND GATE SWITCHING FOR VIDEO RECORDER APPLICATION.
.NOISE GATED SYNCHRO SEPARATOR
.FRAME PULSE SEPARATOR .BLANKING AND SAND CASTLE OUTPUT PULSES
.HORIZONTAL POWER STAGE PHASE LAGGING CIRCUIT
.SWITCHING OF CONTROL OUTPUT PULSE WIDTH
.SEPARATED SUPPLY VOLTAGE OUTPUT STAGE ALLOWING DIRECT DRIVE OF SCR’S CIRCUIT
.SECURITY CIRCUIT MAKES THE OUTPUT PULSE SUPPRESSED WHEN LOW SUPPLY
VOLTAGE.
TDA2030,14W Hi-Fi AUDIO AMPLIFIER
DESCRIPTION
The TDA2030 is a monolithic integrated circuit in
Pentawatt[ package, intended for use as a low
frequency class AB amplifier. Typically it provides
14W output power (d = 0.5%) at 14V/4W; at ± 14V
the guaranteed output power is 12W on a 4W load
and 8Won a 8W (DIN45500).
TheTDA2030provideshigh outputcurrentand has
very low harmonic and cross-over distortion.
Further the device incorporates an original (and
patented) short circuit protection system comprising
an arrangement for automatically limiting the
dissipated power so as to keep the working point
of the output transistors within their safe operating
area. A conventional thermal shut-down system is
also included.
SHORT CIRCUIT PROTECTION
The TDA2030 has an original circuit which limits the
current of the output transistors. Fig. 18 showsthat
the maximum output current is a function of the
collector emitter voltage; hence the output transistors
work within their safe operating area (Fig. 2).
This function can thereforebe considered as being
peak power limiting rather than simple current limiting.
It reduces the possibility that the device gets damaged
during an accidental short circuit from AC
output to ground.
TDA2521 synchronous demodulator for PAL
GENERAL DESCRIPTION
The TDA2521 is a monolithic integrated circuit designed as a synchronous demodulator for PAL color television receivers. It includes an 8.8 MHz oscillator and divider, to generate two 4.4 MHz reference signals, and provides color difference output.
The TDA2521 is intended to interface directly with the TDA251O with a minimum of external components and is constructed on a single silicon chip using the Fairchild Planar
epitaxial process.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage 14 V
Internal Power Dissipation 600 mW ORDER INFQRMATIQN
Operating Temperature Range —2O°C to +6O°C TYPE PART NO.
Storage Temperature Range —55°C to +125°C 2521 TDA2521
Pin Temperature iSo|dering 10 si 260°C
Planar is a patented Fairchild process
TDA2510 CHROMINANCE COMBINATION
GENERAL DESCRIPTION —
The TDA2510 is a monolithic integrated circuit designed for the function of a color television receiver. It Is designed to Interface directly with the TDA2521, using a minimum number of external components.
TDA251O is constructed on a single silicon chip using the Fairchild Planar‘ epitaxial process.
ABSOLUTE MAXIMUM RATINGS
supply Voltage 15 V
Collector voltage of chroma output transistor (pin 7) 20 V
(PD I 100 mW max)
Collector current of chroma output transistor (pin 7) 20 mA
Collector current of color killer output transistor (pin 11) 10 mA
Power dissipation 500 mW
Operating temperature range —25°C 10 +6O°
Storage temperature range *55°C to +12!-3°C
Tone Control IC TDA 4290-2
TDA 4290-2 S
Bipolar IC
Tone control lC for the DC voltage control of volume, treble, and bass. The volume characteristic
can be changed from linear to physiological.
For mono application we recommend the TDA 4290-2, while the TDA 4290-2 S is especially
suitable for stereo application.
O Few external components
Q High signal-to-noise ratio
O Low total harmonic distortion
O Complies with the IEC 268-3 standards
Maximum ratings
Supply voltage VS 18 V
Control inputs V5, V8, V14 O to Vs V
Input signal V8,,“ 3 V
Load current I2 10 mA
Junction temperature 7] 150 °C
Storage temperature range Tm -40 to 125 “C
Thermal resistance (system-air) Rm SA 90 K/W
Operating range
Supply voltage VS 10.5 to 18 V
Volume control V5 0 to 0.51 x V2 V
Frequency (—1 dB) fi 20 to 20,000 Hz
Ambient temperature TA O to 70 °C
GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) Automatic peak beam current limiter:In a video signal processing system, apparatus for limiting excessive peak and average beam currents demanded by a kinescope in response to image representative video signals. A control signal derived by a sensing circuit in response to excessive beam current is applied to the kinescope in a manner to limit excessive beam currents above a threshold level. The sensing circuit includes a capacitor arranged with a conductive diode to form an average responding filter such that the sensing circuit derives a control voltage representative of excessive average beam current in a first beam current limiting mode. In a second beam limiting mode, when beam current exceeds a predetermined level, the diode is rendered nonconductive and the capacitor is decoupled for average detection purposes. In this mode, the control signal is free to vary in accordance with rapid variations in peak beam current.
1.
In a video signal processing system including a kinescope for
reproducing an image in response to video signals, apparatus for
limiting excessive kinescope current conduction comprising: means for deriving a control signal indicative of variations in the magnitude of kinescope current above a selected threshold level; and
means for utilizing said control signal to limit kinescope current in accordance with the magnitude of said control signal; and wherein
said control signal deriving means includes filter means subject to alternative operation in a first state and a second state; said filter means, when in said first state, exhibiting a restricted pass band such that said control signal is indicative of only relatively long term variations in the magnitude of said kinescope current; said filter means, when in said second state, exhibiting a pass band significantly wider than said restricted pass band such that said control signal additionally follows relatively short term variations in said kinetic current; and said filter means being subject to switching from said first state to said second state when said kinescope current exceeds a predetermined level.
2. Apparatus according to claim 1, wherein said signal deriving means additionally comprises a controlled conduction device exhibiting first and second conductive states in the presence of excess kinescope current exhibiting said relatively long and short term variations, respectively. 3. Apparatus according to claim 2, wherein:
said control signal is developed across the series combination of a filter capacitor and said controlled conduction device, said controlled conduction device exhibiting a high impedance in said second conductive state.
4. Apparatus according to claim 2 and further comprising a source of supply current representative of the magnitude of current conducted by said kinescope, wherein
said signal deriving means is coupled to said current source for sensing the level of said supply current to thereby derive said control signal when said supply current exceeds the threshold le
vel; and a source of reference current is coupled to said controlled device for maintaining said device in said first conductive state, said device exhibiting said second conductive state when said supply current exhibits said relatively short term variations and exceeds a predetermined level.
5. Apparatus according to claim 4, wherein
the magnitude of said reference current exceeds said threshold level;
said controlled device exhibits said first conductive state when the magnitude of supply current exhibits said long term variations and exceeds the threshold level; and
said controlled device exhibits said second conductive state when the magnitude of supply current exhibits said short term variations and exceeds the magnitude of said reference current by a predetermined amount.
6. Apparatus according to claim 4 and further comprising high voltage supply means for providing an operating supply for said kinescope; and wherein
said current source is coupled to an input of said high voltage means and said supply current corresponds to the current drawn by said kinescope from said high voltage means in accordance with the level of kinescope current conduction.
7. Apparatus according to claim 6, wherein:
said current source provides a given current with a magnitude corresponding to said threshold level, said last-named current being supplied to said high voltage means as said supply current in accordance with the level of kinescope current conduction; and
said
controlled device exhibits said second conductive state when said
supply current exceeds the sum of said reference current and said
given current.8. Apparatus according to claim 7, wherein: the level of said reference current is substantially equal to or less than the level of said given current. 9. Apparatus according to claim 4, wherein:
said controlled device comprises a semiconductor PN junction device coupled between a first point and a point of reference potential, said semiconductor being rendered conductive in response to said reference current; and
said filter means comprises a capacitor coupled to said first point and to said current source at a second point remote from said first point, for sensing said supply current.
10. Apparatus according to claim 9, wherein:
said semiconductor device is rendered non-conductive and said capacitor is decoupled from said point of reference potential when supply current exhibiting said relatively short term variations exceeds the magnitude of the said reference current by a predetermined amount.
11. Apparatus according to claim 1 and further comprising:
a channel for processing said video signals;
means for coupling video signals processed by said channel to said kinescope; and wherein
said control signal is coupled to said channel for translating the video signal in a direction to limit excessive kinescope current conduction in accordance with the magnitude of said control signal.
12. Apparatus according to claim 11, wherein:
said control signal is utilized to vary the D.C. level of signals processed by said channel in a direction to limit excessive kinescope current conduction.
13. In a television signal processing system including a kinescope for reproducing an image in response to processed television signals, apparatus for limiting excessive kinescope beam currents exhibiting relatively long term and short term variations, comprising:
a source of supply current representative of the magnitude of beam current demanded by said kinescope;
means including a filter capacitor, coupled to said current source for sensing said supply current to thereby derive a control signal representative of the magnitude of excessive beam current above a given threshold level as manifested by the level of said supply current;
means for coupling said control signal to said kinescope for limiting beam current above the threshold level in accordance with the magnitude of said control signal; and wherein
a threshold conducting device coupled between a terminal of said capacitor remote from said current source and a point of reference potential; and
a source of reference current for biasing said device for conduction between said capacitor terminal and said point of reference potential, the level of said reference current being in predetermined relationship with said threshold current level.
14. Apparatus according to claim 13, wherein:
said control signal is utilized to vary a luminance signal component of said television signal in a direction to limit kinescope beam current conduction above the threshold level; and
said threshold device comprises a semiconductor PN junction device poled for forward current conduction from said capacitor terminal to said reference potential.
Description:
This
invention relates to apparatus for automatically limiting excessive
beam currents drawn by an image reproducing device in a video signal
processing system such as a television receiver. In particular, the
invention relates to such apparatus capable of limiting short duration
peak beam currents as well as average beam currents of relatively
longer duration.
Excessive peak or average beam currents can cause a television receiver to produce a degraded image. In this regard, excess beam currents can cause degradation of the performance of the receiver deflection system which is operatively associated with an image reproducing kinescope, electron beam spot defocussing, and picture blooming. High beam currents can also exceed the safe operating current capability of the kinescope, possibly damaging the kinescope and associated circuit components which may be sensitive to high beam current levels.
Various automatic beam current limiter circuits responsive to average beam current levels are known. These circuits typically respond to excessive beam current levels occurring at a rate not exceeding the vertical image scanning rate of the kinescope. The average responding circuits essentially ignore peak increases in beam current levels occurring only for a few horizontal image lines of a vertical scanning interval, for example. Because of the inherent insensitivity of average responding circuits to transient or peak increases in beam current of less than average duration (e.g., less than a vertical image scanning period), a special problem exists for video signal processing systems wherein it is desired to limit such peak currents for a variety of reasons. Excessive peak beam current levels can be attributable to the information content of a received image-representative video signal, such as a signal representative of black-to-white image transitions occurring in one or more succeeding vertical image scanning intervals. Excessive peak beam currents can also occur as a result of transients produced when switching from one channel of the receiver to another. In any case, excessive peak beam current levels can adversely affect receiver circuits (e.g., deflection circuits) which may be sensitive to high levels of peak beam current, even if the maximum allowable average beam current level has not been exceeded.
Systems
which provide for limiting both average and peak beam currents are
known. For example, U.S. Pat. No. 3,980,822 (Suzuki et al.) discloses
an arrangement wherein excess average beam currents are sensed and
limited by means including a first limiter circuit with a first time
constant. Peak or transient beam currents are sensed and limited by a
second limiter circuit, distinct from the first circuit, exhibiting a
short time constant relative to the first time constant. U.S. Pat. No.
4,017,681 (Smeulers et al.) also discloses an arrangement including a
circuit for detecting excess peak beam currents, and a separate
circuit for detecting excess average beam currents.
An analogous arrangement is disclosed in U.S. Pat. No. 3,914,545 (Engel). This patent describes a system wherein a derived control signal representative of the average level of a luminance signal varies the gain of a luminance signal amplifier inversely with changes in the average level. The control signal is modified by a peak limiter circuit whenever the instantaneous luminance signal exceeds a threshold level. The control signal is further modified by a signal from a beam current limiter network responsive to high levels of average beam current.
Because of the nature of a peak or transient excess beam current condition, a peak beam current limiter should exhibit a rapid response in order to provide appropriate compensation. It is also desirable in many instances for an automatic beam current limiter to be capable of limiting both excessive peak and average beam currents. Particularly in this instance, complex, uneconomical circuit arrangements should be avoided whenever possible.
Apparatus according to the present invention is included in a video signal processing system having a kinescope for reproducing an image in response to video signals, for limiting excessive kinescope current conduction. The apparatus includes a sensing circuit for deriving a control signal indicative of variations in the magnitude of kinescope current above a selected threshold level. The control signal is utilized to limit kinescope current in accordance with the magnitude of the control signal. The sensing circuit includes a filter network subject to alternative operation in first and second states. When in the first operating state, the filter exhibits a restricted pass band such that the control signal is indicative of only relatively long term variations in the magnitude of the kinescope current. When in the second operating state, the filter exhibits a significantly wider pass band such that the control signal additionally follows relatively short term variations in kinescope current. The filter network is subject to switching from the first to the second state when the kinescope current exceeds a predetermined level.
The single FIGURE of the drawing shows, partially in block diagram form and partially in schematic circuit diagram form, a general arrangement of a color television receiver employing apparatus constructed in accordance with the present invention.
The drawing
depicts a color television receiver including a video signal
processing unit 12 for receiving radio frequency signals from an
antenna 10 and for translating these signals through intermediate
frequency amplifying and detecting stages (not shown) to provide a
composite video signal. The composite video signal contains luminance,
chrominance, sound and synchronizing components.
A sync separator 15 serves to separate the synchronizing (sync) component from the composite video signal to provide periodic line sync pulses. These pulses are further processed by sync processing and deflection circuits 16 to provide horizontal flyback signals, and horizontal and vertical blanking and deflection signals as known.
A frequency selection unit 21 (e.g., a bandpass filter) selectively couples the chrominance component of the composite video signal to chrominance signal processing unit 24 (e.g., including amplifier and demodulator stages) to derive R-Y, B-Y and G-Y color difference signals. These signals are applied as inputs to a kinescope driver stage 60.
The luminance component of the composite video signal is amplified and otherwise processed by a luminance signal processing unit 35 in a luminance channel of the receiver. Luminance processing unit 35 includes a luminance signal clamping circuit for providing a clamped luminance output signal Y, as disclosed in a copending U.S. patent application Ser. No. 819,935 of R. P. Parker, now U.S. Pat. No. 4,110,787 entitled "Combined Blanking Level And Kinescope Bias Clamp For A Television Signal Processing System", assigned to the same assignee as the present invention. The periodic operation of the clamping circuit is controlled in response to periodic blanking pulses supplied during each image retrace blanking interval by a source of blanking pulses 54. Periodic auxiliary blanking pulses of predetermined magnitude supplied by an auxiliary blanking unit 45 are added to the luminance signal prior to clamping during each blanking interval. This and other aspects of unit 35 are described in greater detail in the last mentioned U.S. patent ap
plication.
The clamped luminance signal Y is supplied to an input of kinescope driver 60, where the luminance signal is combined with the color difference signals from unit 24 to form R, B and G color signals. These signals are then coupled to signal inputs (e.g., cathode electrodes) of a kinescope 66 for reproducing a color image.
High operating voltages for focus (not shown) and ultor electrodes of kinescope 66 are provided by a high voltage supply 68 (e.g., voltage tripler) in response to positive, periodic horizontal flyback pulses occurring during horizontal retrace scanning intervals. A current supply including a source of positive direct voltage (+27 volts) and a current determining resistor 72 provides a current I S and is coupled to a D.C. input of high voltage unit 68 via a resistor 73. Current flowing in resistor 72 includes a component I R representative of the beam current (i.e., ultor current) demand of the kinescope in response to the luminance and chrominance signals. This current flows into the D.C. input of high voltage unit 68 and is sometimes referred to as a "resupply" current (i.e., a current via the high voltage unit to recharge or resupply the ultor electrode voltage of the kinescope when depleted as a result of beam current conduction). The described current supply is typically associated with the high voltage supply in a television receiver for purposes of providing the resupply current. The resupply current typically consists of current pulses recurring at the horizontal line scanning rate. Some A.C. filtering of horizontal rate voltages which these current pulses tend to produce at the D.C. input terminal of high voltage unit 68 is provided by a filter capacitor 74.
Excessive levels of peak and average beam currents are sensed by a circuit 70. Sensing network 70 is operatively associated with the supply current source including resistor 72, and comprises a large value, average responding filter capacitor 75 and a normally conductive clamp diode 78. Network 70 also includes a normally conductive diode 77 for conductively coupling the negative plate of filter capacitor 75 to a point of reference potential (ground) when beam current demand does not exceed a predetermined level under normal operating conditions of the receiver, and also when a condition of excessive average beam current demand exists, as will be discussed. Diode 77 is forward biased into conduction by a reference current I B of predetermined value, as supplied by a current source including a resistor 76 and a source of positive direct voltage (+27 volts).
A voltage representative of the level of resupply current (i.e., ultor current) is developed on the positive terminal of capacitor 75 when the resupply current exceeds a predetermined threshold level indicating the presence of excessive peak or average beam current demand, as will be explained. This voltage is supplied to an input of a gated automatic beam limiter (ABL) control network 90, which can be of the type disclosed in a copending, concurrently filed U.S. patent application of R. P. Parker, entitled "Gated Automatic Beam Current Limiter In A Video Signal Processing System", and assigned to the present assignee. Unit 90 then develops an output control signal in accordance with the magnitude of the excessive peak or average beam currents. This control signal is applied to luminance processor 35 in such a manner as to translate the luminance signal in a direction to limit excess beam currents.
In accordance with this invention, the otherwise average responding operation of sensing circuit 70 is modified in the presence of high levels of peak or momentary beam current demand, as manifested by resupply current I R . This is accomplished by the coaction of filter capacitor 75 with diode 77 and reference bias current I B .
During normal operating conditions, diode 78 clamps the voltage at the positive terminal of capacitor 75 to +11 volts plus the voltage drop across diode 78 (approximately 0.6 volts), or +11.6 volts. A portion of current I S flows through clamp diode 78 when conducting. The control signal output from ABL network 90 is inhibited during this time, whereby the luminance signal is processed in normal fashion by unit 35.
The value of resistor 72 and the voltage drop thereacross (15.4 volts) determine a normal level of current I S (0.7 milliamperes), which corresponds to a first threshold current level of beam limiter operation. This current divides between diode 78 when conducting and the D.C. input of high voltage source 68 in accordance with the beam current demand of kinescope 66 as manifested by the level of resupply current I R .
Sensing circuit 70 exhibits dual mode operation for sensing both excessive average and peak beam current demand. Diode 77 and reference current I B are specifically employed for this purpose. The threshold level at which peak beam currents are sensed and limited is determined by the magnitude of current I B (approximately 2.25 milliamperes).
When the average resupply current exceeds the first threshold level determined by current I S ,
current drive for clamp diode 78 is depleted and diode 78 ceases
conducting. Since the positive terminal of capacitor 75 is no longer
clamped by diode 78, the voltage at this terminal decreases to a less
positive level at a rate determined by the amount by which the first
threshold current level is exceeded. The ABL control network 90 responds
to this less positive voltage by providing a corresponding output
control signal which serves, for example, to translate the D.C. level of
the luminance signal in a direction to cause kinescope 68 to conduct
proportionally less average beam current. Under this condition, diode
77 remains conductive and current I B flows to ground through diode 77, thereby preserving the role of capacitor 75 as a low pass, average responding filter.
The role of capacitor 75 as an average responding filter is altered when kinescope 66 momentarily demands high peak levels of resupply current. Specifically, as in the case of excessive average current demand, a sudden large increase in resupply current I R in response to beam current demand causes the positive terminal of capacitor 75 to become less positive when the first threshold current level is exceeded.
Diode 77 ceases conducting since the forward bias current for diode 77 otherwise provided by current I B now flows through capacitor 75 instead of through diode 77 to ground, in accordance with the rate of change of capacitor 75 voltage and the magnitude of the peak resupply current demand. This effect is produced since the current through a capacitor (e.g., capacitor 75) is determined by the product of the value of the capacitor and the rate of change of voltage across the capacitor. Thus for a given value of capacitance, the capacitor current increases as the rate of change of capacitor voltage increases. In this instance, the rapid rate of change of the voltage across capacitor 75 is produced in response to the sudden increase in peak resupply current. This rapid rate of voltage change is essentially unaffected by the small value of horizontal rate filter capacitor 74.
With capacitor 75 being decoupled in the presence of a rapid increase in peak resupply current demand as described, the current I B then flowing through capacitor 75 thereafter flows primarily in the res
upply current path
to the resupply current input of high voltage supply 68. The beam
current representative control voltage appearing at the positive
terminal of capacitor 75 decreases rapidly in accordance with any
further rapid increase in the level of resupply current I R ,
since capacitor 75 no longer acts as a low pass, average responding
filter during this condition. The described action permits the beam
limiter control circuitry to respond quickly (i.e., track closely) and
limit rapid or momentary increases in beam current demand, greater
than the vertical scanning rate, in accordance with the magnitude of
the control signal appearing at the positive terminal of capacitor 75.
It is noted that the level at which peak beam current limiting commences can be adjusted to suit the requirements of a particular system by tailoring the value of reference bias current I B . Specifically, peak beam current limiting can be activated sooner by reducing the value of reference current I B . When this rapidly increasing resupply current exhibits a magnitude equal to the sum of reference current I B and supply current I S , the current in capacitor 75 equals current I B . Therefore, diode 77 ceases conducting and capacitor 75 is decoupled from ground. The sum of currents flowing through resistor 76 and resistor 72 then increases in accordance with the amount by which current I R increases above the sum of currents I S and I B .
While the invention has been described in terms of a preferred embodiment, it should be recognized that various modifications can be made by persons skilled in the art without departing from the scope of the invention. Component values and other examples of operating parameters have been mentioned as an aid to understanding the invention and are not intended to be limiting.
Excessive peak or average beam currents can cause a television receiver to produce a degraded image. In this regard, excess beam currents can cause degradation of the performance of the receiver deflection system which is operatively associated with an image reproducing kinescope, electron beam spot defocussing, and picture blooming. High beam currents can also exceed the safe operating current capability of the kinescope, possibly damaging the kinescope and associated circuit components which may be sensitive to high beam current levels.
Various automatic beam current limiter circuits responsive to average beam current levels are known. These circuits typically respond to excessive beam current levels occurring at a rate not exceeding the vertical image scanning rate of the kinescope. The average responding circuits essentially ignore peak increases in beam current levels occurring only for a few horizontal image lines of a vertical scanning interval, for example. Because of the inherent insensitivity of average responding circuits to transient or peak increases in beam current of less than average duration (e.g., less than a vertical image scanning period), a special problem exists for video signal processing systems wherein it is desired to limit such peak currents for a variety of reasons. Excessive peak beam current levels can be attributable to the information content of a received image-representative video signal, such as a signal representative of black-to-white image transitions occurring in one or more succeeding vertical image scanning intervals. Excessive peak beam currents can also occur as a result of transients produced when switching from one channel of the receiver to another. In any case, excessive peak beam current levels can adversely affect receiver circuits (e.g., deflection circuits) which may be sensitive to high levels of peak beam current, even if the maximum allowable average beam current level has not been exceeded.
Systems
which provide for limiting both average and peak beam currents are
known. For example, U.S. Pat. No. 3,980,822 (Suzuki et al.) discloses
an arrangement wherein excess average beam currents are sensed and
limited by means including a first limiter circuit with a first time
constant. Peak or transient beam currents are sensed and limited by a
second limiter circuit, distinct from the first circuit, exhibiting a
short time constant relative to the first time constant. U.S. Pat. No.
4,017,681 (Smeulers et al.) also discloses an arrangement including a
circuit for detecting excess peak beam currents, and a separate
circuit for detecting excess average beam currents. An analogous arrangement is disclosed in U.S. Pat. No. 3,914,545 (Engel). This patent describes a system wherein a derived control signal representative of the average level of a luminance signal varies the gain of a luminance signal amplifier inversely with changes in the average level. The control signal is modified by a peak limiter circuit whenever the instantaneous luminance signal exceeds a threshold level. The control signal is further modified by a signal from a beam current limiter network responsive to high levels of average beam current.
Because of the nature of a peak or transient excess beam current condition, a peak beam current limiter should exhibit a rapid response in order to provide appropriate compensation. It is also desirable in many instances for an automatic beam current limiter to be capable of limiting both excessive peak and average beam currents. Particularly in this instance, complex, uneconomical circuit arrangements should be avoided whenever possible.
Apparatus according to the present invention is included in a video signal processing system having a kinescope for reproducing an image in response to video signals, for limiting excessive kinescope current conduction. The apparatus includes a sensing circuit for deriving a control signal indicative of variations in the magnitude of kinescope current above a selected threshold level. The control signal is utilized to limit kinescope current in accordance with the magnitude of the control signal. The sensing circuit includes a filter network subject to alternative operation in first and second states. When in the first operating state, the filter exhibits a restricted pass band such that the control signal is indicative of only relatively long term variations in the magnitude of the kinescope current. When in the second operating state, the filter exhibits a significantly wider pass band such that the control signal additionally follows relatively short term variations in kinescope current. The filter network is subject to switching from the first to the second state when the kinescope current exceeds a predetermined level.
The single FIGURE of the drawing shows, partially in block diagram form and partially in schematic circuit diagram form, a general arrangement of a color television receiver employing apparatus constructed in accordance with the present invention.
The d
rawing
depicts a color television receiver including a video signal
processing unit 12 for receiving radio frequency signals from an
antenna 10 and for translating these signals through intermediate
frequency amplifying and detecting stages (not shown) to provide a
composite video signal. The composite video signal contains luminance,
chrominance, sound and synchronizing components. A sync separator 15 serves to separate the synchronizing (sync) component from the composite video signal to provide periodic line sync pulses. These pulses are further processed by sync processing and deflection circuits 16 to provide horizontal flyback signals, and horizontal and vertical blanking and deflection signals as known.
A frequency selection unit 21 (e.g., a bandpass filter) selectively couples the chrominance component of the composite video signal to chrominance signal processing unit 24 (e.g., including amplifier and demodulator stages) to derive R-Y, B-Y and G-Y color difference signals. These signals are applied as inputs to a kinescope driver stage 60.
The luminance component of the composite video signal is amplified and otherwise processed by a luminance signal processing unit 35 in a luminance channel of the receiver. Luminance processing unit 35 includes a luminance signal clamping circuit for providing a clamped luminance output signal Y, as disclosed in a copending U.S. patent application Ser. No. 819,935 of R. P. Parker, now U.S. Pat. No. 4,110,787 entitled "Combined Blanking Level And Kinescope Bias Clamp For A Television Signal Processing System", assigned to the same assignee as the present invention. The periodic operation of the clamping circuit is controlled in response to periodic blanking pulses supplied during each image retrace blanking interval by a source of blanking pulses 54. Periodic auxiliary blanking pulses of predetermined magnitude supplied by an auxiliary blanking unit 45 are added to the luminance signal prior to clamping during each blanking interval. This and other aspects of unit 35 are described in greater detail in the last mentioned U.S. patent ap
plication. The clamped luminance signal Y is supplied to an input of kinescope driver 60, where the luminance signal is combined with the color difference signals from unit 24 to form R, B and G color signals. These signals are then coupled to signal inputs (e.g., cathode electrodes) of a kinescope 66 for reproducing a color image.
High operating voltages for focus (not shown) and ultor electrodes of kinescope 66 are provided by a high voltage supply 68 (e.g., voltage tripler) in response to positive, periodic horizontal flyback pulses occurring during horizontal retrace scanning intervals. A current supply including a source of positive direct voltage (+27 volts) and a current determining resistor 72 provides a current I S and is coupled to a D.C. input of high voltage unit 68 via a resistor 73. Current flowing in resistor 72 includes a component I R representative of the beam current (i.e., ultor current) demand of the kinescope in response to the luminance and chrominance signals. This current flows into the D.C. input of high voltage unit 68 and is sometimes referred to as a "resupply" current (i.e., a current via the high voltage unit to recharge or resupply the ultor electrode voltage of the kinescope when depleted as a result of beam current conduction). The described current supply is typically associated with the high voltage supply in a television receiver for purposes of providing the resupply current. The resupply current typically consists of current pulses recurring at the horizontal line scanning rate. Some A.C. filtering of horizontal rate voltages which these current pulses tend to produce at the D.C. input terminal of high voltage unit 68 is provided by a filter capacitor 74.
Excessive levels of peak and average beam currents are sensed by a circuit 70. Sensing network 70 is operatively associated with the supply current source including resistor 72, and comprises a large value, average responding filter capacitor 75 and a normally conductive clamp diode 78. Network 70 also includes a normally conductive diode 77 for conductively coupling the negative plate of filter capacitor 75 to a point of reference potential (ground) when beam current demand does not exceed a predetermined level under normal operating conditions of the receiver, and also when a condition of excessive average beam current demand exists, as will be discussed. Diode 77 is forward biased into conduction by a reference current I B of predetermined value, as supplied by a current source including a resistor 76 and a source of positive direct voltage (+27 volts).
A voltage representative of the level of resupply current (i.e., ultor current) is developed on the positive terminal of capacitor 75 when the resupply current exceeds a predetermined threshold level indicating the presence of excessive peak or average beam current demand, as will be explained. This voltage is supplied to an input of a gated automatic beam limiter (ABL) control network 90, which can be of the type disclosed in a copending, concurrently filed U.S. patent application of R. P. Parker, entitled "Gated Automatic Beam Current Limiter In A Video Signal Processing System", and assigned to the present assignee. Unit 90 then develops an output control signal in accordance with the magnitude of the excessive peak or average beam currents. This control signal is applied to luminance processor 35 in such a manner as to translate the luminance signal in a direction to limit excess beam currents.
In accordance with this invention, the otherwise average responding operation of sensing circuit 70 is modified in th
e presence of high levels of peak or momentary beam current demand, as manifested by resupply current I R . This is accomplished by the coaction of filter capacitor 75 with diode 77 and reference bias current I B . During normal operating conditions, diode 78 clamps the voltage at the positive terminal of capacitor 75 to +11 volts plus the voltage drop across diode 78 (approximately 0.6 volts), or +11.6 volts. A portion of current I S flows through clamp diode 78 when conducting. The control signal output from ABL network 90 is inhibited during this time, whereby the luminance signal is processed in normal fashion by unit 35.
The value of resistor 72 and the voltage drop thereacross (15.4 volts) determine a normal level of current I S (0.7 milliamperes), which corresponds to a first threshold current level of beam limiter operation. This current divides between diode 78 when conducting and the D.C. input of high voltage source 68 in accordance with the beam current demand of kinescope 66 as manifested by the level of resupply current I R .
Sensing circuit 70 exhibits dual mode operation for sensing both excessive average and peak beam current demand. Diode 77 and reference current I B are specifically employed for this purpose. The threshold level at which peak beam currents are sensed and limited is determined by the magnitude of current I B (approximately 2.25 milliamperes).
When the average resupply current exceeds the first threshold level determined by current I S ,
current drive for clamp diode 78 is depleted and diode 78 ceases
conducting. Since the positive terminal of capacitor 75 is no longer
clamped by diode 78, the voltage at this terminal decreases to a less
positive level at a rate determined by the amount by which the first
threshold current level is exceeded. The ABL control network 90 responds
to this less positive voltage by providing a corresponding output
control signal which serves, for example, to translate the D.C. level of
the luminance signal in a direction to cause kinescope 68 to conduct
proportionally less average beam current. Under this condition, diode
77 remains conductive and current I B flows to ground through diode 77, thereby preserving the role of capacitor 75 as a low pass, average responding filter. The role of capacitor 75 as an average responding filter is altered when kinescope 66 momentarily demands high peak levels of resupply current. Specifically, as in the case of excessive average current demand, a sudden large increase in resupply current I R in response to beam current demand causes the positive terminal of capacitor 75 to become less positive when the first threshold current level is exceeded.
Diode 77 ceases conducting since the forward bias current for diode 77 otherwise provided by current I B now flows through capacitor 75 instead of through diode 77 to ground, in accordance with the rate of change of capacitor 75 voltage and the magnitude of the peak resupply current demand. This effect is produced since the current through a capacitor (e.g., capacitor 75) is determined by the product of the value of the capacitor and the rate of change of voltage across the capacitor. Thus for a given value of capacitance, the capacitor current increases as the rate of change of capacitor voltage increases. In this instance, the rapid rate of change of the voltage across capacitor 75 is produced in response to the sudden increase in peak resupply current. This rapid rate of voltage change is essentially unaffected by the small value of horizontal rate filter capacitor 74.
With capacitor 75 being decoupled in the presence of a rapid increase in peak resupply current demand as described, the current I B then flowing through capacitor 75 thereafter flows primarily in the res
upply current path
to the resupply current input of high voltage supply 68. The beam
current representative control voltage appearing at the positive
terminal of capacitor 75 decreases rapidly in accordance with any
further rapid increase in the level of resupply current I R ,
since capacitor 75 no longer acts as a low pass, average responding
filter during this condition. The described action permits the beam
limiter control circuitry to respond quickly (i.e., track closely) and
limit rapid or momentary increases in beam current demand, greater
than the vertical scanning rate, in accordance with the magnitude of
the control signal appearing at the positive terminal of capacitor 75.
It is noted that the level at which peak beam current limiting commences can be adjusted to suit the requirements of a particular system by tailoring the value of reference bias current I B . Specifically, peak beam current limiting can be activated sooner by reducing the value of reference current I B . When this rapidly increasing resupply current exhibits a magnitude equal to the sum of reference current I B and supply current I S , the current in capacitor 75 equals current I B . Therefore, diode 77 ceases conducting and capacitor 75 is decoupled from ground. The sum of currents flowing through resistor 76 and resistor 72 then increases in accordance with the amount by which current I R increases above the sum of currents I S and I B .
While the invention has been described in terms of a preferred embodiment, it should be recognized that various modifications can be made by persons skilled in the art without departing from the scope of the invention. Component values and other examples of operating parameters have been mentioned as an aid to understanding the invention and are not intended to be limiting.
LINE DEFLECTION TRANSFORMER 29201-007.01 OR BV9279-066.01 and
THYRISTORS
- SIEMENS BST CC0 146 RUG (RCA ITR17053) RETURN THYRISTOR (Ruecklauf)
- SIEMENS BST CD 543 H1G (RCA ITR17052) TRACE THYRISTOR (Hinlauf)
- RCA 17127 REGULATION PHASE THYRISTOR (regelung)
GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) INTEGRAL THYRISTOR-RECTIFIER DEVICEA semiconductor switching device comprising a silicon controlled rectifier (SCR) and a diode rectifier integrally connected in parallel with the SCR in a single semiconductor body. The device is of the NPNP or PNPN type, having gate, cathode, and anode electrodes. A portion of each intermediate N and P region makes ohmic contact to the respective anode or cathode electrode of the SCR. In addition, each intermediate region includes a highly conductive edge portion. These portions are spaced from the adjacent external regions by relatively low conductive portions, and limit the conduction of the diode rectifier to the periphery of the device. A profile of gold recombination centers further electrically isolates the central SCR portion from the peripheral diode portion.
That class of thyristors known as controlled rectifiers are semiconductor switches having four semiconducting regions of alternate conductivity and which employ anode, cathode, and gate electrodes. These devices are usually fabricated from silicon. In its normal state, the silicon controlled rectifier (SCR) is non-conductive until an appropriate voltage or current pulse is applied to the gate electrode, at which point current flows from the anode to the cathode and delivers power to a load circuit. If the SCR is reverse biased, it is non-conductive, and cannot be turned on by a gating signal. Once conduction starts, the gate loses control and current flows from the anode to the cathode until it drops below a certain value (called the holding current), at which point the SCR turns off and the gate electrode regains control. The SCR is thus a solid state device capable of performing the circuit function of a thyratron tube in many electronic applications. In some of these applications, such as in automobile ignition systems and horizontal deflection circuits in television receivers, it is necessary to connect a separate rectifier diode in parallel with the SCR. See, for example, W. Dietz, U. S. Pat. Nos. 3,452,244 and 3,449,623. In these applications, the anode of the rectifier diode is connected to the cathode of the SCR, and the cathode of the rectifier is connected to the SCR anode. Thus, the rectifier diode will be forward biased and current will flow through it when the SCR is reverse biased; i.e., when the SCR cathode is positive with respect to its anode. For reasons of economy and ease of handling, it would be preferable if the circuit function of the SCR and the associated diode rectifier could be combined in a single device, so that instead of requiring two devices and five electrical connections, one device and three electrical connections are all that would be necessary. In fact, because of the semiconductor profile employed, many SCR's of the shorted emitter variety inherently function as a diode rectifier when reverse biased. However, the diode rectifier function of such devices is not isolated from the controlled rectifier portion, thus preventing a rapid transition from one function to the other. Therefore, it would be desirable to physically and electrically isolate the diode rectifier portion from that portion of the device which functions as an SCR.
GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) Horizontal deflection circuit, Thyristor horizontal output circuits:
Description:
1. A horizontal deflection circuit for generating the deflection current in the deflection coil of a television picture tube wherein a first switch controls the horizontal sweep, and wherein a second switch in a so-called commutation circuit with a commutating inductor and a commutating capacitor opens the first switch and, in addition, controls the energy transfer from a dc voltage source to an input inductor, characterized in that the input inductor (Le) and the commutating inductor (Lk) are combined in a unit designed as a transformer (U) which is proportioned so that the open-circuit inductance of the transformer is essentially equal to the value of the input inductor (Le), while the short-circuit inductance of the transformer (U) is essentially equal to the value of the commutating inductor (Lk), and that the second switch (S2) is connected in series with the dc voltage source (UB) and a first winding (U1) of the transformer (U). 2. A horizontal deflection circuit according to claim 1, characterized in that the transformer (U) operates as an isolation transformer between the supply (UB) and the subcircuits connected to a second winding. 3. A horizontal deflection circuit according to claim 1, characterized in that the second switch (S2) is connected between ground and that terminal of the first winding (U1) of the transformer (U) not connected to the supply potential (+UB). 4. A horizontal deflection circuit according to claim 1, characterized in that a capacitor (CE) is connected across the series combination of the first winding (U1) of the transformer and the second switch (S2). 5. A horizontal deflection circuit according to claim 1, characterized in that the second winding (U2) of the transformer (U) is connected in series with a first switch (S1), the commutating capacitor (Ck), and a third, bipolar switch (S3) controllable as a function of the value of a controlled variable developed in the deflection circuit. 6. A horizontal deflection circuit according to claim 5, characterized in that the third switch (S3) is connected between ground and the second winding (U2) of the transformer. 7. A horizontal deflection circuit according to claim 2, characterized in that the isolation transformer carries a third winding via which power is supplied to the audio output stage of the television set. 8. A horizontal deflection circuit according to claims 2, characterized in that the voltage serving to control the first switch (S1) is derived from a third winding of the transformer.
Description:
The
present invention relates to a horizontal deflection circuit for
generating the deflection current in the deflection coil of a television
picture tube wherein a first switch controls the horizontal sweep, and
wherein a second switch in a so-called commutation circuit with a
commutating inductor and a commutating capacitor opens the first switch
and, in addition, controls the energy transfer from a dc voltage source
to an input inductor. German Auslegeschrift (DT-AS) No. 1,537,308 discloses a horizontal deflection circuit in which, for generating a periodic sawtooth current within the respective deflection coil of the picture tube, in a first branch circuit, the deflection coil is connected to a sufficiently large capacitor serving as a current source via a first controlled, bilaterally conductive switch which is formed by a controlled rectifier and a diode connected in inverse parallel. The control electrode of the rectifier is connected to a drive pulse source which renders the switch conductive during part of the sawtooth trace period. In that arrangement, the sawtooth retrace, i.e. the current reversal, also referred to as "commutation", is initiated by a second controlled switch.
The first controlled switch also forms part of a second branch circuit where it is connected in series with a second current source and a reactance capable of oscillating. When the first switch is closed, the reactance, consisting essentially of a coil and a capacitor, receives energy from the second current source during a fixed time interval. This energy which is taken from the second current source corresponds to the circuit losses caused during the previous deflection cycle.
As can be seen, such a circuit needs two different, separate inductive elements, it being known that inductive elements are expensive to manufacture and always have a certain volume determined by the electrical properties required.
The object of the invention is to reduce the amount of inductive elements required.
The invention is characterized in that the input inductor and the commutating inductor are combined in a unit designed as a transformer which is proportioned so that the open-circuit inductance of the transformer is essentially equal to the value of the input inductor, while the short-circuit inductance of the transformer is essentially equal to the value of the commutating inductor, and that the second switch is connected in series with the dc voltage source and a first winding of the transformer.
This solution has an added advantage in that, in mass production, both the open-circuit and the short-circuit inductance are reproducible with reliability.
According to another feature of the invention, the electrical isolation between the windings of the transformer is such that the transformer operates as an isolation transformer between the supply and the subcircuits connected to a second winding or to additional windings of the transformer. In this manner, the transformer additionally provides reliable mains isolatio
n. According to a further feature of the invention, the second switch is connected between ground and that terminal of the first winding of the transformer not connected to the supply potential. This simplifies the control of the switch.
According to a further feature of the invention, to regulate the energy supply, the second winding of the transformer is connected in series with the first switch, the commutating capacitor, and a third, bipolar switch controllable as a function of the value of a controlled variable developed in the deflection circuit.
The advantage gained by this measure lies in the fact that the control takes place on the side separated from the mains, so no separate isolation device is required for the gating of the third switch. Further details and advantages will be apparent from the following description of the accompanying drawings and from the claims. In the drawings,
FIG. 1 is a basic circuit diagram of the arrangement disclosed in German Auslegeschrift (DT-AS) No. 1,537,308;
FIG. 2 shows a first embodiment of the horizontal deflection circuit according to the invention, and
FIG. 3 shows a development of the horizontal deflection circuit according to the invention.
FIG. 1 shows the essential circuit elements of the horizontal deflection circuit known from the German Auslegeschrift (DT-AS) No. 1,537,308 referred to by way of introduction.
Connected in series with a dc voltage source UB is an input inductor Le and a bipolar, controlled switch S2. In the following, this switch will be referred to as the "second switch"; it is usually called the "commutating switch" to indicate its function.
In known circuits, the second switch S2 consists of a controlled rectifier and a diode connected in inverse parallel.
The second switch S2 also forms part of a second circuit which contains, in addition, a commutating ind
uctor
Lk, a commutating capacitor Ck, and a first switch S1. The first switch
S1, controlling the horizontal sweep, is constructed in the same manner
as the above-described second switch S2, consisting of a controlled
rectifier and a diode in inverse parallel. Connected in parallel with
this first switch is a deflection-coil arrangement AS with a capacitor
CA as well as a high voltage generating arrangement (not shown). In
FIGS. 1, 2, and 3, this arrangement is only indicated by an arrow and by
the reference characters Hsp. The operation of this known horizontal
deflection circuit need not be explained here in detail since it is
described not only in the German Auslegeschrift referred to by way of
introduction, but also in many other publications. FIGS. 2 and 3 show the horizontal deflection circuit modified in accordance with the present invention. Like circuit elements are designated by the same reference characters as in FIG. 1.
FIG. 2 shows the basic principle of the invention. The two inductors Le and Lk of FIG. 1 have been replaced by a transformer U. To be able to serve as a substitute for the two inductors Le and Lk, the transformer must be proportioned in a special manner. Regardless of the turns ratio, the open-circuit inductance of the transformer is chosen to be essentially equal to the value of the input inductor Le, and the short-circuit inductance of the transformer is essentially equal to the value of the commutating inductor Lk.
To permit the second switch S2 to be utilized for the connection of the dc voltage source UB, it is included in the circuit of that winding U1 of the transformer connected to the dc voltage UB.
In principle, it is of no consequence for the operation of the switch S2 whether it is inserted on that side of the winding U1 connected to the positive operating potential +UB or on the side connected to ground. In practice, however, the solution shown in FIGS. 2 and 3 will be chosen since the gating of the controlled rectifier is less problematic in this case.
In compliance with
pertinent safety regulations, the transformer U may be designed as an
isolation transformer and can thus provide mains separation, which is
necessary for various reasons. It is known from German
Offenlegungschrift (DT-OS) No. 2,233,249 to provide dc isolation by
designing the commutating inductor as a transformer, but this measure is
not suited to attaining the object of the present invention. If the energy to be taken from the dc voltage source is to be controlled as a function of the energy needed in the horizontal deflection circuit and in following subcircuits, the embodiment of the horizontal deflection circuit of FIG. 3 may be used.
The circuit including the winding U2 of the transformer U contains a third controlled switch S3, which, too, is inserted on the grounded side of the winding U2 for the reasons mentioned above. This third switch S3, just as the second switch S2, is operated at the frequency of a horizontal oscillator HO, but a control circuit RS whose input l is fed with a controlled variable is inserted between the oscillator and the switch S3. Depending on this controlled variable, the controlled rectifier of the third switch S3 can be caused to turn on earlier. A suitable controlled variable containing information on the energy consumption is, for example, the flyback pulse capable of being taken from the high voltage generating circuit (not shown). Details of the operation of this kind of energy control are described in applicant's German Offenlegungsschrift (DT-OS) No. b 2,253,386 and do not form part of the present invention.
With mains isolation, the additional, third switch S3 shown here has the advantage of being on the side isolated from the mains and eliminates the need for an isolation device in the control lead of the controlled rectifier.
As an isolation transformer, the transformer U may also carry additional windings U3 and U4 if power is to be supplied to the audio output stage, for example; in addition, the first switch S1 may be gated via such an additional winding.
The points marked at the windings U1 and U2 indicate the phase relationship between the respective voltages. Connected in parallel with the winding U1 and the second switch S2 is a capacitor CE which completes the circuit for the horizontal-frequency alternating current; this serves in particular to bypass the dc voltage source or the electrolytic capacitors contained therein.
If required, a well-known tuning coil may be inserted, e.g. in series with the second winding U2, without changing the basic operation of the horizontal deflection circuit according to the invention.
GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) Electron beam deflection circuit including thyristors Further Discussion and deepening of knowledge, Thyristor horizontal output circuits:
1.
An electron beam deflection circuit for a cathode ray tube with
electromagnetic deflection by means of a sawtooth current waveform
having a trace portion and a retrace portion, said circuit comprising: a
deflection winding; a first source of electrical energy formed by a
first capacitor; first controllable switching means comprising a
parallel combination of a first thyristor and a first diode connected
together to conduct in opposite directions, for connecting said winding
to said first source during said trace portion, while said first
switching means is turned on; a second source of electrical energy
including a first inductive energy storage means coupled to a voltage
supply; reactive circuit means including a combination of inductive and
capacitive reactances for storing the energy supplied by said second
source; second controllable switching means, substantially similar to
said first one, for completing a circuit including said reactive circuit
means and said first switching means, when turned on before the end of
said trace portion, so as to pass through said first switching means an
oscillatory current in opposite direction to that which passes through
said first thyristor from said first source and to turn said first
thyristor off after these two currents cancel out, the oscillatory
current flowing thereafter through said first diode for an interval
termed the circuit turn-off time, which has to be greater than the
turn-off time of said first thyristor; wherein the improvement
comprises: means for drawing, during at least a part of said trace
portion, a substantial amount of additional current through said first
switching means, in the direction of conduction of said first diode,
whereby to perceptibly shift the waveform of the current flowing through
said first switching means towards the negative values by an amount
equal to that of said substantial additional current and to lengthen, in
proportion thereto, said circuit turn-off time, without altering the
values of the reactances in the reactive circuit which intervene in the
determination of both the circuit turn-off and retrace portion time
intervals.
2. A deflection circuit as claimed in claim 1, wherein said amount of additional current is greater than or equal to 5 per cent of the peak-to-peak value of the current flowing through the deflection winding.
3. A deflection circuit as claimed in claim 1, wherein said means for drawing a substantial amount of additional current through said first switching means comprises a resistor connected in parallel to said first capacitor.
4. A deflection circuit as claimed in claim 1, wherein said means for drawing an additional current is formed by connecting said first and second energy sources in series so that the current charging said reactive circuit means forms the said additional current.
5. A deflection circuit as claimed in claim 1, further including a series combination of an autotransformer winding and a second high-value capacitor, said combination being connected in parallel to said first switching means, wherein said autotransformer comprises an intermediate tap located between its terminals respectively connected to said first switching means and to said second capacitor, said tap delivering, during said trace portion, a suitable DC supply voltage lower than the voltage across said second capacitor; and wherein said means for drawing a substantial amount of additional current comprises a load to be fed by said supply voltage and having one terminal connected to ground; and further controllable switching means controlled to conduct during at least part of said trace portion and to remain cut off during said retrace portion, said further switching means being connected between said tap and the other terminal of said load.
Description:
The
present invention relates to electron beam deflection circuits
including thyristors, such as silicon controlled rectifiers and relates,
in particular, to horizontal deflection circuits for television
receivers.
The
present invention constitutes an improvement in the circuit described
in U.S. Pat. No. 3,449,623 filed on Sept. 6, 1966, this circuit being
described in greater detail below with reference to FIGS. 1 and 2 of the
accompanying drawings. A deflection circuit of this type comprises a
first thyristor switch which allows the conenction of the horizontal
deflection winding to a constant voltage source during the time interval
used for the transmisstion of the picture signal and for applying this
signal to the grid of the cathode ray tube (this interval will be termed
the "trace portion" of the scan), and a second thyristor switch which
provides the forced commutation of the first one by applying to it a
reverse current of equal amplitude to that which passes through it from
the said voltage source and thus to initiate the retrace during the
horizontal blanking interval.
A undirectional reverse blocking triode type thyristor or silicon controlled rectifier (SCR), such as that used in the aformentioned circuit, requires a certain turn-off time between the instant at which the anode current ceases and the instant at which a positive bias may be applied to it without turning it on, due to the fact that there is still a high concentration of free carriers in the vicinity of the middle junction, this concentration being reduced by a process of recombination independently from the reverse polarity applied to the thyristor. This turn-off time of the thyristor is a function of a number of parameters such as the junction temperature, the DC current level, the decay time of the direct current, the peak level of the reverse current applied, the amplitude of the reverse anode to cathode voltage, the external impedance of the gate electrode, and so on, certain of these varying considerably from one thyristor to another.
In horizontal deflection circuits for television receivers, the flyback or retrace time is limited to approximately 20 percent of the horizontal scan period, the retrace time being in the case of the CCIR standard of 625 lines, approximately 12 microseconds and, in the case of the French standard of 819 lines, approximately 9 microseconds. During this relatively short interval, the thyristor has to be rendered non-conducting and the electron beam has to be returned to the origin of the scan. The first thyristor is blocked by means of a series resonant LC circuit which is subject to a certain number of restrictions (limitations as to the component values employed) due to the fact that, inter alia, it simultaneously determines the turn-off time of the circuit which blocks the thyristor and it forms part of the series resonant circuit which is to carry out the retrace. To obtain proper operation of the deflection circuit of the aforementioned Patent, especially when used for the French standard of 819 lines per image, the values of the components used have to subject to very close tolerances (approximately 2%), which results in high costs.
The improved deflection circuit, object of the present invention, allows the lengthening of the turn-off time of the circuit for turning the scan thyristor off, without altering the values of the LC circuit, which are determined by other criteria, and without impairing the operation of the circuit.
According
to the invention, there is provided an electron beam deflection circuit
for a cathode ray tube with electromagentic deflection by means of a
sawtooth current waveform having a trace portion and a retrace portion,
said circuit comprising: a deflection winding; a first source of
electrical energy formed by a first capacitor; first controllable
switching means comprising a parallel combination of a first thyristor
and a first diode, connected together to conduct in opposite directions,
for connecting said winding to said first source during said trace
portion when said first switching means is turned on; a second source of
electrical energy including a first inductive energy storage means
coupled to a voltage supply; reactive circuit means including a
combination of inductive and capacitive reactances for storing the
energy supplied by the said second source; a second controllable
switching means, substantially identical with the first one, for
completing a circuit including said reactive circuit means and said
first switching means, when turned on, so as to pass through said first
thyristor an oscillatory current in the opposite direction to that which
passes through it from said first source and to turn it off after these
two currents cancel out, the oscillatory current then flowing through
said first diode for an interval termed the circuit turn-off time which
has to be greater than the turn-off time of said first thyristor; and
means for drawing duing at least a part of said trace portion a
substantial amount of additional current from said first switching means
in the direction of conduction of said first diode, whereby said
circuit turn-off time is lengthened in proportion to the amount of said
additional current, without altering the values of the reactances in the
reactive circuit by shifting the waveform of the current flowing
through said first switching means towards the negative by an amount
equal to that of said additional current.
A further object of the invention consists in using the supplementary current in the recovery diode of the first switching means to produce a DC voltage which may be used as a power supply for the vertical deflection circuit of the television receiver, for example.
The invention will be better understood and other features and advantages thereof will become apparent from the following description and the accompanying drawings, given by way of example, and in which:
FIG. 1 is a schematic circuit diagram partially in bloc diagram form of a prior art deflection circuit according to the aforementioned Patent;
FIG. 2 shows waveforms of currents and voltages generated at various points in the circuit of FIG. 1;
FIG. 3 is a schematic diagram of a deflection circuit according to the invention which allows the principle of the improvement to be explained;
FIG. 4 is a diagram of the waveforms of the current through the first switching means 4, 5 of the circuit of FIG. 3;
FIG. 5 is a circuit diagram of another embodiment of the circuit according to the invention;
FIG. 6 is a schematic representation of the preferred embodiment of the circuit according to the invention; and
FIG. 7 shows voltage waveforms at various points of the high voltage autotransformer 21 of FIG. 6.
In all these Figures the same reference numerals refer to the same components.
FIG.
1 shows the horizontal deflection circuit described and claimed in the
U.S. Pat. No. 3,449,623 mentioned above, which comprises a first source
of electrical energy in the shape of a first capacitor 2 having a high
capacitance C 2 for supplying a substantially constant voltage Uc 2
across its terminals. A first terminal of the first capacitor 2 is
connected to ground, whilst its second terminal which supplies a
positive voltage is connected to one of the terminals of a horizontal
deflection winding shown as a first inductance 1. A first switching
means 3, consisting of a first reverse blocking triode thyristor 4 (SCR)
and a first recovery diode 5 in parallel, the two being interconnected
to conduct current in opposite directions, is connected in parallel with
the series combination formed by the deflection winding 1 and the first
capacitor 2. The assembly of components 1, 2, 4 and 5 forms the final
stage of the horizontal deflection circuit in a television receiver
using electromagnetic delfection.
The deflection circuit also includes a drive stage for this final stage which here controls the turning off of the first thyristor 4 to produce the retrace or fly-back portion of the scan during the line-blanking intervals i.e. while the picture signal is not transmitted. This driver stage comprises a second voltage source in the shape of a DC power supply 6 which delivers a constant high voltage E. The negative terminal of the power supply 6 is connected to ground and its positive terminal to one of the terminals of a second inductance 7 of relatively high value, which draws a substantially lineraly varying current from the power supply 6 to avoid its overloading. The other terminal of the second inductance 7 is connected, on the one hand, to the junction of the deflection winding 1 and the first switching means 3 by means of a second inductance 8 and a second capacitor 9 in series and, on the other hand, to one of the terminals of a second controllable bi-directionally conducting switching means 10, similar to the first one 3, including a parallel combination of a second thyristor 11 and a second recovery diode 12 also arranged to conduct in opposite directions.
The respective values of the third inductance 8 (L 8 ) and of the second capacitor 9 (C 9 ) are principally selected so that, on the one hand, one half-cycle of oscillation of the first series resonant circuit L 8 - C 9 , (i.e. π √ L 8 . C 9 ) is longer than the turn-off time of the first thyristor 4, but still is as short as possible since this time interval determines the speed of the commutation of the thyristor 4, and, on the other hand, one half-cycle of oscillation of another series resonant circuit formed by L 1 , L 8 and C 9 , i.e. π √ (L 1 + L 8 ) . C 9 , is substantially equal to the required retrace time interval (i.e. shorter than the horizontal blanking interval).
The gate (control electrode) of the second thyristor 11 is coupled to the output of the horizontal oscillator 13 of the television receiver by means of a first pulse transformer 14 and a first pulse shaping circuit 15 so that it is fed short triggering pulses which are to turn it on.
The gate of the first thyristor 4 fed with signals of a substantially rectangular waveform which are negative during the horizontal blanking intervals, is coupled to a winding 16 by means of a second pulse shaping circuit 17, the winding 16 being magnetically coupled to the second inductance 7 to make up the secondary winding of a transformer of which the inductance 7 forms the primary winding. It will be noted here that it is also possible to couple the secondary winding 16 magnetically to a primary winding connected to a suitable output (not shown) of the horizontal oscillator 13.
The operation of a circuit of this type will be explained below with reference to FIG. 2 which shows the waveforms at various points in the circuit of FIG. 1 during approximately one line period.
FIG. 2 is not to scale since one line period (t 7 - t 0 )
is equal to 64 microseconds in the case of 625 lines and 49
microseconds in the case of 819 lines, while the durations of the
respective horizontal blanking intervals are approximately 12 and 9.5
microseconds.
Waveform A shows the form of the current i L1 passing through deflection winding 1, this current having a sawtooth waveform substantially linear from t 0 to t 3 and from t 5 to t 7 , and crossing zero at time instants t 0 and t 7 , and reaching values of + I 1m and - I 1m , at time instants t 3 and t 5 respectively, these being its maximum positive and negative amplitudes.
During the second half of the trace portion of the horizontal deflection cycle, that is to say from t 0 to t 3 , the thyristor 4 of the first switching means 3 is conductive and makes the high value capacitor 2 discharge through the deflector winding 1, which has a high inductance, so that current i L1 increases linearly.
A few microseconds (5 to 8 μ s) before the end of the trace portion, i.e. at time instant t 1 , the trigger of the second thyristor 11 receives a short voltage pulse V G11 which causes it to turn on as its anode is at this instant at a positive potential with respect to ground, which is due to the charging of the second capacitor 9 through inductances 7 and 8 by the voltage E from the power supply 6.
When thyristor 11 is made conductive at time t 1 , on the one hand, inductance 7 is connected between ground and the voltage source 6 and a linearly increasing current flows through it and, on the other hand, the reactive circuit 8, 9 forms a loop through the second and first switching means 10 and 3, thus forming a resonant circuit which draws an oscillatory current i 8 ,9 of frequency ##EQU1##
This oscillatory current i 8 ,9 will pass through the first switching means 3, i.e. thyristor 4 and diode 5, in the opposite direction to that of current i L1 . Since the frequency f 1 is high, current i 8 ,9 will increase more rapidly than i L1 and will reach the same level at time t 2 , that is to say i 8 ,9 (t 2 ) = -i L1 (t 2 ) and these currents will cancel out in the thyristor 4 in accordance with the well known principle of forced commutation. After time instant t 2 , current i 8 ,9 continues to increase more rapidly than i L1 , but the difference between them (i 8 ,9 - i L1 ) passes the diode 5 (see wave form B) until it becomes zero at time instant t 3 which is the turn off time instant of the first switching means 3, at which the retrace begi
ns.
The interval between the time instant t 2 and t 3 , i.e. (t 3 -t 2 ), during which diode 5 is conductive and the thyristor is reverse biased will be termed in what follows the circuit turn-off time and it should be greater than the turn-off time of the thyristor 4 itself since the latter will subsequently become foward biased (i.e. from t 3 to t 5 ) by the retrace or flyback pulse (see waveform E) which should not trigger it.
At time instant t 3 , the switching means 3 is opened (i 4 and i 5 are both zero -- see waveforms B and C) and the reactive circuit 8, 9 forms a loop through capacitor 2 and the deflection coil 1 and thus a series resonant circuit including (L 1 + L 8 ) and C 9 , C 2 being of high value and representing a short circuit for the flyback frequency ##EQU2## thus obtained.
The retrace which stated at time t 3 takes place during one half-cycle of the resonant circuit formed by reactances L 1 , L 8 and C 9 , i.e. during the interval between t 3 and t 5 . In the middle of this interval i.e. at time instant t 4 , both i L1 (waveform A) and i 8 ,9 (waveform D) pass through zero and change their sign, whereas the voltage at the terminals of the first switching means 3 (V 3 , waveform E) passes through a maximum. Thus, from t 4 onwards, thyristor 11 will be reverse biased and diode 12 will
conduct
the current from the resonant circuit 1, 8 and 9 in order to turn the
second thyristor 11 off.
At time instant t 5 , when current i L1 has reached - I 1m and when voltage v 3 falls to zero, diode 5 of the first switching means 3 becomes conductive and the trace portion of scan begins.
Current i 8 ,9 nevertheless continues to flow in the resonant circuit 8, 9 through diodes 5 and 12, which causes a break to appear in waveform D at t 5 , and a negative peak to appear in waveform D and a positive one in waveform B in the interval between t 5 and t 6 , these being principally due to the distributed capacities of coil 1 or to an eventual capacitor (not shown) connected in parallel to the first switching means 3.
At time instant t 6 , diode 12 of the second switching means 10 ceases to conduct after having allowed thyristor 11 time to become turned off completely.
The level of current i 8 ,9 at time instant t 5 (i.e. I c ) as well as the negative peak I D12 in i 8 ,9 and the positive peak I D5 in i 5 depend on the values of L 8 and C 9 in the same way as does the turn-off time of the circuit (t 3 - t 2 ). If, for example, L 8 and C 9 , are increased I D5 increases towards zero and this could cause diode 5 to be cut off in an undesirable fashion. I c also increases towards zero, which is liable to cause diode 12 to be blocked and thyristor 11 to trigger prematurely.
From the foregoing it can be clearly seen that the choice of values for L 8 and C 9 is subject to four limitations which prevent the values from being increased to lengthen the turn-off time of the driver circuit of first switching thyristor 4 so as to forestall its spurious triggering.
Waveform F shows the voltage v G4 obtained at the gate of thyristor 4 from the secondary winding 16 coupled to the inductor 7. This voltage is positive from t 0 to t 1 and from t 6 to t 7 and is negative between t 2 and t 6 i.e. while the second switching means 10 is conducting.
The present invention makes the lengthening of the turn-off time of thyristor 4 possible without altering the parameters of the circuit such as inductance 8 and capacitor 9.
In
the circuit shown in FIG. 3, which illustrates the principle of the
present invention, means are added to the circuit in FIG. 1 which enable
the turn-off time to be lengthened by connecting a load to diode 5 so
as to increase the current which flows through it during the time that
it is conductive. These means are here formed by a resistor 18 connected
in parallel with a capacitor 20 (which replaces capacitor 2) which is
of a higher capacitance so that, in practice, it holds its charge during
at least one half of the line period. FIG. 4, which shows the waveform
of the current in the first switching means 3 for a circuit as shown in
FIG. 3, makes it possible to explain how this lenthening of the turn-off
time is achieved.
In FIG. 4, the broken lines show the waveform of the current in the first switch device 3 in the circuit of FIG. 1, this waveform being produced by adding waveforms B and C of FIG. 2. The current i 4 above the axis flows through thyristor 4 and current i 5 below the axis flows through diode 5. When the capacitance C 20 of the capacitor in series with the deflector coil is increased to some tens of microfarads (C 2 having been of the order of 1 μ F) and when there is connected in parallel with capacitor 20 a resistor 18 the value of which is calculated to draw a strong current I R18 from capacitor 20, that is to say a current at least equal to 0,1 I m (I m being of the order of some tens of amperes), current I R18 is added to that i 5 which flows through diode 5 without in any way altering the linearity of the trace portion nor the oscillatory commutation of thyristor 4 which is brought about by the resonant circuit L 8 , C 9 .
The fact of loading capacitor C 20 by means of a resistor 18 thus has the effect of permanently displacing the waveform of the current in the negative direction by I R18 . Thus, during the trace portion of the scan, the transfer of the current from the diode 5 to the thyristor 4 begins at time t 10 instead of t 0 , that is
to say with a delay proportional to I R18 .
The effect of the triggering pulse delivered by the horizontal
oscillator (13 FIG. 1) to the second thyristor 11 at time instant t 1 , will be to start the commutation process of the first thyristor 4 when the current it draws is less by I R18 than that i 4 (t 1 )
which it would have been drawing had there been no resistor 18. Because
of this, the turn-off time of the thyristor 4 proper, which as has been
mentioned increases with the maximum current level passing throught it,
is slightly reduced. Moreover, because the oscillatory current i 8 ,9 (FIG. 2) from circuit L 8 , C 9 which flows through thyristor 4 in the opposite direction is unchanged, it reaches a value equal to that of the current i L1 (FIG. 1) flowing in the coil 1 in a shorter time, that is to say at time t 12 . Diode 5 will thus take the oscillatory current i 8 ,9 (FIG. 2) over in advance with respect ro time instant t 2 and will conduct it until it reaches zero value at a time instant t 13 later than t 3 , the amounts of advance (t 2 - t 12 ) and delay (t 13 - t 3 ) being practically equal.
It can thus be seen in FIG. 4 that the circuit turn-off time T R of a circuit according to the invention and illustrated by FIG. 3 is distinctly longer than that T r of the circuit in FIG. 1. This increase in the turn-off time (T R - T r ) depends on the current I R18 and increases therewith.
It should be noted at this point that the current I R18 produces a voltage drop at the terminals of the resistor the only effect of which is to heat up the resistor since the level of this voltage (40 to 60 volts) does not necessarily have a suitable value to be used as a voltage supply for other circuits in an existing transistorised television receiver.
In accordance with one embodiment of the invention, illustrated in FIG. 5, an application is proposed for the additional current which is to be drawn through diode 5. In FIG. 5, the positive terminal of capacitor 20 is connected by a conductor 19 to the negative pole of the power supply 6 and the voltage at the terminals of capacitor 20 is thus added to that E from the source 6.
In the preferred embodiment of the present invention, which is shown in FIG. 6, it is possible to cause a supplementary current of a desired value to flow through the first diode 5 while obtaining a voltage which has a suitable value for use in another circuit in the television receiver.
If the voltage at the terminals of capacitor 20 in FIG. 3 is not a usable value, it is possible to connect in parallel with the series circuit comprising the deflector coil 1 and the capacitor 2 in FIG. 1, i.e. in parallel with the terminals of the first switching means 3, a series combination of an autotransformer 21 and a high value capacitor 22 (comparable with capacitor 20 in FIGS. 3 and 5). The autotransformer 21 has a tap 23 is suitably positioned between the terminal connected to capacitor 22 at the tap 24 connected to the first switching means 3. This autotransformer 21 may be formed by the one conventionally used for supplying a very high voltage to the cathode ray tube, as described for example in U.S. Pat. No. 3,452,244; such a transformer comprises a voltage step-up winding between taps 24 and 25, which latter is connected to a high voltage rectifier (not shown).
The waveform of the voltage at the various points in the autotransformer is shown in FIG. 7, in which waveform A shows the voltage at the terminals of capacitor 22, waveform B the voltage at tap 24 and waveform C the voltage at tap 23 of the autotransformer 21.
The voltage V c22 at the terminals of capacitor 22 varies slightly about a mean value V cm . It is increasing while diode 5 is conducting and decreasing during the conduction of the thyristor 4.
The voltage v 24 at tap 24 follows substantially the same curve as waveform E in FIG. 2, that is to say that during the retrace time interval from t 13 to t 5 to a positive pulse called the flyback pulse is produced and, during the time interval while the first switching means 3 is conducting, the voltage is zero. The mean valve of the voltage v 24 at tap 24 of the auto-transformer 21 is equal to the mean value V cm of the voltage at the terminals of capacitors 2 and 22.
Thus, there is obtained at tap 23 a waveform which is made up, during the retrace portion, of a positive pulse whose maximum amplitude is less than that of v 24 at tap 24 and, during the trace portion, of a substantially constant positive voltage, the level V of which is less than the mean value V cm of the voltage v c22 at the terminals of capacitor 22. By moving tap 23 towards terminals 24 the amplitude of the pulse during fly-back increases while voltage V falls and conversely by moving tap 23 towards capacitor 22 voltage V increases and the amplitude of the pulse drops.
In more exact terms, the voltage V at tap 23 is such that the means value of v 23 is equal to V cm . It has thus been shown that by choosing carefully the position of tape 23, a voltage V may be obtained during the trace portion of the scan, which may be of any value between V cm and zero.
This voltage V is thus obtained by periodically controlled rectification during the trace portion of the scan. For this purpose an electronic switch is used to periodically connect the tap 23 of trnasformer winding 21 to a load. This switch is made up of a power transistor 26 whose collector is connected to tap 23 and the emitter to a parallel combination formed by a high value filtering capacitor 27 and the load which it is desired to supply, which is represented by a resistor 28. The base of the transistor 26 receives a control voltage to block it during retrace and to unblock it during the whole or part of the trace period. A control voltage of this type may be obtained from a second winding 29 magnetically coupled to the inductance 7 of the deflection circuit and it may be transmitted to the base of transistor 26 by means of a coupling capacitor 30 and a resistor 31 connected between the base and the emitter of transistor 26.
It may easily be seen that the DC collector/emitter current in transistor 26 flows through the first diode 5 of the first switching means 3 via a resistor 28 and the part of the winding of auto-transformer 21 located between taps 23 and 24.
Experience has shown that a circuit as shown in FIG. 6 can supply 24 volts with a current of 2 amperes to the vertical deflection circuit of the same television set, the voltage at the terminals of capacitor 22 being from 50 to 60 volts.
It
should be mentioned that, when the circuit which forms the load of the
controlled rectifier 26, 27 does not draw enough current to sufficiently
lengthen the circuit turn-off time T R , an additional
resistor (not shown) may be connected between the emitter of transistor
26 and ground or in parallel to capacitor 22, which resistor will draw
the additional current required.
The
present invention constitutes an improvement in the circuit described
in U.S. Pat. No. 3,449,623 filed on Sept. 6, 1966, this circuit being
described in greater detail below with reference to FIGS. 1 and 2 of the
accompanying drawings. A deflection circuit of this type comprises a
first thyristor switch which allows the conenction of the horizontal
deflection winding to a constant voltage source during the time interval
used for the transmisstion of the picture signal and for applying this
signal to the grid of the cathode ray tube (this interval will be termed
the "trace portion" of the scan), and a second thyristor switch which
provides the forced commutation of the first one by applying to it a
reverse current of equal amplitude to that which passes through it from
the said voltage source and thus to initiate the retrace during the
horizontal blanking interval.A undirectional reverse blocking triode type thyristor or silicon controlled rectifier (SCR), such as that used in the aformentioned circuit, requires a certain turn-off time between the instant at which the anode current ceases and the instant at which a positive bias may be applied to it without turning it on, due to the fact that there is still a high concentration of free carriers in the vicinity of the middle junction, this concentration being reduced by a process of recombination independently from the reverse polarity applied to the thyristor. This turn-off time of the thyristor is a function of a number of parameters such as the junction temperature, the DC current level, the decay time of the direct current, the peak level of the reverse current applied, the amplitude of the reverse anode to cathode voltage, the external impedance of the gate electrode, and so on, certain of these varying considerably from one thyristor to another.
In horizontal deflection circuits for television receivers, the flyback or retrace time is limited to approximately 20 percent of the horizontal scan period, the retrace time being in the case of the CCIR standard of 625 lines, approximately 12 microseconds and, in the case of the French standard of 819 lines, approximately 9 microseconds. During this relatively short interval, the thyristor has to be rendered non-conducting and the electron beam has to be returned to the origin of the scan. The first thyristor is blocked by means of a series resonant LC circuit which is subject to a certain number of restrictions (limitations as to the component values employed) due to the fact that, inter alia, it simultaneously determines the turn-off time of the circuit which blocks the thyristor and it forms part of the series resonant circuit which is to carry out the retrace. To obtain proper operation of the deflection circuit of the aforementioned Patent, especially when used for the French standard of 819 lines per image, the values of the components used have to subject to very close tolerances (approximately 2%), which results in high costs.
The improved deflection circuit, object of the present invention, allows the lengthening of the turn-off time of the circuit for turning the scan thyristor off, without altering the values of the LC circuit, which are determined by other criteria, and without impairing the operation of the circuit.
According
to the invention, there is provided an electron beam deflection circuit
for a cathode ray tube with electromagentic deflection by means of a
sawtooth current waveform having a trace portion and a retrace portion,
said circuit comprising: a deflection winding; a first source of
electrical energy formed by a first capacitor; first controllable
switching means comprising a parallel combination of a first thyristor
and a first diode, connected together to conduct in opposite directions,
for connecting said winding to said first source during said trace
portion when said first switching means is turned on; a second source of
electrical energy including a first inductive energy storage means
coupled to a voltage supply; reactive circuit means including a
combination of inductive and capacitive reactances for storing the
energy supplied by the said second source; a second controllable
switching means, substantially identical with the first one, for
completing a circuit including said reactive circuit means and said
first switching means, when turned on, so as to pass through said first
thyristor an oscillatory current in the opposite direction to that which
passes through it from said first source and to turn it off after these
two currents cancel out, the oscillatory current then flowing through
said first diode for an interval termed the circuit turn-off time which
has to be greater than the turn-off time of said first thyristor; and
means for drawing duing at least a part of said trace portion a
substantial amount of additional current from said first switching means
in the direction of conduction of said first diode, whereby said
circuit turn-off time is lengthened in proportion to the amount of said
additional current, without altering the values of the reactances in the
reactive circuit by shifting the waveform of the current flowing
through said first switching means towards the negative by an amount
equal to that of said additional current.A further object of the invention consists in using the supplementary current in the recovery diode of the first switching means to produce a DC voltage which may be used as a power supply for the vertical deflection circuit of the television receiver, for example.
The invention will be better understood and other features and advantages thereof will become apparent from the following description and the accompanying drawings, given by way of example, and in which:
FIG. 1 is a schematic circuit diagram partially in bloc diagram form of a prior art deflection circuit according to the aforementioned Patent;
FIG. 2 shows waveforms of currents and voltages generated at various points in the circuit of FIG. 1;FIG. 3 is a schematic diagram of a deflection circuit according to the invention which allows the principle of the improvement to be explained;
FIG. 4 is a diagram of the waveforms of the current through the first switching means 4, 5 of the circuit of FIG. 3;
FIG. 5 is a circuit diagram of another embodiment of the circuit according to the invention;
FIG. 6 is a schematic representation of the preferred embodiment of the circuit according to the invention; and
FIG. 7 shows voltage waveforms at various points of the high voltage autotransformer 21 of FIG. 6.
In all these Figures the same reference numerals refer to the same components.
FIG.
1 shows the horizontal deflection circuit described and claimed in the
U.S. Pat. No. 3,449,623 mentioned above, which comprises a first source
of electrical energy in the shape of a first capacitor 2 having a high
capacitance C 2 for supplying a substantially constant voltage Uc 2
across its terminals. A first terminal of the first capacitor 2 is
connected to ground, whilst its second terminal which supplies a
positive voltage is connected to one of the terminals of a horizontal
deflection winding shown as a first inductance 1. A first switching
means 3, consisting of a first reverse blocking triode thyristor 4 (SCR)
and a first recovery diode 5 in parallel, the two being interconnected
to conduct current in opposite directions, is connected in parallel with
the series combination formed by the deflection winding 1 and the first
capacitor 2. The assembly of components 1, 2, 4 and 5 forms the final
stage of the horizontal deflection circuit in a television receiver
using electromagnetic delfection.The deflection circuit also includes a drive stage for this final stage which here controls the turning off of the first thyristor 4 to produce the retrace or fly-back portion of the scan during the line-blanking intervals i.e. while the picture signal is not transmitted. This driver stage comprises a second voltage source in the shape of a DC power supply 6 which delivers a constant high voltage E. The negative terminal of the power supply 6 is connected to ground and its positive terminal to one of the terminals of a second inductance 7 of relatively high value, which draws a substantially lineraly varying current from the power supply 6 to avoid its overloading. The other terminal of the second inductance 7 is connected, on the one hand, to the junction of the deflection winding 1 and the first switching means 3 by means of a second inductance 8 and a second capacitor 9 in series and, on the other hand, to one of the terminals of a second controllable bi-directionally conducting switching means 10, similar to the first one 3, including a parallel combination of a second thyristor 11 and a second recovery diode 12 also arranged to conduct in opposite directions.
The respective values of the third inductance 8 (L 8 ) and of the second capacitor 9 (C 9 ) are principally selected so that, on the one hand, one half-cycle of oscillation of the first series resonant circuit L 8 - C 9 , (i.e. π √ L 8 . C 9 ) is longer than the turn-off time of the first thyristor 4, but still is as short as possible since this time interval determines the speed of the commutation of the thyristor 4, and, on the other hand, one half-cycle of oscillation of another series resonant circuit formed by L 1 , L 8 and C 9 , i.e. π √ (L 1 + L 8 ) . C 9 , is substantially equal to the required retrace time interval (i.e. shorter than the horizontal blanking interval).
The gate (control electrode) of the second thyristor 11 is coupled to the output of the horizontal oscillator 13 of the television receiver by means of a first pulse transformer 14 and a first pulse shaping circuit 15 so that it is fed short triggering pulses which are to turn it on.
The gate of the first thyristor 4 fed with signals of a substantially rectangular waveform which are negative during the horizontal blanking intervals, is coupled to a winding 16 by means of a second pulse shaping circuit 17, the winding 16 being magnetically coupled to the second inductance 7 to make up the secondary winding of a transformer of which the inductance 7 forms the primary winding. It will be noted here that it is also possible to couple the secondary winding 16 magnetically to a primary winding connected to a suitable output (not shown) of the horizontal oscillator 13.
The operation of a circuit of this type will be explained below with reference to FIG. 2 which shows the waveforms at various points in the circuit of FIG. 1 during approximately one line period.
FIG. 2 is not to scale since one line period (t 7 - t 0 )
is equal to 64 microseconds in the case of 625 lines and 49
microseconds in the case of 819 lines, while the durations of the
respective horizontal blanking intervals are approximately 12 and 9.5
microseconds.Waveform A shows the form of the current i L1 passing through deflection winding 1, this current having a sawtooth waveform substantially linear from t 0 to t 3 and from t 5 to t 7 , and crossing zero at time instants t 0 and t 7 , and reaching values of + I 1m and - I 1m , at time instants t 3 and t 5 respectively, these being its maximum positive and negative amplitudes.
During the second half of the trace portion of the horizontal deflection cycle, that is to say from t 0 to t 3 , the thyristor 4 of the first switching means 3 is conductive and makes the high value capacitor 2 discharge through the deflector winding 1, which has a high inductance, so that current i L1 increases linearly.
A few microseconds (5 to 8 μ s) before the end of the trace portion, i.e. at time instant t 1 , the trigger of the second thyristor 11 receives a short voltage pulse V G11 which causes it to turn on as its anode is at this instant at a positive potential with respect to ground, which is due to the charging of the second capacitor 9 through inductances 7 and 8 by the voltage E from the power supply 6.
When thyristor 11 is made conductive at time t 1 , on the one hand, inductance 7 is connected between ground and the voltage source 6 and a linearly increasing current flows through it and, on the other hand, the reactive circuit 8, 9 forms a loop through the second and first switching means 10 and 3, thus forming a resonant circuit which draws an oscillatory current i 8 ,9 of frequency ##EQU1##
This oscillatory current i 8 ,9 will pass through the first switching means 3, i.e. thyristor 4 and diode 5, in the opposite direction to that of current i L1 . Since the frequency f 1 is high, current i 8 ,9 will increase more rapidly than i L1 and will reach the same level at time t 2 , that is to say i 8 ,9 (t 2 ) = -i L1 (t 2 ) and these currents will cancel out in the thyristor 4 in accordance with the well known principle of forced commutation. After time instant t 2 , current i 8 ,9 continues to increase more rapidly than i L1 , but the difference between them (i 8 ,9 - i L1 ) passes the diode 5 (see wave form B) until it becomes zero at time instant t 3 which is the turn off time instant of the first switching means 3, at which the retrace begi
ns.The interval between the time instant t 2 and t 3 , i.e. (t 3 -t 2 ), during which diode 5 is conductive and the thyristor is reverse biased will be termed in what follows the circuit turn-off time and it should be greater than the turn-off time of the thyristor 4 itself since the latter will subsequently become foward biased (i.e. from t 3 to t 5 ) by the retrace or flyback pulse (see waveform E) which should not trigger it.
At time instant t 3 , the switching means 3 is opened (i 4 and i 5 are both zero -- see waveforms B and C) and the reactive circuit 8, 9 forms a loop through capacitor 2 and the deflection coil 1 and thus a series resonant circuit including (L 1 + L 8 ) and C 9 , C 2 being of high value and representing a short circuit for the flyback frequency ##EQU2## thus obtained.
The retrace which stated at time t 3 takes place during one half-cycle of the resonant circuit formed by reactances L 1 , L 8 and C 9 , i.e. during the interval between t 3 and t 5 . In the middle of this interval i.e. at time instant t 4 , both i L1 (waveform A) and i 8 ,9 (waveform D) pass through zero and change their sign, whereas the voltage at the terminals of the first switching means 3 (V 3 , waveform E) passes through a maximum. Thus, from t 4 onwards, thyristor 11 will be reverse biased and diode 12 will
conduct
the current from the resonant circuit 1, 8 and 9 in order to turn the
second thyristor 11 off.At time instant t 5 , when current i L1 has reached - I 1m and when voltage v 3 falls to zero, diode 5 of the first switching means 3 becomes conductive and the trace portion of scan begins.
Current i 8 ,9 nevertheless continues to flow in the resonant circuit 8, 9 through diodes 5 and 12, which causes a break to appear in waveform D at t 5 , and a negative peak to appear in waveform D and a positive one in waveform B in the interval between t 5 and t 6 , these being principally due to the distributed capacities of coil 1 or to an eventual capacitor (not shown) connected in parallel to the first switching means 3.
At time instant t 6 , diode 12 of the second switching means 10 ceases to conduct after having allowed thyristor 11 time to become turned off completely.
The level of current i 8 ,9 at time instant t 5 (i.e. I c ) as well as the negative peak I D12 in i 8 ,9 and the positive peak I D5 in i 5 depend on the values of L 8 and C 9 in the same way as does the turn-off time of the circuit (t 3 - t 2 ). If, for example, L 8 and C 9 , are increased I D5 increases towards zero and this could cause diode 5 to be cut off in an undesirable fashion. I c also increases towards zero, which is liable to cause diode 12 to be blocked and thyristor 11 to trigger prematurely.
From the foregoing it can be clearly seen that the choice of values for L 8 and C 9 is subject to four limitations which prevent the values from being increased to lengthen the turn-off time of the driver circuit of first switching thyristor 4 so as to forestall its spurious triggering.
Waveform F shows the voltage v G4 obtained at the gate of thyristor 4 from the secondary winding 16 coupled to the inductor 7. This voltage is positive from t 0 to t 1 and from t 6 to t 7 and is negative between t 2 and t 6 i.e. while the second switching means 10 is conducting.
The present invention makes the lengthening of the turn-off time of thyristor 4 possible without altering the parameters of the circuit such as inductance 8 and capacitor 9.
In
the circuit shown in FIG. 3, which illustrates the principle of the
present invention, means are added to the circuit in FIG. 1 which enable
the turn-off time to be lengthened by connecting a load to diode 5 so
as to increase the current which flows through it during the time that
it is conductive. These means are here formed by a resistor 18 connected
in parallel with a capacitor 20 (which replaces capacitor 2) which is
of a higher capacitance so that, in practice, it holds its charge during
at least one half of the line period. FIG. 4, which shows the waveform
of the current in the first switching means 3 for a circuit as shown in
FIG. 3, makes it possible to explain how this lenthening of the turn-off
time is achieved.In FIG. 4, the broken lines show the waveform of the current in the first switch device 3 in the circuit of FIG. 1, this waveform being produced by adding waveforms B and C of FIG. 2. The current i 4 above the axis flows through thyristor 4 and current i 5 below the axis flows through diode 5. When the capacitance C 20 of the capacitor in series with the deflector coil is increased to some tens of microfarads (C 2 having been of the order of 1 μ F) and when there is connected in parallel with capacitor 20 a resistor 18 the value of which is calculated to draw a strong current I R18 from capacitor 20, that is to say a current at least equal to 0,1 I m (I m being of the order of some tens of amperes), current I R18 is added to that i 5 which flows through diode 5 without in any way altering the linearity of the trace portion nor the oscillatory commutation of thyristor 4 which is brought about by the resonant circuit L 8 , C 9 .
The fact of loading capacitor C 20 by means of a resistor 18 thus has the effect of permanently displacing the waveform of the current in the negative direction by I R18 . Thus, during the trace portion of the scan, the transfer of the current from the diode 5 to the thyristor 4 begins at time t 10 instead of t 0 , that is
to say with a delay proportional to I R18 .
The effect of the triggering pulse delivered by the horizontal
oscillator (13 FIG. 1) to the second thyristor 11 at time instant t 1 , will be to start the commutation process of the first thyristor 4 when the current it draws is less by I R18 than that i 4 (t 1 )
which it would have been drawing had there been no resistor 18. Because
of this, the turn-off time of the thyristor 4 proper, which as has been
mentioned increases with the maximum current level passing throught it,
is slightly reduced. Moreover, because the oscillatory current i 8 ,9 (FIG. 2) from circuit L 8 , C 9 which flows through thyristor 4 in the opposite direction is unchanged, it reaches a value equal to that of the current i L1 (FIG. 1) flowing in the coil 1 in a shorter time, that is to say at time t 12 . Diode 5 will thus take the oscillatory current i 8 ,9 (FIG. 2) over in advance with respect ro time instant t 2 and will conduct it until it reaches zero value at a time instant t 13 later than t 3 , the amounts of advance (t 2 - t 12 ) and delay (t 13 - t 3 ) being practically equal.It can thus be seen in FIG. 4 that the circuit turn-off time T R of a circuit according to the invention and illustrated by FIG. 3 is distinctly longer than that T r of the circuit in FIG. 1. This increase in the turn-off time (T R - T r ) depends on the current I R18 and increases therewith.It should be noted at this point that the current I R18 produces a voltage drop at the terminals of the resistor the only effect of which is to heat up the resistor since the level of this voltage (40 to 60 volts) does not necessarily have a suitable value to be used as a voltage supply for other circuits in an existing transistorised television receiver.
In accordance with one embodiment of the invention, illustrated in FIG. 5, an application is proposed for the additional current which is to be drawn through diode 5. In FIG. 5, the positive terminal of capacitor 20 is connected by a conductor 19 to the negative pole of the power supply 6 and the voltage at the terminals of capacitor 20 is thus added to that E from the source 6.
In the preferred embodiment of the present invention, which is shown in FIG. 6, it is possible to cause a supplementary current of a desired value to flow through the first diode 5 while obtaining a voltage which has a suitable value for use in another circuit in the television receiver.
If the voltage at the terminals of capacitor 20 in FIG. 3 is not a usable value, it is possible to connect in parallel with the series circuit comprising the deflector coil 1 and the capacitor 2 in FIG. 1, i.e. in parallel with the terminals of the first switching means 3, a series combination of an autotransformer 21 and a high value capacitor 22 (comparable with capacitor 20 in FIGS. 3 and 5). The autotransformer 21 has a tap 23 is suitably positioned between the terminal connected to capacitor 22 at the tap 24 connected to the first switching means 3. This autotransformer 21 may be formed by the one conventionally used for supplying a very high voltage to the cathode ray tube, as described for example in U.S. Pat. No. 3,452,244; such a transformer comprises a voltage step-up winding between taps 24 and 25, which latter is connected to a high voltage rectifier (not shown).
The waveform of the voltage at the various points in the autotransformer is shown in FIG. 7, in which waveform A shows the voltage at the terminals of capacitor 22, waveform B the voltage at tap 24 and waveform C the voltage at tap 23 of the autotransformer 21.
The voltage V c22 at the terminals of capacitor 22 varies slightly about a mean value V cm . It is increasing while diode 5 is conducting and decreasing during the conduction of the thyristor 4.
The voltage v 24 at tap 24 follows substantially the same curve as waveform E in FIG. 2, that is to say that during the retrace time interval from t 13 to t 5 to a positive pulse called the flyback pulse is produced and, during the time interval while the first switching means 3 is conducting, the voltage is zero. The mean valve of the voltage v 24 at tap 24 of the auto-transformer 21 is equal to the mean value V cm of the voltage at the terminals of capacitors 2 and 22.
Thus, there is obtained at tap 23 a waveform which is made up, during the retrace portion, of a positive pulse whose maximum amplitude is less than that of v 24 at tap 24 and, during the trace portion, of a substantially constant positive voltage, the level V of which is less than the mean value V cm of the voltage v c22 at the terminals of capacitor 22. By moving tap 23 towards terminals 24 the amplitude of the pulse during fly-back increases while voltage V falls and conversely by moving tap 23 towards capacitor 22 voltage V increases and the amplitude of the pulse drops.
In more exact terms, the voltage V at tap 23 is such that the means value of v 23 is equal to V cm . It has thus been shown that by choosing carefully the position of tape 23, a voltage V may be obtained during the trace portion of the scan, which may be of any value between V cm and zero.
This voltage V is thus obtained by periodically controlled rectification during the trace portion of the scan. For this purpose an electronic switch is used to periodically connect the tap 23 of trnasformer winding 21 to a load. This switch is made up of a power transistor 26 whose collector is connected to tap 23 and the emitter to a parallel combination formed by a high value filtering capacitor 27 and the load which it is desired to supply, which is represented by a resistor 28. The base of the transistor 26 receives a control voltage to block it during retrace and to unblock it during the whole or part of the trace period. A control voltage of this type may be obtained from a second winding 29 magnetically coupled to the inductance 7 of the deflection circuit and it may be transmitted to the base of transistor 26 by means of a coupling capacitor 30 and a resistor 31 connected between the base and the emitter of transistor 26.
It may easily be seen that the DC collector/emitter current in transistor 26 flows through the first diode 5 of the first switching means 3 via a resistor 28 and the part of the winding of auto-transformer 21 located between taps 23 and 24.
Experience has shown that a circuit as shown in FIG. 6 can supply 24 volts with a current of 2 amperes to the vertical deflection circuit of the same television set, the voltage at the terminals of capacitor 22 being from 50 to 60 volts.
It
should be mentioned that, when the circuit which forms the load of the
controlled rectifier 26, 27 does not draw enough current to sufficiently
lengthen the circuit turn-off time T R , an additional
resistor (not shown) may be connected between the emitter of transistor
26 and ground or in parallel to capacitor 22, which resistor will draw
the additional current required.GRUNDIG SUPER COLOR 8642 CHASSIS (29701-017.11) (29301-114.61 (04) ) Gating circuit for television SCR deflection system AND REGULATION / stabilization of horizontal deflection NETWORK CIRCUIT with Transductor reactor / Reverse thyristor energy recovery circuit.
In a television deflection system employing a first SCR for coupling a deflection winding across a source of energy during a trace interval of each deflection cycle and a second SCR for replenishing energy to the source of energy during a commutation interval of each deflection cycle, a gating circuit for triggering the first SCR. The gating circuit employs a voltage divider coupled in parallel with the second SCR which develops gating signals proportional to the voltage across the second SCR.
1. In a television deflection system in which a first switching means couples a deflection winding across a source of energy during a trace interval of each deflection cycle and a second switching means replenishes energy to said source of energy during a commutation interval of each deflection cycle, a gating circuit for said first switching means, comprising:
capacitive voltage divider means coupled in parallel with said second switching means for developing gating signals proportional to the voltage across said second switching means; and
means for coupling said voltage divider means to said first switching means to provide for conduction of said first switching means in response to said gating signals.
2. A gating circuit according to claim 1 wherein said voltage divider includes first and second capacitors coupled in series and providing said gating signals at the common terminal of said capacitors. 3. A gating circuit according to claim 2 wherein said first and second capacitors are proportional in value to provide for the desired magnitude of gating signals. 4. A gating circuit according to claim 3 wherein said means for coupling said voltage divider means to said first switching means includes an inductor. 5. A gating circuit according to claim 4 wherein said inductor and said first and second capacitors comprise a resonant circuit having a resonant frequency chosen to shape said gating signal to improve switching of said first switching means.
Description:
BACKGROUND OF THE INVENTION
This
invention relates to a gating circuit for controlling a switching
device employed in a deflection circuit of a television receiver.
Various deflection system designs have been utilized in television receivers. One design employing two bidirectional conducting switches and utilizing SCR's (thyristors) as part of the switches is disclosed in U.S. Pat. No. 3,452,244. In this type deflection system, a first SCR is
employed
for coupling a deflection winding across a source of energy during a
trace interval of each deflection cycle, and a second SCR is employed
for replenishing energy during a commutation interval of each deflection
cycle. The first SCR is commonly provided with gating voltage by means
of a separate winding or tap of an input reactor coupling a source of B+
to the second SCR.
Various regulator system designs have been utilized in conjunction with the afore described deflection system to provide for uniform high voltage production as well as uniform picture width with varying line voltage and kinescope beam current conditions.
One type regulator system designalters
the amount of energy stored in a commutating capacitor coupled between
the first and second SCR's during the commutating interval. A regulator
design of this type may employ a regulating SCR and diode for coupling
the input reactor to the source of B+. With this type regulator a notch,
the width of which depends upon the regulation requirements, is created
in the current supplied through the reactor and which notch shows up in
the voltage waveform developed on the separate winding or tap of the
input reactor which provides the gating voltage for the first SCR. The
presence of the notch, even though de-emphasized by a waveshaping
circuit coupling the gating voltage to the first SCR, causes erratic
control of the first SCR.
SUMMARY OF THE INVENTION
In
accordance with one embodiment of the invention, a gating circuit of a
television deflection system employing a first switching means for
coupling a deflection winding across a source of energy during a trace
interval of each deflection cycle and a second switching means for
replenishing energy to said source of energy during a commutation
interval of each deflection cycle includes a voltage divider means
coupled in parallel with the second switching means for developing
gating signals proportional to the voltage across the second switching
means. The voltage divider means are coupled to the first switching
means to provide for conduction of the first switching means in response
to the gating signals.
A more detailed description of a preferred embodiment of the invention is given in the following description and accompanying drawing of which:
FIG. 1 is a schematic diagram, partially in block form, of a prior art SCR deflection system;
FIG. 2 is a schematic diagram, partially in block form, of an SCR deflection system of the type shown in FIG. 1 including a gating circuit embodying the invention;
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which employs an SCR as a control device and which is suitable for use with the SCR deflection system of FIG.2;
FIG. 4 is a schematic diagram, partially in block form, of another type of a regulator system suitable for use with the deflection circuit of FIG. 2; and
FIG. 5 is a schematic diagram, partially in block form, of still another type of a regulator system suitable for use with the SCR deflection system of FIG. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIG.
1 is a schematic diagram, partially in block form, of a prior art
deflection system of the retrace driven type similar to that disclosed
in U.S. Pat. No. 3,452,244. This system includes a commutating switch
12, comprising a silicon controlled rectifier (SCR) 14 and an oppositely
poled damper diode 16. The commutating switch 12 is coupled between a
winding 18a of an input choke 18 and ground. The other terminal of
winding 18a is coupled to a source of direct current voltage (B+) by
means of a regulator network 20 which controls the energy stored in the
deflection circuit 10 when the commutating switch is off, during an
interval T3 to T0' as shown in curve 21 which is a plot of the voltage
level at the anode of SCR 14 during the deflection cycle. A damping
network comprising a series combination of a resistor 22 and a capacitor
23 is coupled in parallel with commutating switch 12 and serves to
reduce any ringing effects produced by the switching of commutating
switch 12. Commutating switch 12 is coupled through a commutating coil
24, a commutating capacitor 25 and a trace switch 26 to ground. Trace
switch 26 comprises an SCR 28 and an oppositely poled damper diode 30.
An auxiliary capacitor 32 is coupled between the junction of coil 24 and
capacitor 25 and ground. A series combination of a horizontal
deflection winding 34 and an S-shaping capacitor 36 are coupled in
parallel with trace switch 26. Also, a series combination of a primary
winding 38a of a horizontal output transformer 38 and a DC blocking
capacitor 40 are coupled in parallel with trace switch 26.
A
secondary of high voltage winding 38b of transformer 38 produces
relatively large amplitude flyback pulses during the retrace interval of
each deflection cycle. This interval exists between T1 and T2 of curve
41 which is a plot of the current through windings 34 and 38a during the
deflection cycle. These flyback pulses are applied to a high voltage
multiplier (not shown) or other suitable means for producing direct
current high voltage for use as the ultor voltage of a kinescope (not
shown).
An auxiliary winding 38c of transformer 38 is coupled to a high voltage sensing and control circuit 42 which transforms the level of flyback pulses into a pulse width modulated signal. The control circuit 42 is coupled to the regulator network 20.
A horizontal oscillator 44 is coupled to the gate electrode of commutating SCR 14 and produces a pulse during each deflection cycle slightly before the end of the trace interval at T0 of curve 21 to turn on SCR 14 to initiate the commutating interval. The commutating interval occurs between T0 and T3 of curve 21. A resonant waveshaping network 46 comprising a series combination of a capacitor 48 and an inductor 50 coupled between a winding 18b of input choke 18 and the gate electrode of trace SCR 28 and a damping resistor 52 coupled between the junction of capacitor 48 and inductor 50 and ground shapes the signal developed at winding 18b (i.e. voltage waveform 53) to form a gating signal voltage waveform 55 to enable SCR 28 for conduction during the second half of the trace interval occurring between T2 and T1' of curve 41.
The
regulator network 20, when of a type to be described in conjunction
with FIG. 3, operates in such a manner that current through winding 18a
of input choke 18 during an interval between T4 and T5 (region A) of
curves 21, 53 and 55 is interrupted for a period of time the duration of
which is determined by the signal produced by the high voltage sensing
and control circuit 42. During the interruption of current through
winding 18a a zero voltage level is developed by winding 18b as shown in
interval T4 to T5 of curve 53. The resonant waveshaping circuit 46
produces the shaped waveform 55 which undesirably retains a slump in
region A corresponding to the notch A of waveform 53. The slump in
waveform 55 applied to SCR 28 occurs in a region where the anode of SCR
28 becomes positive and where SCR 28 must be switched on to maintain a
uniform production of the current waveshape in the horizontal deflection
winding 34 as shown in curve 41. The less positive amplitude current
occurring at region A of waveform 55 may result in insufficient gating
current for SCR 28 and may cause erratic performance resulting in an
unsatisfactory raster.
FIG.
2 is a schematic diagram, partially in block form, of a deflection
system 60 embodying the invention. Those elements which perform the same
function in FIG. 2 as in FIG. 1 are labeled with the same reference
numerals. FIG. 2 differs from FIG. 1 essentially in that the signal to
enable SCR 28 derived from sampling a portion of the voltage across
commutating switch 12 rather than a voltage developed by winding 18b
which is a function of the voltage across winding 18a of input choke 18
as in FIG. 1. This change eliminates the slump in the enabling signal
during the interval T4 to T5 as shown in curve 64 since the voltage
across the commutating switch 12 is not adversely effected by the
regulator network 20 operation.
A series combination of resistor 22, capacitor 23 and a capacitor 62 is coupled in parallel with commutating switch 12, one terminal of capacitor 62 being coupled to ground. The junction of capacitors 23 and 62 is coupled to the gate electrode of SCR 28 by means of the inductor 50. The resistor 52 is coupled in parallel with capacitor 62.
Capacitors 23 and 62 form a capacitance voltage divider which provides a suitable portion of the voltage across commutating switch 12 for gating SCR 28 via inductor 50. The magnitude of the voltage at the junction of capacitors 23 and 62 is typically 25 to 35 volts. It can, therefore, be seen that the ratio of values of capacitors 23 and 62 will vary depending on the B+ voltage utilized to energize the deflection system. Capacitors 23 and 62 and inductor 50 form a resonant circuit tuned in a manner which provides for peaking of the curve 64 between T4 and T5. This peaking effect further enhances gating of SCR 28 between T4 and T5.
Since the waveshape of the voltage across commutating switch 12 (curve 21) is relatively independent of the type of regulator system employed in conjunction with the deflection system, the curve 64 also is independent of the type of regulator system.
When commutating switch 12 switches off during the interval T3 to T0' curve 21, the voltage across capacitor 62 increases and the voltage at the gate electrode of SCR 28 increases as shown in curve 64. As will be noted, no slump of curve 64 occurs between T3 and T5 because there is no interruption of the voltage across commutating switch 12.
FIG.
3 is a schematic diagram, partially in block form, of one type of a
regulator system which may be used in conjunction with the invention. B+
is supplied through a regulator network 20 which comprises an SCR 66
and an oppositely poled diode 68. The diode is poled to provide for
conduction of current from B+ to the horizontal deflection circuit 60
via winding 18a of input choke 18. Current flows through the diode
during the period T3 to T4 of curve 21 FIG. 1 after which current tries
to flow through the SCR 66 from the horizontal deflection circuit to B+
since the commutating capacitor 25 is charged to a voltage higher than
B+.
The horizontal deflection circuit 60 produces a flyback pulse in winding 38a of the flyback transformer 38 which is coupled to winding 38c. The magnitude of the pulse on winding 38c determines how long the signal required to switch SCR 66 on is delayed after T4 curve 21 FIG. 1. If the flyback pulse is greater than desirable, the SCR 66 turns on sooner than if the flyback pulse is less than desirable and provides a discharge path for current in commutating capacitor 25 back to the B+ supply. In this manner a relatively constant amplitude flyback pulse is maintained.
FIG.
4 is a schematic diagram, partially in block form, of another
well-known type of a regulator system which may be used in conjunction
with the invention shown in FIG. 2. B+ is coupled through winding 18a of
input choke 18 and through a series combination of windings 70a and 70b
of a saturable reactor 70 and a parallel combination of a diode 72 and a
resistor 74 to the horizontal deflection circuit 60. Diode 72 is poled
to conduct current from the horizontal deflection circuit 60 to B+.
Flyback pulse variations are obtained from winding 38c of the horizontal output transformer 38 and applied to a voltage divider comprising resistors 76, 78 and 80 of the high voltage sensing and control circuit 42. A portion of the pulse produced by winding 38c is selected by the position of the wiper terminal on potentiometer 78 and coupled to the base electrode of a transistor 82 by means of a zener diode 84. The emitter electrode of transistor 82 is grounded and a DC stabilization resistor 85 is coupled in parallel with the base-emitter junction of transistor 82. When the pulse magnitude on winding 38c exceeds a level which results in forward biasing the base-emitter junction of transistor 82, current flows from B+ through a resistor 86, a winding 70c of saturable reactor 70 and transistor 82 to ground. Due to the exponential increase of current in winding 70c during the period of conduction of transistor 82, the duration of conduction of transistor 82 determines the magnitude of current flowing in winding 70c and thus the total inductance of windings 70a and 70b. The current in winding 70c is sustained during the remaining deflection period by means of a diode 88 coupled in parallel with winding 70c and poled not to conduct current from B+ to the collector electrode of transistor 82. A capacitor 90 coupled to the cathode of diode 88 provides a bypass for B+. Windings 70a and 70b are in parallel with input reactor 18a and thereby affect the total input inductance of the deflection circuit and thereby controls the transfer of energy to the deflection circuit. The dotted waveforms shown in conjunction with a curve 21' indicate variations from a nominal waveform provided at the input of horizontal deflection circuit 60 by the windings 70a and 70b.
FIG. 5 is a schematic diagram of yet another type of a regulator system which may be used in conjunction with the invention. B+ is coupled through a winding 92a and a winding 92b of a saturable reactor to the horizontal deflection circuit 60. Windings 92a and 92b are used to replace the input choke 18 shown in FIGS. 1 and 2 while also providing for a regulating function corresponding to that provided by regulating network 20.
Flyback pulse variations are obtained from winding 38c and applied to the high voltage sensing and control circuit 42 as in FIG. 4. Current flows from B+ through resistor 86, a winding 92c and transistor 82 to ground. As in FIG. 4 the duration of the conduction of transistor 82 determines the energy stored in winding 92c and thus the total inductance of windings 92a and 92b which control the amount of energy transferred to the deflection circuit during each horizontal deflection cycle. The variations in waveforms of curve 21', shown in conjunction with FIG. 4, are also provided at the input of horizontal deflection circuit 60 by windings 92a and 92b.
For various reasons including cost or performance, a manufacturer may wish to utilize a particular one of the regulators illustrated in FIGS. 3, 4 and 5. Regardless of the choice, the gating circuit according to the invention may be utilized therewith advantageously by providing improved performance and the possibility of cost savings by eliminating taps or extra windings on the wound components which heretofore normally provided a source of SCR gating waveforms.
This
invention relates to a gating circuit for controlling a switching
device employed in a deflection circuit of a television receiver. 
Various deflection system designs have been utilized in television receivers. One design employing two bidirectional conducting switches and utilizing SCR's (thyristors) as part of the switches is disclosed in U.S. Pat. No. 3,452,244. In this type deflection system, a first SCR is
Various regulator system designs have been utilized in conjunction with the afore described deflection system to provide for uniform high voltage production as well as uniform picture width with varying line voltage and kinescope beam current conditions.
One type regulator system design
alters
the amount of energy stored in a commutating capacitor coupled between
the first and second SCR's during the commutating interval. A regulator
design of this type may employ a regulating SCR and diode for coupling
the input reactor to the source of B+. With this type regulator a notch,
the width of which depends upon the regulation requirements, is created
in the current supplied through the reactor and which notch shows up in
the voltage waveform developed on the separate winding or tap of the
input reactor which provides the gating voltage for the first SCR. The
presence of the notch, even though de-emphasized by a waveshaping
circuit coupling the gating voltage to the first SCR, causes erratic
control of the first SCR. SUMMARY OF THE INVENTION
In
accordance with one embodiment of the invention, a gating circuit of a
television deflection system employing a first switching means for
coupling a deflection winding across a source of energy during a trace
interval of each deflection cycle and a second switching means for
replenishing energy to said source of energy during a commutation
interval of each deflection cycle includes a voltage divider means
coupled in parallel with the second switching means for developing
gating signals proportional to the voltage across the second switching
means. The voltage divider means are coupled to the first switching
means to provide for conduction of the first switching means in response
to the gating signals. A more detailed description of a preferred embodiment of the invention is given in the following description and accompanying drawing of which:
FIG. 1 is a schematic diagram, partially in block form, of a prior art SCR deflection system;
FIG. 2 is a schematic diagram, partially in block form, of an SCR deflection system of the type shown in FIG. 1 including a gating circuit embodying the invention;
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which employs an SCR as a control device and which is suitable for use with the SCR deflection system of FIG.2;
FIG. 4 is a schematic diagram, partially in block form, of another type of a regulator system suitable for use with the deflection circuit of FIG. 2; and
FIG. 5 is a schematic diagram, partially in block form, of still another type of a regulator system suitable for use with the SCR deflection system of FIG. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIG.
1 is a schematic diagram, partially in block form, of a prior art
deflection system of the retrace driven type similar to that disclosed
in U.S. Pat. No. 3,452,244. This system includes a commutating switch
12, comprising a silicon controlled rectifier (SCR) 14 and an oppositely
poled damper diode 16. The commutating switch 12 is coupled between a
winding 18a of an input choke 18 and ground. The other terminal of
winding 18a is coupled to a source of direct current voltage (B+) by
means of a regulator network 20 which controls the energy stored in the
deflection circuit 10 when the commutating switch is off, during an
interval T3 to T0' as shown in curve 21 which is a plot of the voltage
level at the anode of SCR 14 during the deflection cycle. A damping
network comprising a series combination of a resistor 22 and a capacitor
23 is coupled in parallel with commutating switch 12 and serves to
reduce any ringing effects produced by the switching of commutating
switch 12. Commutating switch 12 is coupled through a commutating coil
24, a commutating capacitor 25 and a trace switch 26 to ground. Trace
switch 26 comprises an SCR 28 and an oppositely poled damper diode 30.
An auxiliary capacitor 32 is coupled between the junction of coil 24 and
capacitor 25 and ground. A series combination of a horizontal
deflection winding 34 and an S-shaping capacitor 36 are coupled in
parallel with trace switch 26. Also, a series combination of a primary
winding 38a of a horizontal output transformer 38 and a DC blocking
capacitor 40 are coupled in parallel with trace switch 26. A
secondary of high voltage winding 38b of transformer 38 produces
relatively large amplitude flyback pulses during the retrace interval of
each deflection cycle. This interval exists between T1 and T2 of curve
41 which is a plot of the current through windings 34 and 38a during the
deflection cycle. These flyback pulses are applied to a high voltage
multiplier (not shown) or other suitable means for producing direct
current high voltage for use as the ultor voltage of a kinescope (not
shown). An auxiliary winding 38c of transformer 38 is coupled to a high voltage sensing and control circuit 42 which transforms the level of flyback pulses into a pulse width modulated signal. The control circuit 42 is coupled to the regulator network 20.
A horizontal oscillator 44 is coupled to the gate electrode of commutating SCR 14 and produces a pulse during each deflection cycle slightly before the end of the trace interval at T0 of curve 21 to turn on SCR 14 to initiate the commutating interval. The commutating interval occurs between T0 and T3 of curve 21. A resonant waveshaping network 46 comprising a series combination of a capacitor 48 and an inductor 50 coupled between a winding 18b of input choke 18 and the gate electrode of trace SCR 28 and a damping resistor 52 coupled between the junction of capacitor 48 and inductor 50 and ground shapes the signal developed at winding 18b (i.e. voltage waveform 53) to form a gating signal voltage waveform 55 to enable SCR 28 for conduction during the second half of the trace interval occurring between T2 and T1' of curve 41.
The
regulator network 20, when of a type to be described in conjunction
with FIG. 3, operates in such a manner that current through winding 18a
of input choke 18 during an interval between T4 and T5 (region A) of
curves 21, 53 and 55 is interrupted for a period of time the duration of
which is determined by the signal produced by the high voltage sensing
and control circuit 42. During the interruption of current through
winding 18a a zero voltage level is developed by winding 18b as shown in
interval T4 to T5 of curve 53. The resonant waveshaping circuit 46
produces the shaped waveform 55 which undesirably retains a slump in
region A corresponding to the notch A of waveform 53. The slump in
waveform 55 applied to SCR 28 occurs in a region where the anode of SCR
28 becomes positive and where SCR 28 must be switched on to maintain a
uniform production of the current waveshape in the horizontal deflection
winding 34 as shown in curve 41. The less positive amplitude current
occurring at region A of waveform 55 may result in insufficient gating
current for SCR 28 and may cause erratic performance resulting in an
unsatisfactory raster. FIG.
2 is a schematic diagram, partially in block form, of a deflection
system 60 embodying the invention. Those elements which perform the same
function in FIG. 2 as in FIG. 1 are labeled with the same reference
numerals. FIG. 2 differs from FIG. 1 essentially in that the signal to
enable SCR 28 derived from sampling a portion of the voltage across
commutating switch 12 rather than a voltage developed by winding 18b
which is a function of the voltage across winding 18a of input choke 18
as in FIG. 1. This change eliminates the slump in the enabling signal
during the interval T4 to T5 as shown in curve 64 since the voltage
across the commutating switch 12 is not adversely effected by the
regulator network 20 operation. A series combination of resistor 22, capacitor 23 and a capacitor 62 is coupled in parallel with commutating switch 12, one terminal of capacitor 62 being coupled to ground. The junction of capacitors 23 and 62 is coupled to the gate electrode of SCR 28 by means of the inductor 50. The resistor 52 is coupled in parallel with capacitor 62.
Capacitors 23 and 62 form a capacitance voltage divider which provides a suitable portion of the voltage across commutating switch 12 for gating SCR 28 via inductor 50. The magnitude of the voltage at the junction of capacitors 23 and 62 is typically 25 to 35 volts. It can, therefore, be seen that the ratio of values of capacitors 23 and 62 will vary depending on the B+ voltage utilized to energize the deflection system. Capacitors 23 and 62 and inductor 50 form a resonant circuit tuned in a manner which provides for peaking of the curve 64 between T4 and T5. This peaking effect further enhances gating of SCR 28 between T4 and T5.
Since the waveshape of the voltage across commutating switch 12 (curve 21) is relatively independent of the type of regulator system employed in conjunction with the deflection system, the curve 64 also is independent of the type of regulator system.
When commutating switch 12 switches off during the interval T3 to T0' curve 21, the voltage across capacitor 62 increases and the voltage at the gate electrode of SCR 28 increases as shown in curve 64. As will be noted, no slump of curve 64 occurs between T3 and T5 because there is no interruption of the voltage across commutating switch 12.
FIG.
3 is a schematic diagram, partially in block form, of one type of a
regulator system which may be used in conjunction with the invention. B+
is supplied through a regulator network 20 which comprises an SCR 66
and an oppositely poled diode 68. The diode is poled to provide for
conduction of current from B+ to the horizontal deflection circuit 60
via winding 18a of input choke 18. Current flows through the diode
during the period T3 to T4 of curve 21 FIG. 1 after which current tries
to flow through the SCR 66 from the horizontal deflection circuit to B+
since the commutating capacitor 25 is charged to a voltage higher than
B+. The horizontal deflection circuit 60 produces a flyback pulse in winding 38a of the flyback transformer 38 which is coupled to winding 38c. The magnitude of the pulse on winding 38c determines how long the signal required to switch SCR 66 on is delayed after T4 curve 21 FIG. 1. If the flyback pulse is greater than desirable, the SCR 66 turns on sooner than if the flyback pulse is less than desirable and provides a discharge path for current in commutating capacitor 25 back to the B+ supply. In this manner a relatively constant amplitude flyback pulse is maintained.
FIG.
4 is a schematic diagram, partially in block form, of another
well-known type of a regulator system which may be used in conjunction
with the invention shown in FIG. 2. B+ is coupled through winding 18a of
input choke 18 and through a series combination of windings 70a and 70b
of a saturable reactor 70 and a parallel combination of a diode 72 and a
resistor 74 to the horizontal deflection circuit 60. Diode 72 is poled
to conduct current from the horizontal deflection circuit 60 to B+. Flyback pulse variations are obtained from winding 38c of the horizontal output transformer 38 and applied to a voltage divider comprising resistors 76, 78 and 80 of the high voltage sensing and control circuit 42. A portion of the pulse produced by winding 38c is selected by the position of the wiper terminal on potentiometer 78 and coupled to the base electrode of a transistor 82 by means of a zener diode 84. The emitter electrode of transistor 82 is grounded and a DC stabilization resistor 85 is coupled in parallel with the base-emitter junction of transistor 82. When the pulse magnitude on winding 38c exceeds a level which results in forward biasing the base-emitter junction of transistor 82, current flows from B+ through a resistor 86, a winding 70c of saturable reactor 70 and transistor 82 to ground. Due to the exponential increase of current in winding 70c during the period of conduction of transistor 82, the duration of conduction of transistor 82 determines the magnitude of current flowing in winding 70c and thus the total inductance of windings 70a and 70b. The current in winding 70c is sustained during the remaining deflection period by means of a diode 88 coupled in parallel with winding 70c and poled not to conduct current from B+ to the collector electrode of transistor 82. A capacitor 90 coupled to the cathode of diode 88 provides a bypass for B+. Windings 70a and 70b are in parallel with input reactor 18a and thereby affect the total input inductance of the deflection circuit and thereby controls the transfer of energy to the deflection circuit. The dotted waveforms shown in conjunction with a curve 21' indicate variations from a nominal waveform provided at the input of horizontal deflection circuit 60 by the windings 70a and 70b.
FIG. 5 is a schematic diagram of yet another type of a regulator system which may be used in conjunction with the invention. B+ is coupled through a winding 92a and a winding 92b of a saturable reactor to the horizontal deflection circuit 60. Windings 92a and 92b are used to replace the input choke 18 shown in FIGS. 1 and 2 while also providing for a regulating function corresponding to that provided by regulating network 20.
Flyback pulse variations are obtained from winding 38c and applied to the high voltage sensing and control circuit 42 as in FIG. 4. Current flows from B+ through resistor 86, a winding 92c and transistor 82 to ground. As in FIG. 4 the duration of the conduction of transistor 82 determines the energy stored in winding 92c and thus the total inductance of windings 92a and 92b which control the amount of energy transferred to the deflection circuit during each horizontal deflection cycle. The variations in waveforms of curve 21', shown in conjunction with FIG. 4, are also provided at the input of horizontal deflection circuit 60 by windings 92a and 92b.
For various reasons including cost or performance, a manufacturer may wish to utilize a particular one of the regulators illustrated in FIGS. 3, 4 and 5. Regardless of the choice, the gating circuit according to the invention may be utilized therewith advantageously by providing improved performance and the possibility of cost savings by eliminating taps or extra windings on the wound components which heretofore normally provided a source of SCR gating waveforms.
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