SINUDYNE Mod. 1099 CHASSIS ACTION INTERNAL VIEW + CRT TUBE 27GDC85X-TC.

The chassis is realized on a compact monocarrier PCB.

On the back lid is fitted the mains power supply transformer.


Right Side: Line deflection + EHT and FRAME Deflection.

Left Side: Signal Parts. + DC Supply

IF UNIT:02-13-5051

TDA3565 PAL decoder

GENERAL DESCRIPTION
The TDA3565 PAL decoder contains all the functions required for PAL signal decoding and colour matrixing and is
contained within an 18-pin package. The oscillator, a.c.c. detector and burst phase detector each have single-pin outputs
and the coupling capacitor for the luminance input at pin 8 doubles as a storage capacitor for the black level clamping
circuit. Black level clamping of the three colour channels is performed using feedback proportional to the red channel
black level. This feedback (variable with the brightness control) controls the input level of the luminance amplifier and
therefore the clamping levels of all three colour signal outputs.


TBA820M 1.2W AUDIO AMPLIFIER

DESCRIPTION
The TBA820M is a monolithic integrated audio
amplifier in a 8 lead dual in-line plastic package. It
is intended for use as low frequency class B power
amplifier with wide range of supply voltage: 3 to
16V, in portable radios, cassette recorders and
players etc. Main features are: minimum working
supply voltage of 3V, low quiescent current, low
number of external components, good ripple rejection,
no cross-over distortion, low power dissipation.
Output power: Po = 2W at 12V/8W, 1.6W at 9V/4W
and 1.2W at 9V/8W.



CRT TUBE 27GDC85X-TC
 


Power supply is realized with mains transformer and Linear transistorized power supply stabilizer, A DC power supply apparatus includes a rectifier circuit which rectifies an input commercial AC voltage. The rectifier output voltage is smoothed in a smoothing capacitor. Voltage stabilization is provided in the stabilizing circuits by the use of Zener diode circuits to provide biasing to control the collector-emitter paths of respective transistors.A linear regulator circuit according to an embodiment of the present invention has an input node receiving an unregulated voltage and an output node providing a regulated voltage. The linear regulator circuit includes a voltage regulator, a bias circuit, and a current control device.

In one embodiment, the current control device is implemented as an NPN bipolar junction transistor (BJT) having a collector electrode forming the input node of the linear regulator circuit, an emitter electrode coupled to the input of the voltage regulator, and a base electrode coupled to the second terminal of the bias circuit. A first capacitor may be coupled between the input and reference terminals of the voltage regulator and a second capacitor may be coupled between the output and reference terminals of the voltage regulator. The voltage regulator may be implemented as known to those skilled in the art, such as an LDO or non-LDO 3-terminal regulator or the like.
The bias circuit may include a bias device and a current source. The bias device has a first terminal coupled to the output terminal of the voltage regulator and a second terminal coupled to the control electrode of the current control device. The current source has an input coupled to the first current electrode of the current control device and an output coupled to the second terminal of the bias device. A capacitor may be coupled between the first and second terminals of the bias device.
In the bias device and current source embodiment, the bias device may be implemented as a Zener diode, one or more diodes coupled in series, at least one light emitting diode, or any other bias device which develops sufficient voltage while receiving current from the current source. The current source may be implemented with a PNP BJT having its collector electrode coupled to the second terminal of the bias device, at least one first resistor having a first end coupled to the emitter electrode of the PNP BJT and a second end, a Zener diode and a second resistor. The Zener diode has an anode coupled to the base electrode of the PNP BJT and a cathode coupled to the second end of the first resistor. The second resistor has a first end coupled to the anode of the Zener diode and a second end coupled to the reference terminal of the voltage regulator. A second Zener diode may be included having an anode coupled to the cathode of the first Zener diode and a cathode coupled to the first current electrode of the current control device.
A circuit is disclosed for improving operation of a linear regulator, having an input terminal, an output terminal, and a reference terminal. The circuit includes an input node, a transistor, a bias circuit, and first and second capacitors. The transistor has a first current electrode coupled to the input node, a second current electrode for coupling to the input terminal of the linear regulator, and a control electrode. The bias circuit has a first terminal for coupling to the output terminal of the linear regulator and a second terminal coupled to the control electrode of the transistor. The first capacitor is for coupling between the input and reference terminals of the linear regulator, and the second capacitor is for coupling between the output and reference terminals of the linear regulator. The bias circuit develops a voltage sufficient to drive the control terminal of the transistor and to operate the linear regulator. The bias circuit may be a battery, a bias device and a current source, a floating power supply, a charge pump, or any combination thereof. The transistor may be implemented as a BJT or FET or any other suitable current controlled device.