AUTOVOX Mod. TVC2694/E CHASSIS 507.03 INTERNAL VIEW.

The AUTOVOX Mod. TVC2694/E Chassis is the first Italian color tube set entirely based on discrete semiconductors and it's very complex.

It's completely hand wired and divided by sections / functions.

On the floor of the cabinet we have all power parts / deflection.

On the left board panel all signal parts and video sections.

further board on the left cabinet side dedicated to Ultrasonic remote control system.

Above the tube zone neck the convergence panel since this is a DELTA GUN CRT TUBE !







AUTOVOX Mod. TVC2694/E CHASSIS 507.03  power supply CONSTANT-VOLTAGE CONVERTER EMPLOYING THYRISTOR:

 

A constant voltage converter having a rectifier for rectifying AC power and with a thyristor connected between the rectifier and a filter for selectively passing therethrough a rectified output to an output terminal. There is a wave generator connected to the output of the rectifier for producing a first signal and an intergrator circuit connected to the output of the wave generator for producing an integral output in response to this first signal. In addition there is a detector circuit for detecting a fluctuation of the rectified output power and for producing second signal. A comparison circuit is connected between the intergrator circuit and the detector circuit for producing third signal in accordance with the comparison. A trigger circuit is connected between the comparison circuit and the control gate of the thyristor for supplying a phase control signal to the thyristor to thereby obtain a constant voltage output regardless of the fluctuation of the rectified output.

1. A constant voltage converter comprising an input of a power supply means, an output terminal, filter means, rectifier means connected to said input for rectifying a.c. power and for supplying output thereof to said output terminal, thyristor means connected between said rectifier means and said filter means for selectively passing therethrough a rectified output to the output terminal by way of said filter means, saw-tooth wave generator means connected between the output of said rectifier means and at least one integrator circuit means for producing an integral output in response to a saw-tooth wave produced, a first transistor in said saw-tooth wave generator, the input of said integrator circuit means being connected to a collector of said first transistor, detector circuit means connected to said output terminal for detecting a fluctuation of the rectified output power and for producing an output signal, said detector circuit means having a second transistor, pulse generator circuit means connected between said saw-tooth wave generator means and said detector circuit means for producing a trigger pulse to said thyristor through a trigger means, a third transistor in said pulse circuit generator means, the base of said third transistor being connected to the output of said integrator circuit means, the emitter thereof being connected to the emitter of said second transistor in said detector circuit means, and the collector thereof being connected to the gate of the thyristor means so as to supply a phase control signal thereto, thereby obtaining a constant voltage output regardless of the fluctuation of the rectified output.

Description:

This invention relates to constant-voltage converters and more particularly to a constant-voltage converter employing a thyristor.

Conventional constant-voltage converters of the type employing a thyristor are arranged to phase shift and full-wave-rectify an input a.c. power applied thereto and to maintain the output voltages constant by regulating the firing angle of the thyristor in comparison of the output voltages with the phase-shifted and rectified input a.c. power. When, however, these converters are connected to a common a.c. source having a relatively high internal impedance, the waveform of the phase-shifted and rectified a.c. input power is distorted thereby causing undesired operations of the converters.


It is therefore an object of the present invention to provide a constant-voltage converter which correctly operates notwithstanding the distortion of the input a.c. voltage.

Another object of the invention is to provide a constant-voltage converter which effectively suppress an undesired rush current.

Another object of the invention is to provide a constant-voltage converter having an improved feed-back circuit of a substantially constant loop gain .

In the drawings:

FIG. 1 is a schematic view of a converter according to the present invention;

FIG. 2 is a diagram showing a circuit arrangement of the converter of FIG. 1;

FIG. 3 is a diagram showing various waveforms of signals appearing in the circuit of FIG. 2;

FIG. 4 is a diagram showing various waveforms appearing in the circuit of FIG. 2 when an a.c. power is supplied to the circuit;

FIG. 5 is a diagram showing another circuit arrangement of the converter of FIG. 1;

FIG. 6 is a diagram showing waveforms of signals appearing in the circuit of FIG. 5; and

FIG. 7 is a diagram showing further another circuit arrangement of generator the of FIG. 1.

Referring now to FIG. 1, a constant-voltage converter 10 according to the present invention comprises a rectifier 11 having two input terminals 12 and 13 through which an a.c. power is supplied. The rectifier 11 is preferably a full-wave rectifier although a half-wave rectifier may be employed. An output 14 of the rectifier 11 is connected through a line 15 to an anode of a thyristor 16. The thyristor 16 passes therethrough the rectified a.c. power in only one direction from its anode to cathode when triggered by a trigger pulse through its gate. The cathode of the thyristor 16 is connected through a line 17 to an input of a smoothing filter 18. The smoothing filter 18 smoothes the power from the thyristor 16. An output of the smoothing filter 18 is connected through a line 19 to an output terminal 20. The output 14 of the rectifier 11 is also connected through a line 21 to a saw-tooth wave generator 22 which generates a saw-tooth wave signal having the same repetition period as the rectified input a.c. power. An output of the saw-tooth wave generator 22 is connected through a line 23 to one input of a trigger pulse generator 24. The other input of the trigger pulse generator 24 is connected through a line 25 to the line 19. An output of the trigger pulse generator 24 is connected through a line 26 to the gate of the thyristor 16. The trigger pulse generator 24 produces a trigger pulse on its output when the voltage of the saw-tooth wave signal reaches a level which is varied in response to the output voltage on the terminal 20. The trigger pulse generator 24 may be variously arranged and in this case arranged to comprise rectangular generator 27 having one input connected through the line 23 to the saw-tooth wave generator 22 and the other input connected through a line 28 to an output voltage detector 29. The detector 29 produces a reference signal representing the output voltage on the terminal 20. The pulse generator 27 is adapted to produces a rectangular pulse when the saw-tooth wave signal to the one input reaches a level which defined is in accordance with the reference signal. An output of the rectangular pulse generator 27 is connected through a line 30 to an input of a trigger circuit 31. The trigger circuit 31 is adapted to convert the rectangular pulse into a spike pulse. An output of the trigger circuit 31 is connected through the line 26 to the gate of the thyristor 16.

FIG. 2 illustrates a preferred circuit arrangement of the converter shown in FIG. 1 which comprises a rectifier 11 of a full-wave rectifier consisting of rectifiers 40, 41, 42 and 43. Inputs of the rectifier are connected to terminals 12 and 13 through which an a.c. power is applied. The output 14 of the rectifier 11 is connected through a line 15 to an anode of a thyristor 16. A cathode of the thyristor 16 is connected through a line 17 to a smoothing filter 18 which includes a capacitor C4 having one terminal connected to the line 17 and the other terminal grounded. The output of the smoothing filter 18 is connected through a line 19 to an output terminal 20.

The saw-tooth wave generator 22 includes a resistor R ₁ having one terminal connected to the line 21 and the terminal connected through a junction J ₁ to one terminal of a resistor R ₂ . The other terminal of the resistor R ₂ is grounded. The junction J ₁ is connected through a coupling capacitor C ₁ to a base of a transistor T ₁ of PNP type. An emitter of the transistor T ₁ is connected through a resistor R ₃ to the line 21. A resistor R ₄ is provided between the emitter and the base of the transistor T ₁ so as to apply a bias potential to the base. A collector of the transistor T ₁ is grounded through a parallel connection of a resistor R ₅ and capacitor C ₂ . To the emitter is connected a capacitor C ₃ which is in turn grounded and passes therethrough only a.c. signals to the ground.

The rectangular pulse generator 27 comprises a transistor T ₂ of PNP type having a base connected through a resistor R ₆ to the collector of the transistor T ₁ . An emitter of the transistor T ₂ is connected through a resistor R ₇ to the emitter of the transistor T ₁ . A collector of the transistor T ₂ is grounded through a resistor R ₈ and connected through the line 30 to one terminal of a capacitor C ₄ of the trigger circuit 31. The other terminal of the capacitor C ₄ is connected through a line 26 to the gate of the thyristor 16.

The output voltage detector 29 includes a transistor T ₃ of NPN type having an emitter grounded through a zener diode ZD. A collector of the transistor T ₃ is connected through a line 28 to the emitter of the transistor T ₂ and, on the other hand, connected through a capacitor C ₅ to the grounded. A base of the transistor T ₃ is connected to a tap of an adjustable resistor R ₉ connected through a resistor R ₁₀ and a line 25 to the line 19 and connected, in turn, to the ground through a resistor R ₁₁ .

When, in operation, an a.c. electric power is applied through the input terminals 12 and 13 of the rectifier 11, a full-wave rectified power as shown in FIG. 3 (a) appears on the output 14. The rectified power is applied through the line 15 to the anode of the thyristor 16. The thyristor 16 passes therethrough the rectified power while its firing angle is regulated by the trigger signal applied to the gate. The rectified power passed through the thyristor 16 is applied through the line 17 to the smoothing filter 18. The smoothing filter smoothes the power by removing the ripple component in the power. The smoothed power appears on the line 19 which is to be supplied to a load through the output terminal 20. The smoothed power on the line 19 is, on the other hand, delivered through the line 25 to the resistor R ₁₀ of the output voltage detector 29. The resistor R ₁₀ constitutes a voltage divider in cooperation with the resistors R ₉ and R ₁₁ . The output of the voltage divider is applied through the tap of the resistor R ₉ to the base of the transistor T ₃ . When the potential of the base of the transistor T ₃ exceeds the zener voltage of the zener diode ZD, a base current flows through the transistor T ₃ so as to render the transistor T ₃ conductive. The potential of the collector of the transistor T ₃ then varies in accordance with the voltage of the smoothed output power on the line 19. The potential variation at the collector of the transistor T ₃ is then applied through the line 28 to the trigger pulse generator 27 and utilized to regulate the triggering timing of the thyristor 16.

The full-wave rectified power is, on the other hand, applied through the line 21 to the saw-tooth wave generator 22. Since the resistors R ₁ and R ₂ consistute a voltage divider to reduce the voltage of the full-wave rectified power to a potential at the junction J ₁ , a charging current to the capacitor C ₁ flows from the emitter to the base of the transistor T ₁ whereby the transistor T ₁ repeats ON-OFF operation in accordance with the voltage of the rectified power. If the transistor T ₁ is conductive when the voltage of the full-wave rectified power is lower than a threshold voltage v ₁ as shown in FIG. 3(a), then the potential at the collector of the transistor T ₁ is varied as shown in FIG. 3 (b) due to the charge and discharge of the capacitor C ₂ . The variation of the potential at the collector of the transistor T ₁ is supplied through the line 23 to the resistor R ₆ of the trigger pulse generator 27.

As long as the voltage of the smoothed power on the line 19 equals to the rated output voltage, the transistor T ₂ is adapted to become conductive when the voltage of the saw-tooth wave signal falls below a threshold value v ₃ shown in FIG. 3(b). Therefore, a potential at the collector of the transistor T ₂ varies as shown in FIG. 3(c). The potential variation, that is, a pulse signal at the collector of the transistor T ₂ is supplied through the line 30 to the capacitor C ₄ of the trigger circuit trigger 31. The trigger circuit 31 converts the pulse signal into a spike pulse or a trigger pulse shown in FIG. 3(d) which is then applied through the line 25 to the gate of the thyristor 16. Upon receiving the spike pulse, the thyristor 16 becomes conductive until the voltage of the rectified power on the line 15 falls below the cut-off voltage of the thyristor 16.

When the voltage of the smoothed power on the line 19 exceeds the rated output voltage, the collector current of the transistor T ₃ increases with the result that the current flowing through the resistor R ₇ increases. The threshold voltage of the transistor T ₂ therefore reduces to a voltage v ₂ as shown in FIG. 3(b). At this instant, leading edge of the pulse signal delays as shown by dot-and-dash lines in FIG. 3(c), so that each trigger pulse delays as shown by dot-and-dash line in FIG. 3(d). When on the contrary, the voltage of the smoothed signal on the line 19 lowers below the rated output voltage, the collector current of the transistor T ₃ decreases whereby the threshold voltage rises to a voltage v ₄ in FIG. 3(b). Each leading edge of the signal pulse now leads as shown by dotted line in FIG. 3(d). Being apparent from the above description, the appearance timing of each trigger pulse is regulated in accordance with the voltage of the smoothed power on the line 19 so that the voltage of the output voltage at the terminal 20 is held substantially constant.

Referring now to FIG. 4, start operation of the converter 10 is discussed hereinbelow in conjunction with FIG. 2. When an a.c. voltage is applied to the input terminals 12 and 13, the capacitor C ₃ begins to be charged by the voltage on the line 15, and the capacitor C ₅ also begins to be charged through the resistors R ₃ and R ₇ . It is important that the time constant of power supply circuit constituted by the resistor R ₃ and the capacitor C ₃ is selected to be much larger than that of the time constant of another power supply circuit constituted by the resistor R ₇ and the capacitor C ₅ . Thus, the emitter potential of the transistor T ₁ is built up more quickly than that of the transistor T ₂ . Upon completion of the charging of the capacitor C ₃ , the saw-tooth wave generator 22 begins to generate saw-tooth wave signal as shown in FIG. 4(b). Since the capacitor C ₅ is, on the other hand, slowly charged, the emitter voltage of the transistor T ₂ slowly rises as shown in FIG. 4(c), so that, the threshold voltage of the transistor T ₂ gradually rises as shown by a dotted line in FIG. 4 (b). Accordingly, the trigger pulses is produced on the gate of the thyristor 16 as shown in FIG. 4(d), whereby the firing angle of the thyristor 16 is gradually reduced as shown in FIG. 4(a) which illustrates the voltage at the output terminal 14 of the rectifier 11. The output voltage on the output terminal 20 therefore gradually rise up as shown in FIG. 4(e). It is to be understood that since the output voltage of the converter 10 starts to gradually rise up as shown in FIG. 4(e), an undesired rush current is effectively suppressed.

FIG. 5 illustrates another form of the converter 10 which is arranged identically to the circuit arrangement of FIG. 1 except that an integrator 50 is interposed between the output of the saw-tooth wave generator 22 and the input of the trigger pulse generator 27. The integrator 50 includes a resistor R ₁₂ having one terminal connected to the output of the saw-tooth wave generator 22 and the other terminal connected to the input of the rectangular pulse generator 27, and a capacitor C ₇ having one terminal connected to the other terminal of the resistor R ₁₂ and the other terminal grounded.

In operation, the saw-tooth wave generator 22 produces on its ouput a saw-tooth wave signal having decreasing exponential wave form portion as shown in FIG. 6 (a), although the saw-tooth wave signal ideally is illustrated in FIG. 3. This saw-tooth wave signal is converted by the integrator 50 into another form of saw-tooth wave having a increasing exponential wave form portion as shown in FIG. 6(b).

It should be noted that the saw-tooth wave signal of FIG. 6(a) has a smaller inclination near 180°. Hence, when the integrator 50 is omitted and the saw-tooth wave signal as shown in FIG. 6(a) is applied to the trigger pulse generator 27, the rate of change of the output voltage of the converter 10 become larger at a firing angle near to 180°. On the other hand, it is apparent from FIG. 6(c) that the rate of change the output voltage of the thyristor 16 with respect to the firing angle become large at a firing angle near to 180°. Therefore, the loop gain of the trigger pulse generator 24 increases when the firing angle of the thyristor 16 is near to 180°. It is apparent through a similar discussion that the loop gain of the trigger pulse generator 24 decreases when the firing angle is near to 90°. Such non-uniformity of the loop gain of the trigger pulse generator invites a difficulty of the regulation of the output voltage of the converter. It is to be noted that the saw-tooth wave signal shown in FIG. 6(b) has a large inclination at an angle near 180°. Therefore, when the saw-tooth wave signal of FIG. 6(b) is applied to the trigger pulse generator 24, the loop gain of the trigger pulse generator 24 is held substantially constant, whereby the output voltage of the converter is effectively held constant.

It is to be understood that the integrator 50 may be substituted for by a miller integrator and a bootstrap integrator. Furthermore, a plurality of integrator may be employed, if desired.

FIG. 7 illustrates another circuit arrangement of the converter according to the present invention, which is arranged identically to the circuit of FIG. 2 except for the trigger circuit 31 and the smoothing circuit 18.

The trigger circuit 31 of FIG. 7 comprises a transformer TR with primary and secondary coils. One terminal of the primary coil is connected to the resistor R ₇ of the pulse generator 27. The other terminal of the primary coil is connected to a collector of a transistor T ₄ of NPN type. The secondary coil has terminals respectively connected to the gate and cathode of the thyristor 16. An emitter of the transistor T ₄ is grounded through a resistor R ₁₃ . A base of the transistor T ₄ is grounded through a resistor R ₁₄ and connected through a capacitor C ₈ to the collector of the transistor T ₂ of the pulse generator 27.

The smoothing filter 18 of FIG. 7 comprises a choke coil CH connected to the lines 17 and 19, and to capacitors C ₉ and C ₁₀ which are in turn grounded. The circuit of FIG. 7 operates in the same manner as the circuit of FIG. 2.

Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.

AUTOVOX Mod. TVC2694/E CHASSIS  507.03 PAL-TYPE COLOR SIGNAL PROCESSING

Burst components of PAL-type encoded signal are retained with modulated subcarrier

components as they are processed in 1H delay line assembly and delivered to respective demodulators. Reference oscillation phase to which R-Y demodulator responds is effectively reversed every other line, in response to PAL switch apparatus, in order to provide desired R-Y output in successive lines. Reference oscillation phase to which B-Y demodulator responds is alternated by quadrature switch apparatus between B-Y phase (applied throughout each line interval) and R-Y phase (applied during each inter-line blanking interval). A first gating circuit, coupled to the output of the B-Y demodulator, selects that portion of the B-Y demodulator output developed during the burst interval for passage to integrating and amplifying means in order to develop an AFPC voltage for phase control of the local reference oscillator. A second gating circuit, coupled to the output of the R-Y demodulator, selects that portion of the R-Y demodulator output developed during the burst interval for passage to ACC and color killer circuitry. During color operation (enabled state of bandpass chrominance amplifier) the ACC circuiry develops a control current from the second gating circuit output that adjusts the chrominance amplifier gain in a direction appropriate to maintaining burst amplitude substantially constant at a level set by a manual chroma control. The color killer enables the chrominance amplifier for color operation only when the gated R-Y output indicates by its amplitude the presence of a burst in the received signal and by its polarity the correct switching mode for the PAL switch. Unless such circumstances are present, the color killer disables the chrominance amplifier during each line interval; the killer is keyed, however, to enable the chrominance amplifier during each burst interval so that recovery from the disable state may be effected when appropriate. The color killer circuitry also passes a reset pulse to the PAL switch in the absence of a correct mode indication in the gated R-Y output. The color killer circuitry further serves to control the effectiveness of a subcarrier trap for the receiver's luminance channel, removing the trap during line intervals of monochrome operation.

1. In apparatus for processing PAL-type encoded color television signals, the combination comprising: 2. Apparatus in accordance with claim 1, also including: 3. Apparatus in accordance with claim 2, also including: 4. Apparatus in accordance with claim 2, also including 5. Apparatus in accordance with claim 2, wherein said second reference oscillation supplying means includes means for reversing the phase of the supplied reference oscillation in alternate line intervals, and wherein said apparatus also includes: 6. Apparatus in accordance with claim 5, also including a source of line rate triggering pulses; and 7. Apparatus in accordance with claim 6, also including:

Description:

This invention relates generally to color television signal processing systems, and, particularly, to novel and improved systems for processing color television signals of the PAL type.

In a color television receiver responding to a PAL transmission, the video signal output of the receiver's video detector includes, in addition to a wideband luminance component, a chrominance component in the form of a modulated subcarrier, and representing the summation of (a) the sideband products of the modulation of a subcarrier wave of fixed frequency and a first given phase by blue color-difference (B-Y) signals, and (b) the sideband products of the modulation of a subcarrier wave of the same fixed frequency, but with a quadrature phase relation to the first given phase, by red color difference (R-Y) signals, the second phase, however, being shifted by 180° in successive line intervals. The video signal, moreover, includes a color synchronizing burst component occurring during the inter-line blanking interval, incorporated in the transmission with a fixed amplitude and fixed (subcarrier) frequency, but alternating in phase in successive blanking intervals ±45° about a -(B-Y) phase (thereby corresponding to the summation of a fixed amplitude, constant-phase -(B-Y) burst component and a line-by-line phase reversing R-Y burst component of comparable fixed amplitude).

In a widely used approach to the processing of such detector PAL signals, the following functions are performed: A bandpass chrominance channel provides frequency selective amplification of the subcarrier sideband components, to the exclusion of low frequency luminance signals. The selectively amplified signals are applied to a 1H delay line assembly to develop two outputs respectively corresponding to an additive combination of undelayed and delayed signals, and a subtractive combination of undelayed and delayed signals. One output (in which the B-Y components for successive line intervals reinforce, whereas the R-Y components for successive line intervals mutually cancel) is supplied to a B-Y demodulator, while the other output (in which the R-Y components for successive line intervals reinforce, whereas the B-Y components for successive line intervals mutually cancel) is supplied to a R-Y demodulator. Each demodulator functions as a synchronous detector, controlled by the application of the appropriate phase of subcarrier frequency oscillations of fixed amplitude from a local reference oscillator. The reference phase applied to the B-Y demodulator is constant line-to-line, whereas the reference phase applied to the R-Y demodulator is shifted by 180° in successive line intervals. A takeoff for the burst component of the received signal is provided at a point in the chrominance channel prior to the delay line assembly, with appropriately gated apparatus extracting the burst component alone for amplification and delivery to a phase detector for comparison with an output of the local reference oscillator. An AFPC control voltage derived from the phase detector serves to lock the oscillator in a fixed phase relationship to the average phase of the "swinging" burst. Information derived from the separated burst is also used in performance of color killer and automatic chroma control (ACC) functions (determining the enabling or disabling of the chrominace channel, and the relative gain thereof when enabled). The burst component is eliminated from the chrominance signal delivered to the delay line assembly.

In accordance with the principles of the present invention, novel approaches to PAL color signal processing are contemplated which depart, in many regards, from the above-described widely used approach. Pursuant to the principles of the present invention, burst separation prior to delay is not effected, a separate burst amplifying channel and separate AFPC phase detector are not employed, and burst suppression is not effected for the signal delivered to the 1H delay line assembly. Rather, the burst is retained in the signal delivered to the 1H delay line assembly, and the respective B-Y and R-Y components of the burst pass to the respective demodulators. The B-Y demodulator then serves a dual function: as the B-Y demodulator during line intervals, and as an AFPC Phase detector during interline burst intervals. The phase of reference oscillations supplied to the B-Y demodulator is switched from its normal B-Y phase to an R-Y phase between line intervals, so that the polarity of the demodulator output during a burst interval is indicative of the direction of departure from correct phase relationship between local oscillator and incoming signal. A gating circuit, coupled to the output of the B-Y demodulator, selects that portion of the B-Y demodulator output developed during the burst interval for passage to an integrating and amplifying means in order to develop an AFPC voltage to control the local reference oscillator.

In accordance with further aspects of the present invention, the R-Y demodulator also serves a dual function: as the R-Y demodulator during line intervals, and as a synchronous in-phase detector of burst amplitude during the inter-line burst intervals. A second gating circuit, coupled to the output of the R-Y demodulator, selects that portion of the R-Y demodulator output developed during the burst interval for passage to automatic chroma control (ACC) and color killer circuitry. During color operation (enabled state of bandpass chrominance amplifier) the ACC circuitry develops a control current from the second gating circuit output that adjusts the chrominance amplifier gain in a direction appropriate to maintaining burst amplitude substantially constant at a level set by a manual chroma control. The color killer enables the chrominance amplifier for color operation only when the gated R-Y output indicates by its amplitude the presence of a burst in the received signal and by its polarity the correct switching mode for the PAL switch (i.e., for the reference phase reversing switch associated with the R-Y demodulator). Unless such circumstances are present, the color killer disables the chrominance amplifier during each line interval; the killer is keyed, however, to enable the chrominance amplifier during each inter-line interval so that recovery from the disabled state may be effected when appropriate.

In accordance with still further aspects of the present invention, the color killer circuitry may serve several additional functions, viz.: (a) passing a reset pulse to the PAL switch apparatus, in the absence of a correct mode indication in the gated R-Y output (so that PAL switching mode synchronization may be realized; and (b) controlling the effectiveness of a subcarrier trap for the receiver's luminance channel, removing the trap during line intervals of monochrome operation.

An object of the present invention is to provide novel and improved signal processing apparatus for PAL-type color television signals.

Other objects and advantages of the present invention will be readily apparent to those skilled in the art upon a reading of the following detailed description and an inspection of the accompanying drawings in which:

FIG. 1 is a block diagram illustration of a portion of a color television receiver incorporating color signal processing apparatus embodying the principles of the present invention;

FIG. 2 depicts schematically illustrative apparatus for performing the AFPC function in the system of FIG. 1;

FIG. 3 depicts schematically illustrative apparatus for performing the ACC function in the system of FIG. 1; and

FIG. 4 depicts schematically illustrative apparatus for performing the color killer (and associated PAL switch resetting, and color subcarrier trap switching) functions in the system of FIG. 1.

In FIG. 1, a portion of a PAL color television receiver, incorporating an embodiment of the present invention, is illustrated. The video detector 11 recovers a PAL encoded signal from the output of the receiver's intermediate frequency amplifier (not illustrated). The detector output is applied to a video amplifier 15 via a manual contrast control 13, which is bypassed by a burst circuit 14.

The manual contrast control 13 provides a facility for adjustment of the peak-to-peak magnitude of the video signals delivered to amplifier 15; however, the bypass circuit 14 permits the color synchronizing burst component to pass to amplifier 15 without being affected by contrast control adjustment. This arrangement ensures that contrast control adjustment does not introduce an undesired change in saturation of the image colors; i.e., the contrast control provides concomitant adjustments of the luminance and chrominance components, but does not disturb the burst component amplitude (to which subsequent ACC circuitry is responsive).

The output of video amplifier 15 is applied to a wideband luminance channel, including a luminance amplifier (not illustrated), and also, via chroma takeoff circuitry 17, to a chrominance channel, including a gain controlled bandpass amplifier 19. The chroma takeoff circuitry 17 provides a frequency selective input for the chrominance channel, passing the color subcarrier sideband components, to the substantial exclusion of low frequency luminance components; the chroma takeoff circuitry 17 also functions as a subcarrier trap for the luminance channel, significantly reducing the response of the luminance channel to signal frequencies in the vicinity of the color subcarrier. Desirably, the effectiveness of the trapping function is controlled as a function of whether the signal received is a monochrome or color transmission, with trapping eliminated in the former instance; the manner in which such trapping control is effected with be subsequently described.

The output of bandpass amplifier 19 is supplied to a 1H delay line assembly 21, which provides a pair of outputs representing additive and subtractive combinations of delayed and undelayed signals. At output terminal U of the delay line assembly 21, a combination is provided in which the B-Y components of succesive lines reinforce, whereas the shifting R-Y components tend to cancel; this output is supplied to an input terminal (35) of a B-Y demodulator 30. At a second output terminal (V) of the delay line assembly 21, a signal combination is provided in which the R-Y components of successive lines reinforce, whereas the B-Y components tend to cancel; this output is supplied to an input terminal (45) of an R-Y demodulator 40.

Each of the demodulators 30 and 40 function as a synchronous detector, heterodyning the respective delay line assembly output with unmodulated reference oscillations, of subcarrier frequency and respectively appropriate phase. Illustratively, each demodulator is of a type having (1) a pair of output terminals at which appear respective opposite polarity versions of the color-difference signal product of demodulation, and (2) a pair of reference oscillation input terminals with opposing effects on the polarity of the demodulator outputs.

The source of reference oscillations for the demodulators is reference oscillator 65, operating at the subcarrier frequency (e.g., 4.43 MHz.) and subject to phase control in a manner to be described. An output of oscillator 65 is applied to a quadrature switch 67, controlled by a horizontal blanking pulse input, the switch serving to alternately deliver (a) reference oscillations in a B-Y phase (during each line interval to reference input terminal 31 of demodulator 30, and (b) reference oscillations in a R-Y phase (during each inter-line blanking interval) to reference input terminal 33 of demodulator 30.

The B-Y component output of delay line assembly 21 is thus subject to in-phase synchronous detection during each line interval to a provide a B-Y color-difference signal output at terminal 37, and a -(B-Y) color-difference signal output at terminal 39.

At this point, it is appropriate to note that the color synchronizing burst portion of the video signal amplified in video amplifier 15 has been retained with the line interval subcarrier sideband components throughout the chrominance channel (17, 19, 21). The constant phase -(B-Y) component of the swinging burst thus appears in the signal output at delay line assembly terminal U. This component, accordingly, is subject to quadrature synchronous detection in demodulator 30, in view of the delivery by quadrature switch 67 of reference oscillations in the R-Y phase to the (inverting) reference input terminal 33.

B-Y demodulator 30 thereby conveniently serves as the equivalent of the burst phase detector employed in the usual AFPC arrangement. A B-Y burst interval gate 61, activated by an appropriately timed burst gate pulse, is coupled to output terminal 37, and serves to pass the portion of the demodulator output developed during the burst interval, i.e., the result of phase detection of the -(B-Y) burst component, to an AFPC amplifier 63. An integrated and amplified version of the gated output, with amplitude and polarity respectively indicative of degree and direction of departure from correct phase relationship between oscillator and received signal, is supplied by amplifier 63 to a suitable phase control element of oscillator

Reference oscillations in the R-Y phase are delivered in a linewise alternating fashion from the PAL switch apparatus 69, controlled by a horizontal blanking pulse input, to the respective reference input terminals (noninverting terminal 41 and inverting terminal 43) of R-Y demodulator 40. If the switching mode of the PAL switch 69 is the correct one, the alternating polarity line interval R-Y component at terminal V of delay line assembly 21 will be subject to in-phase detection by demodulator 40 in the desired fashion, developing a R-Y color-difference signal at output terminal 47, and a -(R-Y) color-difference signal at output terminal 49. The latter output signal is supplied, along with the -(B-Y) output of demodulator 30, to a matrix circuit 50, for development of a third (G-Y) color-difference signal.

An R-Y burst component also appears in the signal input to terminal 45 of the R-Y demodulator 40, and is subject to in-phase synchronous detection when the correct switching mode is in effect. An R-Y burst interval gate 71, coupled to output terminal 47 of demodulator 40, is gated by a suitably timed burst gate pulse to pass that portion of the R-Y demodulator output developed during the burst interval to a pair of circuits (ACC amplifier circuit 73 and keyed color killer circuit 77).

The ACC (automatic chroma control) circuitry 73 functions to integrate and amplify the gated R-Y demodulator output in order to develop a control current for controlling the gain of bandpass amplifier 19. The gain control is effected in a direction to oppose spurious variations in the amplitude of the R-Y burst component (which is transmitted with fixed amplitude), thereby to minimize spurious variations in the chrominance signal amplitude that may result in incorrect saturation (chroma) of the displayed image colors. A facility for manual adjustment of the saturation of the image colors is provided in the form of a manual chroma control 75, which supplies an adjustable reference potential to ACC amplifier 73 for comparison with the gated R-Y demodulator output from gate 71 to determine the control current magnitude.

The keyed color killer circuit 77 controls the enabling and disabling of the bandpass amplifier 19, responding to the amplitude and polarity of the gated R-Y demodulator output from gate 71. The amplifier 19 is enabled, permitting amplification thereby of the line interval subcarrier sideband components, when the gate 71 output amplitude indicates presence of a color transmission with a burst of adequate amplitude for synchronization, and when gate 71 output polarity indicates operation of the PAL switch in the correct switching mode. In the absence of such circumstances, the color killer circuit 77 holds the amplifier in a disabled state; the color killer circuit is, however, keyed in response to a horizontal blanking pulse input in a manner enabling operation of the amplifier 19 during the burst interval to ensure the ability of the system to recover from the disabled state when appropriate. Alteration of the PAL switch operation to a correct mode is also facilitated by the keyed color killer circuit 77, which permits passage of a reset pulse to the PAL switch apparatus, when circuit 77 holds amplifier 19 in a disabled state.

The keyed color killer circuit 77 also serves the previously mentioned trap switching function, causing circuit 17 to be effective as a subcarrier trap for the luminance channel when amplifier 19 is enabled, and to be ineffective as a subcarrier trap when amplifier 19 is disabled.

FIG. 2 provides, in schematic detail, an illustration of particular circuit arrangements that may advantageously be employed for portions of the FIG. 1 system (and in particular, those portions associated with oscillator synchronization: B-Y demodulator 30, B-Y burst interval gate 61, AFPC amplifier 63, reference oscillator 65, and quadrature switch 67).

The B-Y demodulator 30 in FIG. 2 employs six transistors (301, 302, 303, 304, 305 and 306 conveniently realized in integrated form on a common monolithic integrated circuit chip 300) arranged in a cross-coupled differential amplifier pair configuration. In the circuit arrangement, the emitters of transistors 301 and 302 are joined directly and returned to a bias supply (e.g., - 15 volts) via the collector-emitter path of transistor 303 and emitter resistor 310; likewise, the emitters of transistors 304 and 305 are joined directly and returned to the bias supply via the collector-emitter path of transistor 306 and the common emitter resistor 310.

The base of transistor 301 serves as the non-inverting reference input terminal 31 of the demodulator; the base (terminal 31') of transistor 304 is directly linked thereto. The base of transistor 302 serves as the inverting reference input terminal 33 of the demodulator the base (terminal 33') of transistor 305 is directly linked thereto. The collector of transistor 301 serves as the B-Y color-difference signal output terminal 37 of the demodulator; the collector (terminal 37') of transistor 305 is directly linked thereto. The collector of transistor 302 serves as the -(B-Y) color-difference signal output terminal 39 of the demodulator; the collector (terminal 39') of transistor 304 is directly linked thereto.

The base of transistor 303 serves as the modulated subcarrier input terminal 35 of the demodulator, receiving the signals appearing at terminal U of the delay line assembly 21 (FIG. 1). The base of transistor 306 is effectively held at AC ground potential by suitable bypassing.

The signal output appearing at terminal 37, free of subcarrier frequency components due to cancellation effects from the contributing transistors (301, 305), is applied to emitter follower transistor 307. A B-Y color-difference signal output is available at the emitter of transistor 307 for combination with a luminance component in the matrix and display portion of the receiver (not illustrated).

The emitter of transistor 307 is also linked by a path including resistor 613 and capacitor 614 to the junction (J) of oppositely poled electrodes of a pair of diodes 611 and 612. The collector-emitter path of a gate transistor 610 short circuits junction J to ground throughout each line interval. During each burst interval, however, the short circuit is removed, as transistor 610 is cut off by the positive-going pulse portion b of a gating waveform applied to its base. The cutoff of transistor 610 during each burst interval permits conduction by one of the diodes (611 or 612, depending upon the polarity of the burst interval output of demodulator 30) to charge the respectively associated capacitor (615 or 616) to a level dependent upon the magnitude of the burst interval output of demodulator 30. Transistor 610 and associated circuitry thus performs the function of the B-Y burst interval gate 61 of the FIG. 1 system.

AFPC amplifier 63 includes a pair of transistors 631 and 633 disposed in a differential amplifier configuration, with the base of input transistor 631 coupled to respond to the potential across the charged capacitor (615 or 616). The integrated output of amplifier 63 appears across capacitor 635, coupled between the collector of output transistor 633 and ground.

Reference oscillator 65 employs a transistor 651 associated with reactive circuit elements in a Colpitts configuration, with the inductive circuit branch including a frequency determining crystal 653 in series with a variable capacitance diode 652. A resistor links the collector of AFPC amplifier output transistor 633 to the junction of crystal 653 and diode 652, whereby the reverse bias on diode (and hence its capacitance) is subject to variation in accordance with the integrated output of amplifier 63 in order to effect the desired frequency and phase synchronization.

The output of reference oscillator 65 is derived from the collector of transistor 651 and applied via an emitter follower transistor 655 to a reference oscillation feed point R. Quadrature switch apparatus 67 controls the application of reference oscillations from feed point R to respective reference input terminals of the B-Y demodulator 30.

Quadrature switch 67 employs a pair of switching transistors 675 and 676. Switching transistor 676 is normally conducting, but is cut off during each inter-line blanking interval by the neagive-going pulse portion n of a gating waveform applied to its base. In complementary fashion, switching transistor 675 is rendered conducting only during the inter-line blanking interval by the positive going pulse portion p of a gating waveform applied to its base.

The collector-emitter path of switching transistor 676 is connected between the demodulator reference input terminal 33 and ground, while the collector-emitter path of switching transistor 675 is connected between the demodulator reference input terminal 31 and ground. A resistor 674 links feed point R to reference input terminal 33. A resistor 671 in series with a coil 672 links feed point R to reference input terminal 31. A capacitor 673 is connected between reference input terminal 31 and ground, and is adjusted for series resonance with coil 672 at the reference oscillation frequency.

during each line interval, the conduction of switching transistor 676 short circuits reference input terminal 33 to ground, precluding the feeding of reference oscillations to that terminal. Switching transistor 675, however, is nonconducting each line interval, permitting the feeding of reference oscillations to terminal 31. Circuit elements 672 and 673 introduce a phase shift of 90° from the R-Y phase to which the oscillator output is held, so that the reference oscillations delivered during line intervals are at the B-Y phase.

During each inter-line blanking interval, the conduction of switching transistor 675 short circuits reference input terminal 31 to ground, precluding the feeding of reference oscillations to that terminal. Switching transistor 676, however, is nonconducting during each inter-line blanking interval, permitting the feeding of reference oscillations to terminal 33 in the R-Y phase.

FIG. 3 provides, in schematic detail, an illustration of particular circuit arrangements that may advantageously be employed for additional portions of the FIG. 1 system (particularly, those portions associated with automatic chroma control: R-Y demodulator 40, R-Y burst interval gate 71, ACC amplifier 73, manual chroma control 75, video amlifier 15, chroma takeoff 17, and bandpass amplifier 19).

The R-Y demodulator 40 employs six transistors (401, 402, 403, 404, 405 and 406) disposed on a monolithic integrated circuit chip 400, and arranged in a cross-coupled differential amplifier configuration identical to that previously explained for the B-Y demodulator 30.

The base of transistor 401 serves as the non-inverting reference input terminal 41 of the demodulator, the base (terminal 41') of transistor 404 is directly linked thereto. The base of transistor 402 serves as the inverting reference input terminal 43 of the demodulator; the base (terminal 43') of transistor 405 is directly linked thereto. The collector of transistor 401 serves as the R-Y color-difference signal output terminal 47 of the demodulator; the collector (terminal 47') of transistor 405 is directly linked thereto. The collector of transistor 402 serves as the -(B-Y) color-difference signal output terminal 49 of the demodulator; the collector (terminal 49') of transistor 404 is directly linked thereto.

The base of transistor 403 serves as the modulated subcarrier input terminal 45 of the demodulator, receiving the signals appearing at terminal V of delay line assembly 21 (FIG. 1). The base of transistor 406 is effectively held at AC ground potential by suitable bypassing.

The signal output appearing at terminal 47, free of subcarrier frequency components, is applied to emitter follower transistor 407. An R-Y color-difference signal output is derived from the emitter of transistor 407. A path, including, in series, a resistor 713, capacitor 714 and resistor 715 is also provided between the emitter of transistor 407 and the base of an additional emitter follower transistor 711. The emitter-collector path of a gating transistor 710 is connected between ground and the junction of capacitor 714 and resistor 715; the junction is short circuited to ground throughout each line interval by the conducting gate transistor 710. During each burst interval, however, the short circuit is removed, as transistor 710 is cut off by the positive-going pulse portion b of a gating waveform applied to its base. The cutoff of transistor 710 during each burst interval permits emitter follower transistor 711 to respond to the burst interval portion of the output of demodulator 40. Transistor 710 and associated circuitry thus performs the function of the R-Y burst interval gate 71 of the FIG. 1 system.

An output of emitter follower transistor 711 is applied to the keyed color killer circuit 77 (for which a detailed showing will appear in the subsequently described FIG. 4). ACC amplifier 73 responds to another output of emitter follower transistor 711 in a manner to be now described.

ACC amplifier 73 includes a pair of cascaded amplifier stages incorporating transistors 730 and 731. The emitter of the ACC input transistor is connected to the adjustable tap of a potentiometer 750, the end terminals of which are connected to respective bias supply terminals of opposite polarity (e.g., -15 volts and + 15 volts). The base of ACC input transistor 730 is connected to the emitter of emitter follower transistor 711 by an isolating diode 712, rendered conducting only during each burst interval by the positive-going pulse portion of a gating waveform applied to the transistor 730 base. The degree of conduction, if any, by transistor 730 during the gating interval (i.e., the burst interval) is dependent upon a comparison of the magnitude and polarity of the gated R-Y demodulator output with the magnitude and polarity of the emitter bias selected by adjustment of potentiometer 750 (which, as will be shown, performs the function of the manual chroma control 75 of the FIG. 1 system). Capacitive feedback between collector and base of transistor 730 reduces high frequency response, to prevent high frequency noise in the gated demodulator output from affecting the ACC voltage to be developed.

When the gated R-Y demodulator output is more positive than the selected emitter bias potential, conduction by ACC input transistor 730 in turn drives the (complementary type) ACC output transistor 731 into conduction, charging filter capacitor 732 in its collector circuit. The voltage developed across capacitor 732, representing an integration of successive output pulses of transistor 731, causes a current to flow via the series combination of resistor 735, diode 733, resistor 736 and diode 192 into the base of the amplifier transistor 190 of the bandpass amplifier 19 (to be described in detail subsequently).

When the difference between the gated demodulator output and the selected emitter bias potential is sufficiently small, the voltage across the filter capacitor 732 will be sufficiently small that diode 733 will be reverse biased, permitting no ACC control current flow into the transistor 190 base, leaving transistor 190 in its maximum gain condition determined by fixed biasing parameters. When the burst component delivered to the R-Y demodulator is large enough to increase the gated demodulator output above the aforementioned level at which diode 733 is cut off, a control current will flow into the base of transistor to reduce its gain appropriately.

The above-described ACC action requires the condition that the switching mode of the PAL switch 69 (FIG. 1) controlling the feeding of reference oscillations to demodulator 40 is the correct one, so that the polarity of the gated demodulator output is correct (positive). Also required is that the keyed color killer circuit 77 has placed amplifier 19 in its enabled state for color operation. While a more detailed explanation of keyed color killer circuit 77 will be presented subsequently in connection with FIG. 4, a portion of the killer circuit (comprising transistor 790, which is held cut off when conditions are correct for color operation, and which is conducting during line intervals when conditions are otherwise) has been illustrated in FIG. 3 to permit a full showing of bandpass amplifier 19.

Bandpass amplifier 19 receives signals from an output of video amplifier 15, the latter incorporating an amplifier transistor 150, disposed in grounded base configuration and receiving at its emitter video signals from contrast control 13 and burst bypass circuit 14 (FIG. 1). An output lead from the collector of transistor 150 couples signals therefrom to suitable luminance amplifier circuitry (not illustrated).

The collector of transistor 150 is also connected, by means of the series combination of capacitor 170, coil 171 and the previously mentioned diode 192, to the base of the bandpass amplifier transistor 190. Coil 171 is adjusted for series resonance with capacitor 170 at the subcarrier frequency. A pair of resistors 194 and 195 are connected in series across diode 192, and the emitter-collector path of color killer transistor 790 is connected between negative supply terminal (e.g., -15 volts) and the junction of resistors 194 and 195.

A diode 791 is shunted across the base-emitter path of bandpass amplifier transistor 190, with poling opposite to that of the base-emitter diode. A tuned load is provided for amplifier transistor 190, the primary winding of bandpass transformer 191 being connected in the collector circuit of transistor 190; the secondary winding of transformer 190 couples the amplfier output to the delay line assembly 21 of the FIG. 1 system. DC feedback resistor 193 is coupled between a point in the collector circuit of transistor 190 and the junction of coil 171 and diode 192.

During color operation (when killer transistor 790 is cut off), diode 192 and the base-emitter diode of transistor 190 are forward biased and provide a low impedance return to ground for the series resonant circuit 170, 171. The latter then functions as a frequency selective input circuit for amplifier 19, and also as a subcarrier trap for the circuitry feeding signals to the luminance amplifier (thereby performing the functions of the chroma takeoff and subcarrier trap apparatus 17 of FIG. 1 system). Under these color operation conditions, shunt diode 791 is biased off, and the conductive state of diode 192 permits the feeding of a variable control current from ACC amplifier 73 to the transistor 190 base when appropriate.

When color killer transistor 790 is conducting, however, a substantial change in the biasing conditions for transistor 190 and associated components is brought about. Conduction of killer transistor 790 brings the junction of resistors 194 and 195 to a negative potential. reverse biasing diode 192 and forward biasing shunt diode 791. The reverse biasing of diode 192 blocks the passage of signals to transistor 190, and the conduction of diode 791 holds transistor 190 in a cutoff condition. No low impedance return to AC ground is provided for the series resonant circuit 170, 171, whereby its effectiveness as a subcarrier trap for the luminance channel is eliminated. Diode 734 is rendered conducting under the altered biasing conditions to preclude the ACC filter capacitor 732 from changing to a negative potential.

FIG. 4 provides, in schematic detail, an illustration of particular circuit arrangements that may advantageously be employed for further portions of the FIG. 1 system, particularly including the keyed color killer circuit 77 and the PAL switch apparatus 69. Also repeated in FIG. 4 are illustrative circuit arrangements for system components 15, 19 and 71 to aid in an explanation of the color killer operation.

As previously explained, the keying of gate transistor 710 into cutoff during each burst interval permits emitter follower transistor 711 to respond only to the burst interval portion of the output of the R-Y demodulator 40 (FIGS. 1 and 3). The emitter of transistor 711 is linked not only to the previously described ACC amplifier circuitry (FIG. 3) but also, via a path including compensating diode 770, to the base of feedback amplifier transistor 771.

The collector of amplifier transistor 771 is coupled by means of the series combination of storage capacitor 773 and diode 774 to the base of a succeeding amplifier transistor 776. The emitter-collector path of a gating transistor 772 is connected between ground and the junction of capacitor 773 and diode 774. Gating transistor 772 is rendered conducting during the burst interval only by the positive-going pulse portion b of the gating waveform applied to its base. The conduction of gating transistor short circuits one terminal of storage capacitor 773 to ground during the burst interval, so that the burst interval output of R-Y demodulator 40 is integrated by capacitor 773. During the succeeding line interval, when gating transistor 772 is cutoff, the voltage developed across capacitor 773 (charge reduction caused by the detected burst integration) is transferred via diode 774 to capacitor 775, connected between ground and the base of transistor 776.

Transistor 776 is disposed in a differential amplifier configuration with an additional amplifier transistor 777, the emitters of transistors 776 and 777 being returned to a negative bias supply terminal (e.g., -15 volts) via a common emitter resistor. The collector of transistor 776 is connected to a positive bias supply terminal (e.g., -15 volts) by means of a collector resistor 778. The collector of transistor 766 is also cross-coupled to the base of transistor 777 by means of resistor 779. Resistor 780 is connected between the base of transistor 777 and ground.

Due to the presence of cross coupling resistor 779, the differential amplifier has only two stable states. In the absence of a signal input to the base of transistor 776, transistor 777 is in saturation and transistor 776 is cutoff. However, when the gated R-Y demodulator output is such that a positive potential appears across capacitor 775 with adequate magnitude relative to a threshold determined by the divider 778, 779, 780, the differential amplifier switches to its other stable state in which transistor 776 is in saturation and transistor 777 is cutoff. The latter condition is established only when the received signal includes synchronizing bursts of adequate amplitude, reference oscillator 65 is properly synchronized in phase, and PAL switch 69 is operating in the correct mode.

A resistor 781 links the collector of transistor 777 to the base of transistor 783 (complementary in type to transistor 777); the base of the previously mentioned kiler transistor 790 (similar in type to transistor 777) is connected to a point in the collector circuit of transistor 783. When transistor 777 is cutoff (i.e., when conditions are correct for color operation, as indicated by the R-Y demodulator output during the burst interval). the other transistors of the complementary cascade chain (783, 790) are likewise driven to cutoff. As previously noted, the result of cutoff of transistor 790 is the forward biasing of diode 192 and the base-emitter path of band pass amplifier transistor 190, with the consequence that bandpass amplifier 19 is fully enabled and responds to signals selectively passed by chroma takeoff circuit elements 170, 171 and conducting diode 192; elements 170, 171 are also effective as a subcarrier trap for the luminance channel under these conditions.

When transistor 777 is in saturation, however, in the absence of an indication of correct operating conditions by the gated R-Y demodulator output, the other transistors of the complementary cascade chain (783,790) are also in saturation. The effects of conduction by killer transistor 790 have been previously described: cutoff of diode 192 to bar signal passage to the transistor 190 base and to eliminate the effectiveness of elements 170, 171 as a subcarrier trap, and forward biasing of diode 791 to hold transistor 190 in cutoff.

When killer transistor 790 is conducting to establish the disabled state for bandpass amplifier 19, thereby barring color operation, means must be provided to permit the system to recover from the disabled state when appropriate. For this purpose, a gating waveform, having a positive-going pulse portion p occurring during each inter-line blanking interval, is applied to the base of transistor 783 via a resistor 784, forward biasing the diode 782 (coupled across the base-emitter path of transistor 783 with opposite poling to that of base-emitter diode) during the blanking interval. The pulse application ensures that transistors 783 and 790 are cut off during each interline blanking interval, independent of the conducting state of transistor 777, whereby bandpass amplifier 19 is always in the enabled state for the burst component of a received signal (to be fed on to the demodulators to permit resumption of color operation when appropriate).

A negative-going blanking pulse waveform is developed in the collector circuit of transistor 783 (under color-off conditions) in response to the aforementioned pulse application. This waveform is passed by isolating diode 785 to the series combination of capacitor 786 and resistor 787, the junction of which elements is directly linked to the collector of transistor 776 (cut off during color-off conditions). A differentiated version of the negative-going pulse appears at the junction; the positive-going spike portion of the differentiated waveform, occurring at the end of the inter-line blanking interval, is passed via sterring diodes 696 and 697 to the PAL switch 69 as a reset pulse.

During color-on operation, the saturated state of transistor 783 precludes the inverted blanking pulse development. Additionally, the conduction of transistor 776 reverse biases the sterring diodes 696 and 697 to protect the PAL switch from spurious output variations in the collector circuit of transistor 783, should they occur.

The PAL switch apparatus 69 includes a bistable multivibrator, incorporating transistors 690 and 691 with conventional cross-coupling from collector to base. A triggering waveform, having a positive-going pulse portion p occurring during each inter-line blanking interval, is applied to a differentiating circuit formed by the series combination of capacitor 680 and resistor 681. The differentiated waveform appearing at the junction of elements 680, 681 includes positive-going spikes, occurring at the beginning of each inter-line blanking interval, which are passed by steering diodes 694 and 695 to the bases of the multivibrator transistors 690, 691 to effect triggering of the multivibrator between its stable states.

When the multivibrator is in one of its stable states, transistor 690 is heavily conducting while transistor 691 is cut off; in this state, switching transistor 692, complementary in type to transistor 690 and having its base coupled to a point in the collector circuit of transistor 690, is driven into conduction, while switching transistor 693, complementary in type to transistor 691 and having its base coupled to a point in the collector circuit of transistor 691, is driven into cutoff. The collector-emitter path of switching transistor 692 is directly connected between the noninverting reference input terminal 41 of R-Y demodulator 40 and ground, while the collector-emitter path of switching transistor 693 is directly connected between the inverting reference input terminal 43 of R-Y demodulator 40 and ground. Thus in the noted state of the multivibrator, conduction by switching transistor 692 precludes the feeding of R-Y phase reference oscillations in from feed point R to noninverting reference input terminal 41, whereas cutoff of switching transistor 693 permits the feeding of R-Y phase reference oscillations from feed point R to the inverting reference input terminal 43.

When the multivibrator is triggered to its other stable state, transistor 690 (and switching transistor 692) is dirven into cutoff, while transistor 691 (and switching transistor 693) is driven into conduction. In this state, R-Y phase reference oscillations are permitted to feed noninverting reference input terminal 41, but precluded from feeding inverting reference input terminal 43.

In the absence of reset pulse application from transistor 783, the trigger pulse application via diodes 694, 695 effects a line-by-line reversal of the effective angle of demodulation employed in the R-Y demodulator. When this line-by-line reversal is carried out in the incorrect mode, the reset pulse application permits alteration to the correct mode. It will be noted that when a monochrome signal, lacking a burst component, is received, continued reset pulse application ensures, with the consequence that the phase reversing effect will be overcome during successive line intervals to reduce the possibility of undesired "Hanover bar" type disturbances of the displayed monochrome image.

While specific circuit arrangements have been illustrated for the various components of the FIG. 1 system, it will be appreciated that these are given by way of example, and a variety of other specific circuit arrangements may be substituted therefor in carrying out the principles of the invention. It will also be appreciated that various portions of the system of FIG. 1 may be advantageously employed, with different techniques than those described employed in performing the remaining functions.

AUTOVOX Mod. TVC2694/E CHASSIS  507.03 AUTOMATIC CHROMA GAIN CONTROL SYSTEM:

Cascaded first and second gain-controlled amplifiers are used in the chrominance channel of a color television receiver. The gain of the first amplifier is controlled by an ACC loop employing a noise-immune detector to detect color burst information. The gain of the second amplifier is controlled by the output of a peak detector which detects picture-interval information at the output of the second amplifier. An ACC system with improved performance during the reception of noisy signals results.

1. In a color television receiver an automatic chroma gain control system for processing input chroma signals having burst information and picture-interval information components, said system comprising, 2. In a color television receiver an automatic chroma gain control system as claimed in claim 1 wherein said peak detector is characterized by being: 3. In a color television receiver an automatic chroma gain control system as claimed in claim 1 wherein said threshold peak detector comprises: 4. In a color television receiver an automatic gain control system as claimed in claim 3 wherein said resistance is chosen large enough that the return to said quiescent charge condition when said semiconductor means is no longer biased into conduction requires a time longer than said period. 5. In a color television receiver an automatic chroma gain control system as claimed in claim 1 wherein, 6. In a color television receiver an automatic chroma gain control system as claimed in claim 1 including: 7. In a color television receiver an automatic gain control system as claimed in claim 1 including: 8. In a color television receiver including 1. a first chroma amplifier providing intermediate chroma signals at its output terminal and having its gain controlled by an automatic chroma gain control responsive to the burst information component of said intermediate chroma signals and 2. chroma demodulators having their input terminal adapted to receive signals to be demodulated, which signals if their peak excursions were excessively large could cause oversaturation to occur in said receiver, in combination therewith the improvement comprising: 9. In a color television receiver the improvement claimed in claim 8 wherein: 10. In a color television receiver the improvement as claimed in claim 9 wherein said peak detector and said manual chroma gain control means are embodied in circuitry comprising:

Description:

The present invention relates to color television receivers and more particularly to circuitry for providing improved automatic chroma control (ACC).

Automatic chroma control (ACC) is an automatic gain control system applied to a chroma amplifier in a color television receiver. The control system is conventionally responsive to burst information appearing in the horizontal blanking intervals of the chroma signal and acts to maintain the amplitude of the burst information in the output circuit of the chroma amplifier more nearly constant than at its input circuit. If each television broadcaster adheres to system standards concerning the relative levels of picture-chroma and burst information in its signals, the chroma signals will be maintained at the same color saturation level despite the viewer switching from one channel to another.

Too high a level of color saturation causes "oversaturation" -- at least on peaks of the color signals kinescope -- a condition in which the kinescope "blooms". "Blooming" is wheree the beam current in the kinescope increases so much that defocusing of the electron beam occurs and the color spot on the phosphor screen responsive to the electron beam is undesirably enlarged.

The ACC system desirably should provide for reducing chroma amplifier gain as the chroma signals become noisier, so that peaks of the combined chroma and noise signals will not cause oversaturation to occur. In an ACC system in which the burst information is detected by a noise-immune detector, unresponsive to noise accompanying the chroma signal, the chroma amplifier gain will not be reduced as the chroma signals become noisier. So undesirable oversaturation on peaks of noise is probable.

The detection of burst information for developing ACC signal may be done using a synchronous detector timed in response to the local color subcarrier source. The local color subcarrier source is itself synchronized with the incoming burst information which system may comprise, for example, automatic phase and frequency control (AFPC) or injection-locking of a crystal oscillator. Detection of the burst information by a synchronous detector provides an ACC substantially immune to noise signals accompanying the chroma signals to be controlled and will give rise to the problem of oversaturation during noisy signals.

However, in other ways a noise-immune ACC detector is desirable. It can provide, in combination with a simple threshold detector responsive to signals below a certain threshold level, for a noise-immune color killer circuit to disable the chroma demodulation processes during black and white television signal transmissions.

A noise-immune ACC detector is also advantageous when the local color subcarrier source is synchronized with burst information separated from chroma signal taken from the output circuit of the ACC'd chroma amplifier. This is because the burst information is not reduced in response to noisy signals, so synchronization of the local color subcarrier source is not consequently imparied. Further, a synchronous detector for developing ACC signal produces no gain reducing output until the local color source is brought into substantial synchronization with the burst information. This speeds the synchronization process.

Because of the advantages of using a synchronous detector for developing ACC signal, ways have been sought to augment its action with other circuitry to overcome its shortcomings. The picture-interval chroma information in the output signal of the ACC'd chroma amplifier may be detected to provide an ACC component signal to be added to the ACC component developed by the synchronous detector. This is disadvantageous to do when the local color subcarrier source is to be synchronized from the output signal of the ACC'd chroma amplifier, because the reduction of the signal during the reception of noisy signals impairs synchronization of the local color subcarrier source to the burst information contained therein.

Further, the detection of picture-interval chroma information to develop ACC information tends to produce control signals which are responsive to the chroma peaks of the broadcast scene, causing low-chroma scenes to have too high color saturation or high-chroma scenes to have too low color saturation. This is undesirable when strong, noise-free signals are being received.

An automatic chroma control system embodying the present invention includes a first chroma amplifier followed in cascade connection by a second chroma amplifier. The input circuit of the first amplifier is adapted to receive input chroma signals, having a burst information component and having a picture-interval information component, and provides in response thereto intermediate chroma signals at its output circuit. The second amplifier provides output chroma signals at its output circuit in response to intermediate chroma signals applied to its input circuit. A noise-immune detector means develops a control signal responsive to the amplitude of the burst information component of the input chroma signals. The control signal provided by the noise-immune detector means is applied to the first chroma amplifier to control its gain for chroma signals. A peak detector means develops a control signal responsive to peaks of the picture-interval component of the input chroma signals and accompanying noise. The control signal provided by the peak detector means is applied to the second chroma amplifier to control its gain for chroma signals.

When the noise level in the picture-interval component of the input chroma signals grows large enough to tend to cause peaks of the noisy output chroma signals to exceed the excursion permitted peaks of noise-free signals, the gain of the second amplifier is reduced by action of the peak detector means to maintain peaks of the noisy output chroma signals within the limits of excursion permitted peaks of noise-free signals. Accordingly, oversaturation during the reception of noisy signals is avoided. At the same time the noise immunity of the ACC of the first chroma amplifier is desirably unaffected.

The noise-immune detector is an amplitude detector in which the detector response for peaks of noise as compared to the response for the average level of burst information is less than that of a peak detector. Average detection, where the detector is responsive to the average energy of the signal peak detected rather than its peak energy, will provide for noise immunity since noise accompanying the burst information has a larger ratio of peak energy to average energy than the burst information itself does. Narrowing the bandwidth of the signals being admitted to an amplitude detector is an alternative or supplemental way to provide for noise immunity. Synchronous detection will afford additional noise immunity.

In a preferred embodiment of the present invention the peak detector means is provided with an offset threshold so that detection of peaks occurs only on peaks of the output chroma signals which exceed a certain threshold level, whereby the peak detection means is inoperative to reduce the gain of the second amplifier under conditions of reception by the television receiver of strong, noise-free television signals broadcast to proper standards.

In a further preferred embodiment of the present invention means are provided for manually controlling the gain of the second amplifier for chroma signals. The peak detector means operates to prevent oversaturation caused by setting the manual chroma gain control for too high gain.

The advantages of the present invention will be better understood from the detailed description of the drawings in which:

FIG. 1 is a block schematic of the present invention shown in a representative type of color TV receiver, and

FIG. 2 is a schematic of the cascaded first and second gain-controlled amplifiers and their associated circuitry as fabricated in integrated circuit form in a preferred embodiment.

Referring now to FIG. 1, television broadcast signals intercepted by an antenna 101 are applied to a "front end" 103 of the color television receiver comprising a tuner, mixer, intermediate-frequency amplifiers and video detector. Composite video signals from the video detector portion of "front end" 103 are applied as input signals to luminance circuitry 105 typically comprising trapping filters, contrast and brightness controls, and video amplifier stages. Output video signals from the luminance circuitry 105 and output color-difference signals from chroma demodulators 107 are combined and amplified in a color matrix and kinescope-driver amplifiers section 109. The output signals from the kinescope-driver amplifiers of the section 109 are red, green and blue drive signals which are applied to electrodes of a color kinescope 111. The color kinescope 111 is shown to have vertical magnetic deflection coils 113 and horizontal magnetic deflection coils 115.

Composite video signals from the video detector portion of the "front end" 103 are applied as input signals to a sync separator 117, which provides separated sync signals to a vertical sweep generator 119 and a horizontal sweep generator 121. The vertical sweep generator provides sweep signals to the vertical deflection coils 113; the horizontal sweep generator 121 provides sweep signals to the horizontal deflection coils 115.

Composite video signals from the video detector portion of the "front end" 103 are also applied to a chroma sidebands filter 123. Components of the composite video signals which are in the frequency range of the chroma sidebands, including those chroma sidebands, are selected by the filter 123 and applied as input signals to the gain-controlled amplifier 125. Output signals from the amplifier 125 are applied as input signals to another gain-controlled amplifier 127. Output signals from the amplifier 127 are applied to the chroma demodulators 107 as input signals to be detected.

Output signals from the amplifier 125 are applied as input signals to a burst gate 129. The burst gate 129 provides an output signal responsive to these signals during time intervals determined by gating pulses. These gating pulses are supplied to the burst gate 129 from the horizontal sweep generator 121. When the generator 121 is synchronized with the broadcast television signal, these gating pulses occur at intervals corresponding to the intervals in which burst information is present in the output chroma signals of amplifier 125, as applied to the input of burst gate 129.

The burst gate 129 provides separated burst signals, accordingly, during normal receiver operation. Separated burst signals from the burst gate 129 are applied to a local color subcarrier source with synchronizing circuitry 131 which provides a regenerated color subcarrier output signal timed in response to the separated burst signals. The source 131 may comprise a crystal oscillator synchronized by means of automatic phase and frequency control (AFPC) or by injection lock means, for example. The regenerated color subcarrier output signal from the source 131 is supplied to a phase-shift network 133, which provides appropriately phased color subcarrier signal outputs to time the chroma demodulators 107.

The burst gate 129 also provides separated burst signals to a noise-immune detector 135, which develops ACC signals therefrom for application to the amplifier 125 to control its gain for chroma signals. As the level of burst information at the output of the first amplifier tends to increase, the gain of the amplifier is reduced by the ACC signals. The noise-immune detector 135 may, for example, be a synchronous detector provided color subcarrier signals to time its detection processes either from the phase-shift network 133 as shown by solid connection or, alternatively, directly from the source 131 as shown by dotted connection. The ACC signals from the detector 135 may be applied to a color killer threshold detector 137, which provides a color kill instruction signal when the ACC signals at its input are smaller than a threshold level. This color kill instruction signal may be coupled to the amplifier 127 to reduce its gain substantially to zero, as shown by solid connection, or alternatively coupled to the chroma demodulators 107 to disable their operation, as shown by dotted connection.

The ACC of the first gain-controlled amplifier 125 will not sufficiently reduce its gain for chroma signals in response to accompanying noise, because of the noise-immunity of the detector 135. During the reception of weak, noisy signals the gain of the amplifier 125 will be increased to maintain the level of burst information in its output signal the same as when strong, noise-free signals are being received. The signal excursions of noise accompanying the chroma signals at the output of amplifier 125, a part of which noise is generated in the "front end" 103 of the receiver and a part of which is intercepted by the antenna 101, will exceed normal chroma signal excursions. Were the gain of the amplifier 127 fixed in value, oversaturation conditions would therefore obtain in the television receiver.

The output chroma signals from the amplifier 127 are supplied to a peak detector 139. The amplifier 127 may have gating pulses applied to it from the horizontal sweep generator, as shown, to reduce its gain to zero during horizontal blanking intervals or, alternatively, it may not. In either case, chroma is available during picture intervals at the output circuit of amplifier 127. The peak detector 139 is sensitive to peaks in the picture-interval chroma signals provided to it by amplifier 127 and develops a gain control signal in response thereto which is applied to control the gain of the amplifier 127. As the peaks in the picture-interval chroma tend to increase their excursion, the control signal provided by the peak detector 139 reduces the gain of the amplifier 127. The excessive signal excursions of noise accompanying the chroma signals, mentioned in the previous paragraph, cause the peak detector 139 to reduce the gain of amplifier 127. Therefore, the signal excursions of noise accompanying the output chroma signals of amplifier 127 will not exceed the normal signal excursions of strong, noise-free output chroma signals. Consequently, "blooming" of the color kinescope on noise peaks will be forestalled.

Cascading the gain controlled chroma amplifiers 125 and 127 and operating their gain control loops separately obviates the problem of the peak detector 139 being sensitive to the average chroma level of the scene during the reception of strong, noise-free signals if: 1. the maximum gain of the chroma amplifier 127 is correctly set, and 2. the peak detector 139 is made insensitive to signal excursions which do not exceed a certain threshold value. When these criteria are met, the normal level of strong, noise-free chroma signals maintained at the input of the amplifier 127 by the ACC of the amplifier 125 will never cause large enough signal excursions of the output chroma signals provided by the amplifier 127 to the peak detector 139 to develop a control signal to reduce the gain of amplifier 127. When receiving strong, noise-free television signals, the amplifier 127 will then operate at its predetermined gain. No control signals dependent upon picture interval chroma will be introduced into the ACC system.

A manual chroma gain control 141 may be connected to control the gain of the gain-controlled amplifier 127. Manual chroma gain controls are often mis-set by the viewer and when set for too high chroma gain will tend to cause blooming of the kinescope on objects having high color saturation. Placement of the manual chroma gain control prior to the output circuit of the amplifier 127 and the input circuit of the peak detector 139 permits the gain of the amplifier 127 to be reduced by a control signal from the peak detector 139 responsive to the overly large chroma signals. This automatic adjustment of the gain of the amplifier 127 will prevent kinescope "blooming" caused by mis-setting of the manual chroma gain control 141.

The peak detector 139 also acts to reduce the gain of the amplifier 127 if signals are received which depart from good broadcasting practice by reason of having insufficient burst information or excessive chroma modulation. This gain reduction prevents oversaturation during the reception of such signals.

The elements 125-139 shown enclosed by the dotted-line 143 are suitable for fabrication in primarily monolithic silicon integrated circuitry form. The burst gate 129 and noise immune detector 135 may be of the type referred to in the concurrently filed U.S. Pat. application Ser. No. 242,322, entitled "Detector Circuit With Self-Referenced Bias", filed in the name of the present inventor and assigned to RCA Corporation. The color subcarrier source with synchronizing circuitry may comprise a voltage-controlled crystal oscillator and an AFPC detector providing voltage to control the frequency of oscillations from the oscillator in response to separated burst signals provided by the burst gate 129. The AFPC detector may be of the type described in the concurrently filed U.S. Pat. Application Ser. No. 242,321 entitled "Electronic Signal Processing Circuit", filed in the name of the present inventor and assigned to RCA Corporation. It is desirable to provide to an integrated circuit AFPC detector input chroma signals taken from the output of an amplifier 125 provided with ACC from a noise-immune detector 135. This is because the constraint on operating supply voltages in an integrated circuit and the infrequency of burst information tend to make the AFPC detector output small with respect to direct-current biasing errors. This undesirable condition can be better tolerated if the detector is supplied as much input signal as possible without overloading the detector when the oscillator is synchronized to incoming burst information. The chroma signals at the output of the ACC'd amplifier 125 are suitably regulated in amplitude to provide these input signals.

FIG. 2 is a schematic diagram of integrated circuitry for performing the functions indicated by blocks 125, 127, 137, 139 and 141 of FIG. 1 in connection with the functions indicated by blocks 129, 131, 133, 135 as provided by the circuitry described in the previous paragraph. All elements shown except 230, 237-239 and 261 are considered within the confines of an integrated circuit, which is provided with terminals 229, 236 and 262 for connection to those external elements.

The first gain-controlled amplifier 200 is a differential amplifier employing emitter coupled NPN transistors 201 and 202. The second gain-controlled amplifier 220 is a differential amplifier employing emitter coupled NPN transistors 221 and 222. Resistive voltage dividers 203, 205 and 204,206 provide collector loads for the transistors 201 and 202, respectively, The base electrodes of transistor 221 and 222 are connected to respective ones of the resistive voltage dividers 203, 205 and 204, 206 to receive reduced output chroma voltages from the collector electrodes of transistors 201 and 202. This establishes a cascade connection for chroma signals of the amplifier 220 after the amplifier 200. The output chroma voltages at the collector electrodes of transistors 201 and 202, provided in response to composite chroma input signals applied to terminal 209 at the base electrode of transistor 201, are for application to the burst gate 129 and subsequently the noise-immune detector 135.

The resistive voltage divider formed by the series connection of resistors 219, 216, 217 and diode 218 between +5 volt operating supply and ground reference potential provides direct-current voltages intermediate therebetween for the biasing of the base electrodes of NPN transistors 212, 214. Direct-current bias for the base electrodes of transistors 201, 202 is provided via resistors 210, 211, respectively, from the emitter electrode of the common-collector transistor 212.

Emitter current is provided to the joined emitter electrodes of transistors 201, 202 from the collector electrode of an NPN transistor 214, which has its emitter electrode coupled to ground reference potential by a resistor 215. The collector current of the transistor 214 is varied, as explained below, to vary the gain of the gain-controlled amplifier 200.

Similarly, the gain of the second gain-controlled amplifier 220 is varied in response to the collector current variations of an NPN transistor 223, having its collector electrode connected to the joined emitter electrodes of NPN transistors 221, 222, 224 and 225. Transistors 224 and 225 have their base electrodes joined at a terminal 226 to which blanking signal input is applied. This blanking signal comprises positive-going pulses occurring during the horizontal blanking interval and swinging up from +2.5 volt to +5 volts. These positive-going pulses may be provided from the horizontal sweep generator 121 (shown in FIG. 1). When the base electrodes of the transistors 224 and 225 are at +2.5 volts, the more positive voltages at the base electrodes of transistors 221 and 222 cause the quiescent collector current of transistor 223 to flow in equal portions through themselves and they function as a gain-controlled differential amplifier. When the base electrodes of transistors 224 and 225 are at +5 volts, exceeding the voltages at the base electrodes of transistors 221 and 222, the quiescent collector current of transistor 223 is caused to flow in equal portions through the transistors 224 and 225. The diversion of current completely away from the transistors 221, 222 reduces their transconductance to zero and the gain of the emitter-coupled differential amplifier 220 they form to zero. This switching is unaccompanied by an appreciable direct potential shift at the base electrode of an NPN transistor 227 since the collector resistor connecting this point to the +11.2 volt operating supply conducts half the quiescent collector current flow of transistor 223, whether via the collector-to-emitter path of transistor 225 during the horizontal blanking interval or that of transistor 222 during the picture interval. The signal at the base electrode of transistor 227, is not composite chroma containing burst information then, but is picture-interval chroma signal, chroma signal from which the burst information has been removed. The transistor 227 is connected as an emitter-follower amplifier and so the picture-interval chroma signal appears at its emitter electrode which is connected to the output terminal 229.

The gain of the amplifier 220 for picture-interval chroma signals may be manually controlled by a potentiometer 238 labelled "MANUAL CHROMA GAIN CONTROL". The end terminals of potentiometer 238 are connected to the +11.2 volt operating supply and ground reference potential, respectively, and its slider arm terminal provides an adjustable potential therebetween coupled via resistor 237 to terminal 236 at the base electrode of NPN transistor 235. The potential at the emitter electrode of the emitter-follower transistor 235 is offset 0.7 volt approximately from the potential at its base electrode and is coupled via a resistive voltage divider comprising resistors 234, 232 and temperature-compensating diode 233 to the base electrode of the transistor 223. The emitter electrode of the transistor 223 is connected to ground reference potential by resistor 231, and the collector current of the transistor 223 is increased or decreased in response respectively to increase or decrease of the potential applied to its base electrode. Increasing the potential at the slider arm terminal of the potentiometer 238 increases the collector current of transistor 223 and consequently the gain of the amplifier 220 for picture-interval chroma signal. Decreasing the potential at the slider arm terminal decreases the gain of amplifier 220. The manual gain control system described in this paragraph provides the basic direct current biasing network to control the gain of the amplifier 220, the effects of which network are augmented to provide for color killer function and for gain control to avoid oversaturation. The capacitor 239 connected between terminal 236 and ground reference potential decouples any noise generated by slider arm movement of the potentiometer 238 from appearing at the base electrode of transistor 235 and affecting the gain of amplifier 220.

The gains of the gain-controlled amplifiers 200, 220 are affected by ACC and color killer delay circuitry 240 embodied in elements 241-251. The balanced chroma output provided from the terminals 207 and 208 is coupled to the input for signals to be detected of an in-phase keyed synchronous burst detector 131 (shown in FIG. 1), which provides ACC control signals which are coupled to the terminal 241 at the base electrode of a PNP transistor 242.

As the ACC signal supplied from the noise-immune synchronous detector 131 to terminal 241 approaches within approximately 600 millivolts of +11.2 volts, as will be the case when there is no detectable burst information the PNP transistor 242 is no longer biased into forward conduction. The collector electrode of the transistor 242 therefore no longer supplies base current to NPN transistor 245 through the resistor 244. Without base current, transistor 245 supplies no collector current to maintain a voltage drop across the resistor 246, which couples its collector electrode to a +1.6 volt potential. The base electrode of NPN transistor 247 connected to the collector electrode of transistor 245 seeks to rise to the +1.6 volt potential, which causes base current flow in transistor 247. Collector current flows in transistor 247 in response to its base current flow and causes a substantial voltage drop in resistor 237 and whatever resistance is offered by the potentiometer 238. The reduction of base voltage on transistor 235 is so substantial that it no longer supplies current to maintain transistor 223 in forward conduction. With no collector current from transistor 223, the gain of the differential amplifier 220 for chroma signals is reduced substantially to zero.

As detected ACC signal brings the potential at terminal 241 downward from +11.2 volts by more than the approximately 700 millivolts required to forward bias its base-emitter junction transistor 242 is biased into conduction. The consequent conduction of transistor 245 clamps the base electrode of grounded-emitter transistor 247 to ground reference potential. This prevents collector current flow in the transistor 247 and its modification of the potential at terminal 236, so the color killer circuitry exerts no influence on the gain of the amplifier 220.

The common-emitter amplifier transistors 242, 245, 247 thus function as a threshold detector providing output current from the collector electrode of transistor 247 only when the ACC signal developed by the noise-immune detector 131 exceeds a threshold amplitude of 700 millivolts, approximately, between terminal 241 and the +11.2 volt operating supply. Since the transistors 245 and 247 are grounded-emitter amplifiers with substantial forward gain, the switching into and out of color kill occurs over a small range of ACC signal potential. The capacitor 239 provides some additional noise immunity for the color killer, since sustained conduction of transistor 247 is required to discharge the capacitor 239 to kill the gain of the chroma amplifier 220. Sustained nonconduction of transistor 247 is required for capacitor 239 to charge when color is no longer killed.

The collector electrode of transistor 242 also is connected to the input terminal of a resistive voltage divider comprising resistors 249 and 250, the output terminal of which is connected to the base electrode of an NPN transistor 251. The emitter electrode of transistor 251 is coupled to ground reference potential by a resistor 252, and its collector electrode is connected to the base electrode of transistor 214.

The resistive divider 249, 250 prevents the application of sufficient voltage to the base electrode of transistor 251 to bias it into forward conduction to provide ACC control to the first gain-controlled amplifier 200 until the ACC signal applied to the input terminal 241 is more than large enough to bias transistor 245 into conduction, removing color kill from the amplifier 220. In the circuit shown in FIG. 2 color killer action is initiated when the output of the first gain-controlled amplifier 200 has fallen 6dB from the level maintained during operation of its ACC loop. The reason for doing this is best explained referring back to FIG. 1. If the amplitude of the burst information is in the composite chroma input signals to the amplifier 125 (corresponding to amplifier 200 in FIG. 2) is detected at a level below which ACC is exerted on the amplifier 125, the sensitivity of the burst detection process as carried out in the detectors 135, 137 is not reduced by that ACC action. This provides for better definition of the level of composite chroma input which will cause the threshold level of the threshold detector 137 (corresponding to transistor 245, resistor 246, transistor 247 in FIG. 2) to be exceeded by excursions of detected burst signal and which will subsequently cause color killer action to be inactivated. Accordingly, the need for a color killer threshold control is obviated.

The gain of the amplifier 220 is also controlled in response to peaks of the picture-interval chroma signal provided at the output terminal 229 which peaks are large enough to cause oversaturation in the television receiver and to result in blooming of the kinescope. A capacitor 261 having substantial capacitative reactance at color subcarrier frequency couples the picture-interval chroma from output terminal 229 to an input terminal 262 of the peak detector 260. The peak detector 260 comprises resistors 263 and 264 transistor 265, capacitor 239, and the resistance of resistor 237 and potentiometers 238.

The resistors 263, 264 provide the peak detector 260 with a threshold of response to input signals at terminal 262, so that it functions as a threshold peak detector. The terminal 262 is coupled by a resistor 263 to a 1 V_BE (approximately 0.7 volt) supply, as conventionally may be provided across a forward-biased semi-conductor junction and is coupled by a resistor 264 to ground reference potential. The connection of resistors 263, 264 places a quiescent bias potential of approximately 450 or 500 millivolts on terminal 262 and the base electrode of the grounded-emitter NPN transistor 265 connected thereto. This quiescent bias potential is insufficient of itself by approximately 200 millivolts to bias transistor 265 into conduction. This provides a threshold of some 200 millivolts which peaks of signal at terminal 262 must overcome in order that transistor 265 be biased into substantial conduction. Peaks of the picture-interval chroma signal superimposed upon this quiescent bias potential, which correspond to peaks of picture-interval chroma signal at terminal 229 sufficiently large to cause oversaturation, will overcome this threshold and provide sufficient forward bias to the base-emitter junction of transistor 265 to bias it into conduction during the duration of these peaks.

The setting of the potentiometer 238 determines the quiescent control voltage on the capacitor 239 and therefore the quiescent charge upon the capacitor, which quiescent conditions obtain when the base electrode of transistor 265 is not supplied signals with peaks large enough to bias the transistor 265 into conduction. The conduction of the transistor 265 during larger peaks will remove charge from the capacitor 239, which charge is only slowly replenished through the bleeder resistance afforded by resistor 237 and potentiometer 238. Accordingly, the potential across the capacitor 239 is reduced. This reduces the potential at the base electrode of transistor 235, which as previously explained reduces the gain of the amplifier 220.

The peak detector 260 can be constructed so that rapid fluctuations of the gain of the amplifier 220 due to its control are avoided, which most viewers of a television receiver incorporating the circuitry shown in FIG. 2 prefer. The capacitance of the capacitor 239 is chosen to be large enough so that appreciably sustained conduction of transistor 265 over the period of a field of television signal (1/30 to 1/25 of a second) or a few fields on peaks of the picture-interval chroma signals is required to reduce the gain of the amplifier 220 substantially. That is, a period of time longer than the duration of a single short noise or chroma signal peak is required for the peak detector to charge to the level of recurring such peaks. As shown, the discharge of the capacitor 239 may be accomplished during a sustained interval of recurring overly large noise or chroma signal peaks more rapidly than the quiescent charge of the capacitor 239 will be replenished through the bleeder resistance afforded by resistor 237 and potentiometer 238. The replenishment of this charge will be over a period of several fields, as provided by choosing the bleeder resistance to be suitably large.

ULTRASONIC REMOTE CONTROL RECEIVER AUTOVOX Mod. TVC2694/E CHASSIS  507.03

An ultrasonic remote control receiver wherein an incoming ultrasonic signal is converted to square wave pulses of the same frequency by a Schmitt trigger circuit; digital circuits are thereafter used to count pulses resulting from the incoming signal over a predetermined period of time; a decoder activates one of a plurality of outputs in dependance to the number of pulses counted, provision is made to prevent interference signals from producing undesired control outputs.



1. An ultrasonic remote control receiver for applying a control signal to a selected one of a plurality of control channels in response to and dependent on the frequency of a received ultrasonic signal comprising:

2. An ultrasonic remote control receiver comprising:

3. An ultrasonic remote control receiver comprising:

4. The ultrasonic remote control receiver as defined in claim 3, wherein said means producing square pulses is a Schmitt trigger circuit and said means providing a signal input to said sequence controller is a retriggerable monostable multivibrator.

5. An ultrasonic remote control receiver comprising:

6. An ultrasonic remote control receiver comprising:

7. An ultrasonic remote control receiver as defined in claim 6 further comprising a monostable multivibrator between the output of said Schmitt trigger circuit and the remaining elements of said receiver.

8. An ultrasonic remote control receiver as defined in claim 6 further comprising a bistable multivibrator between the output of said Schmitt trigger circuit and the remaing elements of said receiver.

9. The ultrasonic remote control receiver as defined in claim 7 wherein the hold period of said monostable multivibrator is slightly less than one half the period of said square wave pulses from said Schmitt trigger circuit.

Description:

The invention relates to an ultrasonic remote control receiver for receiving signals having different useful frequencies each associated with a channel, comprising a plurality of outputs which are each associated with one of the channels and from which a control signal is emitted on receipt of a signal having the corresponding useful frequency.

To obtain the simplest possible transmitter construction in ultrasonic remote control, modulation of the emitted ultrasonic frequencies is not employed; to control different operations different frequencies are emitted which must be recognized in the receiver and evaluated for carrying out the different functions associated therewith. Presently, to recognize the different frequencies, use is made of resonant circuits, each of which contains one or more coils tuned in each case together with a capacitor to one of the useful frequencies.

These hitherto known receivers have numerous disadvantages. Thus, for example, before starting operation of the receiver a time-consuming alignment procedure must be carried out with which the resonant frequencies of the individual resonant circuits are set. Since it is inevitable that with time the resonant circuits become detuned, it may be necessary to repeat the alignment procedure.

A further disadvantage is that the known receivers cannot be made by integrated techniques because the coils used therein are not suitable for such techniques.

The problem underlying the invention is thus to provide an ultrasonic remote control receiver of the type mentioned at above which is extremely simple to set and in addition can be made by integrated techniques.

To solve this problem, according to the invention an ultrasonic remote control receiver of the type mentioned above contains a counter for counting the useful frequency oscillations received during a fixed measuring time, a sequence control device which determines the measuring time and which is started on receipt of a useful frequency, and a decoder comprising several outputs which is connected to the outputs of the counter, said decoder emitting a control signal at the output associated with the count reached at the end of the measuring time.

In the receiver constructed according to the invention the frequency emitted by the transmitter is identified by counting the oscillations received during a measuring time. The evaluation of the count reached at the end of the measuring time takes place in a decoder which emits a control signal at a certain output according to the count. The measuring time is fixed by a sequence control device which is set in operation on receipt of useful frequency signals.

In such a receiver the only quantity which has to be exactly fixed is the measuring time; it is therefore no longer necessary to align components to certain frequencies. Since no coils are required, the novel receiver can also be made up of integrated circuits.

A further development of the invention resides in that an interference identifying device is provided which on receipt of interference frequencies differing from the useful frequencies interrupts the operation of the sequence control device.

Hitherto known ultrasonic remote control receivers respond to any oscillation received if the frequency thereof has a value which excites a resonant circuit in the receiver. There is no way of distinguishing between oscillations received from the remote control transmitter and from interference sources.

Interfering ultrasonic oscillations may be due to many different causes. For example, noises such as hand clapping, rattling of short keys such as safety keys, operating cigarette lighters, rattling of crockery and the like cover a frequency spectrum reaching from the audio frequency range far into the ultrasonic region. The ultrasonic components may have the effect of simulating a useful frequency and cause an erroneous function in the receiver.

The interference identifying device according to the further development is constructed in such a
manner that it recognizes oscillations having frequencies deviating from the useful frequencies and as a result of this recognition switches off the sequence control device. This switching off prevents the counter state reached from being passed to the decoder and consequently the latter cannot emit an erroneous control signal.

With this further development of the ultrasonic remote control receiver the operation of equipment such as radio and television sets is made extremely reliable and interference-free. During the operation of such a set it is no longer possible for the remote control to become operative, triggered by interference noises, eliminating for example the possibility of unintentional program or volume changes.

Examples of embodiment of the invention are illustrated in the drawings, wherein:

FIG. 1 shows a block circuit diagram of a remote control receiver according to the invention;

FIG. 2 is a diagram explaining the mode of operation of the circuit according to FIG. 1;

FIG. 3 shows another embodiment of the invention;

FIG. 4 is a diagram explaining the mode of operation of the circuit according to FIG. 3;

FIG. 5 is a diagram illustrating interference frequency identification in the circuit according to FIG. 3;

FIG. 6 shows a block circuit diagram of another embodiment of part of the circuit according to FIG. 3;

FIG. 7 is a diagram explaining the mode of operation of the embodiment according to FIG. 6;

FIG. 8 is a block circuit diagram of a further embodiment of a part of the circuit according to FIG. and, an

FIG. 9 is a diagram explaining the mode of operation of the embodiment according to FIG. 8.

The ultrasonic remote control receiver shown in FIG. 1 comprises an input 1 which is connected to an ultrasonic microphone intended to receive ultrasonic signals coming from a remote control transmitter. For each function to be performed by the receiver the remote control transmitter emits one of several unmodulated different useful frequencies which are spaced from each other a constant channel spacing Δ f and which all lie within a useful frequency band.

To obtain a signal which is as free as possible from noise at the input 1, a band filter and a limiting amplifier are preferably incorporated between the ultrasonic microphone and the input 1. The band filter may be made up of two active filters whose resonant frequencies are offset with respect to each other so that a pass band curve in the useful frequency band is obtained which is as flat as possible.

The input 1 leads to a Schmitt trigger 2 which converts the electrical signal applied thereto with the frequency of the ultrasonic signal to a sequence of rectangular pulses. The output 3 of the Schmitt trigger 2 is connected to the input 6 of a frequency divider 7 which is in operation for the duration of a control pulse applied to its control input 8 and divides the recurrence frequency of the pulses supplied thereto at the input 6 thereof in a constant division ratio. The output 9 of the frequency divider 7 is connected to the input 10 of a counter 11 which counts the pulses coming from the frequency divider 7. The counter 11 is a four-stage binary counter whose stage outputs are connected to the inputs of a store (register) 12 which is so constructed that on application of a control pulse to the input 12 thereof it takes on the counter state in the counter 11 and stores said counter state until the next pulse at the input 13. The stage outputs of the store 12 are fed to the inputs of a decoder 14 which decodes the counter state contained in the store 12 in such a manner that a control signal is emitted at that one of its outputs D0 to D9 which is associated with the decoded counter state.

The output 3 of the Schmitt trigger 2 is also connected to the input 4 of a monoflop 5 which is brought into its operating state by each pulse at the output 3 of the Schmitt trigger. It returns from this operating state to its quiescent state after expiration of a hold time depending on its intrinsic time constant if it does not receive a new pulse prior to expiration of this hold time. It is held in the operating state by each pulse received during the hold time until it finally flops back into the quiescent state when the interval between two successive pulses is greater than its hold time.

The output 15 of the monoflop circuit 5 is connected to the input 16 of a sequence control device 17 which is set in operation by the signal emitted in the operating state of the monoflop 5. Supplied to the sequence control device by 17 via a Schmitt trigger 18 at a control input 19 are pulses having a recurrence frequency derived from oscillations of the same frequency, for example, twice the mains frequency of 100 c/s, applied to the input 20. The sequence control device 17 is so constructed that in a cyclically recurring sequence in time with the pulses supplied to it at the input 19 it emits pulses at the outputs 21, 22 and 23 whose duration is equal to the period of the oscillation applied to the input 20. The output 21 of the sequence control device 17 is connected to the control input 8 of the frequency divider 7, the output 22 is connected to the control input 13 of the store 12 and the output 23 thereof is connected to the reset input 24 of the counter 11.

The mode of operation of the circuit of FIG. 1 will now be explained with the aid of the diagram of FIG. 2 which shows the variation with time of the signals at the output 3 of the Schmitt trigger 2 and at the inputs 16 and 19 as well as the outputs 21, 22 and 23 of the sequence control device 17.

It will be assumed that a useful frequency oscillation is being received at the input 1. The Schmitt trigger 2 then emits at the output 3 rectangular pulses whose recurrence frequency is equal to the frequency of said useful frequency oscillation. The first pulse emitted by the Schmitt trigger 2 puts the monoflop 5 into its operating state. The hold time of the monoflop 5 is so dimensioned that for all useful frequencies occurring it is longer than the recurrence period of the rectangular pulses emitted at the output 3. The monoflop 5 therefore remains in its operating state for as long as the useful frequency oscillation is applied to the input 1 and supplies to the control input 16 of the sequence control device 17 a control signal throughout this time.

Due to the control signal applied to the input 16 the sequence control device 17 emits at its outputs 21, 22 and 23 in time with the pulses supplied to it via the Schmitt trigger 18 at the input 19 mutually offset control pulse sequences, the duration of the control pulses being equal to the time interval of the leading edges of the pulses supplied at the input 19 and thus equal to the period of the oscillation applied to the input 20 and the pulse sequences being offset with respect to each other by one pulse duration. The control pulses emitted by the sequence control device 17 perform the following functions:

a. The first control pulse appearing at the output 21 sets in operation for its duration via the input 8 the frequency divider 7 so that the latter divides the recurrence frequency of the pulses supplied thereto from the Schmitt trigger 2 and thus the frequency of the useful frequency oscillations received in a constant ratio and passes counting pulses to the input 10 of the counter 11 with a correspondingly reduced recurrence frequency.

b. Via the input 13 the second pulse occurring at the output 22 causes the store 12 to take on and to store the count of the counter 11 reached at the end of the first control pulse.

c. The third control pulse appearing at the output 23 resets the counter 11 via the reset input 24.

COntrol pulse sequences continue to be emitted for as long as the monoflop 5 remains in its operating state.

Since the stage outputs of the store 12 are permanently connected to the inputs of the decoder 14, the store content is continuously being decoded. The decoder 14 therefore emits a control signal at the output which is associated with the count contained in the store.

During each group of three offset control pulses of the three control pulse sequences emitted by the sequence control device 17, the counter 11 receives counting pulses from the frequency divider 8 only for the duration of the control pulse of the first control pulse sequence emitted at the output 21. The duration of this control pulse thus determines the measuring time during which the oscillations of the useful frequency signal received are counted. Since the duration of the control pulses emitted by the sequence control device 17 is however equal to the period of the oscillation applied to the input 20, the measuring time is fixed by the period of said oscillation.

The frequency divider 7 is connected in front of the counter 11 so that a small capacity of the counter 11 is sufficient to obtain a clear indication of the received frequency even when the measuring time is so long that a large number of periods of the useful frequency oscillation is received during the measuring time. This is for example, the case when the oscillation supplied to the input 20 has twice the mains frequency. Since the frequency divider 7 divides the frequency of the useful frequency oscillations received in the constant ratio k, the counter 11 need count only the oscillations having a


correspondingly reduced frequency. If the division ratio k of the divider 7 is so set that it is equal to the product of the measuring time t and channel spacing Δ f, only a frequency which differs by at least the channel spacing Δ f from a previously received frequency will change the count of the counter 11.

The purpose of the monoflop 5 is to prevent interference frequencies supplied to the input 1 from producing at one of the outputs D0 to D9 of the decoder 14 a control signal which could lead to an erroneous function of the equipment being controlled. The interference sources usually encountered emit a frequency spectrum whose components lie predominantly in the audio region, i.e., below the ultrasonic region. If the hold time of the monoflop 5 is set to a value slightly greater than the period of the smallest useful frequency but smaller than the period of the highest interference frequency occurring, the monoflop 5 returns to its quiescent state before the end of the period of an interference frequency. Since in this state no signal is supplied to the control input 16 of the sequence control device 17, the latter is put out of operation and consequently the received signal cannot be evaluated because the count of the counter 11 is not transferred to the store 12 and thus no decoding takes place.

To facilitate understanding of the invention, the function of the circuit of FIG. 1 will now be explained numerically by way of example. The channel spacing Δ f will be taken as 1,200 c/s so that for a frequency of 100 c/s of the oscillation applied to the input 20 and thus a measuring time of 10 ms a division ratio of the frequency divider 7 of k = t ^. Δf = 12 results. It will further be assumed that ten different channel frequencies are to be evaluated; the counter 11 is therefore so connected that it has a capacity of 10. With these values, during the measuring time the counter 11 runs through several count cycles. This means that for the received frequency during the measuring time the counter 11 reaches its maximum count several times and then starts counting again from the beginning. The count reached at the end of the measuring time is however still a clear indication of the received useful frequency provided the number of useful frequencies having a channel spacing Δf is at the most equal to the counter capacity Z. The relationship between the useful frequency f received and the count reached at the end of each measuring time t while this useful frequency is being received is expressed by the following equation:

f = (k/t) ^. (n ^. Z + m + 0.5)

wherein

f = useful frequency received in c/s

t = measuring time in seconds

k = division ratio of the frequency divider 7

Z = capacity of the counter 11

n = number of count cycles passed through (integral)

m = count

The term 0.5 in brackets is a correction factor which ensures that a new count is reached whenever the received frequency differs at least by half the channel spacing Δf from the channel center frequency of the neighboring channel. With a channel spacing Δ of 1,200 c/s, a measuring time t of 10 ms, a division ratio k of the frequency divider 7 of 12, a capacity Z of the counter 11 of 10 and an input frequency f of 33 k c/s, the count 7 is for example reached after two complete count cycles. This is because the input frequency of 33 k c/s is first divided by 12 by the frequency divider 7 so that pulses having a recurrence frequency of 2.750 k c/s reach the input 10 of the counter 11. Since the frequency divider 7 emits counting pulses only during the measuring time of 10 ms, during said time only 27.5 pulses reach the input 10 of the counter 11. For this number of pulses the counter thus runs through two complete cycles and finally stops at the count 7. Similarly, for an input frequency of 39 k c/s the counter stops at the count 2 after passing through three complete counter cycles. With the numerical values given up to 10 different frequencies may be received without any ambiguity occurring in the evaluation.

FIG. 3 illustrates a further embodiment of an ultrasonic remote control receiver which differs from the embodiment described above primarily in that to fix the measuring time it is not necessary to supply a reference frequency. In the illustration of FIG. 3 the same reference numerals as in FIG. 1 are used for identical circuit components. The part of the circuit enclosed in the dashed line represents the sequence control device 17' which emits at its outputs 21', 22', 23' control signals which have substantially the same functions as the control signals emitted at the outputs 21, 22 and 23 of the sequence control device 17 of FIG. 1.

The useful frequency signal received is again supplied to the input 1. The input 1 is connected to the input of the Schmitt trigger 2 which again converts the input useful frequency oscillations into a sequence of pulses whose recurrence frequency is equal to the input useful frequency. The output 3 of the Schmitt trigger 2 is connected to the input B1 of a monoflop 25 which is contained in the sequence control device 17' and which is so constructed that it is switched to its operating state by a pulse received at the input B1 but during its hold time cannot be tripped again by any further pulse. The output 3 of the Schmitt trigger 2 is also connected to the input 26 of an AND gate 27 whose other input 28 is connected to that output 21' of the sequence control device 17' which is directly connected to the output Q1 of the monoflop 25. The output Q1 of the monoflop 25 which emits the signal complementary to the signal at the output Q1 is connected to the input B2 of a further monoflop 29 whose output Q2 is connected to the input A1 of the monoflop 25. The input 10 of the counter 11 is connected to the output of the AND gate 27. The stage outputs of the counter 11 are connected to the inputs of a gate circuit 30 which on receipt of a control pulse at its input 31 transfers the count contained in the counter 11 to the decoder 14 connected to its outputs. In the decoder 14 the count is then decoded in the manner already explained in conjunction with FIG. 1 so that a control signal is emitted at the output corresponding to the transferred count.

The output 3 of the Schmitt trigger 2 is further connected to the input 32 of an AND gate 33 which is contained in the sequence control circuit 17' and the other input 34 of which is connected to the output of a NOR gate 35. The output Q1 of the monoflop 25 is directly connected to one input 36 of the NOR gate 35 and is connected to the other input 37 via a delay member 38 and an inverter 39.

The output of the AND gate 33 represents the output 22' of the sequence control circuit 17' which is directly connected to the control input 31 of the gate circuit 30. In addition, the output of the AND gate 33 is directly connected to one input 40 of a NOR gate 41 and to the other input 42 thereof via a delay member 43 and an inverter 44. The output of the NOR gate 41 represents the output 23' of the sequence control circuit 17', to which output the reset input 24 of the counter 11 is connected.

The mode of operation of the circuit of FIG. 3 is explained in FIG. 4. Since the measuring time in the arrangement of FIG. 3 is substantially shorter than in the arrangement of FIG. 1, the time scale in FIG. 4 has been enlarged compared with FIG. 2 in order to clarify the illustration. When useful frequency oscillations are supplied to the input 1 of the receiver, pulses whose recurrence frequency is equal to the useful frequency appear at the output 3 of the Schmitt trigger 2. It will be assumed that the presence of a pulse corresponds to the logical signal value 1 whereas a pulse space represents the logical signal value 0. The leading edge of the first pulse at the output 3 puts the monoflop 25 into its operating state in which it emits the signal value 1 for the duration of its hold time at its output Q1, resulting in the control pulse at the output 21', which passes to the input 28 of the AND gate 27. Since the other input 26 of the AND gate 27 is directly connected to the output 3 of the Schmitt trigger 2, for the duration of each pulse at the output 3 the signal value 1 is also applied to the input 26 of the AND gate 27. Thus, the pulses occurring at the output 3 of the Schmitt trigger 2 are transferred for the duration of the control pulse at the output 21', i.e. during the hold time of the monoflop 25, as count pulses to the counter 11 and counted by the latter. The hold time of the monoflop 25 thus determines the measuring time; the capacity of the counter 11 must be greater than the number of pulses received during the measuring time for the greatest useful frequency. The count of the counter 11 reached at the end of the measuring time is then a clear indication of the received useful frequency.

When the monoflop 25 flops back into the quiescent state at the end of its hold time, it applies the signal value 0 via its output Q1 to the input 28 of the AND gate 27 so that no further count pulses can enter the counter 11. At the same time there appears at the output Q1 of the monoflop 25 the signal value 1 which at the input B2 puts the monoflop 29 into the operating state. In this state the monoflop 29 emits at its output Q2 the signal value 1 which blocks the monoflop 25 via the input A1 for the duration of the hold time of the monoflop 29 in such a manner that it cannot be switched into the operating state by pulses at the input B1. This is necessary to enable the sequence control device 17' to have sufficient time to generate the control pulses appearing at the outputs 22' and 23' for the transfer of the count or resetting of the counter.

With the return of the monoflop 25 to its quiescent state, the signal value 0 passes to the input 26 of the NOR gate 35 directly connected to the output Q1. During the operating state of the monoflop 25 the signal value 0 is applied with a delay determined by the delay member 38 via the inverter 39 to the input 37 of the NOR gate 35, said signal value 0 being replaced by the signal value 1 only after the delay time of the delay member 38 and not simultaneously with the flop back of the monoflop 25. Thus, for the duration of this delay time the signal value 0 is applied to both inputs 36 and 37 of the NOR gate 35 and consequently for this period of time the signal value 1 appears at the output of the NOR gate 35. The circuits 35, 38, 39 thus effect the generation of a short pulse which immediately follows the return of the monoflop 25 and the duration of which is determined by the delay of the delay member 38. This pulse is applied to the input 34 of the AND gate 33 (FIG. 4). The same effect could obviously alternatively be obtained with a monoflop which is tripped by the signal at the output Q1 changing from the value 1 to the value 0.

Now, if during this time a pulse is emitted at the output 3 of the Schmitt trigger 2, i.e., a signal value 1 is at the input 32 of the AND gate 33, said gate supplies to the control input 31 of the gate circuit 30 a control pulse for the duration of the delay of the delay member 38. This control pulse opens the gate circuit so that it allows the count reached at the end of the hold time of the monoflop 25 to pass to the decoder 14. The latter then emits a control signal at the output associated with this count. The signal value 1 present at the output of the AND gate 33 during the delay of the delay member 38 also passes directly to the input 40 of the NOR gate 41, at the other input 42 of which the signal value 0 is applied for the duration of the same pulse but with a delay determined by the delay member 43. Thus, in a manner similar to the circuits 35, 38, 39 the circuits 41, 43, 44 produce a short pulse which immediately follows the end of the output pulse of the AND gate 33 and appears at the output 23' of the sequence control circuit and is applied to the reset input 24 of the counter 11 (FIG. 4). This pulse resets the counter 11.

The hold time of the monoflop 29 is so set that it flops back into its quiescent state again only when the transfer process from the counter to the decoder via the gate circuit and the resetting of the counter has been effected. When the monoflop 29 returns to its quiescent state, it emits at its output Q2 the signal value 0 which brings the monoflop 25 via the input A1 thereof into such a condition that it can again be brought into its operating state by a pulse at the output 3 of the Schmitt trigger 2. In this manner the measuring and evaluating periods can be repeated for as long as useful frequency oscillations are supplied to the input 1.

In the circuit according to FIG. 3, interference frequencies are suppressed by setting a certain hold time of the monoflop 25. It is apparent from the above description of the function that the transfer of the count of the counter 11 to the decoder 14 takes place immediately following the end of the hold time of the monoflop 25, i.e., immediately following the end of the measuring time. However, a control signal initiating the transfer can be applied by the AND gate 33 to the control input 31 of the gate circuit 30 only when simultaneously with the end of the measuring time a pulse, i.e., the signal value 1, is present at the output 3 of the Schmitt trigger 2. Now, if the hold time of the monoflop 25 is made equal to the reciprocal of the channel spacing Δf, this coincidence at the AND gate 33 at the end of the measuring time occurs only when quite definite frequencies are applied to the input 1; these frequencies lie only within frequency bands which in the example described here, in which the output pulses of the Schmitt trigger 2 have a pulse duty factor of 1:2, have the width of half a channel spacing. These frequency bands each contain one of the useful frequencies. Between these frequency bands there are gaps having the width of half the channel frequency and frequencies falling in these gaps do not produce coincidence at the AND gate 33 and consequently cannot be evaluated by transfer of the count of the counter 11 to the decoder 14. Thus, frequency windows are formed over the entire frequency range which can occur at the input 1 and only frequencies lying within these windows are treated by the circuit according to FIG. 3 as useful frequencies. All intermediate frequencies are recognized as interference frequencies and excluded from evaluation.

If the measuring time is made exactly equal to the reciprocal of the channel spacing the frequency bands in which evaluation takes place are such that the rated frequencies of the signals transmitted by the transmitter are disposed at the lower end of the frequency bands. Thus, in this case only frequencies starting from a rated frequency in each case and extending up to the frequency in the center between two channels would be evaluated as useful frequencies. Since the frequency of the signals emitted by the transmitter can however also fluctuate below the rated frequency, it is desirable to place the frequency bands in which evaluation takes place so that the rated frequencies lie substantially in the center of the bands. To achieve this, the hold time of the monoflop 25 and thus the measuring time is lengthened by a quarter of the reciprocal of the maximum rated frequency. Although with this setting only the maximum rated frequency lies exactly in the center of the corresponding frequency band, the other rated frequencies still lie within the corresponding frequency bands and consequently the frequencies of the useful signals can also deviate from the rated frequency downwardly without preventing evaluation. The frequency gaps including the frequencies treated as interference frequencies then lie in each case substantially in the center between two rated frequencies.

To facilitate understanding of the type of interference identification just outlined attention is drawn to FIG. 5; the latter shows at Q1 the output signal of the monoflop 25 determining the measuring time, at 3-F1, 3-F2, 3-F3 the pulse sequences appearing at the output 3 of the Schmitt trigger 2 for three different useful frequencies F1, F2, F3 and at 3-FS the pulse sequence which appears at the output 3 when an interference frequency FS is received which lies between the useful frequencies F2 and F3. It is apparent from this diagram that at the end of the measuring time a pulse is present at the output 3 of the Schmitt trigger only when useful frequencies are being received and that when an interference frequency is applied there is a pulse space at the end of the measuring time. Thus, at the AND gate 33 the presence of a pulse at the end of the measuring time is employed as criterion for the receipt of a useful frequency. It is also apparent from FIG. 5 that with the useful frequency F1 the counter 11 counts 4 pulses, with the useful frequency F2 up to 5 pulses and with the useful frequency F3 6 pulses.

Isolated short interference pulses which could reach the input 1 of the circuit of FIG. 3 between two useful pulses and undesirably increase the count may be made ineffective by inserting a flip-flop circuit 45 between the output 3 of the Schmitt trigger 2 and the rest of the circuit as illustrated in FIG. 6. The mode of operation of this flip-flop circuit 45 will be explained with the aid of FIG. 7, which shows the signals at the output 3 of the Schmitt trigger 2 and at the output 3a of the flip-flop circuit 45 firstly without interference and secondly with interference. The flip-flop circuit 45 is tripped by the leading edge of each output pulse of the Schmitt trigger 2. If a short interference pulse is received, the flip-flop circuit 45 supplies at its output 3a the signal value 0 for example on receipt of the useful pulse preceding the interference pulse, the signal value 1 on receipt of the interference pulse and the signal value 0 on receipt of the next useful pulse. If no interference pulse had occurred, the flip-flop circuit would not have been switched to the signal value 1 at the output until receipt of the next useful pulse. The flip-flop circuit thus effects on receipt of an interference pulse (and in general on receipt of an odd number of interference pulses) between two useful pulses a reversal of the signal values so that at the end of the measuring time coincidence is not reached at the gate 33 although a useful frequency was received. Without the flip-flop circuit 45 the count would be transferred, although because of the interference pulse received it would not correspond to the useful frequency received.

The embodiment of FIG. 3 differs from the embodiment of FIG. 1 also in that instead of the store (register) 12 the gate circuit 30 is used that allow the count to be evaluated to pass briefly only once in a measuring and evaluating time. Thus, at the output of the decoder 14, instead of a uniform signal as in the case of the embodiment of FIG. 1, a series of pulses appears with the spacing of the control signals at the input 31 of the gate circuit 30. The use of a gate circuit instead of a store is suitable in applications where the equipment to be controlled must be actuated with control pulses and not with a uniform signal.

The immunity to interference may be further increased if in accordance with FIG. 8 a further monoflop 46 which cannot be triggered again during its hold time is inserted between the output 3 of the Schmitt trigger 2 (or the output 3a of the flip-flop circuit 45 of FIG. 6) and the remainder of the circuit. This hold time is set to half the period of the highest useful frequency. This modification is effective against a particular type of interferences, i.e., cases where an amplitude break occurs within an oscillation at the input 1 of the Schmitt trigger 2; this break would lead at the output 3 of the Schmitt trigger to the emission of two pulses instead of the single pulse per oscillation emitted in the normal case. These two pulses give the same effect as the receipt of a frequency which is twice as high and consequently without the additional monoflop 46 erroneous evaluations could arise. However, the monoflop 46 prevents the two pulses from becoming separately effective because it always emits pulses having the duration of its hold time; short double pulses which can arise due to amplitude breaks in the received signal thus cannot have any effect. FIG. 9 shows the action of the monoflop 46 when an amplitude break occurs at the input 1 of the Schmitt trigger 2 which produces a double pulse at the output 3 of the Schmitt trigger. As is apparent, the pulses at the output 3b of the monoflop 46 are not affected by this double pulse.

One embodiment of the remote control receiver may also reside in that a sequence control counter fed by the pulses at the output of the Schmitt trigger 18 is used for the sequence control device 17 of FIG. 1; the stage outputs of said counter are connected to a decoder which is so designed that it activates one after the other one of its outputs for each count. Thus, for example, this decoder may have 10 outputs which are activated successively in each counting period of the sequence control counter. Since in accordance with the description of the example of embodiment of FIG. 1 a total of three control signals are required for the evaluation of the frequency received, the output signals at the fourth, fifth and seventh outputs may be used respectively for activating the frequency divider 7, opening the store 12 and resetting the counter 11. Since in this case the evaluation of the received frequency by the control pulses emitted from the output of the decoder of the sequence control device does not begin until the decoder emits a signal at its fourth output, there is an evaluation delay which has the advantage that short interference pulses produce no response in the receiver.

The advantageous formation of frequency band windows are used in the embodiment of FIG. 3 can also be applied in the embodiment of FIG. 1 if instead of the retriggerable monoflop 5 a monoflop is used which has no dead time and which is not retriggerable again during its hold time which as in the monoflop 35 of FIG. 3 is made equal to the reciprocal of the channel spacing Δ f. This monoflop thus always flops back into its quiescent state when there is a pulse pause at its input at the end of its hold time whereas it is returned to its operating state practically without dead time by a pulse applied to its input at the end of the hold time. Since a pulse at the input of the monoflop at the end of its hold time however occurs only for frequencies lying within the frequency bands mentioned in connection with the description of FIG. 3, only frequencies which lie within the frequency bands can be treated as useful frequencies. For all intermediate frequencies, the monoflop returns to its quiescent state in which it interrupts the sequence control device and thus prevents evaluation of said frequencies. For the same reasons as in the circuit of FIG. 3, in this case as well the hold time of the monoflop should be lengthened by a quarter of the reciprocal of the highest useful frequency.

The ultrasonic remote control receiver described above can be used not only to control television sets, radio sets and the like but is particularly suitable also for industrial use in which high immunity to interference is very important. It may, for example, be used for remote control of cranes on large building sites, where there are a great number of different interference sources. The ultrasonic remote control receiver according to the above description is so immune to interference that it operates satisfactorily even under the difficult conditions encountered in the aforementioned use.

The following table provides examples of integrated circuits from Texas Instruments Incorporated which may be used in the foregoing invention.

______________________________________ Schmitt-triggers 2 and 18 SNX 49713 Monoflops 25, 29 and 46 SN 74121 Monoflop 5 SN 74122 Frequency divider 7 SN 7492 Counter 11 SN 7490 Store 12 SN 7475 Control 17 SN 7476 Gate 30 SN 7432 Decoder 14 SN 7442 ______________________________________


AUTOVOX  Mod. TVC2694/E   CHASSIS  507.03 Tuning unit with bandswitch for high frequency receivers

Abstract:

A tuning unit with a bandswitch for high frequency receivers having a potentiometer system for the control of capacity diodes is disclosed. The potentiometer system includes a plurality of parallelly disposed resistance paths on which wipers can be moved by means of screw tuning spindles mounted beside one another in a common housing made of an insulating material. The bandswitch is formed of metal wires and is associated with each tuning spindle. The tuning spindles are joined for rotation with sleeves simultaneously forming the operating knobs which are carried in apertures in the front plate and each have a flange engaging the back side of the front plate about the apertures. The flange is slightly larger than the cross section of the apertures and tapers conically away from the back side of the front plate.

1. Tuning unit with bandswitch for high frequency receivers having potentiometer means for the control of capacity diodes composed of a plurality of parallelly disposed resistance paths on which wipers are moved by means of screw tuning spindle means mounted beside one another in a common housing of insulating material, bandswitch means formed of metal wires associated with each tuning spindle means, said tuning spindle means being joined for rotation with sleeve means simultaneously forming operating knobs which are borne in apertures in the front plate and each sleeve means having an axial flange surface engaging the back side of the front plate about one aperture therein, said flange surface being slightly larger than the cross section of the apertures and tapering conically away from the back side of the front plate.

2. Tuning unit of claim 1 wherein the sleeve means are joined telescopically and coaxially with the tuning spindle means, and the flange surface engages the back side of the front plate when the sleeve means are in the state wherein they are pulled out of the front plate.

3. Tuning unit of claim 1 wherein the ends of the tuning spindle means which are opposite the front plate have each an annular groove into which a spring bracket engages whose bent end is supported against the housing and which has two diametrically disposed spring arms having opposite spring curvature, the said spring arms in each case contacting the opposite axial walls of the groove.

4. Tuning unit of claim 3 wherein the spring bracket rests with its bent end against the housing and the spring arms additionally engage a bracket formed on the housing or an intermediate bracket formed in one piece with the connection soldering lugs.

5. Tuning unit of claim 3 wherein the spring bracket is formed in one piece with the connection soldering lugs and has spring arms curved both in the same direction which engage an axial wall of the annular groove in the spindle and the opposite axial wall rests against a housing wall.

6. Tuning unit of claim 1 wherein the pointers associated with each potentiometer means lie on the one hand in windows associated with each tuning spindle means in the front plate, and on the other hand are rotatably mounted with their ends opposite the front plate in pivot pins on the housing, and the guiding pin of the spindle nuts carried in a longitudinally displaceable manner on each tuning spindle is provided with a slit disposed parallel to the longitudinal axis of the tuning spindle and slides with its peripheral surface resiliently within the slide tract of the pointer.

7. Tuning unit of claim 1 wherein the bandswitches are formed each of a displaceable metal rod which is in working engagement with stationary metal rods common to all bandswitches of a tuning unit, contacting each of them individually.

8. Tuning unit of claim 7 wherein the metal rods are metal wires.

9. Tuning unit of claim 7 wherein the metal rods are stamped metal parts.

10. Tuning unit of claim 7 wherein levers of insulating material are placed on the front ends of the displaceable metal rods and extend through windows which are provided with detents and which are associated with each tuning spindle in the housing front plate, while the opposite ends are held fixedly in the rearward end of the housing, and the displaceable metal rods individually make contact with contact cams on the stationary metal rods, these cams being in an offset array corresponding to the detents in the windows, the corresponding rods extending parallel to the front plate and parallel to one another behind the front plate.

11. Tuning unit of claim 7 wherein insulating material bridges or insulating material slide pieces are inserted between the contact cams of two adjacent, stationary metal rods and within the free space between two such parallel metal rods.

12. Tuning unit of claim 7 wherein the displaceable metal rods have, in the vicinity of their mountings on the housing, an articulation in the form of a vertically disposed flat portion.

Description:

BACKGROUND
The invention relates to a tuning unit with bandswitch for high frequency receivers, especially radio and television receivers, having a potentiometer system for the control of capacity diodes, the said potentiometer system consisting of a plurality of parallel resistance paths along which wiper contacts can be driven by means of screw spindles disposed adjacent one another in a common insulating material housing in which a bandswitch formed of metal rods is associated with each tuning spindle.
In these tuning units, the working voltages of the capacity diodes in the tuning circuits are recorded once a precise tuning to the desired frequency has been performed. A potentiometer tuning system has great advantages over the formerly used channel selectors operating with mechanically adjustable capacitors (tuning condensers) or mechanically adjustable inductances (variometers), mainly because it is not required to have such great precision in its tuning mechanism.
Tuning units with bandswitches formed of variable resistances and combined with interlocking pushbuttons controlling the supply of recorded working voltages to capacity diodes are known. Channel selection is accomplished by depressing the knobs, and the tuning or fine tuning are performed by turning the knobs. The resistances serving as voltage dividers in these tuning units are combined into a component unit such that they are in the form of a ladderlike pattern on a common insulating plate forming the cover of the housing in which the tuning spindles and wiper contacts corresponding to the variable resistances are housed. The number of resistances corresponds to the number of channels or frequencies which are to be recorded. The wiper contact picks up a voltage which, when applied to the capacity diodes determines their capacitance and hence the frequency of the corresponding oscillating circuit. The adjustment of the wipers is performed by turning the tuning spindle coupled to the tuning knob. By the depression of a button the electrical connection between a contact rod and a tuning spindle is brought about and thus the selected voltage is applied to the capacity diodes. Since the push buttons release one another, it is possible simply by depressing another button to tune to a different receiving frequency or a different channel, as the case may be.
To permit the switching of a number of channels in a certain tuning range, bandswitches for a plurality of tuning ranges, such as UHF and VHF for example, are often provided in the tuning units described above. In the pushbutton tuning unit of the above-named type, the bandswitch consists of a printed circuit board which is fastened on the housing of the tuning unit, and a switch lever which is preset by means of the pushbutton by turning, and is operated by depressing the pushbutton while at the same time selecting the channel.
Where this combination of knobs and pushbuttons is not possible, the selection of the range is accomplished by means of an additional lever which can be set over to select the range.
However, since such tuning units require too many riveting operations when they are assembled, tuning units were later created in which the individual parts in the voltage divider and pushbutton housing were loosely inserted and/or held in place by projections, lugs, hooks or tabs of resilient plastic. In spite of these initial improvements, the bandswitch, especially the one associated with the tuning units, was still technically intricate and very expensive.
THE INVENTION
It is the object of the invention, therefore, to create an additionally improved and simplified tuning unit containing a bandswitch of simple, space-saving and reliably operating design.
In accordance with the invention, this object is accomplished in a tuning unit with bandswitch of the kind described in the beginning by joining the tuning spindles for rotation with sleeves simultaneously forming the control knobs, which are mounted in apertures in the front plate of the housing and have each a flange engaging the back of the front plate around the aperture, the said flange being slightly larger than the aperture and tapering conically away from the back of the front plate.
In further development, the sleeves can be joined telescopically for rotation with the tuning spindles, and the flange is able to engage the back side of the front plate when the sleeve is in the position in which it is drawn out of the front plate. The sleeves constructed in this manner, whose portions projecting from the apertures in the front plate form the control knobs for the tuning spindles, permit easy assembly of the tuning unit and at the same time assure positive co-rotation of sleeves and spindles. The sleeves can be pushed from the front side of the front plate through the apertures onto the clutch surfaces of the spindles, this inward pushing being easily accomplished on account of the taper, and the dropping out of the sleeve being prevented by the flange engaging the back of the front plate. If the control knobs project only slightly out of the front plate, they can be operated from the outside by inserting a tool into them. With the telescoping type of coupling, however, it is possible to draw the sleeves or control knobs further outwardly so that they can be rotated by hand without the use of tools.
To provide constant assurance of the axial fixation of the tuning spindles, the tuning spindle ends farthest from the front plate can each be provided with an annular groove engaged by a spring bracket whose one leg is supported against the housing and whose other leg is forked to form two spring arms, each bent in the opposite direction and each engaging one of the two opposite walls of the annular groove. The tuning spindles are secured against axial displacement by this construction of the invention alone, without the need for further measures. This facilitates the joining of the sleeves or control knobs to the tuning spindle, because in this case there is no need for precise axial fixation and extreme dimensional accuracy.
Furthermore, the indicators associated with each potentiometer can be mounted in windows in the front plate which are associated with each tuning spindle or tuning knob for visual indication at the front, the other extremities farthest from the front plate being mounted for pivoting on pins set in the housing; the guiding pin on the spindle nut that is driven longitudinally on each tuning spindle can be provided with a slit disposed parallel to the long axis of the tuning spindles and can slide within the indicator slide lever slot, with its surface resiliently engaging the walls of said slot.
In an especially advantageous embodiment, the tuning unit can have bandswitches each formed of a displaceable metal rod which is in contacting engagement individually with stationary metal rods which are common to all of the bandswitches of a tuning unit. It contrast to the bandswitches known hitherto, which as a rule consist of a printed circuit board with switchable contacts thereon, this frequency bandswitch of the invention is of great simplicity, can be manufactured simply and inexpensively, and at the same time is very reliable in operation.
The displaceable and stationary metal rods of the bandswitches can be formed of metal wires or they can be of stamped sheet metal. Also, in further expansion of the concept of the invention, the stationary metal rods thus formed can be all entirely alike and merely offset from one another, thereby further simplifying the manufacture and stocking thereof.
To permit connection also to audiovisual apparatus, one or more of the stationary metal rods can be divided electrically into at least two parts each.
In a special development of this concept, lugs of insulating material can be mounted on the front ends of the displaceable metal wires, these lugs extending through windows in the front plate of the housing which are associated with each tuning spindle and are provided with detents, while the opposite ends can be held fixedly at the rear end of the housing, and the displaceable metal wires can make contact with contact humps on the stationary metal wires, the humps being offset from one another to correspond to the detents in the windows, and the stationary metal wires extending in back of the front plate, parallel to the latter and parallel to one another.
To increase switching reliability, bridges or sliding pieces made of insulating material can be inserted between the contact humps of adjacent stationary wires within the free space between two such parallel lying metal wires.
To achieve easy displacement of the displaceable metal wires despite the fixed end mounting on the housing, the displaceable metal wires, in further embodiment of the invention, can have each an articulation adjacent their end mountings, in the form of a vertically disposed flattened portion. This flat permits the metal wires to be deflected horizontally against a weak spring bias.
DESCRIPTION OF THE DRAWING
As an example of the embodiment of the invention, there is represented in the drawings a tuning unit with bandswitch for television receivers. In these drawings,
FIG. 1 is a front elevational view of a tuning unit with bandswitch,
FIG. 2 is a plan view showing the bandswitch of the tuning unit of FIG. 1,
FIG. 3 is a side elevational, cross-sectional view of the tuning unit of FIG. 1,
FIG. 4 is a rear elevational view of the tuning unit of FIG. 1,
FIG. 5 is a plan view showing the indicator means of the tuning unit of FIG. 1,
FIG. 6 shows the sleeve with the operating knob and tuning spindle,
FIG. 7 shows the telescoping manner in which the sleeve is joined to the tuning spindle,
FIG. 8 is a fragmentary view of the bandswitch,
FIG. 9 is another fragmentary view of the bandswitch, and
FIG. 10 shows how the tuning spindle is fixed in position.
DESCRIPTION
The method of representation used in the drawings is greatly simplified, for the purpose of better delineating the features of the invention. The tuning unit with bandswitch consists of an insulating material housing 1 with a front plate 2, which is closed by a cover plate 3 accommodating the resistance paths. The housing 1 is divided by parallel sidewalls 4 into chambers in which the tuning spindles 5 are disposed.
The embodiments is an 8-fold tuning unit having eight bandswitches assocated with each tuning spindle, and eight indicators.
Accordingly, there are eight apertures 6 in a central row, through which the operating knobs 7 of the sleeves 8 coupled with the tuning spindles 5 are passed. The operating knobs 7 have recessed surfaces 9 for turning with a turning tool. In a row extending parallel above the row of the apertures 6 there are eight windows 10, whose upper edge is provided with notches 11. Lugs 12 of insulating material extend through the windows 10 and engage the upper notches 11 and are joined behind the front plate to displaceable metal wires 13 of the bandswitch. In a row located beneath the row of apertures 6 another eight windows 14 are provided, through which the ends of the pointers of the indicators 15 protrude.
Now, the bandswitch consists in each case of a displaceable metal wire 13 which can be brought into working engagement with stationary metal wires 16, which are all of the same construction and are only disposed offset from one another. While the displaceable metal wire 13 extends substantially parallel to the longitudinal axis and thus at right angles to the front plate 2, the stationary, parallelly disposed metal wires 16 are parallel to the front plate 2 and are thus inserted at a right angle to the displaceable metal wire. A departure from parallelism or from the right angle, as the case may be, takes place substantially only when the displaceable metal wire 13 is deflected to the two outer notches. The rearward end 18 of the displaceable metal wire, which forms a vertical loop, is tightly inserted into a receiver 17. Just ahead of the loop 18, the metal wire 13 is provided with a vertically disposed portion 19 by a flattening on the metal wire 13. The movement, when the metal wire 13 is deflected into the desired notches or detents, takes place horizontally by the flexing of these portions 19. The stationary metal wires 16 are held tightly in their positions in projections 20 on the housing, or by lugs or the like. Since three switch actions are provided, that is, three ranges, for each tuning spindle, a bandswitch consists of one displaceable metal wire and three stationary metal wires 16, which are used for all switches.
To permit each bandswitch to have exactly three switching actions, each of the three stationary metal wires 16 has one contact hump 21 corresponding to one of the detents 11 in the windows 10 of the front plate 2. The contact humps 21 are thus located one next to the other as seen from the front plate 2. So that the displaceable metal wire 13 will always come into mechanical and electrical contact only with the desired contact hump, and prevent short circuits, insulating bridges 22 are installed between the adjacent metal wires 16, said insulating bridges being stationary.
If more or less than three switching actions are desired, all that need be done in the case of the bandswitch of the invention is to change the number of stationary metal rods or wires accordingly.
The sleeves 8 with the operating knob 7 have a flange 23 engaging the back of the front plate 2 and tapering back to the point where it joins the tuning spindle. This enables the sleeves to be pushed in, in the case of a housing that has already been manufactured with the tuning spindle installed, without creating the possibility that the sleeves 8 might escape after they have been inserted. The sleeves 8 are connected to the tuning spindles 5 usually by means of driving surfaces. If manual operation without tools is to be possible, rather than requiring a tool for the operation of the sleeves, the coupling of the sleeve 8 to the tuning spindle will be a telescoping coupling (see FIG. 7).
The actual firm axial fixation of the tuning spindle 5 is located on the rear end of the housing. Here the tuning spindle 5 has an annular groove 24 which is engaged by a spring by means of two diametrically disposed spring arms 25 and 26. The spring arms 25 and 26 have oppositely curved lugs and are supported on the housing at their terminal and marginal surfaces and their lugs engage opposite axial walls 27 and 28 of the annular groove 24.
Additional support is provided by the common, bent foot 29 of the spring arms 25 and 26 against the cover plate of the housing.
The indicator means of the tuning unit with bandswitch consists of a pointer 15 which is movable within the window 14, and a cam 30 which is a prolongation of the pointer 15. At its rearward end, the pointer is mounted rotatably in the housing on pin 31. Within the cam 30 slides a guiding pin 32 which is attached to the spindle nut or carriage 40. Upon the rotation of the tuning spindle, the spindle nut is longitudinally displaceable therewith. In order to achieve good guidance and hence precise indication, the guiding pin has a slit 33 extending parallel to the longitudinal axis of the tuning spindle 5, so that it will resiliently engage the cam 30 within the slot thereof.
The necessary soldering lugs are indicated at 34.
On the basis of the design of the tuning unit with bandswitch in accordance with the invention, a desired frequency range--UHF, for example--can be selected by deflecting a displaceable metal wire 13 into one of the detents 11 by means of the lug 12 mounted thereon. Within this range, a transmitter or channel can then be selected by turning the tuning spindle 5. The transmitter preselected in this manner can then be tuned in by means of a keyboard or by electronic recall from a keyboard which is not shown. The fine tuning of this tuned-in transmitter, as well as the selection of a different transmitter within the same frequency range, is accomplished by turning the tuning spindle 5.
All of the details explained in the above description and represented in the drawings are important to the invention.

 

 

CRT   TV EHT VOLTAGE MULTIPLIER - KASKADE COCKCROFT-WALTON CASCADE CIRCUIT FOR VOLTAGE MULTIPLICATION:

A Cockcroft-Walton cascade circuit comprises an input voltage source and a pumping and storage circuit with a series array of capacitors with pumping and storage portions of the circuit being interconnected by silicon rectifiers, constructed and arranged so that at least the capacitor nearest the voltage source, and preferably one or more of the next adjacent capacitors in the series array, have lower tendency to internally discharge than the capacitors in the array more remote from the voltage source.


1. An improved voltage multiplying circuit comprising,

2. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor is a self-healing impregnated capacitor which is impregnated with a high voltage impregnant.

3. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor comprises a foil capacitor.

Description:
BACKGROUND OF THE INVENTION

The invention relates in general to Cockcroft-Walton cascade circuits for voltage multiplication and more particularly to such circuits with a pumping circuit and a storage circuit composed of capacitors connected in series, said pumping circuits and storage circuit being linked with one another by a rectifier circuit whose rectifiers are preferably silicon rectifiers, especially for a switching arrangement sensitive to internal discharges of capacitors, and more especially a switching arrangement containing transistors, and especially an image tube switching arrangement.

Voltage multiplication cascades composed of capacitors and rectifiers are used to produce high D.C. voltages from sinusoidal or pulsed alternating voltages. All known voltage multiplication cascades and voltage multipliers are designed to be capacitance-symmetrical, i.e., all capacitors used have the same capacitance. If U for example is the maximum value of an applied alternating voltage, the input capacitor connected directly to the alternating voltage source is charged to a D.C. voltage with a value U, while all other capacitors are charged to the value of 2U. Therefore, a total voltage can be obtained from the series-connected capacitors of a capacitor array.

In voltage multipliers, internal resistance is highly significant. In order to obtain high load currents on the D.C. side, the emphasis in the prior art has been on constructing voltage multipliers with internal resistances that are as low as possible.

Internal resistance of voltage multipliers can be reduced by increasing the capacitances of the individual capacitors by equal amounts. However, the critical significance of size of the assembly in the practical application of a voltage multiplier, limits the extent to which capacitance of the individual capacitors can be increased as a practical matter.

In television sets, especially color television sets, voltage multiplication cascades are required whose internal resistance is generally 400 to 500 kOhms. Thus far, it has been possible to achieve this low internal resistance with small dimensions only by using silicon diodes as rectifiers and metallized film capacitors as the capacitors.

When silicon rectifiers are used to achieve low internal resistance, their low forward resistance produces high peak currents and therefore leads to problems involving the pulse resistance of the capacitors. Metallized film capacitors are used because of space requirements, i.e., in order to ensure that the assembly will have the smallest possible dimensions, and also for cost reasons. These film capacitors have a self-healing effect, in which the damage caused to the capacitor by partial evaporation of the metal coating around the point of puncture (pinhole), which develops as a result of internal spark-overs, is cured again. This selfhealing effect is highly desirable as far as the capacitors themselves are concerned, but is not without its disadvantages as far as the other cirucit components are concerned, especially the silicon rectifiers, the image tubes, and the components which conduct the image tube voltage.

It is therefore an important object of the invention to improve voltage multiplication cascades of the type described above.

It is a further object of the invention to keep the size of the entire assembly small and the internal resistance low.

It is a further object of the invention to increase pulse resistance of the entire circuit.

It is a further object of the invention to avoid the above-described disadvantageous effects on adjacent elements.

It is a further object of the invention to achieve multiples of the foregoing objects and preferably all of them consistent with each other.

SUMMARY OF THE INVENTION

In accordance with the invention, the foregoing objects are met by making at least one of the capacitors in the pumping circuit, preferably including the one which is adjacent to the input voltage source, one which is less prone to internal discharges than any of the individual capacitors in the storage circuit.

The Cockcroft-Walton cascade circuit is not provided with identical capacitors. Instead, the individual capacitors are arranged according to their loads and designed in such a way that a higher pulse resistance is attained only in certain capacitors. It can be shown that the load produced by the voltage in all the capacitors in the multiplication circuit is approximately the same. But the pulse currents of the capacitors as well as their forward flow angles are different. In particular, the capacitors of the pumping circuit are subjected to very high loads in a pulsed mode. In the voltage multiplication cascade according to the invention, these capacitors are arranged so that they exhibit fewer internal discharges than the capacitors in the storage circuit.

The external dimensions of the entire assembly would be unacceptably large if one constructed the entire switching arrangement using such capacitors.

The voltage multiplication cascade according to the invention also makes it possible to construct a reliably operating

arrangement which has no tendency toward spark-overs, consistent with satisfactory internal resistance of the voltage multiplication cascade and small dimensions of the entire assembly. This avoids the above cited disadvantages with respect to the particularly sensitive components in the rest of the circuit and makes it possible to design voltage multiplication cascades with silicon rectifiers, which are characterized by long lifetimes. Hence, a voltage multiplication cascade has been developed particularly for image tube circuits in television sets, especially color television sets, and this cascade satisfies the highest requirements in addition to having an average lifetime which in every case is greater than that of the television set.

A further aspect of the invention is that at least one of the capacitors that are less prone to internal discharges is a capacitor which is impregnated with a high-voltage impregnating substance, especially a high-voltage oil such as polybutene or silicone oil, or mixtures thereof. In contrast to capacitors made of metallized film which have not been impregnated, this allows the discharge frequency due to internal discharges or spark-overs to be reduced by a factor of 10 to 100.

According to a further important aspect of the invention, at least one of the capacitors that are less prone to internal discharges is either a foil capacitor or a self-healing capacitor. In addition, the capacitor in the pumping circuit which is adjacent to the voltage source input can be a foil capacitor which has been impregnated in the manner described above, while the next capacitor in the pumping circuit is a self-healing capacitor impregnated in the same fashion.

Other objects, features and advantages of the invention will be apparent from the following detailed description of preferred embodiments, taken in connection with the accompanying drawing, the single FIGURE of which:

BRIEF DESCRIPTION OF THE DRAWING

is a schematic diagram of a circuit made according to a preferred embodiment of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The voltage multiplier comprises capacitors C1 to C5 and rectifiers D1 to D5 connected in a cascade. An alternating voltage source UE is connected to terminals 1 and 2, said voltage source supplying for example a pulsed alternating voltage. Capacitors C1 and C2 form the pumping circuit while capacitors C3, C4 and C5 form the storage circuit.

In the steady state, capacitor C1 is charged to the maximum value of the alternating voltage UE as are the other capacitors C2 to C5. The desired high D.C. voltage UA is picked off at terminals 3 and 4, said D.C. voltage being composed of the D.C. voltages from capacitors C3 to C5. Terminal 3 and terminal 2 are connected to one pole of the alternating voltage source UE feeding the circuit, which can be at ground potential. In the circuit described here, a D.C. voltage UA can be picked off whose voltage value is approximately 3 times the maximum value of the pulsed alternating voltage UE. By using more than five capacitors, a correspondingly higher D.C. voltage can be obtained.

The individual capacitors are discharged by disconnecting D.C. voltage UA. However, they are constantly being recharged by the electrical energy supplied by the alternating voltage source UE, so that the voltage multiplier can be continuously charged on the output side.

According to the invention, in this preferred embodiment, capacitor C1 and/or C2 in the pumping circuit are designed so that they have a lower tendency toward internal discharges than any of the individual capacitors C3, C4 and C5 in the storage circuit.

It is evident that those skilled in the art, once given the benefit of the foregoing disclosure, may now make numerous other uses and modifications of, and departures from the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.

Inventors:Petrick, Paul (Landshut, DT)
Schwedler, Hans-peter (Landshut, DT)
Holzer, Alfred (Schonbrunn, DT)
ERNST ROEDERSTEIN SPEZIALFABRIK

US Patent References:
3714528    ELECTRICAL CAPACITOR WITH FILM-PAPER DIELECTRIC    1973-01-30    Vail    
3699410    SELF-HEALING ELECTRICAL CONDENSER    1972-10-17    Maylandt    
3463992    ELECTRICAL CAPACITOR SYSTEMS HAVING LONG-TERM STORAGE CHARACTERISTICS    1969-08-26    Solberg    
3457478    WOUND FILM CAPACITORS    1969-07-22    Lehrer    
3363156    Capacitor with a polyolefin dielectric    1968-01-09    Cox    
2213199    Voltage multiplier    1940-09-03    Bouwers et al.    


AUTOVOX  Mod. TVC2694/E   CHASSIS  507.03 CONTACTLESS TOUCH SENSOR PROGRAM CHANGE KEYBOARD CIRCUIT ARRANGEMENT FOR ESTABLISHING A CONSTANT POTENTIAL OF THE CHASSIS OF AN ELECTRICAL DEVICE WITH RELATION TO GROUND :

Circuit arrangement for establishing a reference potential of a chassis of an electrical device such as a radio and/or TV receiver, such device being provided with at least one contactless touching switch operating under the AC voltage principle. The device is switched by touching a unipole touching field in a contactless manner so as to establish connection to a grounded network pole. The circuit arrangement includes in combination an electronic blocking switch and a unidirectional rectifier which separates such switch from the network during the blocking phase.


1. A circuit arrangement for establishing, at the chassis of an electrical device powered by a grounded AC supply network, a reference potential with relation to ground, said device having at least one contactless touching switch operating on the AC voltage principle, the switch being operated by touching a unipole touching field in a contactless manner, said arrangement comprising an electronic switch for selectively blocking the circuit of the device from the supply network, a half-wave rectifier including a pair of diodes individually connected in series-aiding relation between the terminals of the supply network and the terminals of the device for separating the electronic blocking switch from the supply network during a blocking phase defined by a prescribed half period of the AC cycle, and a pair of condensers individually connected in parallel with the respective diodes. 2. A circuit arrangement according to claim 1, wherein the capacitances of the two condensers are of equal magnitude.

Description:

This invention relates to a circuit arrangement for establishing a constant reference potential on the chassis of an electrical instrument such as a radio and/or a TV receiver. Such instrument includes at least one contactless touching switch operating under the AC voltage principle, whereby by touching a single pole touching field the contactless switch is operated.

In electronic devices, for example TV and radio receivers, there are used in ever increasing numbers electronic touching switches for switching and adjusting the functions of the device. In one known embodiment of this type of touching switch, which operates on a DC voltage principle, the function of the electronic device, is contactlessly switched by touching a unipole touching field, the switching being carried out by means of an alternating current voltage. When using such a unipole touching electrode, one takes advantage of the fact that the AC current circuit is generally unipolarly grounded. In order to close the circuit by touching the touching surface via the body of the operator to ground, it is necessary to provide an AC voltage on the touching field. In one special known embodiment there is employed a known bridge current rectifier for the current supply. This type of arrangement has the drawback that the chassis of the device changes its polarity relative to the grounded network pole with the network frequency. With such construction considerable difficulties appear when connecting measuring instruments to the device, such difficulties possibly eventually leading to the destruction of individual parts of the electronic device.

In order to avoid these drawbacks, the present invention provides a normal combination of a unidirectional rectifier with an electronic blocking switch that separates the chassis of the electronic device from the network during the blocking phase. In accordance with the present invention, the polarity of the chassis of the electronic device does not periodically change, because the electronic device is practically separated from the network during the blocking phase of the unidirectional rectifier by means of the electronic blocking switch.

In a further embodiment of the invention a further rectifier is connected in series with the unidirectional rectifier in the connection between the circuit and the negative pole of the chassis. Such further rectifier is preferably a diode which is switched in the transfer direction of the unidirectional rectifier. According to another feature of the invention there are provided condensers, a respective condenser being connected parallel with each of the rectifiers. Preferably the two condensers have equal capacitances. Because of the use of such condensers, which are required because of high frequency reasons, during the blocking phase there is conducted to the chassis of the electronic device an AC voltage proportional to the order of capacitances of the condensers. Thus there is placed upon the touching field in a desired manner an AC voltage, and there is thereby assured a secure functioning of the adjustment of the device when such touching occurs.

In the embodiment of the invention employing two rectifiers there is the further advantage that over a bridging over of the minus conduit of the rectifier that is connected between the network and the negative pole of the chassis connection, no injuries can be caused by a measuring instrument in the electronic device itself and in the circuit arrangement connected thereto.

In the accompanying drawing:

The sole FIGURE of the drawing is a circuit diagram of a preferred embodiment of the invention.

In the illustrated embodiment the current supply part of the device, shown at the left, is connected via connecting terminals A and B to an AC voltage source, the terminal B being grounded at 8. The current supply part consists of a unidirectional rectifier in the form of a diode 1 with its anode connected to the terminal I, the cathode of diode 1 being connected to one input terminal 9 of an electronic device 2. In the device 2 there is also arranged a sensor circuit 3, shown here mainly as a block, circuit 3 being shown as including a pnp input transistor the emitter of which is connected to an output terminal 11 of the device 2. The collector of such transistor is connected to the other output terminal 12 of the device 2. The base of the transistor is connected by a wire 13 to a unipolar touching field 4 which may be in the form of a simple metal plate instead of the pnp transistor shown, the sensor circuit itself may consist of a standard integrating circuit which controls, among other things, the periodic sequential switching during the touching time of the touching field 4. All of the circuits of the electronic device 2 are isolated in a known manner from the chassis potential. Between the network terminal B and the negative pole 10 of the chassis there is arranged in the direction opposite that of diode 1 a further diode 5, the anode of diode 5 being connected to the terminal 10, and the cathode of diode 5 being connected to the terminal B of the current supply. To provide for HF type bridging of the diodes 1 and 5 there are arranged condensers 6 and 7 respectively, which are connected in parallel with such diodes.

The invention functions by reason of the fact that in an AC network separate devices radiate electromagnetic waves which produce freely traveling fields in the body of the person who is operating and/or adjusting the device, thereby producing an alternating current through his body to ground, as indicated by the - line at the right of the circuit diagram. If now the person operating the device touches the switching field 4, then the pnp type input transistor of the sensor circuit 3, which is placed on a definite reference potential (for example 12 Volts) and is connected with the negative halfwave of the AC voltage potential, is made conductive. There is thereby released a control command in the sequential switching, for example, for switching the electronic device to the next receiving channel. It is understood that the most suitable connection is formed between ground and the touching field 4 by means of a wire. By the use of such wires it would be assured that in all cases the base of the transistor in circuit 3 is connected to ground. This would, however, not permit anyone to operate the switch without the use of an auxiliary means such as a wire. It will be assumed that the touching almost always results directly via the almost isolated human body. For this reason the AC current fields are necessary, because otherwise there cannot always be provided a ground contact. Thus this connection is established via the body resistance of the person carrying out the touching of the switch.

The positive half wave of the alternating current travels to the terminal 9 of the electronic device 2 after such current has been rectified and smoothed by the devices 1, 6. Such positive halfwave is also conducted to the sensor circuit 3. The thus formed current circuit is closed by way of the chassis of the electronic device 3, the diode 5, and the terminal B. When there is a negative halfwave of the alternating current delivered by the current supply, both diodes 1 and 5 remain closed so that the chassis of the device 2 remains separated from the network during the blocking phase. Nevertheless, by means of condensers 6 and 7 the chassis is placed in a definite network potential, which depends on the relationship of the order of magnitude of the two condensers 6 and 7. When the capacitances of such condensers are equal, there is placed upon the chassis of the device 2 the constant reference potential, and simultaneously there is present via the sensor circuit 3 the required AC voltage at the touching field 4 for adjusting the function or functions of the device 2 upon the touching of the touching field 4.

The reference character 15 indicates a terminal or point at which the potential of the chassis of the device 2 may be measured. As above explained, the diode 5 causes the potential of the chassis at 15 to be separated from the network ground when a negative AC halfwave arrives. It will be noted that the return conduit of the circuit is held at a fixed chassis potential. The input transistor of the sensor circuit 3 remains, however, locked because it is subjected to a DC current of about 12 volts. If now, by means of touching the touching field 4, the chassis potential is connected to ground, then the transistor switches through and releases a switching function.

If the connecting terminals AB of the current source are exchanged, as by changing the plug, then there is still secured the condition that the chassis of the device is separated from the network ground via the diode, in this case the diode 1. The reference potential of the chassis consequently remains constant and the changing AC fields which are superimposed on the condensers can produce in the touching human body an AC current voltage due to the fields which are radiated by the device.

A suitable sensor which may be employed for the circuit 3 herein may be a sensor known as the "SAS 560 Tastatur IS," manufactured and sold by Siemens AG.

It is to be understood that the present invention is not limited to the illustrated environment. They can also be used in electronic blocking switch including a Thyristor circuit, which in the same manner separates the electronic device during the blocking phase from the network rectifier. With such Thyristor circuit the drawbacks described in the introductory portion of the specification of known circuit arrangements are also avoided.

Although the invention is illustrated and described with reference to a plurality of preferred embodiments thereof, it is to be expressly understood that it is in no way limited to the disclosure of such a plurality of preferred embodiments, but is capable of numerous modifications within the scope of the appended claims.