FERGUSON Mod. 38030 CHASSIS (1790) T1101E INTERNAL VIEW.

The chassis is a simple monocarrier based mainly on a monochip MC13002P from MOTOROLA which is a Monomax Black And White TV Subsystem.Neat layout within the 38030, with just about everything on the single printed panel.

The new chassis is the 1790 (T1101E) series which is shown in block diagram form in Fig. 1. There are a few features in
common with the previous 1696/1697 series - the same tuner plus SAWF with driver at the front end, a.c. coupled
BF391 video output stage, a similar line output stage with BU807 line output transistor, and an 11V series regulator
with differential error amplifier. Further simplification whilst maintaining performance is hardly possible in these
areas. The main change is the use of the Motorola Monomax i.c. This 28 -pin device incorporates the i.f. strip, video
processing section, a.g.c. and sync separator circuits along Model 38030 left Model 38020 right with the field and line generators, and does so with a minimal external component count. It also incorporates an
8V regulator. A TDA1190P i.c. is used as the sound channel, and there's a discrete component field driver/output stage (TR6/7/8). The only stages apart from the items so far mentioned are an amplifier (TR11) between the Monomax i.c. and the line output stage and an amplifier/inverter (TR9) in the flyback pulse feed to the Monomax i.c. There are only three tuned coils in the whole set - tuner coupling, 6MHz trap and sound detector quadrature coil.
There are just two timebase presets - line hold and height. The contrast and brightness controls are both presets, with screwdriver access through the rear of the cabinet. The two front controls are for tuning and volume/onoff. These are also mounted on the single printed panel.

The Monomax IC:

The Monomax i.c. is where the novel circuit features are to be found, so most of our article will be devoted to
this. The i.c. incorporates 200 linear devices, 200 gates, one million ohms of resistance and 120pF of capacitance
on a 12,700 square mil chip. To make this possible and to reduce the dissipation, the i.c. is operated at 8V instead of
the usual 11-12V. This enables the area occupied by the minimum size transistor to be reduced by 30 per cent,
giving an overall 15 per cent reduction in the chip size. A further key aspect is the inclusion of a nitride step in the
process of chip fabrication. This provides reliable junction seals and enables stable capacitors with three times the
values possible with normal oxide films to be incorporated. The i.c. dissipates less than 500mW.
A block diagram of the Monomax i.c. is shown in Figure. The differential i.f. input is fed to a four -stage i.f. amplifier
whose first two stages are gain controlled. To bias the amplifier, balanced d.c. feedback is decoupled at pins 2
and 6 and applied to pins 3 and 5 via 2.2kft resistors. For optimum noise performance, the gain control applied to
the first stage is delayed until the gain of the second stage 27V has been reduced by 15dB.
The following detector stage is the first unusual feature, since there's no external coil. Instead of a synchronous
detector, a simple full -wave circuit is employed. To compensate for the non -linearity introduced by this type of
detector, a second similar detector is used in a feedback linearising circuit - the idea is shown in Fig. The
performance achieved is equal to that provided by a conventional synchronous detector, the advantage being
that no adjustment or external filtering is required. The video processing section provides contrast control,
black -level clamping and beam limiting - the latter feature is not used in the 1790 chassis, being unnecessary in view
of the a.c. coupling employed in the video output stage. The clamp reservoir capacitor is connected to pin 25, the
clamp pulses being derived from phase detector 2 in the line timebase phase -locked loop. A flyback -blanked, low impedance video output is provided at pin 24. The video signal is also fed via a noise filtering and gating circuit to the a.g.c. circuit, which is both sync and flyback gated, and to the sync separator. The a.g.c. reservoir capacitor is connected to pin 8. The components connected to pin 7 form an anti -lockout circuit for the gated a.g.c. system. There are two time -constants, C9/R63 and C8/R12, D4 conducting when the field sync pulse arrives to bring C8/R12 into operation.
The line and field generators are controlled by a 31.25kHz oscillator. This uses a novel design, with an on chip 50pF nitride capacitor, and produces a sawtooth output. The oscillator's output is sliced, divided by two and fed to the two phase detectors in the line frequency phase -locked loop. This part of the circuit follows conventional practice, with the first detector locking the oscillator, via pins 13 and 12, to the line sync pulses whilst the second detector compares the phases of the oscillator's output and the line flyback pulses. The output from the second phase detector controls a pulsewidth modulator to get a correctly phased line drive signal. This is divided by two and fed out at pin 17 via a buffer stage.
The most unusual section of the i.c. is the field circuit. Instead of a conventional field oscillator, a ten stage
divide -by -625 counter is used, driven by the sliced output from the 31.25kHz oscillator. This avoids the need for a
hold control and close tolerance timing components. The output from the counter is fed via the window control
circuit to the sync gate, which allows the field sync pulse through to control a conventional field generator - the
charging components that produce the ramp are connected to pin 20. The field sync pulse also resets the
counter via an OR gate. In the absence of a field sync pulsethe counter is reset via the window circuit and the OR gate.


The window circuit controls the time during which the sync gate is open. There are two conditions, narrow and
wide, depending on the sync condition. When the circuit is synchronised, the gate is opened during the count 614 626. This is the narrow condition, and provides good noise immunity. A coincidence detector in the window circuit
checks the synchronisation. If this detector finds that there is non -coincidence between the gate and sync pulses eight
times in succession, the gate is opened during the count 484-644. This is the wide condition, giving rapid field
locking. In effect, this is the first digital field oscillator to be used in a UK produced TV chassis.
The single PCB used in the 1790 chassis is a compact 4i x 134in. It's held in position by runners in the moulded
two-piece cabinet. The only components not mounted on the board are the tube with its yoke and the loudspeaker.
The tube's graphite coating is taken up to the protection band so that no earthing spring is required, whilst the
aerial plug is soldered directly to the tuner. There are just ten screws to hold the whole lot together. It would be
difficult to devise a simpler form of construction.


The MONOMAX is a single-chip IC that will perform the electronic functions of a monochrome TV receiver, with the exception of the tuner, sound  channel, and power output stages.
The MC13001XP and MC13002XP  will function as drop-in replacements for MC13001P
and MC13002P, but some external IF components can be removed for maximum benefit. IF AGC range has been increased, video output impedance lowered, and horizontal driver output current capability increased.
GENERAL DESCRIPTION
The Video IF Amplifier is a four-stage design with 80 mV sensitivity.
It uses a 6.2 V supply decoupled at Pin
4. The first two stages are gain controlled,and to ensure
optimum noise performance, the first stage control
is  delayed until the second stage has been gain reduced
by 15 dB. To bias the amplifier, balanced
dc feedback is used which is decoupled
at Pins 2 and 6 and then fed to the input Pins 3 and 5 by internal 3.9 k resistors. The
nominal bias voltage at these input pins is approximately 4.2 Vdc. The input, because of the high level should be driven  from a balanced differential circuit.
For the same reason, care must be taken from the IF decoupling.

The IF output is rectified in a full wave envelop detector and detector nonlinearity
is coupled by using a similar nonlinear element feedback output buffer amplifier.
The detected video at Pin 28 contains the sound intercarrier and Pin 28 is normally
used as the sound , The video frequency response, detector 28, is shown in Figure
3 and the detector performance
Power supply is a simple linear type with mains transformer.

 Power supply is realized with mains transformer and Linear transistorized power supply stabilizer, A DC power supply apparatus includes a rectifier circuit which rectifies an input commercial AC voltage. The rectifier output voltage is smoothed in a smoothing capacitor. Voltage stabilization is provided in the stabilizing circuits by the use of Zener diode circuits to provide biasing to control the collector-emitter paths of respective transistors.A linear regulator circuit according to an embodiment of the present invention has an input node receiving an unregulated voltage and an output node providing a regulated voltage. The linear regulator circuit includes a voltage regulator, a bias circuit, and a current control device.


Power Supply: The examples chosen are taken from manufacturers' circuit diagrams and are usually simplified to emphasise the fundamental nature of the circuit. For each example the particular transistor properties that are exploited to achieve the desired performance are made clear. As a rough and ready classification the circuits are arranged in order of frequency: this part is devoted to circuits used at zero frequency, field frequency and audio frequencies. Series Regulator Circuit Portable television receivers are designed to operate from batteries (usually 12V car batteries) and from the a.c. mains. The receiver usually has an 11V supply line, and circuitry is required to ensure that the supply line is at this voltage whether the power source is a battery or the mains. The supply line also needs to have good regulation, i.e. a low output resistance, to ensure that the voltage remains constant in spite of variations in the mean current taken by some of the stages in the receiver. Fig. 1 shows a typical circuit of the power -supply arrangements. The mains transformer and bridge rectifier are designed to deliver about 16V. The battery can be assumed to give just over 12V. Both feed the regulator circuit Trl, Tr2, Tr3, which gives an 11V output and can be regarded as a three -stage direct -coupled amplifier. The first stage Tr 1 is required to give an output current proportional to the difference between two voltages, one being a constant voltage derived from the voltage reference diode D I (which is biased via R3 from the stabilised supply). The second voltage is obtained from a preset potential divider connected across the output of the unit, and is therefore a sample of the output voltage. In effect therefore Tr 1 compares the output voltage of the unit with a fixed voltage and gives an output current proportional to the difference between them. Clearly a field-effect transistor could do this, but the low input resistance of a bipolar transistor is no disadvantage and it can give a current output many times that of a field-effect transistor and is generally preferred therefore. The output current of the first stage is amplified by the two subsequent stages and then becomes the output current of the unit. Clearly therefore Tr2 and Tr3 should be current amplifiers and they normally take the form of emitter followers or common emitter stages (which have the same current gain). By adjusting the preset control we can alter the fraction of the output voltage' applied to the first stage and can thus set the output voltage of the unit at any desired value within a certain range. By making assumptions about the current gain of the transistors we can calculate the degree of regulation obtainable. For example, suppose the gain of Tr2 and Tr3 in cascade is 1,000, and that the current output demanded from the unit changes by 0.1A (for example due to the disconnection of part of the load). The corresponding change in Tr l's collector current is 0.1mA and, if the standing collector current of Tr 1 is 1mA, then its mutual conductance is approximately 4OmA/V and the base voltage must change by 2.5mV to bring about the required change in collector current. If the preset potential divider feeds one half of the output voltage to Tr l's base, then the change in output voltage must be 5mV. Thus an 0.1A change in output current brings about only 5mV change in output voltage: this represents an output resistance of only 0.0552.

In one embodiment, the current control device is implemented as an NPN bipolar junction transistor (BJT) having a collector electrode forming the input node of the linear regulator circuit, an emitter electrode coupled to the input of the voltage regulator, and a base electrode coupled to the second terminal of the bias circuit. A first capacitor may be coupled between the input and reference terminals of the voltage regulator and a second capacitor may be coupled between the output and reference terminals of the voltage regulator. The voltage regulator may be implemented as known to those skilled in the art, such as an LDO or non-LDO 3-terminal regulator or the like.
The bias circuit may include a bias device and a current source. The bias device has a first terminal coupled to the output terminal of the voltage regulator and a second terminal coupled to the control electrode of the current control device. The current source has an input coupled to the first current electrode of the current control device and an output coupled to the second terminal of the bias device. A capacitor may be coupled between the first and second terminals of the bias device.
In the bias device and current source embodiment, the bias device may be implemented as a Zener diode, one or more diodes coupled in series, at least one light emitting diode, or any other bias device which develops sufficient voltage while receiving current from the current source. The current source may be implemented with a PNP BJT having its collector electrode coupled to the second terminal of the bias device, at least one first resistor having a first end coupled to the emitter electrode of the PNP BJT and a second end, a Zener diode and a second resistor. The Zener diode has an anode coupled to the base electrode of the PNP BJT and a cathode coupled to the second end of the first resistor. The second resistor has a first end coupled to the anode of the Zener diode and a second end coupled to the reference terminal of the voltage regulator. A second Zener diode may be included having an anode coupled to the cathode of the first Zener diode and a cathode coupled to the first current electrode of the current control device.
A circuit is disclosed for improving operation of a linear regulator, having an input terminal, an output terminal, and a reference terminal. The circuit includes an input node, a transistor, a bias circuit, and first and second capacitors. The transistor has a first current electrode coupled to the input node, a second current electrode for coupling to the input terminal of the linear regulator, and a control electrode. The bias circuit has a first terminal for coupling to the output terminal of the linear regulator and a second terminal coupled to the control electrode of the transistor. The first capacitor is for coupling between the input and reference terminals of the linear regulator, and the second capacitor is for coupling between the output and reference terminals of the linear regulator. The bias circuit develops a voltage sufficient to drive the control terminal of the transistor and to operate the linear regulator. The bias circuit may be a battery, a bias device and a current source, a floating power supply, a charge pump, or any combination thereof. The transistor may be implemented as a BJT or FET or any other suitable current controlled device.