Richtige Fernseher haben Röhren!
In Brief: On this site you will find pictures and information about some of the electronic, electrical and electrotechnical technology relics that the Frank Sharp Private museum has accumulated over the years .
Premise: There are lots of vintage electrical and electronic items that have not survived well or even completely disappeared and forgotten.
Or are not being collected nowadays in proportion to their significance or prevalence in their heyday, this is bad and the main part of the death land. The heavy, ugly sarcophagus; models with few endearing qualities, devices that have some over-riding disadvantage to ownership such as heavy weight,toxicity or inflated value when dismantled, tend to be under-represented by all but the most comprehensive collections and museums. They get relegated to the bottom of the wants list, derided as 'more trouble than they are worth', or just forgotten entirely. As a result, I started to notice gaps in the current representation of the history of electronic and electrical technology to the interested member of the public.
Following this idea around a bit, convinced me that a collection of the peculiar alone could not hope to survive on its own merits, but a museum that gave equal display space to the popular and the unpopular, would bring things to the attention of the average person that he has previously passed by or been shielded from. It's a matter of culture. From this, the Obsolete Technology Tellye Web Museum concept developed and all my other things too. It's an open platform for all electrical Electronic TV technology to have its few, but NOT last, moments of fame in a working, hand-on environment. We'll never own Colossus or Faraday's first transformer, but I can show things that you can't see at the Science Museum, and let you play with things that the Smithsonian can't allow people to touch, because my remit is different.
There was a society once that was the polar opposite of our disposable, junk society. A whole nation was built on the idea of placing quality before quantity in all things. The goal was not “more and newer,” but “better and higher" .This attitude was reflected not only in the manufacturing of material goods, but also in the realms of art and architecture, as well as in the social fabric of everyday life. The goal was for each new cohort of children to stand on a higher level than the preceding cohort: they were to be healthier, stronger, more intelligent, and more vibrant in every way.
The society that prioritized human, social and material quality is a Winner. Truly, it is the high point of all Western civilization. Consequently, its defeat meant the defeat of civilization itself.
Today, the West is headed for the abyss. For the ultimate fate of our disposable society is for that society itself to be disposed of. And this will happen sooner, rather than later.How to use the site:
OLD, but ORIGINAL, Well made, Funny, Not remotely controlled............. and not Made in CHINA.
- If you landed here via any Search Engine, you will get what you searched for and you can search more using the search this blog feature provided by Google. You can visit more posts scrolling the left blog archive of all posts of the month/year,
or you can click on the main photo-page to start from the main page. Doing so it starts from the most recent post to the older post simple clicking on the Older Post button on the bottom of each page after reading , post after post.
You can even visit all posts, time to time, when reaching the bottom end of each page and click on the Older Post button.
- If you arrived here at the main page via bookmark you can visit all the site scrolling the left blog archive of all posts of the month/year pointing were you want , or more simple You can even visit all blog posts, from newer to older, clicking at the end of each bottom page on the Older Post button.
So you can see all the blog/site content surfing all pages in it.
- The search this blog feature provided by Google is a real search engine. If you're pointing particular things it will search IT for you; or you can place a brand name in the search query at your choice and visit all results page by page. It's useful since the content of the site is very large.
Note that if you don't find what you searched for, try it after a period of time; the site is a never ending job !
Every CRT Television saved let revive knowledge, thoughts, moments of the past life which will never return again.........
Many contemporary "televisions" (more correctly named as displays) would not have this level of staying power, many would ware out or require major services within just five years or less and of course, there is that perennial bug bear of planned obsolescence where components are deliberately designed to fail and, or manufactured with limited edition specificities..... and without considering........picture......sound........quality........
..............The bitterness of poor quality is remembered long after the sweetness of todays funny gadgets low price has faded from memory........ . . . . . .....Don't forget the past, the end of the world is upon us! Pretty soon it will all turn to dust!
Have big FUN ! !
©2010, 2011, 2012, 2013, 2014 Frank Sharp - You do not have permission to copy photos and words from this blog, and any content may be never used it for auctions or commercial purposes, however feel free to post anything you see here with a courtesy link back, btw a link to the original post here , is mandatory.
All sets and apparates appearing here are property of
Engineer Frank Sharp. NOTHING HERE IS FOR SALE !
Tuesday, March 15, 2011
JVC AV-32WP2EN CHASSIS MB POWER AND DEFLECTION + EHT PANEL BOARD SMB-2001-U2
The supply is based on MOTOROLA MC44603p which is a MIXED FREQUENCY MODE GREENLINE PWM CONTROLLER:Fixed Frequency, Variable Frequency,
The MC44603 is an enhanced high performance controller that is
specifically designed for off–line and dc–to–dc converter applications. This
device has the unique ability of automatically changing operating modes if
the converter output is overloaded, unloaded, or shorted, offering the
designer additional protection for increased system reliability. The MC44603
has several distinguishing features when compared to conventional SMPS
controllers. These features consist of a foldback facility for overload
protection, a standby mode when the converter output is slightly loaded, a
demagnetization detection for reduced switching stresses on transistor and
diodes, and a high current totem pole output ideally suited for driving a power
MOSFET. It can also be used for driving a bipolar transistor in low power
converters (< 150 W). It is optimized to operate in discontinuous mode but
can also operate in continuous mode. Its advanced design allows use in
current mode or voltage mode control applications.
Current or Voltage Mode Controller
• Operation up to 250 kHz Output Switching Frequency
• Inherent Feed Forward Compensation
• Latching PWM for Cycle–by–Cycle Current Limiting
• Oscillator with Precise Frequency Control
• Externally Programmable Reference Current
• Secondary or Primary Sensing
• Synchronization Facility
• High Current Totem Pole Output
• Undervoltage Lockout with Hysteresis
• Overvoltage Protection Against Open Current and Open Voltage Loop
• Protection Against Short Circuit on Oscillator Pin
• Fully Programmable Foldback
• Soft–Start Feature
• Accurate Maximum Duty Cycle Setting
• Demagnetization (Zero Current Detection) Protection
• Internally Trimmed Reference
GreenLine Controller: Low Power Consumption in Standby Mode
• Low Startup and Operating Current
• Fully Programmable Standby Mode
• Controlled Frequency Reduction in Standby Mode
• Low dV/dT for Low EMI Radiation.
TDA9151B Programmable deflection controller
GENERAL DESCRIPTION The TDA9151B is a programmable deflection controller contained in a 20-pin DIP package and constructed using BIMOS technology. This high performance synchronization and DC deflection processor has been especially designed for use in both digital and analog based TV receivers and monitors, and serves horizontal and vertical deflection functions for all TV standards. The TDA9151B uses a line-locked clock at 6.75, 13.5 or 27 MHz, depending on the line frequency and application, and requires only a few external components. The device can be programmed in a self-adaptive mode or in a programmable fixed slope mode. Selection of these modes and a large number of other functions is fully programmable via the I2C-bus. FEATURES
· 6.75, 13.5 and 27 MHz clock frequency
· Few external components
· Synchronous logic
· I2C-bus controlled
· Easy interfacing
· Low power
· Flash detection with restart
· Two-level sandcastle pulse.
· 16-bit precision vertical scan
· Self adaptive or programmable fixed slope mode
· DC coupled deflection to prevent picture bounce
· Programmable fixed compression to 75%
· Programmable vertical expansion in the fixed slope
· S-correction can be preset
· S-correction setting independent of the field frequency
· Differential output for high DC stability
· Current source outputs for high EMC immunity
· Programmable de-interlace phase.
· DC coupled EW correction to prevent picture bounce
· 2nd and 4th order geometry correction can be preset
· Trapezium correction
· Geometry correction settings are independent of field
· Self adaptive Bult generator prevents ringing of the
· Current source output for high EMC immunity.
· Phase 2 loop with low jitter
· Dual slicer horizontal flyback input
· Soft start by I2C-bus
· Over voltage protection/detection with selection and
· Input selection between aquadag or EHT bleeder
· Internal filter.
Input signals (pins 12, 13, 14, 17 and 18)
The TDA9151B requires three signals for minimum
operation (apart from the supply). These signals are the
line-locked clock (LLC) and the two I2C-bus signals (SDA
and SCL). Without the LLC the device will not operate
because the internal synchronous logic uses the LLC as
the system clock.
I2C-bus transmissions are required to enable the device to
perform its required tasks. Once started the IC will use the
HA and/or VA inputs for synchronization. If the LLC is not
present the outputs will be switched off and all operations
discarded (if the LLC is not present the line drive will be
inhibited within 2 ms, the EW output current will drop to
zero and the vertical output current will drop to 20% of the
adjusted value within 100 ms). The SDA and SCL inputs
meet the I2C-bus specification, the other three inputs are
The LLC frequency can be divided-by-two internally by
connecting LLCS (pin 5) to ground thereby enabling the
Horizontal part (pins 1, 2, 13, 19 and 20
The HA input (pin 13) is a TTL-compatible CMOS input.
Pulses on this input have to fulfil the timing requirements
as illustrated in Fig.6. For correct detection the minimum
pulse width for both the HIGH and LOW periods is 2
internal clock periods.
FLYBACK INPUT PULSE
The HFB input (pin 1) is a CMOS input. The delay of the
centre of the flyback pulse to the leading edge of the HA
pulse can be set via the I2C-bus with the horizontal phase
byte (subaddress 08), as illustrated in Fig.7.
The resolution is 6-bit.
The HOUT pulse (pin 20) is an open-drain NMOS output.
The duty factor for this output is typically 52¤48
(conducting/non-conducting) during normal operation. A
soft start causes the duty factor to increase linearly from 5
to 52% over a minimum period of 2000 lines in 2000 steps.
The OFCS output (pin 19) is a push-pull CMOS output
which is driven by a pulse-width modulated DAC.
By using a suitable interface, the output signal can be used
for off-centre shift correction in the horizontal output stage.
This correction is required for HDTV tubes with a 16 ´ 9
aspect ratio and is useful for high performance flat square
tubes to obtain the required horizontal linearity. For
applications where off-centre correction is not required,
the output can be used as an auxiliary DAC. The OFCS
signal is phase-locked with the line frequency. The
off-centre shift can be set via the I2C-bus, subaddress 09,
with a 6-bit resolution as illustrated in Fig.8.
The DSC input/output (pin 2) acts as a sandcastle
generating output and a guard sensing input. As an output
it provides 2 levels (apart from the base level), one for the
horizontal and vertical blanking and the other for the video
clamping. As an input it acts as a current sensor during the
vertical blanking interval for guard detection.
The clamping pulse width is 21 internal clock periods. The
shift, with respect to HA can be varied from 35 to 49 clock
periods in 7 steps via the I2C-bus, clamp shift byte
subaddress 0A, as illustrated in Fig.9. It is possible to
suppress the clamping pulse during wait, stop and
protection modes with control bit CSU. This will avoid
unwanted reset of the TDA4680/81 (only used in those
The start of the horizontal blanking pulse is minimum 38
and maximum 41 clock periods before the centre of the
flyback pulse, depending on the fclk/fH ratio K in
accordance with 41 - (432 - K).
Stop of the horizontal blanking pulse is determined by the
trailing edge of the HFB pulse at the horizontal blanking
slicing level crossing as illustrated in Fig.10.
The vertical blanking pulse starts two internal clock pulses
after the rising edge of the VA pulse. During this interval a
small guard pulse, generated during flyback by the vertical
power output stage, must be inserted. Stop vertical
blanking is effected at the end of the blanking interval only
when the guard pulse is present (see Section “Vertical
The start scan setting determines the end of vertical
blanking with a 6-bit resolution in steps of one line via the
I2C-bus subaddress 02 (see Figs 11, 12 and 13).
In the vertical blanking interval a small unblanking pulse is
inserted. This pulse must be filled-in by a blanking pulse or
guard pulse from the vertical power output stage which
was generated during the flyback period. In this condition
the sandcastle output acts as guard detection input and
requires a minimum 800 mA input current. This current is
sensed during the unblanking period. Vertical blanking is
only stopped at the end of the blanking interval when the
inserted pulse is present. In this way the picture tube is
protected against damage in the event of missing or
malfunctioning vertical deflection.
VERTICAL GEOMETRY PROCESSING
The vertical geometry processing is DC-coupled and
therefore independent of field frequency. The external
resistive conversion (RCONV) at pin 8 sets the reference
current for both the vertical and EW geometry processing.
A useful range is 100 to 150 mA, the recommended value
is 120 mA.
The vertical outputs VOUTA and VOUTB on pins 10 and 11
together form a differential current output. The vertical
amplitude can be varied over the range 80 to 120% in
63 steps via the I2C-bus (subaddress 00). Vertical
S-correction is also applied to these outputs and can be
set from 0 to 16% by subaddress 01 with a 6-bit resolution.
The vertical off-centre shift (OFCS) shifts the vertical
deflection current zero crossing with respect to the EW
parabola bottom. The control range is -1.5 to +1.5%
(±1¤8 ´ I8) in 7 steps set by the least significant nibble at
EW GEOMETRY PROCESSING
The EW geometry processing is DC coupled and therefore
independent of field frequency. RCONV sets the reference
current for both the vertical and EW geometry processing.
The EW output is an ESD-protected single-ended current
The EW width/width ratio can be set from 100 to 80% in
63 steps via subaddress 04 and the EW parabola/width
ratio from 0 to 20% via subaddress 05. The EW
corner/EW parabola ratio has a control range of -40 to 0%
in 63 steps via subaddress 06.
The EW trapezium correction can be set from
-1.5 to +1.5% in 7 steps via the most significant nibble at
The Bult generator makes the EW waveform continuous
Protection input (pin 3)
The protection input (PROT) is a CMOS input.
The input voltage must be EHT scaled and has the
Two modes of protection are available with the aid of
control bit PRD.
· With PRD = logic 1 the protection mode is selected,
HOUT will be defeated and the PROT bit in the status
word is set if the input voltage is above 3.9 V. Thus the
deflection stops and EW output current is zero, while the
vertical output current is reduced to 20% of the adjusted
value. A new start of the circuit is I2C-bus controlled with
the user software.
· With PRD = logic 0 the detection mode is selected,
HOUT will not be defeated and the over voltage
information is only written in the PROT status bit and can
be read by the I2C-bus.
All further actions, such as a write of the LFSS bit, are
achieved by the I2C-bus. They depend on the
configuration used and are defined by user software.
Flash detection/protection input (pin 9)
The FLASH input is a CMOS input with an internal pull-up
current of approximately 8 mA.
When a negative-going edge crosses the 0.75 V level a
restart will be executed with a soft start of approximately
2000 lines, such as in the soft-start mode. When the
function is not used pin 9 can be connected to ground, VCC
or left open-circuit, the internal pull-up current source will
prevent any problems. However a hard wired connection
to VCC or ground is recommended when the function is not
EHT compensation (pin 7)
The EHT input is a CMOS input.
The EHT compensation input permits scan amplitude
modulation should the EHT supply not be perfect. For
correct tracking of the vertical and horizontal deflection the
gain of the EW output stage, provided by the ratio
RCONV-EW/RCONV, must be 1¤16Vscan ´ Vref (see Fig.15).
The input for EHT compensation can be derived from an
EHT bleeder or from the picture tubes aquadag
(subaddress 0B, bit BLDS).
EHT compensation can be set via subaddress 07 in
63 steps allowing a scan modulation range from
-10 to +9.7%.