Dismantling hints
Attention!
The chassis carries mains voltage at all times (bridge rectifier). Repairs are only to be carried out with an isolating transformer and in accordance with VDE regulation 0860 H.
Rear cover (Only for IDEAL COLOR 1840) Pull off the antenna plug and unscrew the screws. Rear cover Loosen the two metal screws at the lower edge and tilt the rear cover upwards.
Chassis Lift the chassis carefully and tilt it to the rear. Two depends hold the chassis in either a tilted or a horizontal position. It can also be completely unhinged if necessary. Loudspeaker Pry off the tension clips from the plastic pegs with a small knife or screw- driver. Mind the speaker diaphragm!
Picture tube Picture tube, deflection system and multi pole unit are inseparable. They are one assembly and must be dismantled or exchanged as such. When re installing the assembly, verify that washers and spacers are replaced in the reverse order of take off. Potentiometer unit (Only for IDEAL COLOR 1840 and 1841) Dismantle the AF adaptor board. Using a long screwdriver, push down on the plastic strap below the operating controls board. Then, pry apart the plastic studs at the sides, simultaneously applying front-side pressure on the operating Knobs. When re installing the potentiometer unit ensure that it snaps securely into place.
Operating controls unit (Only for IDEAL COLOR 1842) After having loosened the 4 mounting screws and having disconnected the connecting cable, pull the unit to the rear and remove it from the cabinet. Sensor and storage elements board Disconnect the plug strips on the chassis board. Pry apart the plastic supporting bars and pull the boards to the rear. When re installing the boards ensure that the plastic pegs of the boards snap into the spare- outs of the supporting bars. AF adaptor board (Only for IDEAL COLOR 1840) Unscrew the screw behind the plug and pull the board to the rear.
Front plate (Only for IDEAL COLOR 1840) Unscrew the 10 screws.
Rear cover mounting support, top (Only for IDEAL COLOR 1840) Unscrew the screw and pull the mounting support to the rear. Attention! Removing the plastic mounting support simultaneously frees the rear part of the corresponding carrying handle.
Carrying handle (Only for IDEAL COLOR 1840) Dismantle the front plate and the rear cover mounting support. Pull the plastic stud with the embedded nut toward the front and remove the handle by pulling it to one side. When reinserting the handle, ensure that the noses at the ends of the knurled handle point straight down. Only then will the handle fit correctly into place and the stud and mounting support fit into the handle.
Measurements and alignment work on the modules
To facilitate measurements and repair work the modules, with the exception of the tuners, can also plugged into the chassis board from the solder side. To do so the mounting screws, i.e. the mounting supports, are loosened. The module is then unplugged and reinserted in the female plug strip from the solder side. The mounting support of the decoder module must be replaced on the module to protect it against falling out.
Attention!
The chassis carries mains voltage at all times (bridge rectifier).
Repairs are only to be carried out with an isolating transformer. A voltmeter with an internal resistance of Rj = 10 mega ohm volt is to be used for the voltage measurements. Unless indicated otherwise, use a test card with a cross-hatch pattern for the basic adjustments. For the adjustment steps ¢ and j at least, the test card ratio must be 3:4. With only a few exceptions the adjustments are checked on the screen.
The set should be in operation for at least 10 minutes before the adjustment procedure is started, and the contrast and brightness setting should be
turned to minimum.
A new picture tube must be allowed a warm-up period of about 20 minutes before the adjustment procedure is started. Prior to any adjustment or alignment work the following operating voltages must be checked and corrected, if necessary:
a) adjust the mains voltage with the regulating transformer to an exact 220 V
b) adjust R 584 for 51.3 V at pin R99 of the control module.
c) adjust R 717 until the voltage U5 at the collector of T 701 equals 12 V.
Attention! The decoder and colour output stages voltage measurements given in the service instruction booklet and on the service print of the printed boards were taken with the picture halftone adjuster controls R 9011, R 9012, R 9013 at their left-hand stop.
Halftone adjustments
a) Service switch S 821 (decoder board coordinate square B4) to position "horizontal line’. The service switch in PAL/SECAM sets is the designated with S 901 (decoder board coordinate square B 6).
b controls R 9011,Set 9012, 9013 (near vidom diodes on chassis board) to their left-hand stop. This setting corresponds to the maximum collector voltage of the RGB output stages.
c) Adjust R 553 until a horizontal line is just visible on the screen.
d) Adjust the other two lines for equal brightness with their corresponding halftone adjuster controls.
e) Return service switch S 821 (S 901) to the "receiving position.
Basic adjustments and picture geometry
All adjuster controls and test points are accessible from the solder side of the chassis without the necessity of having to tilt the chassis. For the adjustment steps c and j the test picture ratio must be 3:4. For the adjustment steps a, b and m, the short-circuit plug of the horizontal amplitude adjustment may be used (upper right corner of chassis as viewed from the rear).
RGB drive adjustments (colour-neutral alignment for black/white reproduction)
a) It is advisable to use a black/white receiver (without tinted protective screen or tinted picture tube) as reference set for the following adjustments.
b) Feed a halftone picture or a test picture with grey scale gradation into both receivers. Adjust the receivers for equal brightness and contrast.
c) Adjust R 950, 960 and 970 so that the picture screen shows no colour tint.
The ITT CHASSIS VIDOM 456809 is a semi modular chassis. The
VIDOM Diagnosesystem which stays for Voll Integriete Diagnose Optische
Messpunkte wich is a Completely Optical Integrated measurements
Diagnose Sytstem introduces new technolgy approach in fault diagnosing.
The system has the target to help the specialized and trained technician to evaluate faults in logical way.
The
diagnosing system is based on led lamps which are informing
realtively to the functional status of some main points, even derived,
around the chassis, giving further information during diagnosing
faults.
Was
first and last chassis from ITT(SEL) GRAETZ using the Thyristor
technology in horizontal deflection ciruits instead transistors, and for
that is quite rare and unique and was used even in some portable sets
all of them only in 1977. ITT SCHAUB LORENZ IDEAL COLOR 1963 OSCAR 16 CHASSIS VIDOM 456809 UNITS:
- 426816C REGEL MODUL
- 426812 SYNCHRO MODUL ITT TDA9400
- 426807A VERTIKAL OSZILLATOR
- 420709A NF - SOUND AMPL TBA800.
- 430308A IF /ZF MODUL TBA1440 TBA120.
- 458507 VIDEO MODUL / LUM + CHROM.
THE TBA800, TBA810 AUDIO integrated circuits:
AUDIO integrated circuits are being increasingly used in television chassis and certainly represent the simplest approach to improving the audio side of a TV set. A number of such i.c.s have appeared during the 70's.
The main difference between them being that the TBA800 is a somewhat higher voltage, lower current device. The TBA800 is used in the current Grundig and ASA 110° colour chassis while the Finlux 110' colour chassis uses a TBA810. In each of these chassis the audio i.c. is driven from a TBA120 intercarrier sound i.c. The TBA800 and TBA810S can also be used as the field output stage in 110' monochrome chassis with c.r.t.s of up to l7in. and as the field driver stage in larger screen monochrome sets.
The
TBA800 is designed to provide up to 5W into a 16 Ohm load when operated
from a 24V supply. It is encapsulated in the type cf quad -in -line
case shown in Fig. I: the tabs at the centre are to assist in cooling
the device and must be earthed. The TBA800 can be operated from power
supply voltages up to the absolute maximum permissible value of 30V. It
is best to regard 24V as being the upper limit however in order to
provide an adequate safety margin and prevent possible damage during
voltage surges. The minimum power supply voltage recommended by the
manufacturers is 5V, but the power output is then less than 0-5W. The
quiescent current taken by the TBA800 is typically 9mA from a 24V
supply-no device of this type should draw more than 20mA. When an input
signal is applied the current increases considerably- up to about 1.5A
at full power. Two circuits for use with the TBA800 are shown in Figs. 2
and 3 and give comparable performance. The circuit shown in Fig. 2 is somewhat simpler but thatshown in Fig. 3 enables one side of the loudspeaker to be connected to chassis. The input resistance of the TBA800 is quite high (typically 5 MOhm) but a resistor must be connected between the input pin 8 and chassis otherwise the out- put stage will not operate with the correct bias. In the circuits shown the volume control VR1 provides this function: the bias current that flows through it is typically 1 microA (maximum 5 microA). The average voltage at the output pin 12 is half the supply potential. The loudspeaker must be capacitively coupled therefore and the low frequency response will be worse as this capacitor is decreased in value. The output coupling capacitor C4 in Fig. 2 also provides the bootstrap connection to pin 4. In Fig. 3 an additional capacitor (C9) is required for this purpose.
In both circuits the value of R1 controls the amount of feedback and thus the gain. The output signal is fed back to pin 6 via an internal 7 kOhm resistor. If R1 is reduced in value the gain will increase but the frequency response will be affected and the distortion will rise. With the component values shown the voltage gain of both circuits is typically 140 (43dB) which is quite adequate for most audio applications. R3 in Fig. 3 is necessary only if the power supply voltage is fairly low (less than about 14V).
C2 smooths the power supply input and C1 is connected between pin 1 and chassis to provide r.f. decoupling and help prevent instability. If mains hum is present on the supply line with the circuit shown in Fig. 3 capacitor C8 should be included between pin 7 and chassis. The circuits shown have a level frequency response (within ±3dB) between about 40Hz and 20kHz. If you wish to reduce the upper 3dB level to about 8kHz C5 can be increased to about 560pF. The total harmonic distortion provided by these circuits remains fairly constant at about 0.5% until the power output reaches 3W: it then rises rapidly with power level as shown in Fig. 4.
The
TBA800 can be operated from a 13V supply to feed up to 2.5W into an 80
load or from a 17V supply to feed the same power into a 160 load without
an additional heatsink. If more output power is required the cooling
tabs must be connected to a heatsink. Two methods of mounting the TBA800
are shown in Figs. 5 and 6. In Fig. 5 the device is inserted into a
circuit board and a heatsink is soldered to the same points as the tabs:
this has the disadvantage that the heatsink extends above the board
though on the other hand the whole board can be used for the
construction of the circuit. In Fig. 6 the tabs are soldered directly to
a suitable area of copper on the board: this method has the
disadvantage that about two square inches of the board are not available
for component mounting. It is generally best to make soldered
connections to the pins of the device since this ensures good heat
dissipation with minimum unwanted feedback. Observe the usual heat
precautions when soldering. The pins can however be carefully bent so
that they will fit into a 16 -pin dual -in -line socket.The TBA810S has the same type of encapsulation as the TBA800 and the connections are also as shown in Fig. 1 except that there is no internal connection to pin 3. An alternative version, the TBA810AS, has two horizontal tabs with a hole in each (see Fig. 7) so that a heatsink can be bolted on. Some readers may find it easier to bolt a heatsink to a TBA810AS than to solder the TBA810S tabs. TBA810 devices can provide 7W of audio power to a 40 loudspeaker when operated from a I6V supply. Fig. 8 shows the change in maximum output power with different supply voltages. As a 4.5W output can be obtained with a 12V supply the TBA810 is much more suitable than the TBA800 for use with battery operated equipment. The TBA810 can provide output currents up to 2.5A.
Two circuits for use with TBA810 devices are shown in Figs. 9 and 10: they are very similar to the circuits shown in Figs. 2 and 3 though some of the capacitor values are larger because of the lower output impedance. The two circuits have comparable performance but that shown in Fig. 10 gives somewhat better results at low supply voltages (down to 4V). In either circuit R2 may be replaced with a 100k0 volume control. The bias current flowing in the pin 8 circuit is typically
0-4 microA and the input resistance 5M 0 (the value of R2 must be much less however to ensure correct bias.
The gain decreases as the value of R1 is increased for the same reason as with the TBA800. The values of R1, C3 and C7 affect the high -frequency response. With the values shown the response is level within ±3dB from about 40Hz to nearly 20kHz. Fig. 11 shows values of C3 plotted against R1 where the frequency is 3dB down at 10kHz and 20kHz and C7 is five times C3. The output distortion with these circuits is about 0.3% for outputs up to 3W rising to about 1% at 4W, 3% at 5W and 9% at 6W with a 14.4V supply voltage. The voltage gain is typically 70 times (37dB). Although this value is half that obtained with the TBA800 the input voltage required to produce a given output power is about the same for both types. This is because a smaller output voltage is required to drive a 40 load at a certain power level than is required to drive a 160 load.
The TBA810S may be mounted in the same way as the TBA800. One way of mounting the TBA810AS is shown in Fig. 12. It is simpler however to bolt flat heatsinks to the tabs.
Devices of this type will be destroyed within a fraction of a second if the power supply is accidentally con- nected with reversed polarity. When experimenting therefore it is wise to include a diode in the positive power supply line to prevent any appreciable reverse current flowing in the event of incorrect power supply connection. The diode can be removed once the circuit has been finalised. The TBA800 is likely to be destroyed if the output is accidentally shorted to chassis. The TBA810S and TBA810AS however are protected from damage in the event of such a short-circuit even if this remains for a long time (but note that the earlier TBA8I0 and TBA810A versions did not contain internal circuitry to provide this protection). The TBA800 is not protected against overheating but the TBA810S and TBA810AS incorporate a thermal shutdown circuit.
For this reason the heat- sinks used with the TBA810S and TBA810AS can have a smaller safety factor than those used with the TBA800. If the silicon chip in a TBA810S or TBA810AS becomes too hot the output power is temporarily reduced by the internal thermal shutdown circuit. As with all high -gain amplifiers great care should be taken to keep the input and output circuits well separated otherwise oscillation could occur. The de- coupling capacitors should be soldered close to the i.c. -especially the 0 1pF decoupling capacitor in the supply line (this should be close to pin I).
Field Output Circuit:
TDA2522 PAL TV CHROMA DEMODULATOR COMBINATION
FAIRCHILD LINEAR INTEGRATED CIRCUIT
GENERAL DESCRIPTION- The TDA2522 is a monolithic integrated circuit designed as
a synchronous demodulator for PAL color television receivers. It includes an 8,8 MHz 
oscillator and divider to generate two 4.4 MHz reference signals and provides color difference outputs.
PACKAGE OUTLINE 9B
The TDA2522 is Intended to Interface directly with the TDA2560 with a
minimum oF external components. The TDA2530 may be added if RGB
drive is required. The TDA2522
is constructed using the Fairchild Planar* process.
TDA2560 LUMINANCE AND CHROMINANCE CONTROL COMBINATION
The TDA2560 is a monolithic integrated circuit for use in decoding systems of COLOR
television receivers. The circuit consists of a luminance and chrominance amplifier.
The luminance amplifier has a low input impedance so that matching of the luminance
delay line is very easy.
It also incorporates the following functions:
- d.c. contrast control;
- d.c. brightness control;
- black level clamp;
- blanking;
- additional video output with positive-going sync.
The chrominance amplifier comprises:
- gain controlled amplifier;
- chrominance gain control tracked with contrast control;
- separate d.c. saturation control:
- combined chroma and burst output, burst signal amplitude not affected by contrast and
saturation control;
- the delay line can be driven directly ‘by the IC.
APPLICATION INFORMATION (continued)
The function is quoted against the corresponding pin number
Balanced chrominance input signal (in conjunction with pin 2)
This is derived from the chrominance signal bandpass filter, designed to provide a
push-pull input. A signal amplitude of at least 4 mV peak-to-peak is required
between pins l and 2. The chrominance amplifier is stabilized by an external feedback
loop from the output (pin 6) to the input (pins I and 2). The required level at pins l
and 2 will be 3 V.
All figures for the chrominance signals are based on a colour bar signal with 75%
saturation: i.e. burst-to-chrominance ratio of input signal is 1 1 2.
Chrominance signal input (see pin 1)
A. C.C. input
A negative-going potential, starting at +l,2 V, gives a 40 dB range of a. c. c.
Maximum gain reduction is achieved at an input voltage of 500 mV.
Chrominance saturation control
A control range of +6 dB to >-14 dB is provided over a range of d. c. potential on
pin 4 from +2 to +4 V. The saturation control is a linear function of the control
voltage.
Negative supply (earth)
Chro minance signal output
For nominal settings of saturation and contrast controls (max. -6 dB for saturation,
and max. -3 dB for contrast) both the chroma' and burst are available at this pin, and
in the same ratio as at the input pins 1 and 2. The burst signal is not affected by the
saturation and contrast controls. The a.c. c. circuit of the TDA2522 will hold
constant the colour burst amplitude at the input of the TDA2522. As the PAL delay
line is situated here between the TDA256O and TDA2522 there may be some variation
of the nominal 1 V peak-to-peak burst output of the TDA2560, according to the
tolerances of the delay line. An external network is required from pin 6 of the
TDA256O to provide d. c. negative feedback in the chroma channel via pins I and 2.
Burst gating and clamping pulse input
A two-level pulse is required at this pin to be used for burst gate and black level
clamping. The black level clamp is activated when the pulse level is greater than
7 V. The timing of this interval should be such that no appreciable encroachment
occurs into the sync pulse on picture line periods during normal operation of the
receiver. The burst gate, which switches the gain of the chroma amplifier to
maximum, requires that the input pulse at pin 7 should be sufficiently wide, at least
8 ps, at the actuating level of 2,3 V.
+12 V power supply
Correct operation occurs within the range 10 to 14 V. All signal and control levels
have a linear dependency on supply voltage but, in any given receiver design, this
range may be restricted due to considerations of tracking between the power supply
variations and picture contrast and chroma levels.
Flyback blanking input waveform
This pin is used for blanking the luminance amplifier. When the input pulse exceeds
the +2, 5 Vlevel, the output signal is blanked to a level of about 0 V. When the input
exceeds a +6 V level, a fixed level of about 1, 5 V is inserted in the output. This
level can be used for clamping purposes.
Luminance sigal output
An emitter follower provides a low impedance output signal of 3 V black-to-white
amplitude at nominal contrast setting having a black level in the range 1 to 3 V. An
external emitter load resistor is not required.
The luminance amplitude available for nominal contrast may be modified according
to the resistor value from pin 13 to the +12 V supply. At an input bias current
114 of 0,25 mA during black level the amplifier is compensated so that no black
level shift more than 10 mV occurs at contrast control. When the input current
deviates from the quoted value the black level shift amounts to 100 mV/rnA.
Brightness control
The black level at the luminance output (pin 10) is identical to the control voltage
required at this pin, A range of black level from l to 3 V may be obtained.
Black level clamp capacitor
Luminance gain setting resistor
The gain of the luminance amplifier may be adjusted by selection of the resistor
value from pin 13 to +12 V. Nominal luminance output amplitude is then 3 V
black-to-white at pin 10 when this resistor is 2, 7.TDA2530 RGB MATRIX PREAMPLIFIER
The TDA2530 is an integrated RGB -matrix preamplifier for colour television receivers,
incorporating a matrix preamplifier for RGB cathode drive of the picture tube with
clamping circuits.
The three channels have the same layout to ensure identical frequencybehaviour.
This integrated circuit has been designed to be driven from the TDA2522 Synchronous
demodulator and oscillator IC.
TDA9400, Line Circuits for TV Receivers (18-Pin Plastic Package)
These integrated circuits are advanced versions of the well-known types TDA1940, TDA1940F, TDA1950 and TDA1950F are identical
TBA940/950, TDA9400/9500 etc. integrated line oscillator circuits. except the following: at pin 2 the types having the suffix "F" supply ,
They comprise all stages for sync separation and line synchronisation horizontal output pulses of longer duration compared with the basic I
in TV receivers in one single silicon chip. Due to their high degree of types Integration, the number of external components is very small.
This integrated circuit contains the horizontal sweep generator (HO), the amplitude filter (AS), the sync-signal separating circuit (SA) and the frequency/phase comparator (FP). For the purpose of suppressing noise pulses which are caused via the operating voltage during the upper and the lower inversion point of the horizontal sweep generator (HO) which contains a single capacitor (C) and a first threshold stage circuit (SS1) with two fixed thresholds, there are provided a second and a third threshold stage circuit (SS2, SS3), to the inputs of which the sawtooth signal is applied, and with the thresholds thereof, approximately 2 μs prior to reaching the upper or the lower peak value of the sawtooth signal, are being passed through thereby. The output signal of the second threshold circuit (SS2) and the output signal of the third threshold stage circuit (SS3) which is applied via the pulse shaper circuit (IF), are superimposed linearly and, via the stopper circuit (blocking stage) (SP) serve to control the application of the composite video signal (BAS) to the amplitude filter (AS), or else they are applied to a clamping circuit which serves to apply the operating points of the amplitude filter (AS) and/or of the sync-signal separating circuit (SA) to such a potential that these two stages, for the time duration of these output pulses, are prevented from operating.
1. An integrated circuit for color television receivers, comprising a voltage- or current-controlled horizontal sweep generator (HO), an amplitude filter (AS), a synchronizing-signal separating circuit (SA) and a frequency/phase comparator (FP) which serves to synchronize the horizontal sweep generator (HO), with said generator being a sawtooth generator containing a single capacitor
a second and a third threshold stage circuit (SS2, SS3) each being supplied with the sawtooth signal on the input side, comprising each time one threshold which, approximately 2μs prior to the reaching of the upper or the lower peak value of the sawtooth signal, is being passed thereby;
a pulse shaper circuit (IF) coupled to the output of said third threshold stage circuit (SS3) which pulse shaper circuit reduces the duration of the output pulse thereof to about the duration of the output pulse of said second threshold stage circuit (SS2), and
a stopper circuit (blocking stage) (SP) coupled to the outputs of both said pulse shaper circuit (IF) and said second threshold stage circuit (SS2), said stopper circuit having a signal input to which there is applied a composite video signal (BAS) and a signal output which is coupled to the input of said amplitude filter (AS).
2. The invention of claim 1 wherein the outputs of both said pulse shaper circuit (IF) and said second threshold stage circuit (SS2) are coupled to a clamping circuit which applies the operating points of said amplitude filter (AS) and said sync-separating signal (SA) to such a potential that they are prevented from operating.
3. An integrated horizontal sweep circuit comprising:
a generator for generating a sawtooth signal;
an amplitude filter having an input for receiving a composite video signal and having an output;
a sync-signal separating circuit having an input coupled to said amplitude filter output and having an output;
a frequency/phase comparator having a first input coupled to said separating circuit output,
a second input receiving said sawtooth signal and an output for controlling said generator; and
a control circuit responsive to said sawtooth signal for inhibiting said composite video signal when said sawtooth signal is within predetermined signal level ranges about the upper and lower inversion points of said sawtooth signal.
4. An integrated circuit in accordance with claim 3 wherein:
said generator comprises a capacitor, circuit means for charging and discharging said capacitor, and a first threshold circuit controlling said circuit means in response to said sawtooth signal reaching a first level corresponding to said first inversion point and a second level corresponding to said second inversion point.
5. An integrated horizontal sweep circuit comprising:
a sawtooth signal generator;
an amplitude filter having an input receiving a composite video signal and having an output;
a sync-signal separating circuit having an input coupled to said amplitude filter output and having an output;
a frequency/phase comparator having a first input coupled to said separating circuit output, a second input receiving said sawtooth signal and an output for controlling said generator; and
a control circuit responsive to said sawtooth signal for inhibiting operation of said amplitude filter and/or said sync-signal separating circuit when said sawtooth signal is within predetermined signal level ranges about the upper and lower inversion point of said sawtooth signal.
6. An integrated circuit in accordance with claim 5 wherein:
said generator comprises a capacitor, circuit means for charging and discharging said capacitor and a first threshold circuit controlling said circuit means in response to said sawtooth signal reaching a first level corresponding to said first inversion point and a second level corresponding to said second inversion point.
Description:
BACKGROUND OF THE INVENTION The invention relates to an integrated circuit for (color) television receivers, comprising a voltage- or current-controlled horizontal-sweep generator, an amplitude filter, a synchronizing signal separating circuit (sync-separator) and a frequency/phase comparator which serves to synchronize the horizontal sweep generator which is a sawtooth generator consisting of a single capacitor and of a first threshold stage having two fixed switching thresholds, cf. preamble of the patent claim. Such types of integrated circuits, for example, are known from the technical journal "Elektronik aktuell", 1976, No. 2, pp. 7 to 14 where they are referred to as TDA 9400 and TDA 9500.
Especially on account of the fact that the amplitude filter as well as the horizontal sweep generator in the form of the aforementioned sawtooth generator, are integrated on a single semiconductor body, it is likely that noise interference pulses coming from the individual stages, and via the supply voltage line, may have a disturbing influence upon the horizontal sweep generator, i.e. upon the threshold stage thereof, in such a way that either the lower or the upper or successively both switching thresholds are exceeded before the time by the voltage at the capacitor, owing to the noise superposition, so that the generator will show to have a "wrong" frequency or phase position. This frequency/phase variation, of course, is compensated for by the circuit, with the aid of the synchronzing pulses, but only in such a way that the noise effect remains visible in the television picture.
SUMMARY OF THE INVENTION
The invention is characterized in the claim is aimed at overcoming this drawback by solving the problem of designing an integrated circuit of the type described in greater detail hereinbefore, in such a way that noise pulses acting upon the capacitor voltage or the internal reference voltages for the switching thresholds (see below) in the proximity of the two switching thresholds, are prevented from having the described disadvantageous effect. Accordingly, an advantage of the invention results directly from solving the given problem.
Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description of the preferred embodiment, the appended claims and the accompanying drawing in which:
BRIEF DESCRIPTION OF THE INVENTION
The invention will now be described in greater detail with reference to the accompanying drawing. This drawing, in the form of a schematical circuit diagram, shows the construction of an integrated circuit according to the invention.
DETAILED DESCRIPTION OF THE INVENTION
T
Now, for the purpose of avoiding the aforementioned drawbacks, there is provided a second and a third threshold stage circuit SS2 and SS3, respectively, as well as the pulse shaper circuit IF. To the respective input of the two threshold stage circuits SS2, SS3, there is applied the capacitor voltage, in the form of the sawtooth signal, and these stages have a threshold voltage which, approximately 2 μs prior to the reaching of the upper or the lower peak value of the sawtooth voltage, is being passed thereby. This means to imply that the threshold voltage of the second threshold stage circuit SS2 is somewhat lower than the voltage of the upper threshold of the first threshold stage circuit SS1, and that the threshold voltage of the third threshold stage circuit SS3 is somewhat higher than the voltage of the lower threshold of the first threshold stage circuit SS1. The two thresholds of the threshold stage circuits SS2, SS3 can thus be realized in a simple way by providing further tapping points at the voltage divider P, as is shown in the accompanying drawing. Thus, the second threshold stage circuit SS2 is provided for at a voltage divider tapping point below the tapping point chosen for the upper threshold, and the tapping point for the third threshold stage circuit SS3 is provided for above the tapping point which has been chosen for the lower threshold of the first threshold stage circuit SS1.
Since, within the area of the lower inversion point of the sawtooth signal there results an excessively wide output pulse of the third threshold stage circuit SS3, the pulse shaper circuit IF is arranged subsequently thereto, for reducing the duration of the output pulse as applied to its input, to about the duration of the output pulse of the second threshold stage circuit SS2. This pulse shaper circuit IF, for example, may be realized by a monoflop, in particular by a digital monoflop (=monostable circuit).
The output pulses of the second threshold stage circuit SS2 and of the pulse shaper circuit IF are then super-positioned linearly, with this being denoted in the drawing by a simple interconnection of the two respective lines. The combined signal is applied to the input of the stopper circuit (blocking stage) SP, to the signal input of which there is fed the composite video signal BAS, and the output thereof controls both the amplitude filter AS and the synchronizing signal separating circuit SA.
The combined signal may also be used to control a clamping circuit applying the operating points of the amplitude filter AS and/or of the sync-signal-separating circuit SA to such a potential which prevents it from operating.
If now the sawtooth signal reaches the range of its upper or its lower inversion point, the composite video signal BAS is not applied to either the amplitude filter AS or the sync-signal separating circuit SA, so that shortly before and shortly after the inversion points, signals are prevented from being processed in the two stages AS, SA. This, in turn, has the consequence that during these times noise pulses are prevented from superimposing upon the operating voltage U, so that there is also prevented an unintended triggering of the first threshold stage circuit SS1.
Moreover, it is still shown in the drawing that the amplitude filter AS, the sync-signal separating circuit SA and the frequency/phase comparator FP are arranged in series in terms of signal flow, with the latter, in addition, receiving the sawtooth signal, and with the output signal thereof acting upon the two current sources in a regulating sense. In the drawing, this is indicated by the setting arrows at the two current sources.
While the present invention has been disclosed in connection with the preferred embodiment thereof, it should be understood that there may be other embodiments which fall within the spirit and scope of the invention as defined by the following claims.
ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20 INTEGRAL THYRISTOR-RECTIFIER DEVICE:A
semiconductor switching device comprising a silicon controlled
rectifier (SCR) and a diode rectifier integrally connected in parallel
with the SCR in a single semiconductor body. The device is of the NPNP
or PNPN type, having gate, cathode, and anode electrodes. A portion of
each intermediate N and P region makes ohmic contact to the
respective anode or cathode electrode of the SCR. In addition, each
intermediate region includes a highly conductive edge portion. These
portions are spaced from the adjacent external regions by relatively
low conductive portions, and limit the conduction of the diode
rectifier to the periphery of the device. A profile of gold
recombination centers further electrically isolates the central SCR
portion from the peripheral diode portion.
That class of thyristors known as controlled rectifiers are semiconductor switches having four semiconducting regions of alternate conductivity and which employ anode, cathode, and gate electrodes. These devices are usually fabricated from silicon. In its normal state, the silicon controlled rectifier (SCR) is non-conductive until an appropriate voltage or current pulse is applied to the gate electrode, at which point current flows from the anode to the cathode and delivers power to a load circuit. If the SCR is reverse biased, it is non-conductive, and cannot be turned on by a gating signal. Once conduction starts, the gate loses control and current flows from the anode to the cathode until it drops below a certain value (called the holding current), at which point the SCR turns off and the gate electrode regains control. The SCR is thus a solid state device capable of performing the circuit function of a thyratron tube in many electronic applications. In some of these applications, such as in automobile ignition systems and horizontal deflection circuits in television receivers, it is necessary to connect a separate rectifier diode in parallel with the SCR. See, for example, W. Dietz, U. S. Pat. Nos. 3,452,244 and 3,449,623. In these applications, the anode of the rectifier diode is connected to the cathode of the SCR, and the cathode of the rectifier is connected to the SCR anode. Thus, the rectifier diode will be forward biased and current will flow through it when the SCR is reverse biased; i.e., when the SCR cathode is positive with respect to its anode. For reasons of economy and ease of handling, it would be preferable if the circuit function of the SCR and the associated diode rectifier could be combined in a single device, so that instead of requiring two devices and five electrical connections, one device and three electrical connections are all that would be necessary. In fact, because of the semiconductor profile employed, many SCR's of the shorted emitter variety inherently function as a diode rectifier when reverse biased. However, the diode rectifier function of such devices is not isolated from the controlled rectifier portion, thus preventing a rapid transition from one function to the other. Therefore, it would be desirable to physically and electrically isolate the diode rectifier portion from that portion of the device which functions as an SCR.
ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20
THE ITT THYRISTOR BASE HORIZONTAL DEFLECTION TIMEBASE CIRCUIT:
ation
in the ITT circuit. however is the use of thyristors in the line
timebase (see Fig. 3). This type of circuit was originated by RCA in
America and has been successfully used in over half a million RCA colour
sets since 1968. The great advantages of the circuit are its relative
simplicity (for a 110° timebase), its efficiency and reliability
thyristors as used in this circuit are immune to picture tube flashover
and to almost any fault condition which might occur (such as
short-circuited scan coils). Receiver manufacturers are thus faced with
two basic alternatives and the final decision will take into account
simplicity, reliability and cost. At first sight the ITT circuit appears
to be the more attractive proposition but it must be pointed out that
the narrow - neck tube is not entirely proven and due to the
miniaturisation of the electron -gun assembly there may be cause to
suspect its reliability. Nonetheless it seems likely that thyristors
will be widely used in both colour and monochrome timebases in the years
to come so it is worthwhile understanding how they work.
ITT Basic Thyristor Operation: It may be helpful to consider the relay analogy shown in Fig. 2(a). The relay contains two coils A and B arranged so that passing a current through either coil causes the relay contacts to make. Assuming that the contacts are initially open, what happens if we briefly close switch S? A current passes through coil A and the relay contacts close, thus causing a current to flow through coil B since this is now also connected across the supply. Subsequently even if the current through coil A ceases to flow (S open again) the relay contacts will remain closed by virtue of the current through coil B. The relay is then said to be latched on and can only be turned off by removing the current source completely. In terms of a "black box" with three terminals x, y and z therefore we can say that the characteristics of the device are as follows : if a transitory current of sufficient magnitude and duration is passed from x to z then a flow of con- tinuous current will be initiated between y and z and this current will continue to flow for as long as the current source remains connected to the device. With a little elaboration this defining condition applies equally well to a thyristor Fig. 2(b). The thyristor has three connections, anode, cathode and gate, and application of a pulse to the latter initiates conduction through the device.
ITT Simplified Circuit:
Let us look then at the thyristor line timebase circuit shown in simplified form in Fig. 4. As scanning is a
continuous
process we cannot take a certain moment in time and say "this is where
the scan starts." Instead we must break in at a suitable point-say time
t2 during the waveform of the current through the scan coils shown in
Fig. 5. At this point-and you will have to take my word for it! -which
is of course roughly the centre of the line the top end of C4 is
positively charged with respect to earth and current has just been
passed into the gate of SCR2 from T1 via Cl and L2. SCR2 is thus
triggered into its latched on condition and current flows from C4
through SCR2 and through the scan coils. C4 is sufficiently large to
provide a constant current, thereby producing a linear ramp current
waveform, for the necessary length of time - t2 to t3.At a point in time slightly before t3 SCR1 is triggered by a pulse from the line oscillator and suddenly drags current through Ll and C3 from the righthand half of the circuit. The current in LI and C3 builds up in the form of a half-sinewave pulse (known as the commutating pulse) which results in SCR2 being briefly reverse biased. The excess reverse voltage at this instant is conducted to earth by D2. SCR2 however is switched off by the commutating pulse and is unable to pass further current until the next trigger pulse arrives at its gate terminal. We are thus left with a large amount of stored energy in the scan coils (at t3) for which a discharge path must be found. SCR1 remains switched on after the commutating pulse has occurred, so the scan -coil current flows through LI, C3 and SCR1 (from t3 to t4). C3 charges during this process, and when the current supplied by the scan coils is zejo (at time t4) SCR1 unlatches and switches off. C3 however has stored sufficient energy to pass a reverse current to the scan coils through D1 for the remainder of the flyback period (t4 to t5). At t5 the charge stored in C3 is exhausted but the scan coils now have considerable stored energy for which a discharge path must again be found-in this case D2. When the current in the scan coils has decayed to zero at t6 C4 is once again charged and the circuit is ready to repeat its cycle. Energy to replenish the current reserves of the circuit is drawn via Tl from the h.t. dine. The secondary winding of T1 is connected through a pulse shaping network (CI, L2 and R1) arranged so that SCR2 is triggered by application of a pulse to its gate at times :2, t6 etc. This pulse is required at approximately the instant that the circuit draws current through the primary of Tl. The function of C2 has not so far been mentioned : it serves only to speed up the flyback. It should also be noted that CS diverts a proportion of the scanning power into the primary of the transformer T2 from which are derived various high voltages including the e.h.t. We thus have a very simple and elegant circuit. The principle of operation may at first sight seem to be exceedingly complicated but it is hoped that the reader will have gained from this admittedly simplified explanation a reasonable understanding of what happens.
Full Circuit:
We must return now to the complete ITT line output circuit (Fig. 3). The principles as outlined for the simplified circuit just described are still valid although the complete circuit is inevitably more complicated. In addition to the basic thyristor timebase, width stabilisation (Tr3, Tr4 and the transductor Tdl) and East-West pincushion correction (Tr2 and transductor Td2) are incorporated. Let us look first at the pincushion correction system.
ITT Pincushion Correction:A typical 90° pincushion correction circuit is shown in Fig. 6. The heart of the circuit is the transductor which is a special type of transformer with three windings. A current passing through winding AB increases the saturation of the ferrite core of the transductor and thus influences the effective impedance of the windings CD and EF. Similarly a current through CD and EF alters the impedance of winding AB. The component acts as a bidirectional modulator. By suitable shaping of the modulation waveforms (this is the function of the phase and amplitude controls) it is possible to apply pincushion correction to the raster. Looking at the raster as you would at a map, modu- lation of the vertical scan at line rate produces North - South (or top -to -bottom if you prefer) pincushion correction while modulation of the line waveform at field rate gives East-West (side -to -side) pincushion correction. Electronic correction of the raster is necessary because we are not able in a colour receiver to use correction magnets-any stray magnetic fields around the neck of the tube make convergence and purity adjustments difficult if not impossible. Now the arrangement just described only just works with a 90° tube: with a 110° tube it is not possible to use the circuit at all. Instead separate circuits for N -S and E -W pincushion correction are required. In Fig. 3 the base of Tr2 is fed with a parabolic waveform derived from the field timebase. The amplitude of the applied waveform is set by R26 and an amplified version of the waveform is developed at the collector of Tr2. The transductor Td2 has three windings: one forms the collector load of Tr2 while the other two are connected across the primary winding of T2 which is itself in parallel with the scan coil circuitry. Thus the collector current of Tr2 modulates the line scan current to some extent and E -W pincushion correction is thereby obtained. N -S correction is incorporated as a separate circuit in the vertical timebase.
ITT Width Stabilisation :
The use of another
transductor Tdl to obtain line output stabilisation is interesting.
Information concerning h.t. voltage, scanning and e.h.t. current is
obtained by the circuitry surrounding Tr3 and Tr4. After amplification
by Tr4 a direct current which is inversely proportional to timebase
loading is passed through the primary winding of transductor Tdl. When
the timebase loading increases (due perhaps to increased beam current in
the c.r.t.) the current through the primary of Tdl decreases thus
reducing the core saturation of the transductor. The impedance of the
transductor's secondary windings-which are effectively in parallel with
Tl-thereby increases; T1 is in consequence less damped and the timebase
efficiency increases to offset the change in loading. Stabilisation of
width and e.h.t. is thus possible. The circuit is however rather more
complicated than the good old v.d.r. method as applied to valve line
output stages. Such is progress! Finally it should be mentioned that one
of the secondary windings (h -k) of T2 develops an 8.5kV flyback pulse
which is rectified to provide the focus potential and tripled to give
the 25kV e.h.t. The first anode voltage for the tube is obtained by
rectification from a tap (i) on this winding.Future Production:
The full-scale production date of this type of circuitry? Probably 1973 at the earliest, so there is
plenty
of time to get to understand how it works. Keen constructors may be
interested in experimenting with parts of the circuit in which case
further details may have been obtained from ITT Semiconductors in that
era of time,ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20 Horizontal deflection circuit with Thyristors.(ZEILEN ABLENKUNG MIT THYRISTOR SCHALTUNG).
Description:
1.
A horizontal deflection circuit for generating the deflection current
in the deflection coil of a television picture tube wherein a first
switch controls the horizontal sweep, and wherein a second switch in a
so-called commutation circuit with a commutating inductor and a
commutating capacitor opens the first switch and, in addition, controls
the energy transfer from a dc voltage source to an input inductor,
characterized in that the input inductor (Le) and the commutating
inductor (Lk) are combined in a unit designed as a transformer (U) which
is proportioned so that the open-circuit inductance of the
transformer is essentially equal to the value of the input inductor
(Le), while the short-circuit inductance of the transformer (U) is
essentially equal to the value of the commutating inductor (Lk), and
that the second switch (S2) is connected in series with the dc voltage
source (UB) and a first winding (U1) of the transformer (U). 2. A
horizontal deflection circuit according to claim 1, characterized in
that the transformer (U) operates as an isolation transformer between
the supply (UB) and the subcircuits connected to a second winding. 3. A
horizontal deflection circuit according to claim 1, characterized in
that the second switch (S2) is connected between ground and that
terminal of the first winding (U1) of the transformer (U) not connected
to the supply potential (+UB). 4.
Description:
The present invention relates to a horizontal deflection circuit for
generating the deflection current in the deflection coil of a
television picture tube wherein a first switch controls the horizontal
sweep, and wherein a second switch in a so-called commutation circuit
with a commutating inductor and a commutating capacitor opens the
first switch and, in addition, controls the energy transfer from a dc
voltage source to an input inductor.German Auslegeschrift (DT-AS) No. 1,537,308 discloses a horizontal deflection circuit in which, for generating a periodic sawtooth current within the respective deflection coil of the picture tube, in a first branch circuit, the deflection coil is connected to a sufficiently large capacitor serving as a current source via a first controlled, bilaterally conductive switch which is formed by a controlled rectifier and a diode connected in inverse parallel. The control electrode of the rectifier is connected to a drive pulse source which renders the switch conductive during part of the sawtooth trace period. In that arrangement, the sawtooth retrace, i.e. the current reversal, also referred to as "commutation", is initiated by a second controlled switch.
As can be seen, such a circuit needs two different, separate inductive elements, it being known that inductive elements are expensive to manufacture and always have a certain volume determined by the electrical properties required.
The object of the invention is to reduce the amount of inductive elements required.
The invention is characterized in that the input inductor and the commutating inductor are combined in a unit designed as a transformer which is proportioned so that the open-circuit inductance of the transformer is essentially equal to the value of the input inductor, while the short-circuit inductance of the transformer is essentially equal to the value of the commutating inductor, and that the second switch is connected in series with the dc voltage source and a first winding of the transformer.
This solution has an added advantage in that, in mass production, both the open-circuit and the short-circuit inductance are reproducible with reliability.
According to another feature of the invention, the electrical isolation between the windings of the transformer is such that the transformer operates as an isolation transformer between the supply and the subcircuits connected to a second winding or to additional windings of the transformer. In this manner, the transformer additionally provides reliable mains isolation.
According to a further feature of the invention, the second switch is connected between ground and that terminal of the first winding of the transformer not connected to the supply potential. This simplifies the control of the switch.
According to a further feature of the invention, to regulate the energy supply, the second winding of the transformer is connected in series with the first switch, the commutating capacitor, and a third, bipolar switch controllable as a function of the value of a controlled variable developed in the deflection circuit.
The advantage gained by this measure lies in the fact that the control takes place on the side separated from the mains, so no separate isolation device is required for the gating of the third switch. Further details and advantages will be apparent from the following description of the accompanying drawings and from the claims. In the drawings,
FIG. 1 is a basic circuit diagram of the arrangement disclosed in German Auslegeschrift (DT-AS) No. 1,537,308;
FIG. 2 shows a first embodiment of the horizontal deflection circuit according to the invention, and
FIG. 3 shows a development of the horizontal deflection circuit according to the invention.
FIG. 1 shows the essential circuit elements of the horizontal deflection circuit known from the German Auslegeschrift (DT-AS) No. 1,537,308 referred to by way of introduction.
Connected in series with a dc voltage source UB is an input inductor Le and a bipolar, controlled switch S2. In the following, this switch will be referred to as the "second switch"; it is usually called the "commutating switch" to indicate its function.
In known circuits, the second switch S2 consists of a controlled rectifier and a diode connected in inverse parallel.
The second switch S2 also forms part of a second circuit which contains, in addition, a commutating inductor Lk, a commutating capacitor Ck, and a first switch S1. The first switch S1, controlling the horizontal sweep, is constructed in the same manner as the above-described second switch S2, consisting of a controlled rectifier and a diode in inverse parallel. Connected in parallel with this first switch is a deflection-coil arrangement AS with a capacitor CA as well as a high voltage generating arrangement (not shown). In FIGS. 1, 2, and 3, this arrangement is only indicated by an arrow and by the reference characters Hsp. The operation of this known horizontal deflection circuit need not be explained here in detail since it is described not only in the German Auslegeschrift referred to by way of introduction, but also in many other publications.
FIGS. 2 and 3 show the horizontal deflection circuit modified in accordance with the present invention. Like circuit elements are designated by the same reference characters as in FIG. 1.
FIG. 2 shows the basic principle of the inven
tion. The two inductors Le and Lk of FIG. 1 have been replaced by a transformer U. To be able to serve as a substitute for the two inductors Le and Lk, the transformer must be proportioned in a special manner. Regardless of the turns ratio, the open-circuit inductance of the transformer is chosen to be essentially equal to the value of the input inductor Le, and the short-circuit inductance of the transformer is essentially equal to the value of the commutating inductor Lk.
To permit the second switch S2 to be utilized for the connection of the dc voltage source UB, it is included in the circuit of that winding U1 of the transformer connected to the dc voltage UB.
In principle, it is of no consequence for the operation of the switch S2 whether it is inserted on that side of the winding U1 connected to the positive operating potential +UB or on the side connected to ground. In practice, however, the solution shown in FIGS. 2 and 3 will be chosen since the gating of the controlled rectifier is less problematic in this case.
In compliance with pertinent safety regulations, the transformer U may be designed as an isolation transformer and can thus provide mains separation, which is necessary for various reasons. It is known from German Offenlegungschrift (DT-OS) No. 2,233,249 to provide dc isolation by designing the commutating inductor as a transformer, but this measure is not suited to attaining the object of the present invention.
If the energy to be taken from the dc voltage source is to be controlled as a function of the energy needed in the horizontal deflection circuit and in following subcircuits, the embodiment of the horizontal deflection circuit of FIG. 3 may be used.
The circuit including the winding U2 of the transformer U contains a third controlled switch S3, which, too, is inserted on the grounded side of the winding U2 for the reasons mentioned above. This third switch S3, just as the second switch S2, is operated at the frequency of a horizontal oscillator HO, but a control circuit RS whose input l is fed with a controlled variable is inserted between the oscillator and the switch S3. Depending on this controlled variable, the controlled rectifier of the third switch S3 can be caused to turn on earlier. A suitable controlled variable containing information on the energy consumption is, for example, the flyback pulse capable of being taken from the high voltage generating circuit (not shown). Details of the operation of this kind of energy control are described in applicant's German Offenlegungsschrift (DT-OS) No. b 2,253,386 and do not form part of the present invention.
With mains isolation, the additional, third switch S3 shown here has the advantage of being on the side isolated from the mains and eliminates the need for an isolation device in the control lead of the controlled rectifier.
As an isolation transformer, the transformer U may also carry additional windings U3 and U4 if power is to be supplied to the audio output stage, for example; in addition, the first switch S1 may be gated via such an additional winding.
The points marked at the windings U1 and U2 indicate the phase relationship between the respective voltages. Connected in parallel with the winding U1 and the second switch S2 is a capacitor CE which completes the circuit for the horizontal-frequency alternating current; this serves in particular to bypass the dc voltage source or the electrolytic capacitors contained therein.
If required, a well-known tuning coil may be inserted, e.g. in series with the second winding U2, without changing the basic operation of the horizontal deflection circuit according to the invention.
ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20 Electron beam deflection circuit including thyristors Further Discussion and deepening of knowledge, Thyristor horizontal output circuits:
1. An electron beam deflection circuit for a cathode ray tube with electromagnetic deflection by means of a sawtooth current waveform having a trace portion and a retrace portion, said circuit comprising: a deflection winding; a first source of electrical energy formed by a first capacitor; first controllable switching means comprising a parallel combination of a first thyristor and a first diode connected together to conduct in opposite directions, for connecting said winding to said first source during said trace portion, while said first switching means is turned on; a second source of electrical energy including a first inductive energy storage means coupled to a voltage supply; reactive circuit means including a combination of inductive and capacitive reactances for storing the energy supplied by said second source; second controllable switching means, substantially similar to said first one, for completing a circuit including said reactive circuit means and said first switching means, when turned on before the end of said trace portion, so as to pass through said first switching means an oscillatory current in opposite direction to that which passes through said first thyristor from said first source and to turn said first thyristor off after these two currents cancel out, the oscillatory current flowing thereafter through said first diode for an interval
termed the circuit turn-off time, which has to be greater than the turn-off time of said first thyristor; wherein the improvement comprises: means for drawing, during at least a part of said trace portion, a substantial amount of additional current through said first switching means, in the direction of conduction of said first diode, whereby to perceptibly shift the waveform of the current flowing through said first switching means towards the negative values by an amount equal to that of said substantial additional current and to lengthen, in proportion thereto, said circuit turn-off time, without altering the values of the reactances in the reactive circuit which intervene in the determination of both the circuit turn-off and retrace portion time intervals.
2. A deflection circuit as claimed in claim 1, wherein said amount of additional current is greater than or equal to 5 per cent of the peak-to-peak value of the current flowing through the deflection winding.
3. A deflection circuit as claimed in claim 1, wherein said means for drawing a substantial amount of additional current through said first switching means comprises a resistor connected in parallel to said first capacitor.
4. A deflection circuit as claimed in claim 1, wherein said means for drawing an additional current is formed by connecting said first and second energy sources in series so that the current charging said reactive circuit means forms the said additional current.
The present invention relates to electron beam deflection circuits
including thyristors, such as silicon controlled rectifiers and relates,
in particular, to horizontal deflection circuits for television
receivers.
The
present invention constitutes an improvement in the circuit described
in U.S. Pat. No. 3,449,623 filed on Sept. 6, 1966, this circuit being
described in greater detail below with reference to FIGS. 1 and 2 of
the accompanying drawings. A deflection circuit of this type comprises
a first thyristor switch which allows the conenction of the
horizontal deflection winding to a constant voltage source during the
time interval used for the transmisstion of the picture signal and for
applying this signal to the grid of the cathode ray tube (this
interval will be termed the "trace portion" of the scan), and a second
thyristor switch which provides the forced commutation of the first
one by applying to it a reverse current of equal amplitude to that
which passes through it from the said voltage source and thus to
initiate the retrace during the horizontal blanking interval.
A undirectional reverse blocking triode type thyristor or silicon controlled rectifier (SCR), such as that used in the aformentioned circuit, requires a certain turn-off time between the instant at which the anode current ceases and the instant at which a positive bias may be applied to it without turning it on, due to the fact that there is still a high concentration of free carriers in the vicinity of the middle junction, this concentration being reduced by a process of recombination independently from the reverse polarity applied to the thyristor. This turn-off time of the thyristor is a function of a number of parameters such as the junction temperature, the DC current level, the decay time of the direct current, the peak level of the reverse current applied, the amplitude of the reverse anode to cathode voltage, the external impedance of the gate electrode, and so on, certain of these varying considerably from one thyristor to another.
In
horizontal deflection circuits for television receivers, the flyback
or retrace time is limited to approximately 20 percent of the
horizontal scan period, the retrace time being in the case of the CCIR
standard of 625 lines, approximately 12 microseconds and, in the case
of the French standard of 819 lines, approximately 9 microseconds.
During this relatively short interval, the thyristor has to be rendered
non-conducting and the electron beam has to be returned to the origin
of the scan. The first thyristor is blocked by means of a series
resonant LC circuit which is subject to a certain number of
restrictions (limitations as to the component values employed) due to
the fact that, inter alia, it simultaneously determines the turn-off
time of the circuit which blocks the thyristor and it forms part of the
series resonant circuit which is to carry out the retrace. To obtain
proper operation of the deflection circuit of the aforementioned
Patent, especially when used for the French standard of 819 lines per
image, the values of the components used have to subject to very close
tolerances (approximately 2%), which results in high costs.
The improved deflection circuit, object of the present invention, allows the lengthening of the turn-off time of the circuit for turning the scan thyristor off, without altering the values of the LC circuit, which are determined by other criteria, and without impairing the operation of the circuit.
According to the invention, there is provided an electron beam
deflection circuit for a cathode ray tube with electromagentic
deflection by means of a sawtooth current waveform having a trace
portion and a retrace portion, said circuit comprising: a deflection
winding; a first source of electrical energy formed by a first
capacitor; first controllable switching means comprising a parallel
combination of a first thyristor and a first diode, connected together
to conduct in opposite directions, for connecting said winding to said
first source during said trace portion when said first switching
means is turned on;
a second source of electrical energy including a first inductive
energy storage means coupled to a voltage supply; reactive circuit
means including a combination of inductive and capacitive reactances
for storing the energy supplied by the said second source; a second
controllable switching means, substantially identical with the first
one, for completing a circuit including said reactive circuit means and
said first switching means, when turned on, so as to pass through
said first thyristor an oscillatory current in the opposite direction
to that which passes through it from said first source and to turn it
off after these two currents cancel out, the oscillatory current then
flowing through said first diode for an interval termed the circuit
turn-off time which has to be greater than the turn-off time of said
first thyristor; and means for drawing duing at least a part of said
trace portion a substantial amount of additional current from said
first switching means in the direction of conduction of said first
diode, whereby said circuit turn-off time is lengthened in proportion to
the amount of said additional current, without altering the values of
the reactances in the reactive circuit by shifting the waveform of
the current flowing through said first switching means towards the
negative by an amount equal to that of said additional current.
A further object of the invention consists in using the supplementary current in the recovery diode of the first switching means to produce a DC voltage which may be used as a power supply for the vertical deflection circuit of the television receiver, for example.
The invention will be better understood and other features and advantages thereof will become apparent from the following description and the accompanying drawings, given by way of example, and in which:
FIG. 1 is a schematic circuit diagram partially in bloc diagram form of a prior art deflection circuit according to the aforementioned Patent;
FIG. 2 shows waveforms of currents and voltages generated at various points in the circuit of FIG. 1;
FIG. 3 is a schematic diagram of a deflection circuit according to the invention which allows the principle of the improvement to be explained;
FIG. 4 is a diagram of the waveforms of the current through the first switching means 4, 5 of the circuit of FIG. 3;
FIG. 5 is a circuit diagram of another embodiment of the circuit according to the invention;
FIG. 6 is a schematic representation of the preferred embodiment of the circuit according to the invention; and
FIG. 7 shows voltage waveforms at various points of the high voltage autotransformer 21 of FIG. 6.
In all these Figures the same reference numerals refer to the same components.
FIG.
1 shows the horizontal deflection circuit described and claimed in
the U.S. Pat. No. 3,449,623 mentioned above, which comprises a first
source of electrical energy in the shape of a first capacitor 2 having a
high capacitance C 2 for supplying a substantially constant voltage Uc 2
across its terminals. A first terminal of the first capacitor 2 is
connected to ground, whilst its second terminal which supplies a
positive voltage is connected to one of the terminals of a horizontal
deflection winding shown as a first inductance 1. A first switching
means 3, consisting of a first reverse blocking triode thyristor 4 (SCR)
and a first recovery diode 5 in parallel, the two being
interconnected to conduct current in opposite directions, is connected
in parallel with the series combination formed by the deflection
winding 1 and the first capacitor 2. The assembly of components 1, 2, 4
and 5 forms the final stage of the horizontal deflection circuit in a
television receiver using electromagnetic delfection.
The deflection circuit also includes a drive stage for this final stage which here controls the turning off of the first thyristor 4 to produce the retrace or fly-back portion of the scan during the line-blanking intervals i.e. while the picture signal is not transmitted. This driver stage comprises a second voltage source in the shape of a DC power supply 6 which delivers a constant high voltage E. The negative terminal of the power supply 6 is connected to ground and its positive terminal to one of the terminals of a second inductance 7 of relatively high value, which draws a substantially lineraly varying current from the power supply 6 to avoid its overloading. The other terminal of the second inductance 7 is connected, on the one hand, to the junction of the deflection winding 1 and the first switching means 3 by means of a second inductance 8 and a second capacitor 9 in series and, on the other hand, to one of the terminals of a second controllable bi-directionally conducting switching means 10, similar to the first one 3, including a parallel combination of a second thyristor 11 and a second recovery diode 12 al
so arranged to conduct in opposite directions.
The respective values of the third inductance 8 (L 8 ) and of the second capacitor 9 (C 9 ) are principally selected so that, on the one hand, one half-cycle of oscillation of the first series resonant circuit L 8 - C 9 , (i.e. π √ L 8 . C 9 ) is longer than the turn-off time of the first thyristor 4, but still is as short as possible since this time interval determines the speed of the commutation of the thyristor 4, and, on the other hand, one half-cycle of oscillation of another series resonant circuit formed by L 1 , L 8 and C 9 , i.e. π √ (L 1 + L 8 ) . C 9 , is substantially equal to the required retrace time interval (i.e. shorter than the horizontal blanking interval).
The gate (control electrode) of the second thyristor 11 is coupled to the output of the horizontal oscillator 13 of the television receiver by means of a first pulse transformer 14 and a first pulse shaping circuit 15 so that it is fed short triggering pulses which are to turn it on.
The gate of the first thyristor 4 fed with signals of a substantially rectangular waveform which are negative during the horizontal blanking intervals, is coupled to a winding 16 by means of a second pulse shaping circuit 17, the winding 16 being magnetically coupled to the second inductance 7 to make up the secondary winding of a transformer of which the inductance 7 forms the primary winding. It will be noted here that it is also possible to couple the secondary winding 16 magnetically to a primary winding connected to a suitable output (not shown) of the horizontal oscillator 13.
The operation of a circuit of this type will be explained below with reference to FIG. 2 which shows the waveforms at various points in the circuit of FIG. 1 during approximately one line period.
FIG. 2 is not to scale since one line period (t 7 - t 0 )
is equal to 64 microseconds in the case of 625 lines and 49
microseconds in the case of 819 lines, while the durations of the
respective horizontal blanking intervals are approximately 12 and 9.5
microseconds.
Waveform A shows the form of the current i L1 passing through deflection winding 1, this current having a sawtooth waveform substantially linear from t 0 to t 3 and from t 5 to t 7 , and crossing zero at time instants t 0 and t 7 , and reaching values of + I 1m and - I 1m , at time instants t 3 and t 5 respectively, these being its maximum positive and negative amplitudes.
During the second half of the trace portion of the horizontal deflection cycle, that is to say from t 0 to t 3 , the thyristor 4 of the first switching means 3 is conductive and makes the high value capacitor 2 discharge through the deflector winding 1, which has a high inductance, so that current i L1 increases linearly.
A few microseconds (5 to 8 μ s) before the end of the trace portion, i.e. at time instant t 1 , the trigger of the second thyristor 11 receives a short voltage pulse V G11 which causes it to turn on as its anode is at this instant at a positive potential with respect to ground, which is due to the charging of the second capacitor 9 through inductances 7 and 8 by the voltage E from the power supply 6.
When thyristor 11 is made conductive at time t 1 , on the
one hand, inductance 7 is connected between ground and the voltage
source 6 and a linearly increasing current flows through it and, on
the other hand, the reactive circuit 8, 9 forms a loop through the
second and first switching means 10 and 3, thus forming a resonant
circuit which draws an oscillatory current i 8 ,9 of frequency ##EQU1##
T
his oscillatory current i 8 ,9 will pass through the first switching means 3, i.e. thyristor 4 and diode 5, in the opposite direction to that of current i L1 . Since the frequency f 1 is high, current i 8 ,9 will increase more rapidly than i L1 and will reach the same level at time t 2 , that is to say i 8 ,9 (t 2 ) = -i L1 (t 2 )
and these currents will cancel out in the thyristor 4 in accordance
with the well known principle of forced commutation. After time instant
t 2 , current i 8 ,9 continues to increase more rapidly than i L1 , but the difference between them (i 8 ,9 - i L1 ) passes the diode 5 (see wave form B) until it becomes zero at time instant t 3 which is the turn off time instant of the first switching means 3, at which the retrace begins.
The interval between the time instant t 2 and t 3 , i.e. (t 3 -t 2 ), during which diode 5 is conductive and the thyristor is reverse biased will be termed in what follows the circuit turn-off time and it should be greater than the turn-off time of the thyristor 4 itself since the latter will subsequently become foward biased (i.e. from t 3 to t 5 ) by the retrace or flyback pulse (see waveform E) which should not trigger it.
At time instant t 3 , the switching means 3 is opened (i 4 and i 5 are both zero -- see waveforms B and C) and the reactive circuit 8, 9 forms a loop through capacitor 2 and the deflection coil 1 and thus a series resonant circuit including (L 1 + L 8 ) and C 9 , C 2 being of high value and representing a short circuit for the flyback frequency ##EQU2## thus obtained.
The retrace which stated at time t 3 takes place during one half-cycle of the resonant circuit formed by reactances L 1 , L 8 and C 9 , i.e. during the interval between t 3 and t 5 . In the middle of this interval i.e. at time instant t 4 , both i L1 (waveform A) and i 8 ,9 (waveform D) pass through zero and change their sign, whereas the voltage at the terminals of the first switching means 3 (V 3 , waveform E) passes through a maximum. Thus, from t 4 onwards, thyristor 11 will be reverse biased and diode 12 will conduct the current from the resonant circuit 1, 8 and 9 in order to turn the second thyristor 11 off.
At time instant t 5 , when current i L1 has reached - I 1m and when voltage v 3 falls to zero, diode 5 of the first switching means 3 becomes conductive and the trace portion of scan begins.
Current i 8 ,9 nevertheless continues to flow in the resonant circuit 8, 9 through diodes 5 and 12, which causes a break to appear in waveform D at t 5 , and a negative peak to appear in waveform D and a positive one in waveform B in the interval between t 5 and t 6 , these being principally due to the distributed capacities of coil 1 or to an eventual capacitor (not shown) connected in parallel to the first switching means 3.
At time instant t 6 , diode 12 of the second switching means 10 ceases to conduct after having allowed thyristor 11 time to become turned off completely.
T
he level of current i 8 ,9 at time instant t 5 (i.e. I c ) as well as the negative peak I D12 in i 8 ,9 and the positive peak I D5 in i 5 depend on the values of L 8 and C 9 in the same way as does the turn-off time of the circuit (t 3 - t 2 ). If, for example, L 8 and C 9 , are increased I D5 increases towards zero and this could cause diode 5 to be cut off in an undesirable fashion. I c also increases towards zero, which is liable to cause diode 12 to be blocked and thyristor 11 to trigger prematurely.
From the foregoing it can be clearly seen that the choice of values for L 8 and C 9 is subject to four limitations which prevent the values from being increased to lengthen the turn-off time of the driver circuit of first switching thyristor 4 so as to forestall its spurious triggering.
Waveform F shows the voltage v G4 obtained at the gate of thyristor 4 from the secondary winding 16 coupled to the inductor 7. This voltage is positive from t 0 to t 1 and from t 6 to t 7 and is negative between t 2 and t 6 i.e. while the second switching means 10 is conducting.
The present invention makes the lengthening of the turn-off time of thyristor 4 possible without altering the parameters of the circuit such as inductance 8 and capacitor 9.
In
the circuit shown in FIG. 3, which illustrates the principle of the
present invention, means are added to the circuit in FIG. 1 which
enable the turn-off time to be lengthened by connecting a load to
diode 5 so as to increase the current which flows through it during
the time that it is conductive. These means are here formed by a
resistor 18 connected in parallel with a capacitor 20 (which replaces
capacitor 2) which is of a higher capacitance so that, in practice, it
holds its charge during at least one half of the line period. FIG. 4,
which shows the waveform of the current in the first switching means 3
for a circuit as shown in FIG. 3, makes it possible to explain how
this lenthening of the turn-off time is achieved.
In FIG. 4, the broken lines show the waveform of the current in the first switch device 3 in the circuit of FIG. 1, this waveform being produced by adding waveforms B and C of FIG. 2. The current i 4 above the axis flows through thyristor 4 and current i 5 below the axis flows through diode 5. When the capacitance C 20 of the capacitor in series with the deflector coil is increased to some tens of microfarads (C 2 having been of the order of 1 μ F) and when there is connected in parallel with capacitor 20 a resistor 18 the value of which is calculated to draw a strong current I R18 from capacitor 20, that is to say a current at least equal to 0,1 I m (I m being of the order of some tens of amperes), current I R18 is added to that i 5 which flows through diode 5 without in any way altering the linearity of the trace portion nor the oscillatory commutation of thyristor 4 which is brought about by the resonant circuit L 8 , C 9 .
The fact of loading capacitor C 20 by means of a resistor 18 thus has the effect of permanently displacing the waveform of the current in the negative direction by I R18 . Thus, during the trace portion of the scan, the transfer of the current from the diode 5 to the thyristor 4 begins at time t 10 instead of t 0 , that is to say with a delay proportional to I R18 . The effect of the triggering pulse delivered by the horizontal oscillator (13 FIG. 1) to the second thyristor 11 at time instant t 1 , will be to start the commutation process of the first thyristor 4 when the current it draws is less by I R18 than that i 4 (t 1 ) which it would have been drawing had there been no resistor 18. Because of this, the turn-off time of the thyristor 4 proper, which as has been mentioned increases with the maximum current level passing throught it, is slightly reduced. Moreover, because the oscillatory current i 8 ,9 (FIG. 2) from circuit L 8 , C 9 which flows through thyristor 4 in the opposite direction is unchanged, it reaches a value equal to that of the current i L1 (FIG. 1) flowing in the coil 1 in a shorter time, that is to say at time t 12 . Diode 5 will thus take the oscillatory current i 8 ,9 (FIG. 2) over in advance with respect ro time instant t 2 and will conduct it until it reaches zero value at a time instant t 13 later than t 3 , the amounts of advance (t 2 - t 12 ) and delay (t 13 - t 3 ) being practically equal.
It can thus be seen in FIG. 4 that the circuit turn-off time T R of a circuit according to the invention and illustrated by FIG. 3 is distinctly longer than that T r of the circuit in FIG. 1. This increase in the turn-off time (T R - T r ) depends on the current I R18 and increases therewith.
It should be noted at this point that the current I R18 produces a voltage drop at the terminals of the resistor the only effect of which is to heat up the resistor since the level of this voltage (40 to 60 volts) does not necessarily have a suitable value to be used as a voltage supply for other circuits in an existing transistorised television receiver.
In accordance with one embodiment of the invention, illustrated in FIG. 5, an application is proposed for the additional current which is to be drawn through diode 5. In FIG. 5, the positive terminal of capacitor 20 is connected by a conductor 19 to the negative pole of the power supply 6 and the voltage at the terminals of capacitor 20 is thus added to that E from the source 6.
In the preferred embodiment of the present invention, which is shown in FIG. 6, it is possible to cause a supplementary current of a desired value to flow through the first diode 5 while obtaining a voltage which has a suitable value for use in another circuit in the television receiver.
If the voltage at the terminals of capacitor 20 in FIG. 3 is not a usable value, it is possible to connect in parallel with the series circuit comprising the deflector coil 1 and the capacitor 2 in FIG. 1, i.e. in parallel with the terminals of the first switching means 3, a series combination of an autotransformer 21 and a high value capacitor 22 (comparable with capacitor 20 in FIGS. 3 and 5). The autotransformer 21 has a tap 23 is suitably positioned between the terminal connected to capacitor 22 at the tap 24 connected to the first switching means 3. This autotransformer 21 may be formed by the one conventionally used for supplying a very high voltage to the cathode ray tube, as described for example in U.S. Pat. No. 3,452,244; such a transformer comprises a voltage step-up winding between taps 24 and 25, which latter is connected to a high voltage rectifier (not shown).
The waveform of the voltage at the various points in the
autotransformer is shown in FIG. 7, in which waveform A shows the
voltage at the terminals of capacitor 22, waveform B the voltage at tap
24 and waveform C the voltage at tap 23 of the autotransformer 21.
The voltage V c22 at the terminals of capacitor 22 varies slightly about a mean value V cm . It is increasing while diode 5 is conducting and decreasing during the conduction of the thyristor 4.
The voltage v 24 at tap 24 follows substantially the same curve as waveform E in FIG. 2, that is to say that during the retrace time interval from t 13 to t 5 to a positive pulse called the flyback pulse is produced and, during the time interval while the first switching means 3 is conducting, the voltage is zero. The mean valve of the voltage v 24 at tap 24 of the auto-transformer 21 is equal to the mean value V cm of the voltage at the terminals of capacitors 2 and 22.
Thus, there is obtained at tap 23 a waveform which is made up, during the retrace portion, of a positive pulse whose maximum amplitude is less than that of v 24 at tap 24 and, during the trace portion, of a substantially constant positive voltage, the level V of which is less than the mean value V cm of the voltage v c22 at the terminals of capacitor 22. By moving tap 23 towards terminals 24 the amplitude of the pulse during fly-back increases while voltage V falls and conversely by moving tap 23 towards capacitor 22 voltage V increases and the amplitude of the pulse drops.
In more exact terms, the voltage V at tap 23 is such that the means value of v 23 is equal to V cm . It has thus been shown that by choosing carefully the position of tape 23, a voltage V may be obtained during the trace portion of the scan, which may be of any value between V cm and zero.
This voltage V is thus obtained by periodically controlled rectification during the trace portion of the scan.
For this purpose an electronic switch is used to periodically connect the tap 23 of trnasformer winding 21 to a load.
This switch is made up of a power transistor 26 whose collector is
connected to tap 23 and the emitter to a parallel combination formed by
a high value filtering capacitor 27 and the load which it is desired
to supply, which is represented by a resistor 28. The base of the
transistor 26 receives a control voltage to block it during retrace and
to unblock it during the whole or part of the trace period. A control
voltage of this type may be obtained from a second winding 29
magnetically coupled to the inductance 7 of the deflection circuit and
it may be transmitted to the base of transistor 26 by means of a
coupling capacitor 30 and a resistor 31 connected between the base and
the emitter of transistor 26.
It may easily be seen that the DC collector/emitter current in transistor 26 flows through the first diode 5 of the first switching means 3 via a resistor 28 and the part of the winding of auto-transformer 21 located between taps 23 and 24.
Experience has shown that a circuit as shown in FIG. 6 can supply 24 volts with a current of 2 amperes to the vertical deflection circuit of the same television set, the voltage at the terminals of capacitor 22 being from 50 to 60 volts.
It should be mentioned that, when the circuit which forms the load of the controlled rectifier 26, 27 does not draw enough current to sufficiently lengthen the circuit turn-off time T R , an additional resistor (not shown) may be connected between the emitter of transistor 26 and ground or in parallel to capacitor 22, which resistor will draw the additional current required.
The
present invention constitutes an improvement in the circuit described
in U.S. Pat. No. 3,449,623 filed on Sept. 6, 1966, this circuit being
described in greater detail below with reference to FIGS. 1 and 2 of
the accompanying drawings. A deflection circuit of this type comprises
a first thyristor switch which allows the conenction of the
horizontal deflection winding to a constant voltage source during the
time interval used for the transmisstion of the picture signal and for
applying this signal to the grid of the cathode ray tube (this
interval will be termed the "trace portion" of the scan), and a second
thyristor switch which provides the forced commutation of the first
one by applying to it a reverse current of equal amplitude to that
which passes through it from the said voltage source and thus to
initiate the retrace during the horizontal blanking interval.A undirectional reverse blocking triode type thyristor or silicon controlled rectifier (SCR), such as that used in the aformentioned circuit, requires a certain turn-off time between the instant at which the anode current ceases and the instant at which a positive bias may be applied to it without turning it on, due to the fact that there is still a high concentration of free carriers in the vicinity of the middle junction, this concentration being reduced by a process of recombination independently from the reverse polarity applied to the thyristor. This turn-off time of the thyristor is a function of a number of parameters such as the junction temperature, the DC current level, the decay time of the direct current, the peak level of the reverse current applied, the amplitude of the reverse anode to cathode voltage, the external impedance of the gate electrode, and so on, certain of these varying considerably from one thyristor to another.
In
horizontal deflection circuits for television receivers, the flyback
or retrace time is limited to approximately 20 percent of the
horizontal scan period, the retrace time being in the case of the CCIR
standard of 625 lines, approximately 12 microseconds and, in the case
of the French standard of 819 lines, approximately 9 microseconds.
During this relatively short interval, the thyristor has to be rendered
non-conducting and the electron beam has to be returned to the origin
of the scan. The first thyristor is blocked by means of a series
resonant LC circuit which is subject to a certain number of
restrictions (limitations as to the component values employed) due to
the fact that, inter alia, it simultaneously determines the turn-off
time of the circuit which blocks the thyristor and it forms part of the
series resonant circuit which is to carry out the retrace. To obtain
proper operation of the deflection circuit of the aforementioned
Patent, especially when used for the French standard of 819 lines per
image, the values of the components used have to subject to very close
tolerances (approximately 2%), which results in high costs.The improved deflection circuit, object of the present invention, allows the lengthening of the turn-off time of the circuit for turning the scan thyristor off, without altering the values of the LC circuit, which are determined by other criteria, and without impairing the operation of the circuit.
A further object of the invention consists in using the supplementary current in the recovery diode of the first switching means to produce a DC voltage which may be used as a power supply for the vertical deflection circuit of the television receiver, for example.
The invention will be better understood and other features and advantages thereof will become apparent from the following description and the accompanying drawings, given by way of example, and in which:
FIG. 1 is a schematic circuit diagram partially in bloc diagram form of a prior art deflection circuit according to the aforementioned Patent;
FIG. 2 shows waveforms of currents and voltages generated at various points in the circuit of FIG. 1;FIG. 3 is a schematic diagram of a deflection circuit according to the invention which allows the principle of the improvement to be explained;
FIG. 4 is a diagram of the waveforms of the current through the first switching means 4, 5 of the circuit of FIG. 3;
FIG. 5 is a circuit diagram of another embodiment of the circuit according to the invention;
FIG. 6 is a schematic representation of the preferred embodiment of the circuit according to the invention; and
FIG. 7 shows voltage waveforms at various points of the high voltage autotransformer 21 of FIG. 6.
In all these Figures the same reference numerals refer to the same components.
FIG.
1 shows the horizontal deflection circuit described and claimed in
the U.S. Pat. No. 3,449,623 mentioned above, which comprises a first
source of electrical energy in the shape of a first capacitor 2 having a
high capacitance C 2 for supplying a substantially constant voltage Uc 2
across its terminals. A first terminal of the first capacitor 2 is
connected to ground, whilst its second terminal which supplies a
positive voltage is connected to one of the terminals of a horizontal
deflection winding shown as a first inductance 1. A first switching
means 3, consisting of a first reverse blocking triode thyristor 4 (SCR)
and a first recovery diode 5 in parallel, the two being
interconnected to conduct current in opposite directions, is connected
in parallel with the series combination formed by the deflection
winding 1 and the first capacitor 2. The assembly of components 1, 2, 4
and 5 forms the final stage of the horizontal deflection circuit in a
television receiver using electromagnetic delfection.The deflection circuit also includes a drive stage for this final stage which here controls the turning off of the first thyristor 4 to produce the retrace or fly-back portion of the scan during the line-blanking intervals i.e. while the picture signal is not transmitted. This driver stage comprises a second voltage source in the shape of a DC power supply 6 which delivers a constant high voltage E. The negative terminal of the power supply 6 is connected to ground and its positive terminal to one of the terminals of a second inductance 7 of relatively high value, which draws a substantially lineraly varying current from the power supply 6 to avoid its overloading. The other terminal of the second inductance 7 is connected, on the one hand, to the junction of the deflection winding 1 and the first switching means 3 by means of a second inductance 8 and a second capacitor 9 in series and, on the other hand, to one of the terminals of a second controllable bi-directionally conducting switching means 10, similar to the first one 3, including a parallel combination of a second thyristor 11 and a second recovery diode 12 al
so arranged to conduct in opposite directions.
The respective values of the third inductance 8 (L 8 ) and of the second capacitor 9 (C 9 ) are principally selected so that, on the one hand, one half-cycle of oscillation of the first series resonant circuit L 8 - C 9 , (i.e. π √ L 8 . C 9 ) is longer than the turn-off time of the first thyristor 4, but still is as short as possible since this time interval determines the speed of the commutation of the thyristor 4, and, on the other hand, one half-cycle of oscillation of another series resonant circuit formed by L 1 , L 8 and C 9 , i.e. π √ (L 1 + L 8 ) . C 9 , is substantially equal to the required retrace time interval (i.e. shorter than the horizontal blanking interval).
The gate (control electrode) of the second thyristor 11 is coupled to the output of the horizontal oscillator 13 of the television receiver by means of a first pulse transformer 14 and a first pulse shaping circuit 15 so that it is fed short triggering pulses which are to turn it on.
The gate of the first thyristor 4 fed with signals of a substantially rectangular waveform which are negative during the horizontal blanking intervals, is coupled to a winding 16 by means of a second pulse shaping circuit 17, the winding 16 being magnetically coupled to the second inductance 7 to make up the secondary winding of a transformer of which the inductance 7 forms the primary winding. It will be noted here that it is also possible to couple the secondary winding 16 magnetically to a primary winding connected to a suitable output (not shown) of the horizontal oscillator 13.
The operation of a circuit of this type will be explained below with reference to FIG. 2 which shows the waveforms at various points in the circuit of FIG. 1 during approximately one line period.
FIG. 2 is not to scale since one line period (t 7 - t 0 )
is equal to 64 microseconds in the case of 625 lines and 49
microseconds in the case of 819 lines, while the durations of the
respective horizontal blanking intervals are approximately 12 and 9.5
microseconds.Waveform A shows the form of the current i L1 passing through deflection winding 1, this current having a sawtooth waveform substantially linear from t 0 to t 3 and from t 5 to t 7 , and crossing zero at time instants t 0 and t 7 , and reaching values of + I 1m and - I 1m , at time instants t 3 and t 5 respectively, these being its maximum positive and negative amplitudes.
During the second half of the trace portion of the horizontal deflection cycle, that is to say from t 0 to t 3 , the thyristor 4 of the first switching means 3 is conductive and makes the high value capacitor 2 discharge through the deflector winding 1, which has a high inductance, so that current i L1 increases linearly.
A few microseconds (5 to 8 μ s) before the end of the trace portion, i.e. at time instant t 1 , the trigger of the second thyristor 11 receives a short voltage pulse V G11 which causes it to turn on as its anode is at this instant at a positive potential with respect to ground, which is due to the charging of the second capacitor 9 through inductances 7 and 8 by the voltage E from the power supply 6.
T
The interval between the time instant t 2 and t 3 , i.e. (t 3 -t 2 ), during which diode 5 is conductive and the thyristor is reverse biased will be termed in what follows the circuit turn-off time and it should be greater than the turn-off time of the thyristor 4 itself since the latter will subsequently become foward biased (i.e. from t 3 to t 5 ) by the retrace or flyback pulse (see waveform E) which should not trigger it.
At time instant t 3 , the switching means 3 is opened (i 4 and i 5 are both zero -- see waveforms B and C) and the reactive circuit 8, 9 forms a loop through capacitor 2 and the deflection coil 1 and thus a series resonant circuit including (L 1 + L 8 ) and C 9 , C 2 being of high value and representing a short circuit for the flyback frequency ##EQU2## thus obtained.
The retrace which stated at time t 3 takes place during one half-cycle of the resonant circuit formed by reactances L 1 , L 8 and C 9 , i.e. during the interval between t 3 and t 5 . In the middle of this interval i.e. at time instant t 4 , both i L1 (waveform A) and i 8 ,9 (waveform D) pass through zero and change their sign, whereas the voltage at the terminals of the first switching means 3 (V 3 , waveform E) passes through a maximum. Thus, from t 4 onwards, thyristor 11 will be reverse biased and diode 12 will conduct the current from the resonant circuit 1, 8 and 9 in order to turn the second thyristor 11 off.
At time instant t 5 , when current i L1 has reached - I 1m and when voltage v 3 falls to zero, diode 5 of the first switching means 3 becomes conductive and the trace portion of scan begins.
Current i 8 ,9 nevertheless continues to flow in the resonant circuit 8, 9 through diodes 5 and 12, which causes a break to appear in waveform D at t 5 , and a negative peak to appear in waveform D and a positive one in waveform B in the interval between t 5 and t 6 , these being principally due to the distributed capacities of coil 1 or to an eventual capacitor (not shown) connected in parallel to the first switching means 3.
At time instant t 6 , diode 12 of the second switching means 10 ceases to conduct after having allowed thyristor 11 time to become turned off completely.
T
he level of current i 8 ,9 at time instant t 5 (i.e. I c ) as well as the negative peak I D12 in i 8 ,9 and the positive peak I D5 in i 5 depend on the values of L 8 and C 9 in the same way as does the turn-off time of the circuit (t 3 - t 2 ). If, for example, L 8 and C 9 , are increased I D5 increases towards zero and this could cause diode 5 to be cut off in an undesirable fashion. I c also increases towards zero, which is liable to cause diode 12 to be blocked and thyristor 11 to trigger prematurely.
From the foregoing it can be clearly seen that the choice of values for L 8 and C 9 is subject to four limitations which prevent the values from being increased to lengthen the turn-off time of the driver circuit of first switching thyristor 4 so as to forestall its spurious triggering.
Waveform F shows the voltage v G4 obtained at the gate of thyristor 4 from the secondary winding 16 coupled to the inductor 7. This voltage is positive from t 0 to t 1 and from t 6 to t 7 and is negative between t 2 and t 6 i.e. while the second switching means 10 is conducting.
The present invention makes the lengthening of the turn-off time of thyristor 4 possible without altering the parameters of the circuit such as inductance 8 and capacitor 9.
In
the circuit shown in FIG. 3, which illustrates the principle of the
present invention, means are added to the circuit in FIG. 1 which
enable the turn-off time to be lengthened by connecting a load to
diode 5 so as to increase the current which flows through it during
the time that it is conductive. These means are here formed by a
resistor 18 connected in parallel with a capacitor 20 (which replaces
capacitor 2) which is of a higher capacitance so that, in practice, it
holds its charge during at least one half of the line period. FIG. 4,
which shows the waveform of the current in the first switching means 3
for a circuit as shown in FIG. 3, makes it possible to explain how
this lenthening of the turn-off time is achieved.In FIG. 4, the broken lines show the waveform of the current in the first switch device 3 in the circuit of FIG. 1, this waveform being produced by adding waveforms B and C of FIG. 2. The current i 4 above the axis flows through thyristor 4 and current i 5 below the axis flows through diode 5. When the capacitance C 20 of the capacitor in series with the deflector coil is increased to some tens of microfarads (C 2 having been of the order of 1 μ F) and when there is connected in parallel with capacitor 20 a resistor 18 the value of which is calculated to draw a strong current I R18 from capacitor 20, that is to say a current at least equal to 0,1 I m (I m being of the order of some tens of amperes), current I R18 is added to that i 5 which flows through diode 5 without in any way altering the linearity of the trace portion nor the oscillatory commutation of thyristor 4 which is brought about by the resonant circuit L 8 , C 9 .
The fact of loading capacitor C 20 by means of a resistor 18 thus has the effect of permanently displacing the waveform of the current in the negative direction by I R18 . Thus, during the trace portion of the scan, the transfer of the current from the diode 5 to the thyristor 4 begins at time t 10 instead of t 0 , that is to say with a delay proportional to I R18 . The effect of the triggering pulse delivered by the horizontal oscillator (13 FIG. 1) to the second thyristor 11 at time instant t 1 , will be to start the commutation process of the first thyristor 4 when the current it draws is less by I R18 than that i 4 (t 1 ) which it would have been drawing had there been no resistor 18. Because of this, the turn-off time of the thyristor 4 proper, which as has been mentioned increases with the maximum current level passing throught it, is slightly reduced. Moreover, because the oscillatory current i 8 ,9 (FIG. 2) from circuit L 8 , C 9 which flows through thyristor 4 in the opposite direction is unchanged, it reaches a value equal to that of the current i L1 (FIG. 1) flowing in the coil 1 in a shorter time, that is to say at time t 12 . Diode 5 will thus take the oscillatory current i 8 ,9 (FIG. 2) over in advance with respect ro time instant t 2 and will conduct it until it reaches zero value at a time instant t 13 later than t 3 , the amounts of advance (t 2 - t 12 ) and delay (t 13 - t 3 ) being practically equal.
It can thus be seen in FIG. 4 that the circuit turn-off time T R of a circuit according to the invention and illustrated by FIG. 3 is distinctly longer than that T r of the circuit in FIG. 1. This increase in the turn-off time (T R - T r ) depends on the current I R18 and increases therewith.It should be noted at this point that the current I R18 produces a voltage drop at the terminals of the resistor the only effect of which is to heat up the resistor since the level of this voltage (40 to 60 volts) does not necessarily have a suitable value to be used as a voltage supply for other circuits in an existing transistorised television receiver.
In accordance with one embodiment of the invention, illustrated in FIG. 5, an application is proposed for the additional current which is to be drawn through diode 5. In FIG. 5, the positive terminal of capacitor 20 is connected by a conductor 19 to the negative pole of the power supply 6 and the voltage at the terminals of capacitor 20 is thus added to that E from the source 6.
In the preferred embodiment of the present invention, which is shown in FIG. 6, it is possible to cause a supplementary current of a desired value to flow through the first diode 5 while obtaining a voltage which has a suitable value for use in another circuit in the television receiver.
If the voltage at the terminals of capacitor 20 in FIG. 3 is not a usable value, it is possible to connect in parallel with the series circuit comprising the deflector coil 1 and the capacitor 2 in FIG. 1, i.e. in parallel with the terminals of the first switching means 3, a series combination of an autotransformer 21 and a high value capacitor 22 (comparable with capacitor 20 in FIGS. 3 and 5). The autotransformer 21 has a tap 23 is suitably positioned between the terminal connected to capacitor 22 at the tap 24 connected to the first switching means 3. This autotransformer 21 may be formed by the one conventionally used for supplying a very high voltage to the cathode ray tube, as described for example in U.S. Pat. No. 3,452,244; such a transformer comprises a voltage step-up winding between taps 24 and 25, which latter is connected to a high voltage rectifier (not shown).
The voltage V c22 at the terminals of capacitor 22 varies slightly about a mean value V cm . It is increasing while diode 5 is conducting and decreasing during the conduction of the thyristor 4.
The voltage v 24 at tap 24 follows substantially the same curve as waveform E in FIG. 2, that is to say that during the retrace time interval from t 13 to t 5 to a positive pulse called the flyback pulse is produced and, during the time interval while the first switching means 3 is conducting, the voltage is zero. The mean valve of the voltage v 24 at tap 24 of the auto-transformer 21 is equal to the mean value V cm of the voltage at the terminals of capacitors 2 and 22.
Thus, there is obtained at tap 23 a waveform which is made up, during the retrace portion, of a positive pulse whose maximum amplitude is less than that of v 24 at tap 24 and, during the trace portion, of a substantially constant positive voltage, the level V of which is less than the mean value V cm of the voltage v c22 at the terminals of capacitor 22. By moving tap 23 towards terminals 24 the amplitude of the pulse during fly-back increases while voltage V falls and conversely by moving tap 23 towards capacitor 22 voltage V increases and the amplitude of the pulse drops.
In more exact terms, the voltage V at tap 23 is such that the means value of v 23 is equal to V cm . It has thus been shown that by choosing carefully the position of tape 23, a voltage V may be obtained during the trace portion of the scan, which may be of any value between V cm and zero.
This voltage V is thus obtained by periodically controlled rectification during the trace portion of the scan.
It may easily be seen that the DC collector/emitter current in transistor 26 flows through the first diode 5 of the first switching means 3 via a resistor 28 and the part of the winding of auto-transformer 21 located between taps 23 and 24.
Experience has shown that a circuit as shown in FIG. 6 can supply 24 volts with a current of 2 amperes to the vertical deflection circuit of the same television set, the voltage at the terminals of capacitor 22 being from 50 to 60 volts.
It should be mentioned that, when the circuit which forms the load of the controlled rectifier 26, 27 does not draw enough current to sufficiently lengthen the circuit turn-off time T R , an additional resistor (not shown) may be connected between the emitter of transistor 26 and ground or in parallel to capacitor 22, which resistor will draw the additional current required.
ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20 Gating circuit for television SCR deflection system AND REGULATION / stabilization of horizontal deflection NETWORK CIRCUIT with Transductor reactor / Reverse thyristor energy recovery circuit.In a television deflection system employing a first SCR for coupling a deflection winding across a source of energy during a trace interval of each deflection cycle and a second SCR for replenishing energy to the source of energy during a commutation interval of each deflection cycle, a gating circuit for triggering the first SCR. The gating circuit employs a voltage divider coupled in parallel with the second SCR which develops gating signals proportional to the voltage across the second SCR.
1. In a television deflection system in which a first switching means couples a deflection winding across a source of energy during a trace interval of each deflection cycle and a second switching means replenishes energy to said source of energy during a commutation interval of each deflection cycle, a gating circuit for said first switching means, comprising:
capacitive voltage divider means coupled in parallel with said second switching means for developing gating signals proportional to the voltage across said second switching means; and
means for coupling said voltage divider means to said first switching means to provide for conduction of said first switching means in response to said gating signals.
2. A gating circuit according to claim 1 wherein said voltage divider includes first and second capacitors coupled in series and providing said gating signals at the common terminal of said capacitors. 3. A gating circuit according to claim 2 wherein said first and second capacitors are proportional in value to provide for the desired magnitude of gating signals. 4. A gating circuit according to claim 3 wherein said means for coupling said voltage divider means to said first switching means includes an inductor. 5. A gating circuit according to claim 4 wherein said inductor and said first and second capacitors comprise a resonant circuit having a resonant frequency chosen to shape said gating signal to improve switching of said first switching means.
Description:
BACKGROUND OF THE INVENTION
This
invention relates to a gating circuit for controlling a switching
device employed in a deflection circuit of a television receiver.
Various deflection system designs have been utilized in television receivers. One design employing two bidirectional conducting switches and utilizing SCR's (thyristors) as part of the switches is disclosed in U.S. Pat. No. 3,452,244. In this type deflection system, a first SCR is
employed for coupling a deflection winding across a source of energy during a trace interval of each
deflection cycle, and a second SCR is employed for replenishing energy during a commutation interval of each deflection cycle. The first SCR is commonly provided with gating voltage by means of a separate winding or tap of an input reactor coupling a source of B+ to the second SCR.
Various regulator system designs have been utilized in conjunction with the afore described deflection system to provide for uniform high voltage production as well as uniform picture width with varying line voltage and kinescope beam current conditions.
One type regulator system design alters the amount of energy stored in a commutating capacitor coupled between the first and second SCR's during the commutating interval. A regulator design of this type may employ a regulating SCR and diode for coupling the input reactor to the source of B+. With this type regulator a notch, the width of which depends upon the regulation requirements, is created in the current supplied through the reactor and which notch shows up in the voltage waveform developed on the separate winding or tap of the input reactor which provides the gating voltage for the first SCR. The presence of the notch, even though de-emphasized by a waveshaping circuit coupling the gating voltage to the first SCR, causes erratic control of the first SCR.
SUMMARY OF THE INVENTION
In
accordance with one embodiment of the invention, a gating circuit of a
television deflection system employing a first switching means for
coupling a deflection winding across a source of energy during a trace
interval of each deflection cycle and a second switching means for
replenishing energy to said source of energy during a commutation
interval of each deflection cycle includes a voltage divider means
coupled in parallel with the second switching means for developing
gating signals proportional to the voltage across the second switching
means. The voltage divider means are coupled to the first switching
means to provide for conduction of the first switching means in response
to the gating signals.
A more detailed description of a preferred embodiment of the invention is given in the following description and accompanying drawing of which:
FIG. 1 is a schematic diagram, partially in block form, of a prior art SCR deflection system;
FIG. 2 is a schematic diagram, partially in block form, of an SCR deflection system of the type shown in FIG. 1 including a gating circuit embodying the invention;
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which employs an SCR as a control device and which is suitable for use with the SCR deflection system of FIG.2;
FIG. 4 is a schematic diagram, partially in block form, of another type of a regulator system suitable for use with the deflection circuit of FIG. 2; and
FIG. 5 is a schematic diagram, partially in block form, of still another type of a regulator system suitable for use with the SCR deflection system of FIG. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIG.
1 is a schematic diagram, partially in block form, of a prior art
deflection system of the retrace driven type similar to that disclosed
in U.S. Pat. No. 3,452,244. This system includes a commutating switch
12, comprising a silicon controlled rectifier (SCR) 14 and an
oppositely poled damper diode 16. The commutating switch 12 is coupled
between a winding 18a of an input choke 18 and ground. The other
terminal of winding 18a is coupled to a source of direct current
voltage (B+) by means of a regulator network 20 which controls the
energy stored in the deflection circuit 10 when the commutating switch
is off, during an interval T3 to T0' as shown in curve 21 which is a
plot of the voltage level at the anode of SCR 14 during the deflection
cycle. A damping network comprising a series combination of a
resistor 22 and a capacitor 23 is coupled in parallel with commutating
switch 12 and serves to reduce any ringing effects produced by the
switching of commutating switch 12. Commutating switch 12 is coupled
through a commutating coil 24, a commutating capacitor 25 and a trace
switch 26 to ground. Trace switch 26 comprises an SCR 28 and an
oppositely poled damper diode 30. An auxiliary capacitor 32 is coupled
between the junction of coil 24 and capacitor 25 and ground. A series
combination of a horizontal deflection winding 34 and an S-shaping
capacitor 36 are coupled in parallel with trace switch 26. Also, a
series combination of a primary winding 38a of a horizontal output
transformer 38 and a DC blocking capacitor 40 are coupled in parallel
with trace switch 26.
A
secondary of high voltage winding 38b of transformer 38 produces
relatively large amplitude flyback pulses during the retrace interval of
each deflection cycle. This interval exists between T1 and T2 of
curve 41 which is a plot of the current through windings 34 and 38a
during the deflection cycle. These flyback pulses are applied to a
high voltage multiplier (not shown) or other suitable means for
producing direct current high voltage for use as the ultor voltage of a
kinescope (not shown).
An auxiliary winding 38c of transformer 38 is coupled to a high voltage sensing and control circuit 42 which transforms the level of flyback pulses into a pulse width modulated signal. The control circuit 42 is coupled to the regulator network 20.
A horizontal oscillator 44 is coupled to the gate electrode of commutating SCR 14 and produces a pulse during each deflection cycle slightly before the end of the trace interval at T0 of curve 21 to turn on SCR 14 to initiate the commutating interval. The commutating interval occurs between T0 and T3 of curve 21. A resonant waveshaping network 46 comprising a series combination of a capacitor 48 and an inductor 50 coupled between a winding 18b of input choke 18 and the gate electrode of trace SCR 28 and a damping resistor 52 coupled between the junction of capacitor 48 and inductor 50 and ground shapes the signal developed at winding 18b (i.e. voltage waveform 53) to form a gating signal voltage waveform 55 to enable SCR 28 for conduction during the second half of the trace interval occurring between T2 and T1' of curve 41.
The
regulator network 20, when of a type to be described in conjunction
with FIG. 3, operates in such a manner that current through winding 18a
of input choke 18 during an interval between T4 and T5 (region A) of
curves 21, 53 and 55 is interrupted for a period of time the duration
of which is determined by the signal produced by the high voltage
sensing and control circuit 42. During the interruption of current
through winding 18a a zero voltage level is developed by winding 18b
as shown in interval T4 to T5 of curve 53. The resonant waveshaping
circuit 46 produces the shaped waveform 55 which undesirably retains a
slump in region A corresponding to the notch A of waveform 53. The
slump in waveform 55 applied to SCR 28 occurs in a region where the
anode of SCR 28 becomes positive and where SCR 28 must be switched on
to maintain a uniform production of the current waveshape in the
horizontal deflection winding 34 as shown in curve 41. The less
positive amplitude current occurring at region A of waveform 55 may
result in insufficient gating current for SCR 28 and may cause erratic
performance resulting in an unsatisfactory raster.
FIG.
2 is a schematic diagram, partially in block form, of a deflection
system 60 embodying the invention. Those elements which perform the same
function in FIG. 2 as in FIG. 1 are labeled with the same reference
numerals. FIG. 2 differs from FIG. 1 essentially in that the signal to
enable SCR 28 derived from sampling a portion of the voltage across
commutating switch 12 rather than a voltage developed by winding 18b
which is a function of the voltage across winding 18a of input choke 18
as in FIG. 1. This change eliminates the slump in the enabling signal
during the interval T4 to T5 as shown in curve 64 since the voltage
across the commutating switch 12 is not adversely effected by the
regulator network 20 operation.
A series combination of resistor 22, capacitor 23 and a capacitor 62 is coupled in parallel with commutating switch 12, one terminal of capacitor 62 being coupled to ground. The junction of capacitors 23 and 62 is coupled to the gate electrode of SCR 28 by means of the inductor 50. The resistor 52 is coupled in parallel with capacitor 62.
Capacitors 23 and 62 form a capacitance voltage divider which provides a suitable portion of the voltage across commutating switch 12 for gating SCR 28 via inductor 50. The magnitude of the voltage at the junction of capacitors 23 and 62 is typically 25 to 35 volts. It can, therefore, be seen that the ratio of values of capacitors 23 and 62 will vary depending on the B+ voltage utilized to energize the deflection system. Capacitors 23 and 62 and inductor 50 form a resonant circuit tuned in a manner which provides for peaking of the curve 64 between T4 and T5. This peaking effect further enhances gating of SCR 28 between T4 and T5.
Since the waveshape of the voltage across commutating switch 12 (curve
21) is relatively independent of the type of regulator system
employed in conjunction with the deflection system, the curve 64 also
is independent of the type of regulator system.
When commutating switch 12 switches off during the interval T3 to T0'
curve 21, the voltage across capacitor 62 increases and the voltage at
the gate electrode of SCR 28 increases as shown in curve 64. As will
be noted, no slump of curve 64 occurs between T3 and T5 because there
is no interruption of the voltage across commutating switch 12.
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which may be used in conjunction with the invention. B+ is supplied through a regulator network 20 which comprises an SCR 66 and an oppositely poled diode 68. The diode is poled to provide for conduction of current from B+ to the horizontal deflection circuit 60 via winding 18a of input choke 18. Current flows through the diode during the period T3 to T4 of curve 21 FIG. 1 after which current tries to flow through the SCR 66 from the horizontal deflection circuit to B+ since the commutating capacitor 25 is charged to a voltage higher than B+.
The horizontal deflection circuit 60 produces a flyback pulse inwinding
38a of the flyback transformer 38 which is coupled to winding 38c.
The magnitude of the pulse on winding 38c determines how long the
signal required to switch SCR 66 on is delayed after T4 curve 21 FIG.
1. If the flyback pulse is greater than desirable, the SCR 66 turns on
sooner than if the flyback pulse is less than desirable and provides a
discharge path for current in commutating capacitor 25 back to the B+
supply. In this manner a relatively constant amplitude flyback pulse
is maintained.
FIG.
4 is a schematic diagram, partially in block form, of another
well-known type of a regulator system which may be used in conjunction
with the invention shown in FIG. 2. B+ is coupled through winding 18a
of input choke 18 and through a series combination of windings 70a and
70b of a saturable reactor 70 and a parallel combination of a diode
72 and a resistor 74 to the horizontal deflection circuit 60. Diode 72
is poled to conduct current from the horizontal deflection circuit 60
to B+.
Flyback pulse variations are obtained from winding 38c of the horizontal output transformer 38 and applied to a voltage divider comprising resistors 76, 78 and 80 of the high voltage sensing and control circuit 42. A portion of the pulse produced by winding 38c is selected by the position of the wiper terminal on potentiometer 78 and coupled to the base electrode of a transistor 82 by means of a zener diode 84. The emitter electrode of transistor 82 is grounded and a DC stabilization resistor 85 is coupled in parallel with the base-emitter junction of transistor 82. When the pulse magnitude on winding 38c exceeds a level which results in forward biasing the base-emitter junction of transistor 82, current flows from B+ through a resistor 86, a winding 70c of saturable reactor 70 and transistor 82 to ground. Due to the exponential increase of current in winding 70c during the period of conduction of transistor 82, the duration of conduction of transistor 82 determines the magnitude of current flowing in winding 70c and thus the total inductance of windings 70a and 70b. The current in winding 70c is sustained during the remaining deflection period by means of a diode 88 coupled in parallel with winding 70c and poled not to conduct current from B+ to the collector electrode of transistor 82. A capacitor 90 coupled to the cathode of diode 88 provides a bypass for B+. Windings 70a and 70b are in parallel with input reactor 18a and thereby affect the total input inductance of the deflection circuit and thereby controls the transfer of energy to the deflection circuit. The dotted waveforms shown in conjunction with a curve 21' indicate variations from a nominal waveform provided at the input of horizontal deflection circuit 60 by the windings 70a and 70b.
FIG. 5 is a schematic diagram of yet another type of a regulator system which may be used in conjunction with the invention. B+ is coupled through a winding 92a and a winding 92b of a saturable reactor to the horizontal deflection circuit 60. Windings 92a and 92b are used to replace the input choke 18 shown in FIGS. 1 and 2 while also providing for a regulating function corresponding to that provided by regulating network 20.
Flyback pulse variations are obtained from winding 38c and applied to the high voltage sensing and control circuit 42 as in FIG. 4. Current flows from B+ through resistor 86, a winding 92c and transistor 82 to ground. As in FIG. 4 the duration of the conduction of transistor 82 determines the energy stored in winding 92c and thus the total inductance of windings 92a and 92b which control the amount of energy transferred to the deflection circuit during each horizontal deflection cycle. The variations in waveforms of curve 21', shown in conjunction with FIG. 4, are also provided at the input of horizontal deflection circuit 60 by windings 92a and 92b.
For various reasons including cost or performance, a manufacturer may
wish to utilize a particular one of the regulators illustrated in
FIGS. 3, 4 and 5. Regardless of the choice, the gating circuit
according to the invention may be utilized therewith advantageously by
providing improved performance and the possibility of cost savings by
eliminating taps or extra windings on the wound components which
heretofore normally provided a source of SCR gating waveforms.
This
invention relates to a gating circuit for controlling a switching
device employed in a deflection circuit of a television receiver.
Various deflection system designs have been utilized in television receivers. One design employing two bidirectional conducting switches and utilizing SCR's (thyristors) as part of the switches is disclosed in U.S. Pat. No. 3,452,244. In this type deflection system, a first SCR is
employed for coupling a deflection winding across a source of energy during a trace interval of each
deflection cycle, and a second SCR is employed for replenishing energy during a commutation interval of each deflection cycle. The first SCR is commonly provided with gating voltage by means of a separate winding or tap of an input reactor coupling a source of B+ to the second SCR.
Various regulator system designs have been utilized in conjunction with the afore described deflection system to provide for uniform high voltage production as well as uniform picture width with varying line voltage and kinescope beam current conditions.
One type regulator system design alters the amount of energy stored in a commutating capacitor coupled between the first and second SCR's during the commutating interval. A regulator design of this type may employ a regulating SCR and diode for coupling the input reactor to the source of B+. With this type regulator a notch, the width of which depends upon the regulation requirements, is created in the current supplied through the reactor and which notch shows up in the voltage waveform developed on the separate winding or tap of the input reactor which provides the gating voltage for the first SCR. The presence of the notch, even though de-emphasized by a waveshaping circuit coupling the gating voltage to the first SCR, causes erratic control of the first SCR.
SUMMARY OF THE INVENTION
In
accordance with one embodiment of the invention, a gating circuit of a
television deflection system employing a first switching means for
coupling a deflection winding across a source of energy during a trace
interval of each deflection cycle and a second switching means for
replenishing energy to said source of energy during a commutation
interval of each deflection cycle includes a voltage divider means
coupled in parallel with the second switching means for developing
gating signals proportional to the voltage across the second switching
means. The voltage divider means are coupled to the first switching
means to provide for conduction of the first switching means in response
to the gating signals.A more detailed description of a preferred embodiment of the invention is given in the following description and accompanying drawing of which:
FIG. 1 is a schematic diagram, partially in block form, of a prior art SCR deflection system;
FIG. 2 is a schematic diagram, partially in block form, of an SCR deflection system of the type shown in FIG. 1 including a gating circuit embodying the invention;
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which employs an SCR as a control device and which is suitable for use with the SCR deflection system of FIG.2;
FIG. 4 is a schematic diagram, partially in block form, of another type of a regulator system suitable for use with the deflection circuit of FIG. 2; and
FIG. 5 is a schematic diagram, partially in block form, of still another type of a regulator system suitable for use with the SCR deflection system of FIG. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIG.
1 is a schematic diagram, partially in block form, of a prior art
deflection system of the retrace driven type similar to that disclosed
in U.S. Pat. No. 3,452,244. This system includes a commutating switch
12, comprising a silicon controlled rectifier (SCR) 14 and an
oppositely poled damper diode 16. The commutating switch 12 is coupled
between a winding 18a of an input choke 18 and ground. The other
terminal of winding 18a is coupled to a source of direct current
voltage (B+) by means of a regulator network 20 which controls the
energy stored in the deflection circuit 10 when the commutating switch
is off, during an interval T3 to T0' as shown in curve 21 which is a
plot of the voltage level at the anode of SCR 14 during the deflection
cycle. A damping network comprising a series combination of a
resistor 22 and a capacitor 23 is coupled in parallel with commutating
switch 12 and serves to reduce any ringing effects produced by the
switching of commutating switch 12. Commutating switch 12 is coupled
through a commutating coil 24, a commutating capacitor 25 and a trace
switch 26 to ground. Trace switch 26 comprises an SCR 28 and an
oppositely poled damper diode 30. An auxiliary capacitor 32 is coupled
between the junction of coil 24 and capacitor 25 and ground. A series
combination of a horizontal deflection winding 34 and an S-shaping
capacitor 36 are coupled in parallel with trace switch 26. Also, a
series combination of a primary winding 38a of a horizontal output
transformer 38 and a DC blocking capacitor 40 are coupled in parallel
with trace switch 26.
A
secondary of high voltage winding 38b of transformer 38 produces
relatively large amplitude flyback pulses during the retrace interval of
each deflection cycle. This interval exists between T1 and T2 of
curve 41 which is a plot of the current through windings 34 and 38a
during the deflection cycle. These flyback pulses are applied to a
high voltage multiplier (not shown) or other suitable means for
producing direct current high voltage for use as the ultor voltage of a
kinescope (not shown).An auxiliary winding 38c of transformer 38 is coupled to a high voltage sensing and control circuit 42 which transforms the level of flyback pulses into a pulse width modulated signal. The control circuit 42 is coupled to the regulator network 20.
A horizontal oscillator 44 is coupled to the gate electrode of commutating SCR 14 and produces a pulse during each deflection cycle slightly before the end of the trace interval at T0 of curve 21 to turn on SCR 14 to initiate the commutating interval. The commutating interval occurs between T0 and T3 of curve 21. A resonant waveshaping network 46 comprising a series combination of a capacitor 48 and an inductor 50 coupled between a winding 18b of input choke 18 and the gate electrode of trace SCR 28 and a damping resistor 52 coupled between the junction of capacitor 48 and inductor 50 and ground shapes the signal developed at winding 18b (i.e. voltage waveform 53) to form a gating signal voltage waveform 55 to enable SCR 28 for conduction during the second half of the trace interval occurring between T2 and T1' of curve 41.
The
regulator network 20, when of a type to be described in conjunction
with FIG. 3, operates in such a manner that current through winding 18a
of input choke 18 during an interval between T4 and T5 (region A) of
curves 21, 53 and 55 is interrupted for a period of time the duration
of which is determined by the signal produced by the high voltage
sensing and control circuit 42. During the interruption of current
through winding 18a a zero voltage level is developed by winding 18b
as shown in interval T4 to T5 of curve 53. The resonant waveshaping
circuit 46 produces the shaped waveform 55 which undesirably retains a
slump in region A corresponding to the notch A of waveform 53. The
slump in waveform 55 applied to SCR 28 occurs in a region where the
anode of SCR 28 becomes positive and where SCR 28 must be switched on
to maintain a uniform production of the current waveshape in the
horizontal deflection winding 34 as shown in curve 41. The less
positive amplitude current occurring at region A of waveform 55 may
result in insufficient gating current for SCR 28 and may cause erratic
performance resulting in an unsatisfactory raster.FIG.
2 is a schematic diagram, partially in block form, of a deflection
system 60 embodying the invention. Those elements which perform the same
function in FIG. 2 as in FIG. 1 are labeled with the same reference
numerals. FIG. 2 differs from FIG. 1 essentially in that the signal to
enable SCR 28 derived from sampling a portion of the voltage across
commutating switch 12 rather than a voltage developed by winding 18b
which is a function of the voltage across winding 18a of input choke 18
as in FIG. 1. This change eliminates the slump in the enabling signal
during the interval T4 to T5 as shown in curve 64 since the voltage
across the commutating switch 12 is not adversely effected by the
regulator network 20 operation.A series combination of resistor 22, capacitor 23 and a capacitor 62 is coupled in parallel with commutating switch 12, one terminal of capacitor 62 being coupled to ground. The junction of capacitors 23 and 62 is coupled to the gate electrode of SCR 28 by means of the inductor 50. The resistor 52 is coupled in parallel with capacitor 62.
Capacitors 23 and 62 form a capacitance voltage divider which provides a suitable portion of the voltage across commutating switch 12 for gating SCR 28 via inductor 50. The magnitude of the voltage at the junction of capacitors 23 and 62 is typically 25 to 35 volts. It can, therefore, be seen that the ratio of values of capacitors 23 and 62 will vary depending on the B+ voltage utilized to energize the deflection system. Capacitors 23 and 62 and inductor 50 form a resonant circuit tuned in a manner which provides for peaking of the curve 64 between T4 and T5. This peaking effect further enhances gating of SCR 28 between T4 and T5.
FIG. 3 is a schematic diagram, partially in block form, of one type of a regulator system which may be used in conjunction with the invention. B+ is supplied through a regulator network 20 which comprises an SCR 66 and an oppositely poled diode 68. The diode is poled to provide for conduction of current from B+ to the horizontal deflection circuit 60 via winding 18a of input choke 18. Current flows through the diode during the period T3 to T4 of curve 21 FIG. 1 after which current tries to flow through the SCR 66 from the horizontal deflection circuit to B+ since the commutating capacitor 25 is charged to a voltage higher than B+.
The horizontal deflection circuit 60 produces a flyback pulse in
winding
38a of the flyback transformer 38 which is coupled to winding 38c.
The magnitude of the pulse on winding 38c determines how long the
signal required to switch SCR 66 on is delayed after T4 curve 21 FIG.
1. If the flyback pulse is greater than desirable, the SCR 66 turns on
sooner than if the flyback pulse is less than desirable and provides a
discharge path for current in commutating capacitor 25 back to the B+
supply. In this manner a relatively constant amplitude flyback pulse
is maintained.FIG.
4 is a schematic diagram, partially in block form, of another
well-known type of a regulator system which may be used in conjunction
with the invention shown in FIG. 2. B+ is coupled through winding 18a
of input choke 18 and through a series combination of windings 70a and
70b of a saturable reactor 70 and a parallel combination of a diode
72 and a resistor 74 to the horizontal deflection circuit 60. Diode 72
is poled to conduct current from the horizontal deflection circuit 60
to B+.Flyback pulse variations are obtained from winding 38c of the horizontal output transformer 38 and applied to a voltage divider comprising resistors 76, 78 and 80 of the high voltage sensing and control circuit 42. A portion of the pulse produced by winding 38c is selected by the position of the wiper terminal on potentiometer 78 and coupled to the base electrode of a transistor 82 by means of a zener diode 84. The emitter electrode of transistor 82 is grounded and a DC stabilization resistor 85 is coupled in parallel with the base-emitter junction of transistor 82. When the pulse magnitude on winding 38c exceeds a level which results in forward biasing the base-emitter junction of transistor 82, current flows from B+ through a resistor 86, a winding 70c of saturable reactor 70 and transistor 82 to ground. Due to the exponential increase of current in winding 70c during the period of conduction of transistor 82, the duration of conduction of transistor 82 determines the magnitude of current flowing in winding 70c and thus the total inductance of windings 70a and 70b. The current in winding 70c is sustained during the remaining deflection period by means of a diode 88 coupled in parallel with winding 70c and poled not to conduct current from B+ to the collector electrode of transistor 82. A capacitor 90 coupled to the cathode of diode 88 provides a bypass for B+. Windings 70a and 70b are in parallel with input reactor 18a and thereby affect the total input inductance of the deflection circuit and thereby controls the transfer of energy to the deflection circuit. The dotted waveforms shown in conjunction with a curve 21' indicate variations from a nominal waveform provided at the input of horizontal deflection circuit 60 by the windings 70a and 70b.
FIG. 5 is a schematic diagram of yet another type of a regulator system which may be used in conjunction with the invention. B+ is coupled through a winding 92a and a winding 92b of a saturable reactor to the horizontal deflection circuit 60. Windings 92a and 92b are used to replace the input choke 18 shown in FIGS. 1 and 2 while also providing for a regulating function corresponding to that provided by regulating network 20.
Flyback pulse variations are obtained from winding 38c and applied to the high voltage sensing and control circuit 42 as in FIG. 4. Current flows from B+ through resistor 86, a winding 92c and transistor 82 to ground. As in FIG. 4 the duration of the conduction of transistor 82 determines the energy stored in winding 92c and thus the total inductance of windings 92a and 92b which control the amount of energy transferred to the deflection circuit during each horizontal deflection cycle. The variations in waveforms of curve 21', shown in conjunction with FIG. 4, are also provided at the input of horizontal deflection circuit 60 by windings 92a and 92b.
ITT IDEAL COLOR 1840X OSCAR 8 CHASSIS VIDOM PIL IIX CHASSIS STAND. M. 5861 60 20 CONTACTLESS
TOUCH SENSOR PROGRAM CHANGE KEYBOARD CIRCUIT ARRANGEMENT FOR
ESTABLISHING A CONSTANT POTENTIAL OF THE CHASSIS OF AN ELECTRICAL
DEVICE WITH RELATION TO GROUND :
Circuit arrangement for establishing a reference potential of a chassis of an electrical device such as a radio and/or TV receiver, such device being provided with at least one contactless touching switch operating under the AC voltage principle. The device is switched by touching a unipole touching field in a contactless manner so as to establish connection to a grounded network pole. The circuit arrangement includes in combination an electronic blocking switch and a unidirectional rectifier which separates such switch from the network during the blocking phase.
1.
A circuit arrangement for establishing, at the chassis of an
electrical device powered by a grounded AC supply network, a reference
potential with relation to ground, said device having at least one
contactless touching switch operating on the AC voltage principle,
the switch being operated by touching a unipole touching field in a
contactless manner, said arrangement comprising an electronic
switch for selectively blocking the circuit of the device from the
supply network, a half-wave rectifier including a pair of diodes
individually connected in series-aiding relation between the
terminals of the supply network and the terminals of the device for
separating the electronic blocking switch from the supply network
during a blocking phase defined by a prescribed half period of the
AC cycle, and a pair of condensers individually connected in
parallel with the respective diodes.
2. A circuit arrangement according to claim 1, wherein the
capacitances of the two condensers are of equal magnitude.
CRT TV EHT VOLTAGE MULTIPLIER - KASKADE COCKCROFT-WALTON CASCADE CIRCUIT FOR VOLTAGE MULTIPLICATION:
A Cockcroft-Walton cascade circuit comprises an input voltage source and a pumping and storage circuit with a series array of capacitors with pumping and storage portions of the circuit being interconnected by silicon rectifiers, constructed and arranged so that at least the capacitor nearest the voltage source, and preferably one or more of the next adjacent capacitors in the series array, have lower tendency to internally discharge than the capacitors in the array more remote from the voltage source.
1. An improved voltage multiplying circuit comprising,
2. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor is a self-healing impregnated capacitor which is impregnated with a high voltage impregnant.
3. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor comprises a foil capacitor.
Description:
BACKGROUND OF THE INVENTION
The invention relates in general to Cockcroft-Walton cascade circuits for voltage multiplication and more particularly to such circuits with a pumping circuit and a storage circuit composed of capacitors connected in series, said pumping circuits and storage circuit being linked with one another by a rectifier circuit whose rectifiers are preferably silicon rectifiers, especially for a switching arrangement sensitive to internal discharges of capacitors, and more especially a switching arrangement containing transistors, and especially an image tube switching arrangement.
Voltage multiplication cascades composed of capacitors and rectifiers are used to produce high D.C. voltages from sinusoidal or pulsed alternating voltages. All known voltage multiplication cascades and voltage multipliers are designed to be capacitance-symmetrical, i.e., all capacitors used have the same capacitance. If U for example is the maximum value of an applied alternating voltage, the input capacitor connected directly to the alternating voltage source is charged to a D.C. voltage with a value U, while all other capacitors are charged to the value of 2U. Therefore, a total voltage can be obtained from the series-connected capacitors of a capacitor array.
In voltage multipliers, internal resistance is highly significant. In order to obtain high load currents on the D.C. side, the emphasis in the prior art has been on constructing voltage multipliers with internal resistances that are as low as possible.
Internal resistance of voltage multipliers can be reduced by increasing the capacitances of the individual capacitors by equal amounts. However, the critical significance of size of the assembly in the practical application of a voltage multiplier, limits the extent to which capacitance of the individual capacitors can be increased as a practical matter.
In television sets, especially color television sets, voltage multiplication cascades are required whose internal resistance is generally 400 to 500 kOhms. Thus far, it has been possible to achieve this low internal resistance with small dimensions only by using silicon diodes as rectifiers and metallized film capacitors as the capacitors.
When silicon rectifiers are used to achieve low internal resistance, their low forward resistance produces high peak currents and therefore leads to problems involving the pulse resistance of the capacitors. Metallized film capacitors are used because of space requirements, i.e., in order to ensure that the assembly will have the smallest possible dimensions, and also for cost reasons. These film capacitors have a self-healing effect, in which the damage caused to the capacitor by partial evaporation of the metal coating around the point of puncture (pinhole), which develops as a result of internal spark-overs, is cured again. This selfhealing effect is highly desirable as far as the capacitors themselves are concerned, but is not without its disadvantages as far as the other cirucit components are concerned, especially the silicon rectifiers, the image tubes, and the components which conduct the image tube voltage.
It is therefore an important object of the invention to improve voltage multiplication cascades of the type described above.
It is a further object of the invention to keep the size of the entire assembly small and the internal resistance low.
It is a further object of the invention to increase pulse resistance of the entire circuit.
It is a further object of the invention to avoid the above-described disadvantageous effects on adjacent elements.
It is a further object of the invention to achieve multiples of the foregoing objects and preferably all of them consistent with each other.
SUMMARY OF THE INVENTION
In accordance with the invention, the foregoing objects are met by making at least one of the capacitors in the pumping circuit, preferably including the one which is adjacent to the input voltage source, one which is less prone to internal discharges than any of the individual capacitors in the storage circuit.
The Cockcroft-Walton cascade circuit is not provided with identical capacitors. Instead, the individual capacitors are arranged according to their loads and designed in such a way that a higher pulse resistance is attained only in certain capacitors. It can be shown that the load produced by the voltage in all the capacitors in the multiplication circuit is approximately the same. But the pulse currents of the capacitors as well as their forward flow angles are different. In particular, the capacitors of the pumping circuit are subjected to very high loads in a pulsed mode. In the voltage multiplication cascade according to the invention, these capacitors are arranged so that they exhibit fewer internal discharges than the capacitors in the storage circuit.
The external dimensions of the entire assembly would be unacceptably large if one constructed the entire switching arrangement using such capacitors.
The voltage multiplication cascade according to the invention also makes it possible to construct a reliably operating
arrangement which has no tendency toward spark-overs, consistent with satisfactory internal resistance of the voltage multiplication cascade and small dimensions of the entire assembly. This avoids the above cited disadvantages with respect to the particularly sensitive components in the rest of the circuit and makes it possible to design voltage multiplication cascades with silicon rectifiers, which are characterized by long lifetimes. Hence, a voltage multiplication cascade has been developed particularly for image tube circuits in television sets, especially color television sets, and this cascade satisfies the highest requirements in addition to having an average lifetime which in every case is greater than that of the television set.
A further aspect of the invention is that at least one of the capacitors that are less prone to internal discharges is a capacitor which is impregnated with a high-voltage impregnating substance, especially a high-voltage oil such as polybutene or silicone oil, or mixtures thereof. In contrast to capacitors made of metallized film which have not been impregnated, this allows the discharge frequency due to internal discharges or spark-overs to be reduced by a factor of 10 to 100.
According to a further important aspect of the invention, at least one of the capacitors that are less prone to internal discharges is either a foil capacitor or a self-healing capacitor. In addition, the capacitor in the pumping circuit which is adjacent to the voltage source input can be a foil capacitor which has been impregnated in the manner described above, while the next capacitor in the pumping circuit is a self-healing capacitor impregnated in the same fashion.
Other objects, features and advantages of the invention will be apparent from the following detailed description of preferred embodiments, taken in connection with the accompanying drawing, the single FIGURE of which:
BRIEF DESCRIPTION OF THE DRAWING
is a schematic diagram of a circuit made according to a preferred embodiment of the invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The voltage multiplier comprises capacitors C1 to C5 and rectifiers D1 to D5 connected in a cascade. An alternating voltage source UE is connected to terminals 1 and 2, said voltage source supplying for example a pulsed alternating voltage. Capacitors C1 and C2 form the pumping circuit while capacitors C3, C4 and C5 form the storage circuit.
In the steady state, capacitor C1 is charged to the maximum value of the alternating voltage UE as are the other capacitors C2 to C5. The desired high D.C. voltage UA is picked off at terminals 3 and 4, said D.C. voltage being composed of the D.C. voltages from capacitors C3 to C5. Terminal 3 and terminal 2 are connected to one pole of the alternating voltage source UE feeding the circuit, which can be at ground potential. In the circuit described here, a D.C. voltage UA can be picked off whose voltage value is approximately 3 times the maximum value of the pulsed alternating voltage UE. By using more than five capacitors, a correspondingly higher D.C. voltage can be obtained.
The individual capacitors are discharged by disconnecting D.C. voltage UA. However, they are constantly being recharged by the electrical energy supplied by the alternating voltage source UE, so that the voltage multiplier can be continuously charged on the output side.
According to the invention, in this preferred embodiment, capacitor C1 and/or C2 in the pumping circuit are designed so that they have a lower tendency toward internal discharges than any of the individual capacitors C3, C4 and C5 in the storage circuit.
It is evident that those skilled in the art, once given the benefit of the foregoing disclosure, may now make numerous other uses and modifications of, and departures from the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.
Inventors:Petrick, Paul (Landshut, DT)
Schwedler, Hans-peter (Landshut, DT)
Holzer, Alfred (Schonbrunn, DT)
ERNST ROEDERSTEIN SPEZIALFABRIK
US Patent References:
3714528 ELECTRICAL CAPACITOR WITH FILM-PAPER DIELECTRIC 1973-01-30 Vail
3699410 SELF-HEALING ELECTRICAL CONDENSER 1972-10-17 Maylandt
3463992 ELECTRICAL CAPACITOR SYSTEMS HAVING LONG-TERM STORAGE CHARACTERISTICS 1969-08-26 Solberg
3457478 WOUND FILM CAPACITORS 1969-07-22 Lehrer
3363156 Capacitor with a polyolefin dielectric 1968-01-09 Cox
2213199 Voltage multiplier 1940-09-03 Bouwers et al.
Circuit arrangement for establishing a reference potential of a chassis of an electrical device such as a radio and/or TV receiver, such device being provided with at least one contactless touching switch operating under the AC voltage principle. The device is switched by touching a unipole touching field in a contactless manner so as to establish connection to a grounded network pole. The circuit arrangement includes in combination an electronic blocking switch and a unidirectional rectifier which separates such switch from the network during the blocking phase.
1.
A circuit arrangement for establishing, at the chassis of an
electrical device powered by a grounded AC supply network, a reference
potential with relation to ground, said device having at least one
contactless touching switch operating on the AC voltage principle,
the switch being operated by touching a unipole touching field in a
contactless manner, said arrangement comprising an electronic
switch for selectively blocking the circuit of the device from the
supply network, a half-wave rectifier including a pair of diodes
individually connected in series-aiding relation between the
terminals of the supply network and the terminals of the device for
separating the electronic blocking switch from the supply network
during a blocking phase defined by a prescribed half period of the
AC cycle, and a pair of condensers individually connected in
parallel with the respective diodes.
2. A circuit arrangement according to claim 1, wherein the
capacitances of the two condensers are of equal magnitude.
Description:
This invention relates to a circuit arrangement for establishing a
constant reference potential on the chassis of an electrical
instrument such as a radio and/or a TV receiver. Such instrument
includes at least one contactless touching switch operating under
the AC voltage principle, whereby by touching a single pole
touching field the contactless switch is operated.
In electronic devices, for example TV and radio receivers, there are used in ever increasing numbers electronic touching switches for switching and adjusting the functions of the device. In one known embodiment of this type of touching switch, which operates on a DC voltage principle, the function of the electronic device, is contactlessly switched by touching a unipole touching field, the switching being carried out by means of an alternating current voltage. When using such a unipole touching electrode, one takes advantage of the fact that the AC current circuit is generally unipolarly grounded. In order to close the circuit by touching the touching surface via the body of the operator to ground, it is necessary to provide an AC voltage on the touching field. In one special known embodiment there is employed a known bridge current rectifier for the current supply. This type of arrangement has the drawback that the chassis of the device changes its polarity relative to the grounded network pole with the network frequency. With such construction considerable difficulties appear when connecting measuring instruments to the device, such difficulties possibly eventually leading to the destruction of individual parts of the electronic device.
In order to avoid these drawbacks, the present invention provides a normal combination of a unidirectional rectifier with an electronic blocking switch that separates the chassis of the electronic device from the network during the blocking phase. In accordance with the present invention, the polarity of the chassis of the electronic device does not periodically change, because the electronic device is practically separated from the network during the blocking phase of the unidirectional rectifier by means of the electronic blocking switch.
In a further embodiment of the invention a further rectifier is connected in series with the unidirectional rectifier in the connection between the circuit and the negative pole of the chassis. Such further rectifier is preferably a diode which is switched in the transfer direction of the unidirectional rectifier. According to another feature of the invention there are provided condensers, a respective condenser being connected parallel with each of the rectifiers. Preferably the two condensers have equal capacitances. Because of the use of such condensers, which are required because of high frequency reasons, during the blocking phase there is conducted to the chassis of the electronic device an AC voltage proportional to the order of capacitances of the condensers. Thus there is placed upon the touching field in a desired manner an AC voltage, and there is thereby assured a secure functioning of the adjustment of the device when such touching occurs.
In
the embodiment of the invention employing two rectifiers there is
the further advantage that over a bridging over of the minus
conduit of the rectifier that is connected between the network and
the negative pole of the chassis connection, no injuries can be
caused by a measuring instrument in the electronic device itself
and in the circuit arrangement connected thereto.
In the accompanying drawing:
The sole FIGURE of the drawing is a circuit diagram of a preferred embodiment of the invention.
In the illustrated embodiment the current supply part of the device, shown at the left, is connected via connecting terminals A and B to an AC voltage source, the terminal B being grounded at 8. The current supply part consists of a unidirectional rectifier in the form of a diode 1 with its anode connected to the terminal I, the cathode of diode 1 being connected to one input terminal 9 of an electronic device 2. In the device 2 there is also arranged a sensor circuit 3, shown here mainly as a block, circuit 3 being shown as including a pnp input transistor the emitter of which is connected to an output terminal 11 of the device 2. The collector of such transistor is connected to the other output terminal 12 of the device 2. The base of the transistor is connected by a wire 13 to a unipolar touching field 4 which may be in the form of a simple metal plate instead of the pnp transistor shown, the sensor circuit itself may consist of a standard integrating circuit which controls, among other things, the periodic sequential switching during the touching time of the touching field 4. All of the circuits of the electronic device 2 are isolated in a known manner from the chassis potential. Between the network terminal B and the negative pole 10 of the chassis there is arranged in the direction opposite that of diode 1 a further diode 5, the anode of diode 5 being connected to the terminal 10, and the cathode of diode 5 being connected to the terminal B of the current supply. To provide for HF type bridging of the diodes 1 and 5 there are arranged condensers 6 and 7 respectively, which are connected in parallel with such diodes.
The invention functions by reason of the fact that in an AC network separate devices radiate electromagnetic waves which produce freely traveling fields in the body of the person who is operating and/or adjusting the device, thereby producing an alternating current through his body to ground, as indicated by the - line at the right of the circuit diagram. If now the person operating the device touches the switching field 4, then the pnp type input transistor of the sensor circuit 3, which is placed on a definite reference potential (for example 12 Volts) and is connected with the negative halfwave of the AC voltage potential, is made conductive. There is thereby released a control command in the sequential switching, for example, for switching the electronic device to the next receiving channel. It is understood that the most suitable connection is formed between ground and the touching field 4 by means of a wire. By the use of such wires it would be assured that in all cases the base of the transistor in circuit 3 is connected to ground. This would, however, not permit anyone to operate the switch without the use of an auxiliary means such as a wire. It will be assumed that the touching almost always results directly via the almost isolated human body. For this reason the AC current fields are necessary, because otherwise there cannot always be provided a ground contact. Thus this connection is established via the body resistance of the person carrying out the touching of the switch.
The positive half wave of the alternating current travels to the terminal 9 of the electronic device 2 after such current has been rectified and smoothed by the devices 1, 6. Such positive halfwave is also conducted to the sensor circuit 3. The thus formed current circuit is closed by way of the chassis of the electronic device 3, the diode 5, and the terminal B. When there is a negative halfwave of the alternating current delivered by the current supply, both diodes 1 and 5 remain closed so that the chassis of the device 2 remains separated from the network during the blocking phase. Nevertheless, by means of condensers 6 and 7 the chassis is placed in a definite network potential, which depends on the relationship of the order of magnitude of the two condensers 6 and 7. When the capacitances of such condensers are equal, there is placed upon the chassis of the device 2 the constant reference potential, and simultaneously there is present via the sensor circuit 3 the required AC voltage at the touching field 4 for adjusting the function or functions of the device 2 upon the touching of the touching field 4.
The reference character 15 indicates a terminal or point at which the potential of the chassis of the device 2 may be measured. As above explained, the diode 5 causes the potential of the chassis at 15 to be separated from the network ground when a negative AC halfwave arrives. It will be noted that the return conduit of the circuit is held at a fixed chassis potential. The input transistor of the sensor circuit 3 remains, however, locked because it is subjected to a DC current of about 12 volts. If now, by means of touching the touching field 4, the chassis potential is connected to ground, then the transistor switches through and releases a switching function.
If the connecting terminals AB of the current source are exchanged,
as by changing the plug, then there is still secured the condition
that the chassis of the device is separated from the network ground
via the diode, in this case the diode 1. The reference potential
of the chassis consequently remains constant and the changing AC
fields which are superimposed on the condensers can produce in the
touching human body an AC current voltage due to the fields which
are radiated by the device.
A suitable sensor which may be employed for the circuit 3 herein may be a sensor known as the "SAS 560 Tastatur IS," manufactured and sold by Siemens AG.
It is to be understood that the present invention is not limited to the illustrated environment. They can also be used in electronic blocking switch including a Thyristor circuit, which in the same manner separates the electronic device during the blocking phase from the network rectifier. With such Thyristor circuit the drawbacks described in the introductory portion of the specification of known circuit arrangements are also avoided.
Although the invention is illustrated and described with reference to a plurality of preferred embodiments thereof, it is to be expressly understood that it is in no way limited to the disclosure of such a plurality of preferred embodiments, but is capable of numerous modifications within the scope of the appended claims.
In electronic devices, for example TV and radio receivers, there are used in ever increasing numbers electronic touching switches for switching and adjusting the functions of the device. In one known embodiment of this type of touching switch, which operates on a DC voltage principle, the function of the electronic device, is contactlessly switched by touching a unipole touching field, the switching being carried out by means of an alternating current voltage. When using such a unipole touching electrode, one takes advantage of the fact that the AC current circuit is generally unipolarly grounded. In order to close the circuit by touching the touching surface via the body of the operator to ground, it is necessary to provide an AC voltage on the touching field. In one special known embodiment there is employed a known bridge current rectifier for the current supply. This type of arrangement has the drawback that the chassis of the device changes its polarity relative to the grounded network pole with the network frequency. With such construction considerable difficulties appear when connecting measuring instruments to the device, such difficulties possibly eventually leading to the destruction of individual parts of the electronic device.
In order to avoid these drawbacks, the present invention provides a normal combination of a unidirectional rectifier with an electronic blocking switch that separates the chassis of the electronic device from the network during the blocking phase. In accordance with the present invention, the polarity of the chassis of the electronic device does not periodically change, because the electronic device is practically separated from the network during the blocking phase of the unidirectional rectifier by means of the electronic blocking switch.
In a further embodiment of the invention a further rectifier is connected in series with the unidirectional rectifier in the connection between the circuit and the negative pole of the chassis. Such further rectifier is preferably a diode which is switched in the transfer direction of the unidirectional rectifier. According to another feature of the invention there are provided condensers, a respective condenser being connected parallel with each of the rectifiers. Preferably the two condensers have equal capacitances. Because of the use of such condensers, which are required because of high frequency reasons, during the blocking phase there is conducted to the chassis of the electronic device an AC voltage proportional to the order of capacitances of the condensers. Thus there is placed upon the touching field in a desired manner an AC voltage, and there is thereby assured a secure functioning of the adjustment of the device when such touching occurs.
I
n
the embodiment of the invention employing two rectifiers there is
the further advantage that over a bridging over of the minus
conduit of the rectifier that is connected between the network and
the negative pole of the chassis connection, no injuries can be
caused by a measuring instrument in the electronic device itself
and in the circuit arrangement connected thereto.In the accompanying drawing:
The sole FIGURE of the drawing is a circuit diagram of a preferred embodiment of the invention.
In the illustrated embodiment the current supply part of the device, shown at the left, is connected via connecting terminals A and B to an AC voltage source, the terminal B being grounded at 8. The current supply part consists of a unidirectional rectifier in the form of a diode 1 with its anode connected to the terminal I, the cathode of diode 1 being connected to one input terminal 9 of an electronic device 2. In the device 2 there is also arranged a sensor circuit 3, shown here mainly as a block, circuit 3 being shown as including a pnp input transistor the emitter of which is connected to an output terminal 11 of the device 2. The collector of such transistor is connected to the other output terminal 12 of the device 2. The base of the transistor is connected by a wire 13 to a unipolar touching field 4 which may be in the form of a simple metal plate instead of the pnp transistor shown, the sensor circuit itself may consist of a standard integrating circuit which controls, among other things, the periodic sequential switching during the touching time of the touching field 4. All of the circuits of the electronic device 2 are isolated in a known manner from the chassis potential. Between the network terminal B and the negative pole 10 of the chassis there is arranged in the direction opposite that of diode 1 a further diode 5, the anode of diode 5 being connected to the terminal 10, and the cathode of diode 5 being connected to the terminal B of the current supply. To provide for HF type bridging of the diodes 1 and 5 there are arranged condensers 6 and 7 respectively, which are connected in parallel with such diodes.
The invention functions by reason of the fact that in an AC network separate devices radiate electromagnetic waves which produce freely traveling fields in the body of the person who is operating and/or adjusting the device, thereby producing an alternating current through his body to ground, as indicated by the - line at the right of the circuit diagram. If now the person operating the device touches the switching field 4, then the pnp type input transistor of the sensor circuit 3, which is placed on a definite reference potential (for example 12 Volts) and is connected with the negative halfwave of the AC voltage potential, is made conductive. There is thereby released a control command in the sequential switching, for example, for switching the electronic device to the next receiving channel. It is understood that the most suitable connection is formed between ground and the touching field 4 by means of a wire. By the use of such wires it would be assured that in all cases the base of the transistor in circuit 3 is connected to ground. This would, however, not permit anyone to operate the switch without the use of an auxiliary means such as a wire. It will be assumed that the touching almost always results directly via the almost isolated human body. For this reason the AC current fields are necessary, because otherwise there cannot always be provided a ground contact. Thus this connection is established via the body resistance of the person carrying out the touching of the switch.
The positive half wave of the alternating current travels to the terminal 9 of the electronic device 2 after such current has been rectified and smoothed by the devices 1, 6. Such positive halfwave is also conducted to the sensor circuit 3. The thus formed current circuit is closed by way of the chassis of the electronic device 3, the diode 5, and the terminal B. When there is a negative halfwave of the alternating current delivered by the current supply, both diodes 1 and 5 remain closed so that the chassis of the device 2 remains separated from the network during the blocking phase. Nevertheless, by means of condensers 6 and 7 the chassis is placed in a definite network potential, which depends on the relationship of the order of magnitude of the two condensers 6 and 7. When the capacitances of such condensers are equal, there is placed upon the chassis of the device 2 the constant reference potential, and simultaneously there is present via the sensor circuit 3 the required AC voltage at the touching field 4 for adjusting the function or functions of the device 2 upon the touching of the touching field 4.
The reference character 15 indicates a terminal or point at which the potential of the chassis of the device 2 may be measured. As above explained, the diode 5 causes the potential of the chassis at 15 to be separated from the network ground when a negative AC halfwave arrives. It will be noted that the return conduit of the circuit is held at a fixed chassis potential. The input transistor of the sensor circuit 3 remains, however, locked because it is subjected to a DC current of about 12 volts. If now, by means of touching the touching field 4, the chassis potential is connected to ground, then the transistor switches through and releases a switching function.
A suitable sensor which may be employed for the circuit 3 herein may be a sensor known as the "SAS 560 Tastatur IS," manufactured and sold by Siemens AG.
It is to be understood that the present invention is not limited to the illustrated environment. They can also be used in electronic blocking switch including a Thyristor circuit, which in the same manner separates the electronic device during the blocking phase from the network rectifier. With such Thyristor circuit the drawbacks described in the introductory portion of the specification of known circuit arrangements are also avoided.
Although the invention is illustrated and described with reference to a plurality of preferred embodiments thereof, it is to be expressly understood that it is in no way limited to the disclosure of such a plurality of preferred embodiments, but is capable of numerous modifications within the scope of the appended claims.
A Cockcroft-Walton cascade circuit comprises an input voltage source and a pumping and storage circuit with a series array of capacitors with pumping and storage portions of the circuit being interconnected by silicon rectifiers, constructed and arranged so that at least the capacitor nearest the voltage source, and preferably one or more of the next adjacent capacitors in the series array, have lower tendency to internally discharge than the capacitors in the array more remote from the voltage source.
1. An improved voltage multiplying circuit comprising,
2. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor is a self-healing impregnated capacitor which is impregnated with a high voltage impregnant.
3. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor comprises a foil capacitor.
Description:
BACKGROUND OF THE INVENTION
The invention relates in general to Cockcroft-Walton cascade circuits for voltage multiplication and more particularly to such circuits with a pumping circuit and a storage circuit composed of capacitors connected in series, said pumping circuits and storage circuit being linked with one another by a rectifier circuit whose rectifiers are preferably silicon rectifiers, especially for a switching arrangement sensitive to internal discharges of capacitors, and more especially a switching arrangement containing transistors, and especially an image tube switching arrangement.
Voltage multiplication cascades composed of capacitors and rectifiers are used to produce high D.C. voltages from sinusoidal or pulsed alternating voltages. All known voltage multiplication cascades and voltage multipliers are designed to be capacitance-symmetrical, i.e., all capacitors used have the same capacitance. If U for example is the maximum value of an applied alternating voltage, the input capacitor connected directly to the alternating voltage source is charged to a D.C. voltage with a value U, while all other capacitors are charged to the value of 2U. Therefore, a total voltage can be obtained from the series-connected capacitors of a capacitor array.
In voltage multipliers, internal resistance is highly significant. In order to obtain high load currents on the D.C. side, the emphasis in the prior art has been on constructing voltage multipliers with internal resistances that are as low as possible.
Internal resistance of voltage multipliers can be reduced by increasing the capacitances of the individual capacitors by equal amounts. However, the critical significance of size of the assembly in the practical application of a voltage multiplier, limits the extent to which capacitance of the individual capacitors can be increased as a practical matter.
In television sets, especially color television sets, voltage multiplication cascades are required whose internal resistance is generally 400 to 500 kOhms. Thus far, it has been possible to achieve this low internal resistance with small dimensions only by using silicon diodes as rectifiers and metallized film capacitors as the capacitors.
When silicon rectifiers are used to achieve low internal resistance, their low forward resistance produces high peak currents and therefore leads to problems involving the pulse resistance of the capacitors. Metallized film capacitors are used because of space requirements, i.e., in order to ensure that the assembly will have the smallest possible dimensions, and also for cost reasons. These film capacitors have a self-healing effect, in which the damage caused to the capacitor by partial evaporation of the metal coating around the point of puncture (pinhole), which develops as a result of internal spark-overs, is cured again. This selfhealing effect is highly desirable as far as the capacitors themselves are concerned, but is not without its disadvantages as far as the other cirucit components are concerned, especially the silicon rectifiers, the image tubes, and the components which conduct the image tube voltage.
It is therefore an important object of the invention to improve voltage multiplication cascades of the type described above.
It is a further object of the invention to keep the size of the entire assembly small and the internal resistance low.
It is a further object of the invention to increase pulse resistance of the entire circuit.
It is a further object of the invention to avoid the above-described disadvantageous effects on adjacent elements.
It is a further object of the invention to achieve multiples of the foregoing objects and preferably all of them consistent with each other.
SUMMARY OF THE INVENTION
In accordance with the invention, the foregoing objects are met by making at least one of the capacitors in the pumping circuit, preferably including the one which is adjacent to the input voltage source, one which is less prone to internal discharges than any of the individual capacitors in the storage circuit.
The Cockcroft-Walton cascade circuit is not provided with identical capacitors. Instead, the individual capacitors are arranged according to their loads and designed in such a way that a higher pulse resistance is attained only in certain capacitors. It can be shown that the load produced by the voltage in all the capacitors in the multiplication circuit is approximately the same. But the pulse currents of the capacitors as well as their forward flow angles are different. In particular, the capacitors of the pumping circuit are subjected to very high loads in a pulsed mode. In the voltage multiplication cascade according to the invention, these capacitors are arranged so that they exhibit fewer internal discharges than the capacitors in the storage circuit.
The external dimensions of the entire assembly would be unacceptably large if one constructed the entire switching arrangement using such capacitors.
The voltage multiplication cascade according to the invention also makes it possible to construct a reliably operating
arrangement which has no tendency toward spark-overs, consistent with satisfactory internal resistance of the voltage multiplication cascade and small dimensions of the entire assembly. This avoids the above cited disadvantages with respect to the particularly sensitive components in the rest of the circuit and makes it possible to design voltage multiplication cascades with silicon rectifiers, which are characterized by long lifetimes. Hence, a voltage multiplication cascade has been developed particularly for image tube circuits in television sets, especially color television sets, and this cascade satisfies the highest requirements in addition to having an average lifetime which in every case is greater than that of the television set.
A further aspect of the invention is that at least one of the capacitors that are less prone to internal discharges is a capacitor which is impregnated with a high-voltage impregnating substance, especially a high-voltage oil such as polybutene or silicone oil, or mixtures thereof. In contrast to capacitors made of metallized film which have not been impregnated, this allows the discharge frequency due to internal discharges or spark-overs to be reduced by a factor of 10 to 100.
According to a further important aspect of the invention, at least one of the capacitors that are less prone to internal discharges is either a foil capacitor or a self-healing capacitor. In addition, the capacitor in the pumping circuit which is adjacent to the voltage source input can be a foil capacitor which has been impregnated in the manner described above, while the next capacitor in the pumping circuit is a self-healing capacitor impregnated in the same fashion.
Other objects, features and advantages of the invention will be apparent from the following detailed description of preferred embodiments, taken in connection with the accompanying drawing, the single FIGURE of which:
BRIEF DESCRIPTION OF THE DRAWING
is a schematic diagram of a circuit made according to a preferred embodiment of the invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The voltage multiplier comprises capacitors C1 to C5 and rectifiers D1 to D5 connected in a cascade. An alternating voltage source UE is connected to terminals 1 and 2, said voltage source supplying for example a pulsed alternating voltage. Capacitors C1 and C2 form the pumping circuit while capacitors C3, C4 and C5 form the storage circuit.
In the steady state, capacitor C1 is charged to the maximum value of the alternating voltage UE as are the other capacitors C2 to C5. The desired high D.C. voltage UA is picked off at terminals 3 and 4, said D.C. voltage being composed of the D.C. voltages from capacitors C3 to C5. Terminal 3 and terminal 2 are connected to one pole of the alternating voltage source UE feeding the circuit, which can be at ground potential. In the circuit described here, a D.C. voltage UA can be picked off whose voltage value is approximately 3 times the maximum value of the pulsed alternating voltage UE. By using more than five capacitors, a correspondingly higher D.C. voltage can be obtained.
The individual capacitors are discharged by disconnecting D.C. voltage UA. However, they are constantly being recharged by the electrical energy supplied by the alternating voltage source UE, so that the voltage multiplier can be continuously charged on the output side.
According to the invention, in this preferred embodiment, capacitor C1 and/or C2 in the pumping circuit are designed so that they have a lower tendency toward internal discharges than any of the individual capacitors C3, C4 and C5 in the storage circuit.
It is evident that those skilled in the art, once given the benefit of the foregoing disclosure, may now make numerous other uses and modifications of, and departures from the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.
Inventors:Petrick, Paul (Landshut, DT)
Schwedler, Hans-peter (Landshut, DT)
Holzer, Alfred (Schonbrunn, DT)
ERNST ROEDERSTEIN SPEZIALFABRIK
US Patent References:
3714528 ELECTRICAL CAPACITOR WITH FILM-PAPER DIELECTRIC 1973-01-30 Vail
3699410 SELF-HEALING ELECTRICAL CONDENSER 1972-10-17 Maylandt
3463992 ELECTRICAL CAPACITOR SYSTEMS HAVING LONG-TERM STORAGE CHARACTERISTICS 1969-08-26 Solberg
3457478 WOUND FILM CAPACITORS 1969-07-22 Lehrer
3363156 Capacitor with a polyolefin dielectric 1968-01-09 Cox
2213199 Voltage multiplier 1940-09-03 Bouwers et al.
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Requiring blog comments to obey well-defined rules does not infringe on the free speech of commenters.
Resisting the tide of post-modernity may be difficult, but I will attempt it anyway.
Your choice.........Live or DIE.
That indeed is where your liberty lies.
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