TELEFUNKEN PALCOLOR 6802 SUPERCONTROL CHASSIS 712A INTERNAL VIEW.

It's a Higly sophisticated chassis the Telefunken CHASSIS 712A .

It's the successor of the 712 which was introducing the InLine 20AX CRT Tube System.
and it's featuring first time a SWITCH MODE POWER SUPPLY and isolated mains chassis ground.

Main feature is the High serviceability for this tellye and even high reliabilty for this chassis even if it's running warm !

This is a full modular chassis and all parts are featured by Units combining multiple functions toghether.

It's divided in 3 main boards with all units and realizing the interconnectivity of all key signals to all units.

- BS100 ET309370366 SIGNALGRUNDPLATTE (SIGNAL BOARD BASE)

- BS400 ET309371922 ABLENK-GRUNDPLATTE (DEFLECTION BOARD BASE)

- BS405 AT349354065 SM-NETZTEIL (SUPPLY BASE BOARD)

- BS561 HORIZONTAL DEFLECTION BOARD - PANEL

Left side SIGNAL PLATINE

Middle bottom POWER SUPPLY and Synch + E/w and Frame Deflection oscillators and amplifier.

It has the unique "expandability" feature of the chassis.

All boards and panels, as pictured, can be analized and inspected in all parts and functions without limitations.

The parts and the units may all be tested "live" with measurements instruments like oscilloscope and multimeters, without difficulties.










































































CHASSIS 712A SUPPLY UNIT (NETZTEIL SM)
AT 349354065

This is a SMPS Supply unit which seems simple but is not !

- 3 SUB Units are composing the FINAL device unit

1 - MAINS RECTIFIER + DEGAUSS PTC + BOBBIN FILTERS + CAPS (burned !! !!!) BS422
ET 309378996 (NETZEINGANG)

2 - Pulse Command unit with S417T (Telefunken) BS423 AT349354067 (ANSTEUERUNG)

3 - Secondary Voltages Generation and separation (With a LM317) BS426 AT349354068
(SEC.SPANNUNGSERZEUGUNG).

TELEFUNKEN CHASSIS 712A LINE DEFLECTION + EHT + G2 + Dynamic Focus.

- BS 561

- LINE DEFLECTION OUTPUT TRANSFORMER + EHT with BU208A (Telefunken)
In this unit / modul are coming out even flyback pulse for chroma extraction and IF stages signal demodulation and phase comparator signalling.

BU208(A)

Silicon NPN
npn transistors,pnp transistors,transistors
Category: NPN Transistor, Transistor
MHz: <1 MHz
Amps: 5A
Volts: 1500V
HIGH VOLTAGE CAPABILITY
JEDEC TO-3 METAL CASE.

DESCRIPTION
The BU208A, BU508A and BU508AFI are
manufactured using Multiepitaxial Mesa
technology for cost-effective high performance
and use a Hollow Emitter structure to enhance
switching speeds.

APPLICATIONS:
* HORIZONTAL DEFLECTION FOR COLOUR TV With 110° or even 90° degree of deflection angle.

ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCES Collector-Emit ter Voltage (VBE = 0) 1500 V
VCEO Collector-Emit ter Voltage (IB = 0) 700 V
VEBO Emitter-Base Voltage (IC = 0) 10 V
IC Collector Current 8 A
ICM Collector Peak Current (tp < 5 ms) 15 A
TO - 3 TO - 218 ISOWATT218
Ptot Total Dissipation at Tc = 25 oC 150 125 50 W
Tstg Storage Temperature -65 to 175 -65 to 150 -65 to 150 oC
Tj Max. Operating Junction Temperature 175 150 150 °C

This chassis THE TELEFUNKEN CHASSIS 712A was even featuring a DYNAMIC FOCUS in the Line deflection EHT circuitry.

Dynamic focus voltages for a CRT are obtained by utilizing the combined parabolic conversion wave shapes for control of the focusing electrode to provide sharp focus at all points in the raster. A current source is coupled to the focus divider chain and the conversion wave shape controls the current in the divider chain by controlling the resistance in a transistor. No high voltage capacitors are required since the dynamic voltages are coupled into the chain near the low voltage end.


1. In a cathode ray tube device for displaying information by means of a raster:
a cathode ray tube having an anode and a focus electrode;
an input source of AC voltage having variations of substantially parabolic waveform at both horizontal and vertical rates;
a source of high voltage DC coupled to the anode;
transistor means for amplifying said input AC voltage and coupled to ground and to the ac input source; and
resistive means including first and second elements, the first element coupled between the source of high voltage and the focus electrode, the second element coupled between the focus electrode and the transistor means, the first element having a resistance substantially greater than that of the second element.
2. A cathode ray tube device for displaying information on a raster in accordance with claim 1 and wherein the resistive means also includes a manually variable resistive means. 3. A cathode ray tube device for displaying information on a raster in accordance with claim 2 wherein the manually controllable resistive means is a focus control. 4. A cathode ray tube device for displaying information on a raster in accordance with claim 1 and further including an amplifier stage coupled between the source of AC voltage and the transistor means. 5. A cathode ray tube device for displaying information on a raster in accordance with claim 1 and wherein said lower DC voltage is manually variable. 6. A cathode ray tube device for displaying information on a raster in accordance with claim 1 and further including a source of relatively low voltage DC coupled to the junction of the second resistive means element and the transistor means. 7. A cathode ray tube device for displaying information on a raster in accordance with claim 6 wherein the source of relatively low voltage DC is coupled to the junction through a clamping diode means and a biasing resistive means.

Description:

BACKGROUND OF THE INVENTION

This invention relates to the field of cathode ray tubes and, more particularly, to the provision for dynamic focusing voltages for use in such tubes.
In CRT devices, the major factor effecting spot focus is the variation in the distance from the electron gun to the fluorescent screen as the electron beam is swept from the center of the screen to the outer areas. For accurate focusing of the beam at all parts of the screen, the voltage applied to the focus electrode must be varied as a function of the distance from the spot to the Z axis of the CRT device, or, in other words, a function of the angle of deflection. This requires a voltage which varies as the beam moves horizontally and also as it moves vertically. As a reasonable approximation, this requires a horizontal voltage variation at line rate which is of essentially parabolic shape, and which is superimposed on a similar function at the vertical frame rate. Earlier CRT designs provided minimum spot de-focusing by optimizing focus at some point intermediate the center of the CRT screen and the edges of the raster; e.g., 30° from the Z axis was typical. Later it was recognized that a better solution would be to add to the static focusing voltage a voltage varying with the angle of deflection. All known circuits for accomplishing dynamic focusing in this way have required high voltage coupling capacitors and thus were expensive and not adaptable to solid state implementation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide dynamic focusing for a CRT utilizing waveforms which are already present in the CRT device.

It is a more particular object to devise such dynamic focusing with solid state circuitry and without large and costly high voltage capacitors.
These objects and others are provided by circuitry constructed in accordance with the invention in which the effective resistance of a transistor circuit is varied as a function of the convergence waveform. The transistor circuit is coupled in series with the focus divider chain, thus the current in the chain is varied accordingly. No high voltage capacitors are required for coupling the dynamic focus voltage to the CRT device since the transistor is near the low voltage end of the divider chain. The convergence waveform is a combination of two waveforms, one at line rate and one at frame rate, each essentially of parabolic form.

BRIEF DESCRIPTION OF THE DRAWING
FIG. 1a is a diagram of a CRT device showing the dimensional basis for the problem which is solved by the invention.
FIG. 1b is a diagram of a dot pattern of a CRT device lacking the circuit of the invention.
FIGS. 2a-2c are illustrations of the voltage waveforms required for the invention.
FIG. 3 is a block diagram of a device utilizing a CRT and including the invention.
FIG. 4 is an embodiment of the circuitry of the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
The diagram of FIG. 1a is intended to make clear the problem to be solved by the circuit of the invention. A 3-gun cathode ray tube (CRT) 10 of the type used in color television is shown in outline form. Such tubes typically have a rounded face plate or screen 11 (bearing the phosphors) with a radius of curvature R' longer than the entire tube length, however, the invention is applicable even to flat face plate tubes. The electron beam thus travels a path R2 from the point of deflection B to the edges of the screen 11 which is longer than the path R1 to the central portion, ΔR being the instantaneous difference. It will be seen then that the focusing voltage must be adjusted to compensate for this difference as the electron beam is swept from side to side and top to bottom of a raster.
FIG. 1b is a graphical representation of the spot defocusing which occurs at the outer portions of a CRT screen if dynamic focusing is not used. Instead of providing a sharp focus spot, as at the center of the screen, a small circle is produced which reduces the definition of the displayed information.
FIG. 2 shows the types of waveforms needed to provided dynamic focusing and eliminate the de-focusing effect of FIG. 1b. As may be seen in FIG. 2a, a roughly parabolic waveform repeating at frame rate, is needed for the vertical dimension. A similar waveform, FIG. 2b, but repeating at line rate, is needed for the horizontal dimension. FIG. 2c illustrates the combined waveform with the horizontal rate greatly reduced for clarity. As may be seen, no dynamic focusing voltage is applied as the electron beam sweeps the central portion of the screen.
FIG. 3 is a block diagram of a typical video receiver utilizing a raster to display information and is given here only for a better understanding of the invention as the invention could, for example, be utilized in a monitor which lacks much of this circuitry. The RF amplifier 12, local oscillator 13, mixer 14, IF amplifier 15, detector 16, sound portion 17, video amplifier 18 and color demodulator 19 all function as is well known in the art. The detector 16 output is also coupled to sync circuits 20, which provide synchronization for vertical and horizontal sweep circuits 21 and 22 respectively. The sync signals are coupled to the CRT 10 for providing a raster on the screen 11 of the tube. The sweep circuits 21 and 22 are also coupled to a convergence circuit 24 which is coupled to the CRT 10.
The vertical and horizontal sweep circuits 21 and 22 are coupled to the convergence circuit 24 which is connected to the convergence coil of the CRT 10. In this embodiment of the invention the convergence circuit 24 is also coupled through a dynamic focus circuit 26 to the focus circuit 27 which is coupled to the CRT 10.
FIG. 4 is a schematic diagram of one embodiment of the dynamic focus circuit of the invention. The terminal 30 is coupled to an amplifier including a transistor Q1. The terminal 30 could be coupled through the convergence circuit 24 as shown in FIG. 3 or from the pin cushion circuitry (not shown) which also has the vertical rate parabolic waveform. A terminal 31 may couple an input signal, as from the convergence circuit, which has the desired parabolic waveform at the horizontal or line rate. A terminal 33 is coupled to a high voltage source; i.e., the CRT anode voltage supply. Forming a voltage divider across the high voltage is a tapped resistor R1, a potentiometer or variable resistor R2 (the "focus" control) and a transistor Q2. The tap on resistor R1 is coupled to the focus electrode of the CRT by way of a terminal 34. It will be seen that the voltage on the terminal 34 can be varied or modulated by varying the effective resistance of the transistor Q2. A low voltage is coupled from a terminal 36 to the collector of the transistor Q2 by way of a biasing transistor R3 and a clamping diode D1. The voltage on terminal 36 is preferably a variable voltage to provide for the slight variations which occur from one CRT to another. A resistor R4 provides a feedback path, and a resistor R5 and a capacitor C1 provide the necessary time constant. Once the focus control R2 is set to provide minimum beam spot size at the center of the screen, the added voltage, having parabolic waveforms at both horizontal and vertical rate, will optimize the focusing at the edges of the raster.
Thus, there has been shown and described a means of providing dynamic focusing for a CRT by using a voltage such as the pin cushion correction voltage or the dynamic convergence voltage to control the effective resistance of a solid state circuit which in turn controls the current in the focus circuit of a CRT.
It will be apparent that there are a number of variations and modifications of the above-described embodiment and it is intended to include all such as fall within the spirit and scope of the appended claims.

TELEFUNKEN PALCOLOR 8812 SUPERCONTROL 26 CHASSIS 712A POWER SUPPLY UTILIZING A DIODE AND CAPACITOR VOLTAGE MULTIPLIER FOR TRACKING FOCUSING AND ULTOR VOLTAGESA television receiver high voltage power supply includes an ultor voltage output and an output voltage at some potential lower than the ultor voltage. The supply is responsive to kinescope beam current to vary the proportionate magnitudes of the high and lower voltages at some predetermined ratio.

1. In a television receiver electron beam deflection system, a power supply comprising: 2. A circuit as defined in claim 1 wherein said voltage multiplying means comprise at least: 3. A circuit as defined in claim 1 wherein: 4. A circuit as defined in claim 3 wherein said lower voltage output means further comprises: 5. A circuit as defined in claim 1 wherein said lower output voltage means comprises a focus voltage supply in a television receiver. 6. In a television receiver electron beam deflection circuit, a power supply comprising: 7. A circuit as defined in claim 6 and further comprising: 8. A circuit as defined in claim 6 wherein said lower output voltage means comprises a focus voltage in a television receiver.

Description:

POWER SUPPLY

This invention relates to high direct voltage power supplies and more particularly to television receiver high voltage and focus voltage supplies employing voltage multiplier arrangements.

In a television receiver, electron beam focusing in the kinescope is commonly achieved by utilizing an electrostatic focusing lens. For optimum focusing, it is necessary to vary the strength of the focusing lens with varying beam current and electron velocity (i.e., electron beam accelerating voltage). The focusing lens may comprise, for example, a pair of cylindrically shaped members mounted along the kinescope gun axis and having a separating space between them. Focusing is accomplished by the electric field produced by the geometry of the focusing members and the potential difference between them --that is, by the shape and magnitude of the focusing field. In order to maintain a beam or beams of electrons in optimum focus under varying beam current conditions and differing electron beam velocities, it is necessary to vary the focusing field. Since the geometry of the focusing members is fixed, it is necessary to adjust the voltage difference between these members to effect proper focusing.

As beam current increases, if the high voltage (the accelerating potential of the electron beam) remains substantially constant, as is the case with a regulated high voltage supply, a stronger focusing lens is needed to maintain focusing of the electron beam. The strength of the focusing lens can be increased, where, as in a color television receiver, the focusing members are coupled to a focus voltage supply and the high beam-accelerating voltage supply, respectively, by decreasing the output of the focus voltage supply to increase the potential gradient across the focusing lens. Thus, if the high voltage is constant and the beam current increases, the focus voltage as a percentage of the high voltage should be decreased to maintain focus at high beam current levels. Further, if the high voltage (electron-accelerating potential) is not maintained constant but decreases somewhat, and therefore the electron velocity decreases as beam current increases, the strength of the focusing lens should be increased which again requires a reduction in focus voltage. The percentage reduction in focus voltage customarily is equal to or greater than the corresponding percentage reduction in high voltage. This effect is commonly referred to as "focus tracking."

In television receivers, it is common to develop the high voltage from a secondary winding on the horizontal deflection output transformer. The flyback pulses developed during horizontal retrace are stepped up by the flyback transformer and rectified to produce the necessary high voltage. Further, it is common to provide separate rectifying means coupled to a lower voltage tap on the flyback transformer, to develop a focus voltage in a color television receiver.

U.S. Pat. No. 2,879,447 (issued to J. O. Preisig) assigned to the present assignee discloses such an arrangement including means for obtaining the necessary "focus tracking" described above.

The present invention obviates the need for separate transformer windings for the high voltage and focus voltage supplies but provides the desired focus tracking while deriving both high voltage (beam-accelerating voltage) and focus voltage from a common point on the horizontal output transformer by means of a voltage multiplier arrangement.

Circuits embodying the present invention include a horizontal output transformer having a high voltage winding, voltage-multiplying means coupled to the high voltage winding for producing the ultor voltage for a television receiver, and lower voltage output means associated with the voltage multiplying means and responsive to beam current for producing a voltage which tracks with the ultor voltage.

A better understanding of the present invention and its features and advantages can be obtained by reference to the single FIGURE and the description below.

In the drawing, a voltage supply constructed in accordance with the present invention is illustrated partially in block and partially in schematic form.

Referring to the FIGURE, horizontal deflection circuits 10 include a horizontal output stage (not shown) which produces a generally sawtooth current waveform characterized by a relatively slow rise time during a trace portion of each deflection cycle and a relatively rapid fall time during a retrace portion of each deflection cycle. For clarity, the deflection windings and associated horizontal output circuitry are not shown. Such a circuit is shown in detail in RCA Television Service Data 1968 No. 20, published by RCA Sales Corporation, Indianapolis, Indiana. It is sufficient for the purposes of the present invention to note that during the retrace portion of each deflection cycle, energy in the form of a voltage pulse commonly referred to as a flyback pulse is coupled by means of a primary winding 11 of a horizontal output transformer 12 to a secondary winding 13 thereof. The turns ratio of transformer 12 is selected to step up the voltage of this flyback pulse appearing at a high voltage terminal 14 on secondary winding 13. The voltage magnitude of this flyback pulse is partially dependent upon the turns ratio of transformer 12 and in the circuit illustrated is of the order of 6.25 kilovolts. This will produce an ultor voltage (V ₁ ) of approximately 25 kilovolts at ultor output terminal 40 when applied to the voltage quadrupler described below.

The voltage multiplier may be designed to multiply by any number n by adding or subtracting successive stages of multiplication. Thus, the necessary stepped up flyback voltage magnitude will be approximately V ₁ /n where V ₁ is the desired ultor voltage at terminal 40 and n is the number of stages of multiplication.

When the system is initially put into operation, positive flyback pulses will cause a first undirectional conductive device such as a diode 18 to be forward biased and conduct to charge a focus output charge storage device such as a capacitor 21 in the polarity shown and at a potential nearly equal to the peak flyback voltage appearing at high voltage terminal 14. As the flyback pulse decreases from its peak value, a second unidirectional conductive device 20 will then be forward biased, since its anode connected to terminal 50 will be more positive than its cathode, the latter being at the same voltage as terminal 14 at this time. When device 20 conducts, at least a portion of the charge on the output or focus charge storage device 21 is transferred to a first charge storage device 15 in the polarity shown. The transfer of charge continues during successive deflection cycles by the conduction of a third unidirectional conductive device 22 to charge a second charge storage device 23, the conduction of a fourth unidirectional conductive device 24 to charge a third charge storage device 17, the conduction of a fifth unidirectional conductive device 26 to charge a fourth charge storage device 25, the conduction of a sixth unidirectional conductive device 28 to charge a fifth charge storage device 19, and the conduction of a seventh unidirectional conductive device 30 to charge a final charge storage device 27. Assuming there are no losses within the system and no current is being drawn from the system as successive flyback pulses occur, the charge storage devices mentioned, with the exception of devices 15 and 21 as will be explained below, will each become charged to approximately the peak to peak value of the transformed flyback pulse waveform illustrated on the drawing. The charge storage device 21 charges only during the positive flyback pulse portion of the waveform and, as a consequence of a resistor 16 coupled in series with conductive device 18, charges to a voltage less than the peak amplitude of the flyback pulse. Therefore, when conductive device 20 conducts, storage device 15 charges to a voltage equal to the voltage across storage device 21 plus the negative voltage at terminal 14 occurring between flyback pulses (i.e., less than the peak-to-peak value of the waveform at terminal 14 by, for example, 200 volts). Adding the series voltages across charge storage devices 21, 23, 25 and 27, the output voltage at terminal 40 will be approximately three times the peak to peak flyback voltage plus the voltage across storage device 21 or almost four times the peak-to-peak flyback voltage. Kinescope charge storage device 29, illustrated in dotted lines, is the capacitance of the aquadag coating on the associated kinescope to ground. A resistance 31 is serially coupled from the final charge storage device 27 to an output terminal 40 and serves as a current-limiting resistance to protect the horizontal output circuit in the event of kinescope arcing.

As current is drawn from the system due to a flow of beam current within the kinescope, charge storage devices 21, 23, 25, 27 and 29 begin to discharge to supply the output current. As this occurs, the voltage across these devices will decrease. The unidirectional conductive devices 22, 26 and 30 conduct to equalize the voltage across storage devices in the upper series connection (in the drawing) with those across devices in the lower series connection. The flyback pulse will be coupled via charge storage devices 15, 17 and 19 and unidirectional conductive devices 18, 20, 26 and 30 will conduct when forward biased to restore the charge on the charge storage devices. Unidirectional devices 20, 24 and 28 then conduct to again equalize voltages. A mean direct current will flow through the charge transfer unidirectional conductive devices and resistance 16 serially coupled to the first unidirectional conductive device 18. As beam current increases, this mean current increases, thus developing a larger voltage drop across resistance 16. Since the voltage at terminal 50 is approximately one-quarter that of the ultor voltage V ₁ at terminal 40, and since resistance 16 is relatively large as compared with the forward resistance of the unidirectional conductive devices, the percentage decrease of the voltage V ₂ present at terminal 50 will be greater than the percentage decrease of the ultor voltage present at terminal 40 for high beam current. The utilization of resistance 16 in series relation to unidirectional conductive device 18 provides the proper relationship between the focus voltage and ultor voltage. It is noted that although resistance 16 is illustrated as a separate element, it may be incorporated within a unidirectional conductive device as for example, one having a higher forward resistance than the remaining devices 20, 22, 24, 26, 28 and 30.

A voltage dividing network comprising resistors 32, 34 and 36 serially coupled from terminal 50 to ground provide a network from which an adjustable voltage V ₃ can be extracted by means of a variable resistor 34.

Although the present invention is particularly suitable for focus tracking applications, it may be useful wherever a voltage which is responsive to beam current is desired.

The parameters listed below have been utilized in the preferred embodiment.

Capacitors 15, 17, 19 21, 23, 25, 27 2,000 picofarads Capacitor 29 2,500 picofarads Resistors 16 22 kiloohms 31 10 kiloohms Resistors 32 5 megohms 34 15 megohms 36 30 megohms Diodes 18, 20, 22 9 kilovolt peak inverse voltage,5 milliamp 24,26,28,30 5 ampere surge.

Other References:

IBM Technical Disclosure Bulletin, vol. 17, No. 4, Sep. 1974, K. H. Knickmeyer, pp. 1091-1092.
Arentsen et al, Electronic Applications, vol. 34, No. 2, Philips Semiconductor Application Lab., pp. 52-60.
Loewe Opta, Circuit Schematic, Aug. 1st, 1980.
Thomson-Brandt, Circuit Schematic, Apr. 15th, 1981.
Blaupunkt, Circuit Schematic, (undated).
Grundig, Circuit Schematic, (undated).
ITT, Circuit Schematic, (undated).
Telefunken, Circuit Schematic, (undated).
Schneider, Circuit Schematic, (undated).


TELEFUNKEN CHASSIS 712A Switching Power supply voltage stabilizer:

CHASSIS 712A SUPPLY UNIT AT 349354065 A power supply voltage stabilizer comprising a transformer, of which the primary winding is connected to a switching means for controlling power supply to the primary winding. An oscillator circuit is associated with the switching means in order to control on/off operation of the switching means. An abnormal overvoltage and/or overcurrent detection circuit is provided for terminating the oscillation operation of the oscillator circuit when impending overvoltage and/or overcurrent is detected.

1. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said oscillator circuit including an astable multivibrator, and variable impedance means for varying an oscillation frequency of said astable multivibrator.
2. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said transformer further including an auxiliary winding for developing a voltage proportional to that developed through said secondary winding, said voltage developed through said auxiliary winding being applied to said oscillator circuit for driving said oscillator circuit;
said abnormal condition detection means including an overvoltage detection circuit connected to said auxiliary winding for developing said control signal when an overvoltage is developed through said auxilliary winding;
said oscillator circuit comprising an astable multivibrator, and variable impedance means for varying an oscillation frequency of said astable multivibrator.
3. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said transformer further including an auxiliary winding for developing a voltage proportional to that developed through said secondary winding, said voltage developed through said auxiliary winding being applied to said oscillator circuit for driving said oscillator circuit;
said abnormal condition detection means including an overvoltage detection circuit connected to said auxiliary winding for developing said control signal when an overvoltage is developed through said auxiliary winding;
said overvoltage detection circuit including a latching means for continuously developing said control signal.
4. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means;
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said transformer further including an auxiliary winding for developing a voltage proportional to that developed through said secondary winding, said voltage developed through said auxiliary winding being applied to said oscillator circuit for driving said oscillator circuit;
said abnormal condition detection means including an overvoltage detection circuit connected to said auxiliary winding for developing said control signal when an overvoltage is developed through said auxiliary winding;
said overvoltage detection circuit further includes,
a reference voltage generation means for developing a reference voltage proportional to a voltage applied from said power source; and
comparing means for comparing said voltage developed through said auxiliary winding with said reference voltage in order to develop said control signal when said voltage developed through said auxiliary winding exceeds said reference voltage.
5. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said abnormal condition detection means including an overcurrent detection circuit connected to said primary winding for developing said control signal when an overcurrent flows through said primary winding;
wherein said oscillator circuit includes an astable multivibrator, and variable impedance means for varying an oscillation frequency of said astable multivibrator.
6. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said abnormal condition detection means including an overcurrent detection circuit connected to said primary winding for developing said control signal when an overcurrent flows through said primary winding;
said overcurrent detection circuit including a latching means for continuously developing said control signal;
said oscillator circuit including an astable multivibrator, and variable impedance means for varying an oscillation frequency of said astable multivibrator.
7. The power supply voltage stabilizer of claim 1, 2, 5, or 6, wherein said variable impedance means comprise a photo transistor, and wherein a light emitting diode is connected to said secondary winding for emitting a light of which amount is proportional to a voltage developed through said secondary winding, said light emitted from said light emitting diode being applied to said photo transistor. 8. The power supply voltage stabilizer of claim 7, wherein said light emitting diode and said photo transistor are incorporated in a single photo coupler. 9. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means; and
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said transformer further including an auxiliary winding for developing a voltage proportional to that developed through said secondary winding, said voltage developed through said auxiliary winding being applied to said oscillator circuit for driving said oscillator circuit;
said abnormal condition detection means including an overvoltage detection circuit connected to said auxiliary winding for developing said control signal when an overvoltage is developed through said auxilliary winding;
said overvoltage detection circuit including a latching means for continuously developing said control signal;
said oscillator circuit including an astable multivibrator, and variable impedance means for varying an oscillation frequency of said astable multivibrator.
10. A power supply voltage stabilizer comprising:
a transformer including a primary winding connected to a power source and a secondary winding for output purposes;
switching means connected to said primary winding for controlling power supply to said primary winding;
an oscillator circuit for controlling on/off operation of said switching means;
abnormal condition detection means for developing a control signal for terminating oscillation operation of said oscillator circuit when an abnormal condition is detected;
said transformer further including an auxiliary winding for developing a voltage proportional to that developed through said secondary winding, said voltage developed through said auxiliary winding being applied to said oscillator circuit for driving said oscillator circuit;
said abnormal condition detection means including an overvoltage detection circuit connected to said auxiliary winding for developing said control signal when an overvoltage is developed through said auxiliary winding;
said overvoltage detection circuit including,
a reference voltage generation means for developing a reference voltage proportional to a voltage applied from said power source; and
comparing means for comparing said voltage developed through said auxiliary winding with said reference voltage in order to develop said control signal when said voltage developed through said auxiliary winding exceeds said reference voltage;
said oscillator circuit including an astable multivibrator, and a variable impedance means for varying an oscillation frequency of said astable multivibrator.
11. A power supply voltage stabilizer comprising:
transformer means including a primary winding connected to a power source, a secondary winding for producing an output voltage, and an auxiliary winding for developing a voltage proportional to said output voltage produced by said secondary winding;
switching means connected to said primary winding for controlling the power supply from said power source to said primary winding;
oscillator circuit means for controlling the on/off operation of said switching means;
overvoltage detection circuit means connected to said auxiliary winding for developing a control signal to terminate the oscillation operation of said oscillator circuit means when an overvoltage condition is detected, said overvoltage detection circuit means including,
means for developing a reference potential, and
comparing means responsive to said voltage developed at said auxiliary winding and to said reference potential for comparing said reference potential with said voltage developed at said auxiliary winding and for generating said control signal to terminate the oscillation operation of said oscillator circuit means when said voltage developed at said auxiliary winding exceeds said reference potential.
12. A power supply voltage stabilizer comprising:
transformer means including a primary winding connected to a power source and having a voltage supplied thereto, a secondary winding for producing an output voltage, and an auxiliary winding for developing a voltage proportional to said output voltage produced by said secondary winding;
switching means connected to said primary winding for controlling the power supply from said power source to said primary winding;
oscillator circuit means for controlling the on/off operation of said switching means;
overcurrent detection circuit means connected to said primary winding for developing a control signal to terminate the oscillation operation of said oscillator circuit means when an overcurrent condition is detected, said overcurrent detection circuit means including,
means for monitoring said voltage supplied to said primary winding of said transformer means,
means for measuring the amount of current passing through said primary winding of said transformer means by translating said amount of current into a corresponding amount of voltage potential,
switching means responsive to said corresponding amount of voltage potential for switching to a first switched condition when the corresponding voltage potential exceeds a predetermined voltage potential and for switching to a second switched condition when said voltage potential does not exceed said predetermined voltage potential, and
comparing means responsive to said voltage supplied to said primary winding and connected to an output of said switching means for generating said control signal to terminate oscillation operation of said oscillator circuit means when said switching means switches to said first switched condition in response to the exceeding of said predetermined voltage potential by said corresponding voltage potential.
13. A power supply voltage stabilizer in accordance with claim 11 or 12 wherein said comparing means comprises a double base diode.

Description:

BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates to a power supply voltage stabilizer and, more particularly, to a power supply voltage stabilizer employing a switching system for controlling power supply to a transformer included in the power supply voltage stabilizer.
In the conventional power supply voltage stabilizer employing a switching system for controlling power supply to a transformer included in the power supply voltage stabilizer, there is a possibility that an abnormal overvoltage will be developed from an output terminal thereof and/or an abnormal overcurrent may flow through the primary winding of the transformer.
Accordingly, an object of the present invention is to provide a protection means for protecting the power supply voltage stabilizer from an abnormal overvoltage and/or overcurrent.
Another object of the present invention is to provide a detection means for detecting an impending overvoltage and/or overcurrent occurring within the power supply voltage stabilizer.
Other objects and further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
The power supply voltage stabilizer of the present invention mainly comprises a transformer including a primary winding connected to a commercial power source through a rectifying circuit, a secondary winding for output purposes, and an auxiliary winding. A driver circuit including a switching means is connected to the primary winding for controlling the power supply to the primary winding. An oscillator circuit is associated with the switching means to control ON/OFF operation of the switching means, thereby controlling the power supply to the primary winding.
To achieve the above objects, pursuant to an embodiment of the present invention, an overvoltage detection circuit is connected to the auxiliary winding. The overvoltage detection circuit functions to compare a voltage created in the auxiliary winding with the rectified power supply voltage, and develop a control signal, when an impending overvoltage is detected, for terminating operation of the oscillator circuit, thereby precluding power supply to the primary winding.
In another embodiment of the present invention, an overcurrent detection circuit is provided for detecting an impending overcurrent flowing through the primary winding to develop a control signal for terminating operation of the oscillator circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, which are given by way of illustration only, and thus are not limitative of the present invention and wherein:
FIG. 1 is a circuit diagram of a basic construction of a power supply voltage stabilizer of the present invention;
FIG. 2 is a block diagram of an embodiment of a power supply voltage stabilizer of the present invention, which includes an oscillator circuit and an over voltage detection circuit;
FIG. 3 is a circuit diagram of an embodiment of the overvoltage detection circuit included in the power supply voltage stabilizer of FIG. 2;
FIG. 4 is a circuit diagram of an embodiment of the oscillator circuit included in the power supply voltage stabilizer of FIG. 2;
FIG. 5 is a waveform chart for explaining operation of the oscillator circuit of FIG. 4;
FIG. 6 is a block diagram of another embodiment of a power supply voltage stabilizer of the present invention, which includes an oscillator circuit and an overcurrent detection circuit; and
FIG. 7 is a circuit diagram of an embodiment of the overcurrent detection circuit included in the power supply voltage stabilizer of FIG. 6.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now in detail to the drawings, and to facilitate a more complete understanding of the present invention, a basic construction of a power supply voltage stabilizer of the present invention will be first described with reference to FIG. 1.
The power supply voltage stabillizer mainly comprises a transformer T including a primary winding N ₁ connected to a commercial power source V, a secondary winding N ₂ connected to an output terminal V ₀ , and an auxiliary winding N ₃ . An oscillator circuit OSC is associated with the primary winding N ₁ and the auxiliary winding N ₃ to control the power supply from the commercial power source V to the primary winding N ₁ .
A rectifying circuit E is connected to the commercial power source V for applying a rectified voltage to a capacitor C ₁ . A negative terminal of the capacitor C ₁ is grounded, and a positive terminal of the capacitor C ₁ is connected to the collector electrode of a switching transistor Q ₅ through the primary winding N ₁ of the transformer T. The oscillator circuit OSC performs the oscillating operation when receiving a predetermined voltage, and develops a control signal toward the base electrode of the switching transistor Q ₅ to control the switching operation of the switching transistor Q ₅ . The switching transistor Q ₅ functions to control the power supply to the primary winding N ₁ , thereby controlling the power transfer to the secondary winding N ₂ and the auxiliary winding N ₃ .
The auxiliary winding N ₃ is connected to a capacitor C ₃ in a parallel fashion via a diode D ₁ . A positive terminal of the capacitor C ₃ is connected to the oscillator circuit OSC to supply a drive voltage Vc ₃ . A negative terminal of the capacitor C ₃ is connected to the emitter electrode of the switching transistor Q ₅ and grounded. The positive terminal of the capacitor C ₃ is connected to the primary winding N ₁ via a diode D ₂ and a capacitor C ₂ in order to stabilize the initial condition of the oscillator circuit OSC.
The secondary winding N ₂ functions to develop a predetermined voltage through the output terminal V ₀ . A smoothing capacitor C ₀ is connected to the secondary winding N ₂ via a diode D ₀ , and a series circuit of a resistor R ₀ and a light emitting diode D _i is connected to the smoothing capacitor C ₀ in a parallel fashion. The light emitted from the light emitting diode D _i is applied to a photo transistor Q ₈ employed in the oscillator circuit OSC. The light emitting diode D _i and the photo transistor Q ₈ are preferably incorporated in a single package as a photo coupler.
The light amount emitted from the light emitting diode D _i is proportional to the output voltage developed from the output terminal V ₀ . The photo transistor Q ₈ exhibits the impedance corresponding to the applied light amount. The oscillator circuit OSC is so constructed that the oscillation frequency is varied in response to variation of the impedance of the photo transistor Q ₈ . Accordingly, the ON/OFF operation of the switching transistor Q ₅ is controlled in response to the output voltage level, thereby stabilizing the output voltage level.
In the above constructed power supply voltage stabilizer, there is a possibility that an abnormal overvoltage is developed through the secondary winding N ₂ and the auxiliary winding N ₃ when the oscillator circuit OSC or the light emitting diode D _i is placed in the fault condition.
FIG. 2 shows an embodiment of the power supply voltage stabilizer of the present invention, which includes means for precluding occurrence of the above-mentioned overvoltage. Like elements corresponding to those of FIG. 1 are indicated by like numerals.
The power supply voltage stabilizer of FIG. 2 mainly comprises the transformer T, the oscillator circuit OSC, a driver circuit 1 including the switching transistor Q ₅ , and an overvoltage detection circuit 3.
The positive terminal of the capacitor C ₃ is connected to the driver circuit 1 and the oscillator circuit OSC to apply the driving voltage thereto. The positive terminal of the capacitor C ₃ is also connected to the primary winding N ₁ through the diode D ₂ and a parallel circuit of the capacitor C ₂ and a resistor R ₂ in order to stabilize the initial start operation of the oscillator circuit OSC. The secondary winding N ₂ is connected to an output level detector 2, which comprises the light emitting diode D _i as shown in FIG. 1. The ON/OFF control of the switching transistor Q ₅ is similar to that is achieved in the power supply voltage stabilizer of FIG. 1.
The secondary winding N ₂ and the auxiliary winding N ₃ are wound in the same polarity fashion and, therefore, the voltage generated through the auxiliary winding N ₃ is proportional to that voltage generated through the secondary winding N ₂ . The overvoltage detection circuit 3 is connected to receive the voltage at a point a as a power source voltage, and the voltage at a point b which is connected to the positive terminal of the capacitor C ₃ . When the voltage level at the point b exceeds a reference level, the overvoltage detection circuit 3 develops a control signal for terminating the operation of the oscillator circuit OSC.
FIG. 3 shows a typical construction of the overvoltage detection circuit 3.
The voltage at the point a is applied to a series circuit of resistors R ₃ and R ₄ , and grounded. The voltage at the point b is applied to the connection point of the resistors R ₃ and R ₄ via a diode D ₃ . The connection point of the resistors R ₃ and R ₄ is grounded through resistors R ₅ and R ₆ and a Zener diode Z ₁ . A double-base diode (Trade Name Programmable Unijunction Transistor) P ₁ is provided for developing the control signal to be applied to the oscillator circuit OSC. The anode electrode of the programmable unijunction transistor P ₁ is connected to the connection point of the resistors R ₃ and R ₄ , the gate electrode of the programmable unijunction transistor P ₁ is connected to the connection point of the resistors R ₅ and R ₆ , and the cathode electrode is connected to the oscillator circuit OSC.
When the voltage level of the point b exceeds a reference level VZ ₁ , the programmable unijunction transistor P ₁ is turned on to develop the control signal for terminating the oscillation operation of the oscillator OSC. In this way, the impending abnormal overvoltage is detected to protect the circuit elements. The ON condition of the programmable unijunction transistor P ₁ is maintained as long as the main power switch is closed, because the overvoltage detection circuit 3 is connected to receive the voltage from the point a.
The voltage detection circuit 3 does not necessarily employ the programmable unijunction transistor. Another element showing the latching characteristics such as a negative resistance element can be employed instead of the programmable unijunction transistor.
FIG. 4 shows a typical construction of the oscillator circuit OSC.
The oscillation circuit OSC mainly comprises an astable multivibrator including transistors Q ₁ , Q ₂ and Q ₃ , and an output stage including a transistor Q ₄ . The astable multivibrator is connected to receive the voltage appearing across the capacitor C ₃ , and develops an output signal of which frequency is determined by the circuit condition as long as the multivibrator receives a voltage greater than a predetermined level.
The output signal of the output stage is applied to the base electrode of the switching transistor Q ₅ included in the driver circuit 1 in order to switch the switching transistor Q ₅ with a predetermined frequency. A transistor Q ₉ is interposed between the base electrode of the transistor Q ₃ and the grounded terminal. The transistor Q ₉ is controlled by the control signal derived from the overvoltage detection circuit 3. Accordingly, the transistor Q ₃ is turned off to terminate the oscillation operation when the abnormal overvoltage is detected by the overvoltage detection circuit 3.
Now assume that a voltage Vc ₃ is developed across the capacitor C ₃ . When main power supply switch is closed, the voltage Vc ₃ varies in a manner shown by a curve X in FIG. 5. When the voltage Vc ₃ reaches a predetermined level, the astable multivibrator begins the oscillation operation. More specifically, the transistor Q ₁ is first turned on because the base electrode of the transistor Q ₁ is connected to a capacitor C ₄ of which the capacitance value is relatively small. At this moment, the transistor Q ₂ is held off.
Because of turning on of the transistor Q ₁ , the capacitor C ₄ is gradually charged through a resistor R ₄ and the transistor Q ₁ . Accordingly, the base electrode voltage of the transistor Q ₁ is gradually increased and, hence, the emitter electrode voltage of the transistor Q ₁ is also increased to turn on the transistor Q ₂ . When the transistor Q ₂ is turned on, the transistor Q ₃ is also turned on. The base electrode voltage of the transistor Q ₂ which is bypassed by a resistor R ₁ is reduced and, therefore, the transistor Q ₂ is stably on. At this moment, the transistor Q ₁ is turned off.
When the transistor Q ₃ is turned on, the transistor Q ₄ is turned on to develop a signal to turn on the switching transistor Q ₅ . Upon turning on of the transistor Q ₃ , the charge stored in the capacitor C ₄ is gradually discharged through paths shown by arrows in FIG. 4. Therefore, the base electrode voltage of the transistor Q ₁ is gradually reduced. When the base electrode voltage of the transistor Q ₁ becomes less than a predetermined level, the transistor Q ₁ is turned on, and the transistor Q ₂ , Q ₃ and Q ₄ are turned off. Accordingly, the transistor Q ₅ is turned off. After passing the initial start condition, the driving voltage Vc ₃ is held at a predetermined level as shown by a curve Y in FIG. 5 to maintain the above-mentioned oscillation operation.
The photo transistor Q ₈ is disposed in the discharge path of the capacitor C ₄ in order to control the discharge period in response to the impedance of the photo transistor Q ₈ . That is, the oscillation frequency is controlled in response to the light amount emitted from the light emitting diode included in the output level detector 2.
FIG. 6 shows another embodiment of the power supply voltage stabilizer of the present invention, which includes means for precluding occurrence of an abnormal overcurrent. Like elements corresponding to those of FIG. 2 are indicated by like numerals.
In the power supply voltage stabilizer of FIG. 1, there is a possibility that an abnormally large current flows through the primary winding N ₁ when the magnetic flux is saturated due to requirement of large current at the secondary winding side. The power supply voltage stabilizer of FIG. 6 includes an overcurrent detection circuit 4 for detecting an impending abnormally large current.
A resistor R ₉ is interposed between the emitter electrode of the switching transistor Q ₅ included in the driver circuit 1 and the grounded terminal. The overcurrent detection circuit 4 is connected to receive a signal from the connection point of the resistor R ₉ and the emitter electrode of the switching transistor Q ₅ , thereby developing a control signal for terminating the oscillation operation of the oscillation circuit OSC.
FIG. 7 shows a typical construction of the overcurrent detection circuit 4.
The voltage at the point a is applied to a series circuit of resistors R ₁₀ and R ₁₁ , and grounded. The collector electrode of a transistor Q ₁₀ is connected to the connection point of the resistors R ₁₀ and R ₁₁ through resistors R ₁₂ and R ₁₃ . The emitter electrode of the transistor Q ₁₀ is grounded. The base electrode of the transistor Q ₁₀ is connected to the connection point of the resistor R ₉ and the emitter electrode of the switching transistor Q ₅ via a resistor R ₁₄ .
When the switching transistor Q ₅ is turned on, a current flows through the resistor R ₉ . When the voltage drop across the resistor R ₉ exceeds a predetermined value due to a large current, the transistor Q ₁₀ is turned on to turn on the programmable unijunction transistor P ₁ . That is, when a large current flows through the primary winding N ₁ , the programmable unijunction transistor P ₁ develops the control signal to terminate the oscillation operation of the oscillator circuit OSC.
The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications are intended to be included within the scope of the following claims.

TELEFUNKEN CHASSIS 712A AMBIENT LIGHT RESPONSIVE CONTROL OF BRIGHTNESS, CONTRAST AND COLOR SATURATION

1. In a color television apparatus, a circuit for varying color display characteristics in accordance with variations in ambient light comprising: 2. In a color picture display system having a display device comprising: 3. The display system of claim 2 with kinescope means having a first set of electrodes and a second set of electrodes, 4. The display system of claim 2 with said light sensing means being responsive to the intensity of the ambient light and said parameter varying in accordance with the intensity of ambient light. 5. The display system of claim 4 with said modifying means increasing the gain of said luminance amplifying means at a greater rate than the gain of said chroma amplifying means as said ambient light intensity is increased. 6. A color television apparatus comprising: 7. In a color television receiver: 8. The receiver of claim 7 with said modifying means comprising a light dependent resistor means, 9. The receiver of claim 8 with second impedance means coupling said light dependent resistor means to said luminance gain means to control the gain of said luminance gain means. 10. The receiver of claim 9 with said second impedance means comprising a parallel combination of capacitance and resistance. 11. The receiver of claim 7 with said modifying means varying the gain of the luminance gain means at a greater rate than the gain of the chroma gain means as ambient light is varied. 12. The receiver of claim 7 with said modifying means being responsive to the intensity of ambient light and said parameter being varied as the intensity of the ambient light is varied. 13. The receiver of claim 7 with said modifying means attenuating the gain of said luminance amplifying means approximately fifty percent more than the gain of said chroma amplifying means, when the attenuation is measured in decibels, as said ambient light intensity is decreased. 14. In a color television receiver:

Description:

BACKGROUND OF THE INVENTION

The present invention relates generally to a television receiver control system and more particularly to a control system for maintaining proper balance between room lighting conditions and the level of picture tube excitation in a color television receiver. More especially the present invention functions to increase contrast, intensity and chroma signal strength when the room lighting level increases to diminish these parameters when the level of room lighting decreases.

Conventional television receivers, of course, have manually operable controls by means of which a viewer may set the level of contrast, intensity, and chroma signal strength to what he feels to be an optimum level for given room lighting conditions. Under changed room lighting conditions, the viewer will obtain the optimum viewing situation by changing these manual controls to a new preferred level.

It is also known in the prior art to automate this process for a black and white television receiver, for example, as taught in the U.S. Pat. No. 3,165,582 to Korda, issued Jan. 12, 1965, and the French patent 1,223,058 issued in June of 1960.

It is accordingly an object of the present invention to provide an automatic color saturation control for a color television receiver by providing separate, predetermined gains for the luminance and chroma for a given change in ambient light. In the disclosed preferred embodiment, the luminance signal is attenuated 3.3 dB and the chroma signal is attenuated 2.1 dB for a change in ambient light from 100 footcandles to 0.1 footcandles, measured at the display face.

SUMMARY OF THE INVENTION

The foregoing as well as numerous other objects and advantages of the present invention are achieved by providing a light sensitive element in a television receiver exposed to ambient light in the vicinity of the receiver for separately controlling brightness, contrast and chroma signal strength of the displayed picture in accordance with the level of ambient light. The circuit of a preferred embodiment of the present invention, in response to an increase of ambient light level, functions to increase the gain of the luminance amplifier in a relatively greater ratio than the increase in the gain of the chrominance amplifier whereas when the ambient light level decreases the respective gains of these two amplifiers are decreased, again, with the change in the luminance signal being in a greater proportion than the change in the chroma signal strength signal. By using the teaching of this invention, other gain relationships between the luminance components and chroma signal, for a given change in ambient light, may be automatically attained to achieve a desired result of luminance and color saturation.

BRIEF DESCRIPTION OF THE DRAWINGS

The aforementioned and other objects, features and advantages of the present invention will become more apparent from the following detailed description thereof when considered in conjunction with the drawings wherein:

FIG. 1 is a partial block diagram of a color television receiver employing the present invention;

FIG. 2 is a detailed schematic diagram of those portions of FIG. 1 embodying the present invention;

FIG. 3 illustrates chroma gain control characteristic curves for the circuit of FIG. 2; and

FIG. 4 is a graph showing changes in luminance and chroma signal strength according to changes in ambient light.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Considering first FIG. 1 which illustrates generally in block diagram form a color television receiver embodying the present invention, this receiver is seen to comprise a tuner and radio frequency amplifier 11 for detecting and amplifying incoming signals received on the antenna 13 and supplying those signals through an appropriate heterodyning process to an intermediate frequency amplifier 15. After detection in the detector 17, the luminance signals are passed through a delay 19 which compensates for the delays experienced by the chroma signal strength signals and then to the luminance amplifier 21, which, of course, corresponds to the video amplifier of a black and white receiver, to then be supplied to the cathode ray tube 23. The luminance or video amplifier may also be provided with gain control circuitry 25. An appropriate band pass amplifier 27 may be employed to separate out the chroma signal strength signals which are demodulated by the demodulator 29 in well known fashion to provide the three color difference signals to grids in the color cathode ray tube 23. While the present invention will be described with respect to such color difference signals, it is equally applicable to direct RGB color separation systems. An ambient light level detector 31 such as a light dependent resistor of the cadmium sulphide variety is physically located on the front of the television receiver in such a position as to be exposed to the light levels in the vicinity of the receiver so that its resistance varies inversely in accordance with variations in the ambient light levels around the receiver. These resistance variations are then employed to control the gain of the luminance amplifier 21 by way of gain control 25 and to control the gain of the chroma signal strength amplifier circuitry.

The entire color demodulation process is only generally depicted in the block diagram of FIG. 1 and is illustrated as a closed loop burst gain controlled chroma amplifier system with auxiliary chroma gain control introduced by way of the detector 33 from the ambient light level detector 31. A burst gain controlled chroma amplifier circuit is somewhat analogous to a black and white keyed AGC circuit and functions to set the gain level of the amplifier 27 in accordance with the color sync burst rather than the chroma signal level associated with a particular picture. While the present invention is being described with respect to this preferred type of gain control, it would, of course, be possible, in television circuits employing DC gain controls for chroma and/or contrast, to connect the ambient light tracking means to these direct current control circuits. The gain controlled chroma band pass amplifier, of course, supplies an output to a burst amplifier 35 which in turn drives an automatic phase control system 37 for synchronizing the 3.58 megacycle oscillator 39 the output of which is used in the color demodulation process.

Considering now FIG. 2 which illustrates schematically in detail those portions of the receiver of FIG. 1 necessary for a complete understanding of the present invention, the light dependent resistor 41 is mounted near the front of the television receiver in such a position as to adequately receive the ambient lighting conditions in the vicinity of the receiver. The resistance of this device is inversely proportional to the intensity of light incident thereon. If the room ambient light experiences an increase in level, the resistance of light dependent resistor 41 will decrease which decrease in turn lowers the voltage at the base of transistor 43 which in turn lowers the voltage at the emitter due to increased conduction through that transistor. This in turn increases the gain of the chroma amplifier transistor stage 45. More precisely the lowering the voltage at the emitter of transistor 43 raises a threshold in the automatic chroma control detector 33 so that the chroma signal strength signal, and hence the color saturation level, to the picture tube is increased. In the absence of a chroma signal with its synchronizing burst, the gain of the chroma amplifier is set at a maximum by the voltage divider comprising resistors 47 and 49. At this time there is no output from the automatic chroma control detector to the base of transistor 51 and that transistor is non-conducting.

When a color signal is received, the detector provides an output signal proportional to the color sync burst level which turns on the transistor 51 to control the gain of the chroma amplifier stage 45 so as to maintain the desired output level. The turn on level of transistor 51 represents a fairly well defined knee in the chroma gain control characteristic curves illustrated in FIG. 3. Operation beyond the knee or threshold of such a curve operates to maintain a nearly constant chroma output level while operation below the knee of the curve and its extension as the almost vertical dotted line represents the open loop characteristic wherein there is no automatic gain control to the chroma amplifier. Since transistor 51 is non-conducting below the knee of this curve, gain control is delayed until the output signal reaches this threshold point. Since variations in the potential at the emitter of transistor 43 cause corresponding variations in the potential at the base of transistor 51, it is clear that a variation in the resistance of the light dependent resistor 41 will, for example, cause the gain control characteristic curve to shift from that depicted by curve A to that depicted by curve B and that for a given burst level input as represented by the vertical dotted line, two different levels of chroma output which, in turn, cause two different levels of color saturation will be achieved by a change in the light intensity incident on the resistor 41.

To better understand the operation of detector 33, assume that the burst voltage induced across the top half of the secondary of transformer 34 is in phase with the 3.58 megacycle reference signal and that the burst voltage induced across the bottom half of the secondary of transformer 34 is 180° out of phase with this reference signal. Assuming further that the diodes 36 and 38 have equal characteristics, that the resistors 40 and 42 are equal, that the capacitors 44 and 46 are equal, and that the two portions of the secondary winding on transformer 34 are equal when no burst is being received, diodes 36 and 38 will conduct equally but during opposite portions of a cycle. Diode 36 conducts during negative excursions of the reference signal whereas diode 38 conducts during positive portions of that reference wave form. Thus during the negative portions of the reference wave form diode 36 conducts to charge capacitor 44 so that its right hand plate is negative and its left hand plate is positive. During the positive excursions, diode 38 conducts to charge capacitor 46 with its right hand plate positive and its left hand plate negative. Under this assumed no burst input condition the net charge on these capacitors yields a voltage on line 48 which is zero. If noise is introduced into the system, it will be of equal amplitude but opposite phase across the two diodes and both diodes will be affected to an equal extent resulting in no change in the voltage on line 48. When during a color telecast a burst signal is present, we may assume that the burst voltage induced across the two portions of the secondary of transformer 34 are of equal amplitude to the 3.58 megacycle reference signal. With this situation the diode 36 will not conduct since the burst voltage is equal in phase and amplitude to the reference signal and its anode and cathode remain at the same potential. The diode 38 will, however, conduct readily since the burst and reference signals have an additive rather than a cancelling effect on it resulting in the diode 38 conducting twice as much as in the previous no burst example and resulting in the capacitor 46 charging to about twice its previous voltage which voltage is presented on line 48 as a control signal.

Suppose now that the burst signal amplitude is reduced to one half that of the foregoing example. With this new assumption the phase relationships remain as before but now diode 36 will conduct about one half its previous amount while diode 38 conducts about one and one half times its previous amount resulting in a voltage on line 48 which is about one half the previous voltage.

The voltage on line 48 which is approximately proportional to the burst voltage is applied to the base of transistor 51 which biases the base of the chroma amplifier transistor 45 thereby controlling the gain of that chroma amplifier stage.

A variation in threshold can be achieved by altering the conduction points of the diodes 36 and 38. This is accomplished by applying a bias voltage to the junction of these two diodes to alter their respective points of conduction thereby changing the output voltage on line 48. For example, if a positive 2-volt direct current bias is applied to the junction of the two diodes, under a no burst input condition, diode 38 will conduct sooner and turn off later than with no bias applied, while diode 36 will turn on later and off sooner than under the no bias condition. This results in a control voltage on line 48 under the no burst condition. In other words, a bias voltage applied to the junction of the two diodes acts as an additional bias on the chroma amplifier stage thereby affecting its gain.

The control of brightness (intensity) and contrast is achieved in the present invention by a second light dependent resistor 53 which is optically coupled to a light emitting diode 55. LIght emitting diode 55 and light dependent resistor 53 are encapsulated in a light impervious housing illustrated by the dotted line 57. As the room ambient light changes, the change in the resistance of light dependent resistor 41 causes a change in the current through light emitting diode 55. Variations in the current through the light emitting diode cause corresponding variations in the light emitted thereby which in turn cause variations in the resistance of the light dependent resistor 53. The luminance or video amplifier is here illustrated as a three transistor amplifier with the output of the first amplifier stage being across resistor 59. A diminution in the resistance of light dependent resistor 53 causes a lowering of this output impedance and thus a diminution in the gain of the luminance amplifier. In other words, if the light intensity in the room increases, the resistance of resistor 41 will decrease causing a decrease in the current through light emitting diode 55 and, therefore, a decrease in its light output level and this decreased light will cause an increase in the resistance of light dependent resistor 53 thus increasing the effective output load resistor for the transistor 61 thus increasing the gain of the video amplifier as desired.

Variable resistor 63 being effectively in series with the light dependent resistor 41 may be varied to compensate for differences in specific light dependent resistors so as to establish a desired level of picture brightness, contrast and color saturation for a given level of ambient light. Variable resistance 65 which is in parallel with the light dependent resistor 41 may be varied so as to effectively change the range of variation in brightness, contrast and color saturation for a specific range of variations in the ambient light conditions. The entire automatic control circuit of the present invention may be bypassed by closing the defeat switch 67.

Looking now at FIGS. 2 and 4, the relative attenuation of the chroma channel and luminance channel will become apparent. Looking first at FIG. 4, the abscissa is the measure of ambient illumination in foot candles on a log scale, and the ordinate is the measure of attenuation of signal amplitude in dB. At 100 footcandles there is 0 dB attenuation of luminance and chroma signals and as the ambient illumination decreases to 0.1 foot candles, it is seen that the chroma signal line 72 is down 2.1 dB while the luminance signal line 72 is down 3.3 dB. This ratio has been found to be a highly satisfactory ratio giving a very pleasing picture at all ambient light levels between 0.1 footcandles and 100 footcandles of ambient light.

The manner in which this variation in luminance attenuation is achieved may be seen by looking at FIG. 2. As mentioned, the chroma channel signal is varied by the conduction level of transistor 43. As light dependent resistor 41 changes in resistance, the conduction level of transistor 43 will also change with the degree of change being determined by divider resistances 75 and 76. Further the luminance channel gain is determined by resistor 77 since it is this resistor which will control the signal level of light emitting diode 55 which in turn will control the gain to luminance transistor 61. It is these resistors which determine the relative amount of attenuation of gain in the chroma and luminance channels as the ambient light is changed. In this embodiment, resistance 75 is 5.6 k ohms, resistance 76 is 4.3 k ohms, resistance 77 is 3.9 k ohms, resistance 78 is 7.5 k ohms, the voltage applied to the upper terminal of resistance 78 is 35 volts, resistance 63 is 500 ohms, resistance 65 is 25 k ohms, resistance 69 is 4.7 k ohms, capacitance 71 is 47 microfarads, resistance 59 is 1 k ohm, resistance 59a is 6.8 k ohms, resistance 62a is 1 k ohms, resistance 64a is 100 ohms, resistance 64b is 6.8 k ohms. Light dependent resistor 41 is a Clariex CL-11360, photocoupler unit 57 is Magnavox Part Number 701482. Transistors 43, 61, 62, and 64 are 2N3962, 2N4916, MPSA20 and 25C685A, respectively. This invention has been incorporated in a Magnavox Company T979 color television chassis.

The effective load resistance for the transistor 61 under direct current conditions is the parallel combination of the resistor 59 and the series pair of resistors 53 and 69 whereas due to the presence of capacitor 71 this effective load resistance under alternating current conditions is the parallel combination of resistors 59 and 53. Thus the ratio of AC to DC gain for this video amplifier stage may be selected by proper selection of these parameters so as to maintain the black level of the picture essentially constant.

Thus while the present invention has been described with respect to a specific embodiment, numerous modifications will suggest themselves to those of ordinary skill in the art. Since the luminance and chroma gains are individually controlled for a given change in ambient light, the gain ratios between the luminance and chroma channels may be selected as desired to achieve a desired effect for a given change in ambient light. Also, while the present invention has been described in the environment of a television receiver, the invention could equally well be used in television monitors as well as many other types of display devices. Accordingly the scope of the present invention is to be measured only by that of the appended claims.

TELEFUNKEN CHASSIS 712A AMBIENT LIGHT RESPONSIVE CONTROL OF BRIGHTNESS, CONTRAST AND COLOR SATURATION Gain control arrangement useful in a television signal processing system
In a color television receiver, first and second amplifiers are respectively included in the luminance and chrominance channels to permit control of contrast and saturation. The amplifiers have gain versus control voltage characteristics including linear portions extrapolated to cut off at predetermined voltages which may or may not be the same. A first potentiometer is coupled between a source of fixed voltage equal to the extrapolated cut off voltage of the first amplifier and a gain controlling voltage source. The gain controlling voltage may be produced by a circuit including an element responsive to ambient light. The wiper of the first potentiometer is coupled to the first amplifier to couple a voltage developed at a predetermined point of the first potentiometer to the first amplifier to control its gain. A second potentiometer is coupled between a source of voltage equal to the extrapolated cut off voltage of the second amplifier and the gain controlling voltage source to receive a portion of the gain controlling voltage in accordance with the ratio of the extrapolated cut off voltages of the first and second amplifiers. The wiper of the second potentiometer is coupled to the second amplifier to couple a voltage developed at a predetermined point of the second potentiometer to the second amplifier to control its gain. In this manner, the contrast of the receiver may be varied over a relatively wide range while saturation is maintained substantially constant.


1. In a color television signal processing system of the type including luminance and chrominance signal processing channels, apparatus comprising:
first and second amplifiers respectively included in said luminance and chrominance channels, said amplifiers having gain versus control voltage characteristics including linear portions extrapolated to cut-off at predetermined voltages which may or may not be the same voltage;
a gain controlling voltage source;
means for coupling said gain controlling voltage to said first amplifier to control its gain;
potentiometer means coupled between a fixed voltage substantially equal to the extrapolated cut-off voltage of said second amplifier and to said gain controlling voltage source to recieve a portion of said gain controlling voltage in accordance with the ratio of the extrapolated cut-off voltages of said first and second amplifiers; and

means for coupling a voltage developed at a predetermined point on said potentiometer means to said second amplifier to control its gain.
2. The apparatus recited in claim 1 wherein said means for coupling said gain controlling voltage to said first amplifier includes another potentiometer coupled between a source of fixed voltage substantially equal to the extrapolated cut-off voltage of said first amplifier and said gain controlling voltage source. 3. In a color television signal processing system of the type including luminance and chrominance signal processing channels, apparatus comprising:
first and second amplifiers respectively included in said luminance and chrominance channels, said amplifiers having gain control voltage characteristics including linear portions extrapolated to cut-off at substantially the same predetermined voltage;
a source of gain controlling voltage; and
means for coupling said gain controlling voltage to said first and second amplifiers.
4. Apparatus comprising:
first variable gain amplifying means for amplifying a first signal in response to a first DC control signal, said first amplifying means having a first gain versus DC control voltage characteristic including a linear region, said linear region having a gain substantially equal to 0 at a DC control voltage equal to V_O ;
second variable gain amplifying means for amplifying a second signal in response to a second DC control signal, said second amplifying means having a second gain versus DC control voltage characteristic including a linear region, said linear region having a gain substantially equal to 0 at a DC control voltage equal to AV_O, where A is a number greater than 0;
a first source of fixed voltage substantially equal to V_O ;
a second source of fixed voltage substantially equal to AV_O ;
means for developing a third DC control voltage v;
means for developing a portion Av of said third control voltage v;
first means for deriving said first control voltage including means for providing the difference between said third control voltage v and said fixed voltage V_O and means for adding a predetermined portion of the difference between said third control voltage v and said fixed voltage V_O to said DC control voltage v; and
second means for deriving said second control voltage including means for providing the difference between a portion Av of said third control voltage v and said fixed voltage AV_O and means for adding a predetermined portion of the difference between said portion Av and said fixed voltage AV_O to said DC control voltage v.
5. The apparatus recited in claim 4 wherein A is equal to 1. 6. The apparatus recited in claim 4 wherein said first amplifying means is included in a luminance channel of a televeision signal processing system and said second amplifying means is included in a chrominance channel of said television signal processing system. 7. The apparatus recited in claim 6 wherein means for developing said third control voltage includes means responsive to ambient light. 8. The apparatus recited in claim 4 wherein said first means includes first voltage divider means coupled between said fixed voltage V_O and said third DC control voltage v; and wherein said second means includes second voltage divider means coupled between said fixed voltage AV_O and said portion Av. 9. The apparatus recited in claim 8 wherein said first voltage divider means includes a first potentiometer, said first potentiometer having a wiper coupled to said first amplifying means; and wherein said second voltage divider means includes a second potentiometer, said second potentiometer having a wiper coupled to said amplifying means. 10. The apparatus recited in claim 4 wherein said second gain versus DC control voltage characteristic includes a region between said voltage AV_O and a voltage V_B where the gain is greater than 0, said voltage V_B being substantially equal to the voltage at which said second amplifying means has a gain substantially equal to 0; and wherein said second source of fixed voltage includes means for coupling said voltage V_B to said second amplifying means. 11. The apparatus recited in claim 10 wherein said second source of said voltage AV_O includes a third source of fixed voltage V_B ; potentiometer means coupled between said third source of fixed voltage V_B and said means for developing said third DC control voltage; and means coupled to said potentiometer means for developing said voltage AV_O at a point along said potentiometer means; said potentiometer means including a wiper coupled to said second amplifier means, said wiper being adjustable to couple a DC voltage V_FB and said third control voltage to said second amplifying means.

Description:

The present invention pertains to gain controlling apparatus and particularly to apparatus for controlling the gains of amplifiers included in the luminance and chrominance channels of a television signal processing system.
Recently, the maximum brightness available from television receivers has increased sufficiently so that a pleasing image may be reproduced under conditions of high ambient light as well as under conditions of low ambient light. Apparatus is known for automatically controlling the contrast and brightness properties of a television receiver in response to ambient light to provide a pleasing image over a range of ambient light conditions. Such apparatus is described in U.S. Pat. Nos. 3,027,421, entitled "Circuit Arrangements For Automatically Adjusting The Brightness And The Contrast In A Television Receiver," issued to H. Heijligers on Mar. 27, 1962 and 3,025,345, entitled "Circuit Arrangement For Automatic Readjustment Of The Background Brightness And The Contrast In A Television Receiver," issued to R. Suhrmann on Mar. 13, 1962.
Apparatus is also known for automatically controlling the contrast and saturation properties of a color television receiver by controlling the gains of luminance and chrominance channel amplifiers, respectively, in response to ambient light. Such apparatus is described in U.S. Pat. Nos. 3,813,686 entitled "Ambient Light Responsive Control Of Brightness, Contrast And Color Saturation," issued to Eugene Peter Mierzwinski, on May 28, 1974 and 3,814,852 entitled "Ambient Light Responsive Control Of Brightness, Contrast and Color Saturation," issued to Eugene P. Mierzwinski on June 4, 1974.
Also of interest is apparatus for manually controlling the gains of luminance and chrominance channel amplifiers. Such apparatus is described in U.S. Pat. Nos. 3,374,310, entitled "Color Television Receiver with Simultaneous Brightness and Color Saturation Controls," issued to G.L. Beers on Mar. 19, 1968; 3,467,770, entitled "Dual Channel Automatic Control Circuit," issued to DuMonte O. Voigt on June 7, 1966; and 3,715,463, entitled "Tracking Control Circuits Using a Common Potentiometer," issued to Lester Tucker Matzek, on Feb. 6, 1973.
When the gain of luminance channel is adjusted to control the contrast of an image, either manually or automatically, in response to ambient light, it is desirable to simultaneously control the gain of the chrominance channel in such a manner that the ratio of the gains of the luminance and chrominance channels is substantially constant over a wide range of contrast control to maintain constant saturation. If the proper ratio between the amplitudes of the chrominance and luminance signals is not maintained incorrect color reproduction may result. For instance, if the amplitude of the luminance signals are increased without correspondingly increasing the amplitude of the chrominance signals, colors may become desaturated, i.e., they will appear washed out or pastel in shade. Furthermore, it may be desirable to provide controls for presetting the gains of the luminance and chrominance channels to compensate for tolerance variations in other portions of the television signal processing apparatus.
In accordance with the present invention, apparatus is provided which may be utilized in a color television receiver to control contrast over a relatively wide range while maintaining constant saturation. The apparatus includes first and second amplifiers having gain versus control voltage characteristics including linear portions extrapolated to cut off at predetermined voltages which may or may not be the same. Means couple a gain controlling voltage source to the first amplifier to control its gain. Potentiometer means are coupled between a source of fixed voltage substantially equal to the extrapolated cut off voltage of the second amplifier and the source of gain controlling voltage to receive a portion of said gain controlling voltage in accordance with the ratio of the extrapolated cut off voltages of the amplifiers. A voltage developed at a predetermined point along the potentiometer means is coupled to the second amplifier to control its gain.
In accordance with another feature of the present invention, the means for coupling said gain controlling voltage to said first amplifier includes another potentiometer coupled between a source of fixed voltage substantially equal to the extrapolated cut off voltage of said first amplifier and said gain controlling voltage source.
In accordance with still another feature of the present invention the gain controlling voltage source includes an element responsive to ambient light .
These and other aspects of the present invention may best be understood by references to the following detailed description and accompanying drawing in which:
FIG. 1 shows the general arrangement, partly in block diagram form and partly in schematic diagram form, of a color television receiver employing an embodiment of the present invention;
FIG. 1A shows, in schematic form, a modification to the embodiment shown in FIG. 1;
FIG. 2 shows graphical representation of gain versus control voltage characteristics of amplifiers utilized in the embodiment shown in FIG. 1;
FIG. 3 shows graphical representations of gain versus control voltage characteristics of amplifiers which may be utilized in the receiver shown in FIG. 1;
FIG. 4 shows, in schematic form, another embodiment of the present invention which may be utilized to control the amplifiers whose gain versus control voltage characteristics are shown in FIG. 3;
FIG. 5 shows, in schematic form, an amplifier which may be utilized in the receiver shown in FIG. 1; and
FIG. 6 shows, in schematic form, another amplifier which may be utilized in the receiver shown in FIG. 1.
Referring now to FIG. 1, the general arrangement of a color television receiver employing the present invention includes a video signal processing unit 112 responsive to radio frequency (RF) television signals for generating, by means of suitable intermediate frequency (IF) circuits (not shown) and detection circuits (not shown), a composite video signal comprising chrominance, luminance, sound and synchronizing signals. The output of signal processing unit 112 is coupled to chrominance channel 114, luminance channel 116, a channel 118 for processing the synchronizing signals and a channel (not shown) for processing sound signals.
Chrominance processing channel 114 includes chrominance processing unit 120 which serves to remove chrominance signals from the composite video signal and otherwise process chrominance signals. Chrominance signal processing unit 120 may include, for example, automatic color control (ACC) circuits for adjusting the amplitude of the chrominance channels in response to amplitude variations of a reference signals, such as a color burst signal, included in the commposite video signal. Chrominance signal processing circuits of the type described in the U.S. Pat. No. 3,740,462, entitled "Automatic Chroma Gain Control System," issued to L.A. Harwood, on June 19, 1973 and assigned to the same assignee as the present invention are suitable for use as chrominance processing unit 120.
The output of the chrominance signal processing unit 120 is coupled to chrominance amplifier 122 which serves to amplify chrominance signals in response to a DC signal v_C generated by gain control network 142. As illustrated, chrominance amplifier 122 provides chrominance signals to a chroma demodulator 124. An amplifier suitable for use as chrominance amplifier 122 will subsequently be described with reference to FIG. 6.
Chroma demodulator 124 derives color difference signals representing, for example, R-Y, B-Y and G-Y information from the chrominance signals. Demodulator circuits of the general type illustrated by the chrominance amplifier CA 3067 integrated circuit manufactured by RCA Corporation are suitable for use as chrominance demodulator 124.
The color difference signals are applied to a video driver 126 where they are combined with the output signals -Y of luminance channel 116 to produce color signals of the appropriate polarity, representing for example, red (R), green (G) and blue (B) information. The color signals are coupled to kinescope 128.
Luminance channel 116 includes a first luminance signal processing unit 129 which relatively attenuates undesirable signals, such as chrominance or sound signals or both, present in luminance channel 116 and otherwise processes the luminance signals. The output of first luminance processing unit 129 is coupled to luminance amplifier 130 which serves to amplify the luminance signals in response to a DC control signal v_L generated by gain control unit 142 to thereby determine the contrast of a reproduced image. An amplifier suitable for use as luminance amplifier 130 will subsequently be described with reference to FIG. 5. The output of luminance amplifier 130 is coupled to second luminance signal processing unit 132 which serves to further process luminance signals. A brightness control unit 131 is coupled to luminance signal processing unit 132 to control the DC content of the luminance signals. The output -Y of luminance processing unit 132 is coupled to kinescope driver 126.
Channel 118 includes a sync separator 134 which separates horizontal and vertical synchronizing pulses from the composite video signal. The synchronizing pulses are coupled to horizontal deflection circuit 136 and vertical deflection circuit 138. Horizontal deflection circuit 136 and vertical deflection circuit 138 are coupled to kinescope 128 and to a high voltage unit 140 to control the generation and deflection of one or more electron beams generated by kinescope 128 in the conventional manner. Deflection circuits 136 and 138 also generate horizontal and vertical blanking signals which are coupled to luminance signal processing unit 132 to inhibit its operation during the horizontal and vertical retrace intervals.
Gain control unit 142 is coupled to luminance amplifier 130 and to chrominance amplifier 122 to control their gains. Gain control unit 142 includes a PNP transistor 152 arranged as an emitter-follower amplifier. The collector of transistor 152 is coupled to ground while its emitter is coupled through a series connection of a potentiometer 156 and fixed resistor 154 to a source of positive supply voltage V_O. The wiper of potentiometer 156 is coupled to luminance amplifier 130. The series connection of a potentiometer 158 and a variable resistor 159 is coupled between the source of positive supply voltage V_O and the emitter of transistor 152. The wiper of potentiometer 158 is coupled to chrominance amplifier 122.
The base of transistor 152 is coupled to the wiper of a potentiometer 146. One end of potentiometer 146 is coupled to the source of positive supply voltage V_O through a fixed resistor 144. The other end of potentionmeter 146 is coupled to ground through a light dependent resistor (LDR) 148. LDR 148 is a resistance element whose impedance varies in inverse relationship with light which impinges on it. LDR 148 may comprise a simple cadmium sulfide type of light dependent element or other suitable light dependent device. LDR 148 is desirably mounted to receive ambient light in the vicinity of the screen of kinescope 128.
A single pole double-throw switch 150 has a pole coupled to the junction of potentiometer 146 and LDR 148. A resistor 151 is coupled between the wiper of potentiometer 146 and the other pole of switch 150. The arm of switch 150 is coupled to ground.
The general arrangement shown in FIG. 1 is suitable for use in a color television receiver of the type shown, for example, in RCA Color Television Service Data 1973 No. C -8 for a CTC-68 type receiver, published by RCA Corporation, Indianapolis, Indiana.
In operation, gain control circuit 142 maintains the ratio of the gain of chrominance amplifier 122 to the gain of amplifier 130 constant in order to maintain constant saturation while providing for contrast adjustment either manually by means of potentiometer 146 or automatically by means of LDR 148. If the gain of luminance were adjusted to control the contrast of an image without a corresponding change in the gain of chrominance amplifier 122, the amplitudes of luminance signals -Y and color difference signals R-Y, B-Y and G-Y would not, in general, be in the correct ratio when combined by divider 126 to provide the desired color.
When switch 140 is in the MANUAL position, the gains of chrominance amplifier 122 and luminance amplifier 130 are controlled by adjustment of the position of potentiometer 146. When switch 150 is in the AUTO position the gain of the chrominance amplifier 122 and luminance amplifier is automatically controlled by the response of LDR 148 to ambient light conditions. The voltage developed at the wiper of potentiometer 146 (base of transistor 152) when switch 150 is in the AUTO position is inversely related to the ambient light recieved by LDR 148. It is noted that the values of resistors 114, potentiometer 146, LDR 148 and resistor 151 are desirably selected such that the adjustment of the wiper arm of potentiometer 146 when switch 150 is in the MANUAL position does not substantially affect the voltage developed at the base of transister 152 when switch 150 is placed in the AUTO position.
The control voltage v developed at the wiper arm of potentiometer 146 is coupled through emitter-follower transistor 152 to the common junction of potentiometer 156 and variable resistor 159. A control voltage v_L comprising v plus a predetermined portion of the difference V_O -v developed across the series connection of fixed resistor 154 and potentiometer 156, depending on the setting of potentiometer 156, is coupled to luminance amplifier 130 to control its gain. Similarly, a control voltage v_C comprising v plus a predetermined portion of the difference voltage V_O -v developed across the series connection of potentiometer resistor 158 and variable resistor 159, depending on the setting of the wiper of potentiometer 158, is coupled to chrominance amplifier 122 to control its gain.
The gain of luminance amplifier 130 may be pre-set to a desired value by the factory adjustment of potentiometer 156. Similarly, variable resistor 159 is provided to allow factory pre-set of the gain of the chrominance amplifier 122. Potentiometer 158 is provided to allow customer control of saturation.
Referring to FIG. 2, the gain versus voltage characteristics of chroma amplifier 122 (g_C) and luminance amplifier 130 (g_L) are shown. The characteristic g_C has a reversed S-shape including a linear portion 214. Extrapolated linear portion 214 of g_C intersects the GAIN axis at G_C and intersects the CONTROL VOLTAGE axis at V_O. Similarly, the characteristics g_L has a reverse S-shape characteristic including a linear portion 212. Extrapolated linear portion 214 of g_L intersects the GAIN axis at G_L and intersects the CONTROL VOLTAGE axis at V_O.
From FIG. 2, the expression for linear portion 212 of g_L is ##EQU1## The expression for linear portion 214 of g_C is ##EQU2## From FIG. 1, the expression for v_L is v_L = v + (V_O -v) K₁ [3]
where K₁ is determined by the voltage division of fixed resistor 154 and potentiometer 156 at the wiper of potentiometer 156. When the wiper of potentiometer 156 is at the emitter of transistor 152, K₁ =0. The expression for v_C is v_C = v + (V_O -v)K₂ [4]
where K₂ is determined by the voltage division of potentiometer 158 and fixed resistor 159 at the wiper of potentiometer 158. By combining equations [1] and [3], the equation for g_L becomes ##EQU3## By combining equations [2] and [4], the equation for g_C becomes ##EQU4## The ratio of g_L to g_C is thus ##EQU5## It is noted that this ratio is independent of DC control voltage v. Thus, although DC control voltage v may be varied either manually or in response to ambient light to control the contrast of an image reproduced by kinescope 128, the saturation remains constant.
With reference to FIG. 2, it is noted that although the linear portion 214 of g_C has an extrapolated gain equal to 0 at a control voltage equal to V_O, the non-linear portion of g_C does not attain a gain equal to 0 until a control voltage equal to V_B. That is, a control voltage of V_O will not cut-off chrominance amplifier 122.
In FIG. 1A there is shown, in schematic form, a modification to the arrangement of gain control network 142 of FIG. 1 with provisions which allow a viewer to cut off chrominance amplifier 122 to produce a more pleasing image under conditions of poor color reception due, for example, to noise or interference. The modifications to gain control unit 142 shown in FIG. 1A include coupling potentiometer resistor 158 between a source of positive supply voltage V_B, the value of V_B being greater than the value of V_O, and coupling a resistor 160 from a tap-off point 162 along potentiometer 158 to ground. The value of potentiometer 158 and resistor 160 and the location of tap 162 are selected so that voltage V_O is developed at tap 162.
The arrangement shown in FIG. 1A allows for the adjustment of contrast while constant saturation is maintained and additionally allows a viewer, by adjusting the wiper of potentiometer 158 to voltage V_B, to cut off chrominance amplifier 122.
Referring to FIG. 3 there are shown gain versus DC control voltage characteristics of chrominance and luminance amplifiers which do not have the same extrapolated linear cut off control voltage. The gain versus control voltage characteristic g_L ' of the luminance amplifier has a reverse S-shape characteristic including a linear portion 312. Extrapolated linear portion 312 of g_L ' intersects the GAIN axis at a gain G_L ' and intersects the CONTROL VOLTAGE axis at a voltage V_O '. The gain versus control voltage characteristic g_C ' of the chrominance amplifier has a reverse S-shape characteristic having a linear portion 314. Extrapolated linear portion 314 of g_C ' intersects the GAIN axis at a gain G_C ' and intersects the CONTROL VOLTAGE axis at a voltage AV_O ', where A is a number greater than zero.
From FIG. 3, the expression for linear portion 312 of g_L ' is ##EQU6## where v_L ' is the DC conrol voltage coupled to the luminance amplifier. The expression for linear portion 314 of g_C ' is ##EQU7## where v_C ' is the DC control voltage coupled to the chrominance amplifier.
A modified form of the control network 142 of FIG. 1 suitable for controlling the gain of a chrominance and a luminance amplifier having characteristics such as shown in FIG. 3 is shown in FIG. 4. Similar portions of FIGS. 1 and 4 are identified by reference numbers having the same last two significant digits and primed (') designations. The modified portions of FIG. 1 shown in FIG. 4 include the series connection resistors 460 and 462 coupled between the emitter of transistor 452 to ground. The values of resistors 460 and 462 are selected so that a portion Av' of the DC control voltage v' developed at the emitter of transistor 452 is developed at the junction of resistors 460 and 462. Furthermore, the series connection of potentiometer 458 and variable resistor 459 is coupled between the junction of resistor 460 and 462 and a source of positive supply voltage AV_O '.
From FIG. 4, the expression for control voltage v_L ' developed at the wiper of potentiometer 456 is v_L ' = v' + (v_O '-v')K₁ ' [10]
where K₁ ' is determined by the voltage division at the wiper of potentiometer 456. The expression for control voltage v_C ' developed at the wiper of potentiometer 458 is V_C ' = Av' + (AV_O ' - Av')K ₂ ' [11]
where K₂ ' is determined by the voltage division at the wiper of potentiometer 458. By combining equations [8] and [10], ##EQU8## By combining equations [9] and [11], ##EQU9## The ratio of g_L ' to g_C ' is given by the expression ##EQU10## It is noted that this ratio is independent of DC control voltage v'. Therefore, gain control network 442 of FIG. 4 also allows for the adjustment of contrast while maintaining constant saturation.
It is noted that if A were made equal to 1, the arrangement gain control unit 442 would be suitable to control the gains of chrominance and luminance amplifiers having the characteristics shown in FIG. 2.
In FIG. 5, there is shown an amplifier suitable for use as luminance amplifier 130 of FIG. 1. The amplifier includes a differential amplifier comprising NPN transistors 532 and 534. The commonly coupled emitters of transistors 532 and 534 are coupled to the collector of an NPN transistor 528. The emitter of transistor 528 is coupled via a resistor 530 to ground. The collector of transistor 532 and the collector of transistor 534, via load resistor 536, is coupled to a bias voltage provided by bias supply 546, illustrated as a series connection of batteries. The bases of transistors 532 and 534 are respectively coupled to a lower bias voltage through resistors 533 and 535 respectively.
An input signal, such as, for example, the output signal provided by first luminance processing circuit 129 of FIG. 1 is coupled to the base of transistor 532 via terminal 542. The output signal of the amplifier is developed at the collector of transistor 534 and coupled to output terminal 544.
A DC control voltage, such as v_L provided by gain control unit 142 of FIG. 1, is coupled to the base of an NPN transistor 514, arranged as an emitter-follower, via terminal 512. The collector of transistor 514 is coupled to bias supply 546. The emitter of transistor 514 is coupled to ground through the series connection of resistor 516, a diode connected transistor 518 and resistor 520.
The anode of diode 520 is coupled to the base of an NPN transistor 538. The collector of transistor 538 is coupled to the collector of transistor 534 while its emitter is coupled to ground through resistor 540. Transistor 538, resistor 540, diode 518 and resistor 520 are arranged in a current mirror configuration.
The emitter of transistor 514 is coupled to the base of a PNP transistor 522. The emitter of transistor 522 is coupled to bias supply 546 while its collector is coupled to the base of transistor 528 and to ground through the series connection of a diode connected transistor 524 and resistor 526. Transistor 528, resistor 530, diode 524 and resistor 526 are arranged in a current mirror configuration
In operation, the DC control voltage coupled to terminal 512 is coupled in inverted fashion to the anode of diode 524 by transistor 522. As a result, current directly related to the voltage developed at the anode of diode 524 flows through diode 524 and resistor 526. Due to the operation of the current mirror arrangement of diode 524, resistor 526, transistor 528 and resistor 530, a similar current flows through the emitter circuit of transistor 528. The gain of the differential amplifier comprising transistors 532 and 534 is directly related to this current flowing in the emitter circuit of transistor 528, and therefore is inversely related to the DC control voltage at terminal 512. The gain versus DC control voltage characteristics of the differential is similar to g_L shown in FIG. 2.
Further, a current is developed through the series connection of resistor 516, diode 518 and resistor 520 in direct relationship to the DC control coupled to terminal 512. A similar current is developed through resistor 540 due to the operation of the current mirror comprising diode 518, resistor 520, transistor 538 and resistor 540. This current is of the opposite sense to that provided by the current mirror arrangement of diode 524, resistor 526, transistor 528 and resistor 530 and is coupled to the collector of transistor 534 so that the DC voltage at output terminal 544 does not substantially vary with the DC control voltage.
In FIG. 6, there is shown an amplifier suitable for use as chroma amplifier 120 of FIG. 1. The amplifier shown in FIG. 6 is of the type described in U.S. patent application Ser. No. 530,405 entitled "Controllable Gain Signal Amplifier," fled by L.A. Harwood et al. on Dec. 6, 1974.
The amplifier comprises a differential amplifier including NPN transistors 624 and 625 having their bases coupled to terminal 603 via a resistor 626. Chrominance signals, provided by a source of chrominance signals such as chrominance processing unit 120 of FIG. 1, are coupled to terminal 603. The current conduction paths between the collectors and emitters of transistors 624 and 625 are respectively coupled to ground via resistors 628, 629 and 630.
A current splitter circuit comprising an NPN transistor 632 and a diode 634 is coupled to the collector of transistor 624. Diode 634 and the base-emitter junction of transistor 632 are poled in the same direction with respect to the flow of collector current in transistor 624. It desirable that conduction characteristics of transistor 632 and diode 635 be substantially matched. Similarly, the collector of transistor 625 is coupled to a second current splitter comprising a transistor 633 and a diode 635.
An output load circuit comprising series connected resistors 636 and 638 is coupled between the collector of transistor 632 and a source of operating voltage provided by bias supply 610. Amplified chrominance signals are provided at output terminal 640 for coupling, for example, to a chroma demodulator such as chroma demodulator 124 of FIG. 1. Similarly, series connected load resistors 637 and 639 are coupled between the collector of transistor 633 and bias supply 610. An output terminal 641 at the junction of resistors 637 ad 639 provides oppositely phased chrominance signals to those provided at terminal 640. The gain associated with the cascode combination of transistors 624 and 632 is controlled in response to a DC control voltage, such as, for example, v_C provided by gain control unit 142 of FIG. 1, coupled to the base of an NPN transistor 646 via terminal 602. Direct control current is supplied from the emitter of transistor 646 to diode 634 and 635 via a series resistor 652. A signal by-pass circuit comprising a series resonant combination 654 of inductance and capacitance is coupled from the anode of diode 634 to ground. Resonant circuit 654 is tuned, for example, to 3.58 MHz to provide a low impedance path to ground for color subcarrier signals.
Bias voltages and currents are supplied to the amplifier arrangement by bias supply 610, illustrated as a series connection of batterys. A voltage B+ is coupled to the collector of transistor 646. A lower bias voltage is coupled to the load circuits of transistors 632 and 633. The bases of transistors 632 and 633 are coupled in common to a still lower bias voltage. The bases of transistors 624 and 625 are coupled to a still lower bias voltage via substantially equal in value resistors 658 and 659. A resistor 694 is coupled from the common junction of resistors 658 and 659 to ground.
In operation, a quiescent operating current is provided through resistor 630. In the absence of an input signal at terminal 603, this current will divide substantially equally between the similarly biased transistors 624 and 625. If the DC control voltage at terminal 602 is near ground potential, transistor 646 will be effectively cut off and no current will flow in resistor 652 and diodes 634 and 635. In that case, neglecting the normally small difference betweeen collector and emitter currents of NPN transistors, the collector currents of transistors 624 and 625 will flow, respectively, in transistors 632 and 633. The transistors 632 and 633 are operated in common base mode and form cascode signal amplifiers with respective transistors 624 and 625. With the DC control voltage near ground potential, one-half of the quiescent current from resistor 630 flows in each of the load circuits and maximum gain for chrominance signals supplied from terminal 603 is provided.
Transistor 646 will conduct when the DC control voltage approaches the bias voltage supplied to the bases of transistors 632 and 633 of the current splitters. By selection of the circuit parameters, diodes 634 and 635 may be arranged to operate in a range between cut off to the conduction of all of the quiescent operating current supplied via resistor 630, thereby cutting off transistors 632 and 633 to provide no output signals at terminals 640 and 641.
At a DC control voltage intermediate to that corresponding to cut off of transistors 632 and 633 on the one hand and cut off of diodes 634 and 635 on the other hand, the voltage gain of the illustrated amplifier will vary in a substantially linear manner with the DC control voltage.
It is noted that although the characteristics shown in FIGS. 2 and 3 were reversed S-shaped characteristics, the characteristics could have other shapes including linear portions. For example, the characteristics could be substantially linear. Furthermore, with reference to FIG. 3, although g_C ' was shown as having a linear portion that had a cut off control voltage lower than the cut off control voltage of the linear portion of g_L ', the cut off control voltage of the linear portion of g_C ' could be greater than the cut off voltage for the linear region of g_L '. In addition, the gain control units and associate amplifiers could be arranged to utilize voltages opposite in polarity to those shown. These and other modifications are intended to be within the scope of the invention.