The PHILIPS CHASSIS K12 WAS the first PHILIPS monocarrier type. Previous K11 was a dual panel development type.
The PHILIPS chassis K12 doesn't share technology from previous CHASSIS K11 except for the 20AX SYSTEM CRT TUBE.
The chassis is a pretty unique type because it was introducing improvements and technology philosophy kindly singular and unique in it's fashion.
From signal processing to Video Matrixing to power supply technology and many further aspects this chassis was a reference to understand PHILIPS development flexibility.
This chassis has known many further versioning and enhancements even in more sophisticated and complex types with different CRT TUBE like the 30AX FAMILY HERE SHOWN.
Modularity is the main concept of construction but some Units like the E/W and FRAME UNIT gave problems in the insertion slot which often was burning the contacts producing several faults.
The solution was simple: A complete hardening with soldering and reworking of the enpoints of the Units contacts was a definitive solution for long time. But when the damage was more extended the only solution was to direct wire all contacts from Unit to chassis !
Line Deflection + EHT, Line synchronized Supply, EW Correction + Supply, Frame Deflection, Signal Section Parts.
PHILIPS 26C964 PICASSO CHASSIS K12I CIRCUIT ARRANGEMENT IN A PICTURE DISPLAY DEVICE UTILIZING A STABILIZED SUPPLY VOLTAGE CIRCUIT:
PHILIPS 26C964 PICASSO CHASSIS K12I Line synch Switched Mode Power Supply with Line deflection output Transistor Drive Circuit:
1. An electrical circuit arrangement for a picture display device operating at a given line scanning frequency, comprising a source of unidirectional voltage, an inductor, first switching transistor means for periodically energizing said inductor at said scanning frequency with current from said source, an electrical load circuit coupled to said inductor and having applied thereto a voltage as determined by the ratio of the ON and OFF periods of said transistor, means for maintaining the voltage across said load circuit at a given value comprising means for comparing the voltage of said load circuit with a reference voltage, means responsive to departures of the value of the load circuit voltage from the value of said reference voltage for varying the conduction ratio of the ON and OFF periods of said transistor thereby to stabilize said load circuit voltage at the given value, a line deflection coil system for said picture display device, means for energizing said line deflection coil system from said load voltage circuit means, means for periodically interrupting the energization of said line deflection coil comprising second switching means and means coupled to said inductor for deriving therefrom a switching current in synchronism with the energization periods of said transistor and applying said switching current to said switching means thereby to actuate the same, and means coupled to said switching means and to said load voltage circuit for producing a voltage for energizing said 2. A circuit as claimed in claim 1 wherein the duty cycle of said switching 3. A circuit as claimed in claim 1 further comprising an efficiency first 4. A circuit as claimed in claim 3 further comprising at least a second diode coupled to said deriving means and to ground, and being poled to 5. A circuit as claimed in claim 1 wherein said second switching means comprises a second transistor coupled to said deriving means to conduct simultaneously with said first transistor, and further comprising a coil coupled between said driving means and said second transistor and a third diode shunt coupled to said coil and being poled to conduct when said 6. A circuit as claimed in claim 1 further comprising a horizontal oscillator coupled to said first transistor, said oscillator being the 7. A circuit as claimed in claim 1 further comprising means coupled to said inductor for deriving filament voltage for said display device.
Description:
The invention relates to a circuit arrangement in a picture display device wherein the input direct voltage between two input terminals, which is obtained be rectifying the mains alternating voltage, is converted into a stabilized output direct voltage by means of a switching transistor and a coil and wherein the transistor is connected to a first input terminal and an efficiency diode is connected to the junction of the transistor and the coil. The switching transistor is driven by a pulsatory voltage of line frequency which pulses are duration-modulated in order to saturate the switching transistor during part of the period dependent on the direct voltage to be stabilized and to cut off this transistor during the remaining part of the period. The pulse duration modulation is effected by means of a comparison circuit which compares the direct voltage to be stabilized with a substantially constant voltage, the coil constituting the primary winding of a transformer.Such a circuit arrangement is known from German "Auslegeschrift" 1.293.304. wherein a circuit arrangement is described which has for its object to convert an input direct voltage which is generated between two terminals into a different direct voltage. The circuit emp
loys a switch connected to the first terminal of the input voltage and periodically opens and closes so that the input voltage is converted into a pulsatory voltage. This pulsatory voltage is then applied to a coil. A diode is arranged between the junction of the switch and the coil and the second terminal of the input voltage whilst a load and a charge capacitor in parallel thereto are arranged between the other end of the coil and the second terminal of the input voltage. The assembly operates in accordance with the known efficiency principle i.e., the current supplied to the load flows alternately through the switch and through the diode. The function of the switch is performed by a switching transistor which is driven by a periodical pulsatory voltage which saturates this transistor for a given part of the period. Such a configuration is known under different names in the literature; it will be referred to herein as a "chopper." A known advantage thereof, is that the switching transistor must be able to stand a high voltage or provide a great current but it need not dissipate a great power. The output voltage of the chopper is compared with a constant reference voltage. If the output voltage attempts to vary because the input voltage and/or the load varies, a voltage causing a duration modulation of the pulses is produced at the output of the comparison arrangement. As a result the quantity of the energy stored in the coil varies and the output voltage is maintained constant. In the German "Auslegeschrift" referred to it is therefore an object to provide a stabilized supply
In the circuit arrangement according to the mentioned German "Auslegeschrift" the frequency of the load variations or a harmonic thereof is chosen as the frequency for the switching voltage. Particularly when the load fed by the chopper is the line deflection circuit of a picture display device, wherein thus the impedance of the load varies in the rhythm of the line frequency, the frequency of the switching voltage is equal to or is a multiple of the line frequency.
It is to be noted that the chopper need not necessarily be formed as that in the mentioned German "Auslegeschrift." In fact, it is known from literature that the efficiency diode and the coil may be exchanged. It is alternatively possible for the coil to be provided at the first terminal of the input voltage whilst the switching transistor is arranged between the other end and the second terminal of the input voltage. The efficiency diode is then provided between the junction of said end and the switching transistor and the load. It may be recognized that for all these modifications a voltage is present across the connections of the coil which voltage has the same frequency and the same shape as the pulsatory switching voltage. The control voltage of a line deflection circuit is a pulsatory voltage which causes the line output transistor to be saturates and cut off alternately. The invention is based on the recognition that the voltage present across the connections of the coil is suitable to function as such a control voltage and that the coil constitutes the primary of a transformer. To this end the circuit arrangement according to the invention is characterized in that a secondary winding of the transformer drives the switching element which applies a line deflection current to line deflection coils and by which the voltage for the final anode of a picture display tube which forms part of the picture display device is generated, and that the ratio between the period during which the switching transistor is saturated and the entire period, i.e., the switching transistor duty cycle is between 0.3 and 0.7 during normal operation.
As will be further explained the use of the switching transistor as a driver for the line output transistor in an embodiment to be especially described hereinafter has the further advantage that the line output transistor automatically becomes non-conductive when this switching transistor is short circuited so that the deflection and the EHT for the display tube drop out and thus avoid damage thereof.Due to the step according to the invention the switching transistor in the stabilized supply functions as a driver for the line deflection circuit. The circuit arrangement according to the invention may in addition be equipped with a very efficient safety circuit so that the reliability is considerably enhanced, which is described in the U.S. Pat. No. 3,629,686. The invention is
furthermore based on the recognition of the fact that the pulsatory voltage present across the connections of the coil is furthermore used and to this end the circuit arrangement according to the invention is characterized in that secondary windings of the transformer drive diodes which conduct simultaneously with the efficiency diode so as to generate further stabilized direct voltages, one end of said diodes being connected to ground.In order that the invention may be readily carried into effect, a few embodiments thereof will now be described in detail by way of example with reference to the accompanying diagrammatic drawings in which:
- FIG. 1 shows a principle circuit diagram wherein the chopper and the line deflection circuit are further shown but other circuits are not further shown.
FIGS. 2a, 2b and 2c show the variation as a function of time of two currents and of a voltage occurring in the circuit arrangement according to FIG. 1.
FIGS. 3a 3b, 3c and 3d show other embodiments of the chopper.
FIGS. 4a and 4b show modifications of part of the circuit arrangement of FIG. 1.
In FIG. 1 the reference numeral 1 denotes a rectifier circuit which converts the mains voltage supplied thereto into a non-stabilized direct voltage. The collector of a switching transistor 2 is connected to one of the two terminals between which this direct voltage is obtained, said transistor being of the npn-type in this embodiment and the base of which receives a pulsatory voltage which originates through a control stage 4 from a modulator 5 and causes transistor 2 to be saturated and cut off alternately. The voltage waveform 3 is produced at the emitter of transistor 2. In order to maintain the output voltage of the circuit arrangement constant, the duration of the pulses provided is varied in modulator 5. A pulse oscillator 6 supplies the pulsatory voltage to modulator 5 and is synchronized by a signal of line frequency which originates from the line oscillator 6' present in the picture display device. This line oscillator 6' is in turn directly synchronized in known manner by pulses 7' of line frequency which are present in the device and originate for example from a received television signal if the picture display device is a television receiver. Pulse oscillator 6 thus generates a pulsatory voltage the repetition frequency of which is the line frequency.
The emitter of switching transistor 2 is connected at one end to the cathode of an efficiency diode 7 whose other end is connected to the second input voltage terminal and at the other end to primary winding 8 of a transformer 9. Pulsatory voltage 3 which is produced at the cathode of efficiency diode 7 is clamped against the potential of said second terminal during the intervals when this diode conducts. During the other intervals the pulsatory voltage 3 assumes the value V i . A charge capacitor 10 and a load 11 are arranged between the other end of winding 8 and the second input voltage terminal. The elements 2,7,8,10 and 11 constitute a so-called chopper producing a direct voltage across charge capacitor 10, provided that capacitor 10 has a sufficiently great value for the line frequency and the current applied to load 11 flowing alternately through switching transistor 2 or through efficiency diode 7. The output voltage V o which is the direct voltage produced across charge capacitor 10 is applied to a comparison circuit 12 which compares the voltage V o with a reference voltage. Comparison circuit 12 generates a direct voltage which is applied to modulator 5 so that the duration of the effective period δ T of switching transistor 2 relative to the period T of pulses 3 varies as a function of the variations of output voltage V 0 . In fact, it is readily evident that output voltage V o is proportional to the ratio δ :
V o = V i . δ
However, variations in the line amplitude and the EHT may occur as a result of an insufficiently small internal impedance of the EHT generator. Compensation means are known for this purpose. A possibility within the scope of the present invention is to use comparison circuit 12 for this purpose. In fact, if the beam current passes through an element having a substantially quadratic characteristic, for example, a voltage-dependent resistor, then a variation for voltage V o may be obtained through comparison circuit 12 which variation is proportional to the root of the variation in the EHT which is a known condition for the line amplitude to remain constant.In addition this facilitates smoothing of voltage V o since the repetition frequency of pulsatory voltage 3 is many times higher than that of the mains and a comparatively small value may be sufficient for charge capacitor 10. If charge capacitor 10 has a sufficiently high value for the line frequency, voltage V o is indeed a direct voltage so that a voltage having the same form as pulsatory voltage 3 is produced across the terminals of primary winding 8. Thus voltages which have the same shape as pulsatory voltage 3 but have a greater or smaller amplitude are produced across secondary windings 13, 14 of transformer 9 (FIG. 1 shows only 2 secondary windings but there may be more). The invention is based on the recognition that one end of each secondary winding is connected to earth while the other end thereof drives a diode, the winding sense of each winding and the direction of conductance of each diode being chosen to be such that these diodes conduct during the same period as does efficiency diode 7. After smoothing, stabilized supply voltages, for example, at terminal 15 are generated in this manner at the amplitudes and polarities required for the circuit arrangements present in the picture display device. In FIG. 1 the voltage generated at terminal 15 is, for example, positive relative to earth. It is to be noted that the load currents of the supply voltages obtained in this manner cause a reduction of the switching power which is economized by efficiency diode 7. The sum of all diode currents including that of diode 7 is in fact equal to the current which would flow through diode 7 if no secondary winding were wound on transformer 9 and if no simultaneous diode were used. This reduction may be considered an additional advantage of the circuit arrangement according to the invention, for a diode suitable for smaller powers may then be used. However, it will be evident that the overall secondary load must not exceed the primary load since otherwise there is the risk of efficiency diode 7 being blocked so that stabilization of the secondary supply voltages would be out of the question.
It is to be noted that a parabola voltage of line frequency as shown at 28 is produced across the charge capacitor 10 if this capacitor is given a smaller capacitance so that consequently the so-called S-correction is established.
In FIG. 1 charge capacitors are arranged between terminals 15 etc. and earth so as to ensure that the voltages on these points are stabilized direct voltages. If in addition the mean value of the voltage on one of these terminals has been made equal to the effective value of the alternating voltage which is required for heating the filament of the picture display tube present in the picture display device, this voltage is suitable for this heating. This is a further advantage of the invention since the cheap generation of a stabilized filament voltage for the picture display tube has always been a difficult problem in transistorized arrangements.
It will now be shown that secondary winding 14 can indeed drive a line deflection circuit so that switching transistor 2 can function as a driver for the line deflection. FIGS. 2a and b show the variation as a function of time of the current i C which flows in the collector of transistor 16 and of the drive voltage v 14 across the terminals of secondary winding 14. During the flyback period (0, t 1 ) transistor 16 must be fully cut off because a high voltage peak is then produced at its collector; voltage v 14 must then be absolutely negative. During the scan period (t 1 , t 4 ) a sawtooth current i C flows through the collector electrode of transistor 16 which current is first negative and then changes its direction. As the circuit arrangement is not free from loss, the instant t 3 when current i C becomes zero lies, as is known, before the middle of the scan period. At the end t 4 of the scan period transistor 16 must be switched off again. However, since transistor 16 is saturated during the scan period and since this transistor must be suitable for high voltages and great powers so that its collector layer is thick, this transistor has a very great excess of charge carriers in both its base and collector layers. The removal of these charge carriers takes a period t s which is not negligible whereafter the transistor is indeed switched off. Thus the fraction δ T of the line period T at which v 14 is positive must end at the latest at the instant (t 4 - t s ) located after the commencement (t = 0) of the previous flyback.
The time δ T may be initiated at any instant t 2 which is located between the end t 1 of the flyback period and the instant t 3 when collector current i C reverses its direction. It is true that emitter current flows through transistor 16 at the instant t 2 , but collector current i C is not influenced thereby, at least not when the supply voltage (= V o ) for line deflection circuit 17 is high enough. All this has been described in the U.S. Pat. No. 3,504,224. The same applies to line deflection circuits wherein the collector base diode does not function as an efficiency diode as is the case in the described circuit 17, but wherein an efficiency diode is arranged between collector and emitter of the line output transistor. In such a case the negative part of the current i C of FIG. 2a represents the current flowing through the said efficiency diode.
After the instant t 3 voltage v 14 must be positive. In other words, the minimum duration of the period T when voltage v 14 must be positive is (t 4 - t s ) - t 3 whilst the maximum duration thereof is (t 4 - t s ) - t 1 . In a television system employing 625 lines per raster the line period t 4 is approximately 64 μus and the flyback period is approximately 12 μus. Without losses in the circuit arrangement instant t 3 would be located approximately 26 μus after the instant t 1 , and with losses a reasonable value is 22 μus which is 34 μus after the commencement of the period. If
0.85 × 270 V - 20 V = 210 V and the highest occurring V i is
1.1 × 270 V + 20 V = 320 V. For an output voltage V o of 135 V the ratio must thus vary between
δ = 135 : 210 = 0.64 and δ = 135 : 320 = 0.42.
A considerable problem presenting itself is that of the simultaneous or non-simultaneous drive of line output transistor 16 with switching transistor 2, it being understood that in case of simultaneous drive both transistors are simultaneously bottomed, that is during the period δ T. This depends on the winding sense of secondary winding 14 relative to that of primary winding 8. In FIG. 1 it has been assumed that the drive takes place simultaneously so that the voltage present across winding 14 has the shape shown in FIG. 2b. This voltage assumes the value n(V i - V o ) in the period δ T and the value -nVo in the period (1 - δ )T, wherein n is the ratio of the number of turns on windings 14 and 8 and wherein V o is maintained constant at nominal mains voltage V o = δ V inom . However, if as a result of an increase or a decrease of the mains voltage V i increases or decreases proportionally therewith, i.e., V i = V i nom + Δ V, the positive portion of V 14 becomes equal to n(V i nom - V o +Δ V) = n [(1 -δ)V i nom +ΔV] = n(0.5 V inom +ΔV) if δ = 0.5 for V i = V i nom. Relatively, this is a variation which is twice as great. For example, if V i nom = 270 V and V o = 135 V, a variation in the mains voltage of from -15 to +10 percent causes a variation of V i of from -40.5 V to +27 V which ranges from -30 to +20 percent of 135 V which is present across winding 8 during the period δ T. The result is that transistor 16 can always be bottomed over a large range of variation. If the signal of FIG. 2b would be applied through a resistor to the base of transistor 16, the base current thereof would have to undergo the same variation while the transistor would already be saturated in case of too low a voltage. In this case it is assumed that transformer 9 is ideal (without loss) and that coil 21 has a small inductance as is explained in the U.S. patent application Ser. No. 737,009 above mentioned. It is therefore found to be desirable to limit the base current of transistor 16.
This may be effected by providing a coil 22 having a large value inductance, approximately 100 μH, between winding 14 and the small coil 21. The variation of said base current i b is shown in FIG. 2c but not to the same scale as the collector current of FIG. 2a. During the conducting interval δ T current i b varies as a linear function of time having a final value of wherein L represents the inductance of coil 22. This not only provides the advantage that this final value is not immediately reached, but it can be shown that variation of this final value as a function of the mains voltage has been reduced, for there applies at nominal mains voltage that: If the mains voltage V i = V i nom +Δ V, then ##SPC1## because V i nom = 2 V o . Thus this variation is equal to that of the mains voltage and is not twice as great.
During switching off, t 2 , of transistor 16 coil 22 must exert no influence and coil 21 must exert influence which is achieved by arranging a diode 23 parallel to coil 22. Furthermore the control circuit of transistor 16 in this example comprises the two diodes 24 and 25 as described in U.S. application Ser. No. 26,497 above referred to, wherein one of these diodes, diode 25 in FIG. 1, must be shunted by a resistor.
FIG. 3 shows possible modifications of the chopper. FIG. 3a shown in a simplified form the circuit arrangement according to FIG. 1 wherein the pulsatory voltage present across the connections of windings 8 has a peak-to-peak amplitude of V i - V o = 0.5 V i for δ = 0.5, As has been stated, the provision of coil 22 gives a relative variation for the base current of transistor 16 which is equal to that of the mains voltage. In the cases according to FIG. 3b, 3c and 3d the peak-to-peak amplitude of the voltage across winding 8 is equal to V i so that the provision of coil 22 results in a relative variation which is equal to half that of the mains voltage which is still more favorable than in the first case.
Transistors of the npn type are used in FIG. 3. If transistors of the pnp type are used, the relevant efficiency diodes must of course be reversed.In this connection it is to be noted that it is possible to obtain an output voltage V o with the aid of the modifications according to FIGS. 3b, c and d, which voltage is higher than input voltage V i . These modifications may be used in countries such as, for example, the United of America or France where the nominal mains voltage is 117 or 110 V without having to modify the rest of the circuit arrangement.
The above-mentioned remark regarding the sum of the diode currents only applies, however, for the modifications shown in FIGS. 3a and d.
If line output transistor 16 is not simultaneously driven with switching transistor 2, efficiency diodes 7 conducts simultaneously with transistor 16 i.e., during the period which is denoted by δ T in FIGS. 1 and 2b. During that period the output voltage V o of the chopper is stabilized so that the base current of transistor 16 is stabilized without further difficulty. However, a considerable drawback occurs. In FIG. 1 the reference numeral 26 denotes a safety circuit the purpose of which is to safeguard switching transistor 2 when the current supplied to load 11 and/or line deflection circuit 17 becomes to high, which happens because the chopper stops. After a given period output voltage V o is built up again, but gradually which means that the ratio δ is initially small in the order of 0.1. All this is described in U.S. patent No. 3,629,686. The same phenomenon occurs when the display device is switched on. Since δ = 0.1 corresponds to approximately 6 μs when T = 64 μs, efficiency diode 7 conducts in that case for 64 - 6 = 58 μus so that transistor 16 is already switched on at the end of the scan or at a slightly greater ratio δ during the flyback. This would cause an inadmissibly high dissipation. For this reason the simultaneous drive is therefore to be preferred.
Pulse oscillator 6 applies pulses of line frequency to modulator 5. It may be advantageous to have two line frequency generators as already described, to wit pulse oscillator 6 and line oscillator 6' which is present in the picture display device and which is directly synchronized in known manner by line synchronizing pulses 7'. In fact, in this case line oscillator 6' applies a signal of great amplitude and free from interference to pulse oscillator 6. However, it is alternatively possible to combine pulse oscillator 6 and line oscillator 6' in one single oscillator 6" (see FIG. 1) which results in an economy of components. It will be evident that line oscillator 6' and oscillator 6" may alternatively be synchronized indirectly, for example, by means of a phase discriminator. It is to be noted neither pulse oscillator 6, line oscillator 6' and oscillator 6" nor modulator 5 can be fed by the supply described since output voltage V o is still not present when the mains voltage is switched on. Said circuit arrangements must therefore be fed directly from the input terminals. If as described above these circuit arrangements are to be separated from the mains, a small separation transformer can be used whose primary winding is connected between the mains voltage terminals and whose secondary winding is connected to ground at one end and controls a rectifier at the other end.
A practical embodiment of the described example with the reference numerals given provides an output for the supply of approximately 85 percent at a total load of 90 W, the internal resistance for direct current loads being 1.5 ohms and for pulsatory currents being approximately 10 ohms. In case of a variation of ± 10 percent of the mains voltage, output voltage V o is stable within 0.4 V. Under the nominal circumstances the collector dissipation of switching transistor 2 is approximately 2.5 W.
Since the internal resistance of the supply is so small, it can be used advantageously, for example, at terminal 15 for supplying a class-B audio amplifier which forms part of the display device. Such an amplifier has the known advantages that its dissipation is directly proportional to the amplitude of the sound to be reproduced and that its output is higher than that of a class-A amplifier. On the other hand a class-A amplifier consumes a substantially constant power so that the internal resistance of the supply voltage source is of little importance. However, if this source is highly resistive, the supply voltage is modulated in the case of a class-B amplifier by the audio information when the sound intensity is great which may detrimentally influence other parts of the display device. This drawback is prevented by means of the supply according to the invention.
The 50 Hz ripple voltage which is superimposed on the rectified input voltage V i is compensated by comparison circuit 12 and modulator 5 since this ripple voltage may be considered to be a variation of input voltage V i . A further compensation is obtained by applying a portion of this ripple voltage with suitable polarity to comparison circuit 12. It is then sufficient to have a lower value for the smoothing capacitor which forms part of rectifier circuit 1 (see FIG. 3). The parabola voltage 28 of field frequency originating from the field time base is applied to the same circuit 12 so as to correct the East-West pincushion distortion.
PHILIPS CHASSIS K12 HIGH-VOLTAGE GENERATING DEVICE / TRANSFORMER:
A high-voltage generating device which comprises a transformer having a secondary coil subdivided into sections which are series-connected via diodes. The beginning of the first section is connected to a point of fixed potential via a further diode. The beginning and the end of the first section are also connected to this fixed potential point via first and second capacitors, respectively. As a result, a tapping lead connected, for example, to the beginning of the second section provides a voltage of from one to two times the voltage difference across a section, as desired.
Inventors: Tol, Franciscus (Eindhoven, NL) Baggermans, Albertus B. A. (Eindhoven, NL) U.S. Philips Corporation (New York, NY)
1. A high-voltage generating device comprising, a transformer having a primary coil and a secondary coil which is divided into a plurality of sections, a plurality of diodes, means connecting the end of each section, except for the end of the last section, to the anode of a diode, the cathode of which is connected to the beginning of the next section, means connecting the end of the last section to the anode of a diode whose cathode is connected to a high-voltage lead, means connecting the cathode of at least one of the other diodes to a tapping lead, means connecting the beginning of the first section to the cathode of a diode whose anode is connected to a point of fixed potential, and means connecting the beginning and the end of the first section to the point of fixed potential via first and second capacitors, respectively.
2. A high-voltage generating device comprising, a transformer having a primary winding and a secondary winding with the secondary winding divided into a plurality of winding sections, a plurality of diodes, a high-voltage output terminal, means connecting said plurality of sections in series with said plurality of diodes between said output terminal and a point of fixed potential with each section coupled to the next section by a diode and with a first diode connecting the beginning of the first section to said point of fixed potential and a second diode connecting the end of the last section to said output terminal, first and second capacitors, means coupling the beginning and end of the first section to said point of fixed potential via said first and second capacitors respectively, and means for coupling the beginning of at least one other section to a further output terminal to supply a voltage of an amplitude determined in part by said capacitors.
3. A device as claimed in claim 2 wherein said first and second capacitors have equal capacitance values.
4. A device as claimed in claim 2 wherein said first and second capacitors have unequal capacitance values.
5. A device as claimed in claim 2 wherein said further output terminal is coupled to the beginning of the second section and wherein the voltage supplied by said further output terminal can be adjusted to a value between one and two times the voltage across a section by the choice of the relative capacitance values of said first and second capacitors.
6. A device as claimed in claims 2, 3 or 4 wherein the end of at least one winding section is directly connected to the beginning of the next winding section via said diode.
7. A device as claimed in claims 2 or 5 wherein said transformer comprises the horizontal deflection transformer of a television receiver, said output terminal supplying the high-voltage for the television receiver cathode ray tube and said further output terminal supplying the focus voltage for the cathode ray tube.
Description:
The invention relates to a high-voltage generating device, notably for a television picture tube, comprising a transformer with a secondary coil which is divided into a number of sections. The end of each section, except for the end of the last section, is connected to the anode of a diode, the cathode of each diode is connected to the beginning of the next section, but the end of the last section is connected to the anode of a diode whose cathode is connected to a high-voltage lead, the cathode of at least one of the other diodes also is connected to a tapping lead.
A device of this kind is known from the magazine "Funkschau" 1976, Heft 24, pages 1051-105
4.
For example, the focus voltage for a picture tube is derived from the
tapping lead. The voltage at the area of this tapping depends on the
number of sections and on the value of the high voltage. When a higher
voltage is required, the tapping lead must be connected behind the next
section on the secondary winding. In many cases, however, the voltage
which is tapped off behind, for example, the first section is just too
low, whereas that tapped off behind the second section is much too high.An object of the invention is to enable a direct voltage to be tapped off behind the first section which amounts to from one to two times the voltage difference between the beginning and the end of this section.
To this end, the device in accordance with the invention is characterized in that the beginning of the first section is connected to the cathode of a diode whose anode is connected to a point carrying a fixed potential, the beginning and the end of the first section also being connected, via capacitors, to the point carrying the fixed potential.
By a suitable choice of the capacitance of the two capacitors, any voltage between one and two times the voltage across a section can be tapped off at the beginning of the second section.
It is to be noted that a transformer whose secondary winding is formed by a number of sections which are connected in series via diodes, the beginning of the first section also being connected to the cathode of a diode, is known per se from U.S. Pat. No. 4,091,349. However, in this transformer none of the intermediate diodes is connected to a tapping lead and the ends of the first section are not connected to capacitors either.
The invention will be described in detail hereinafter with reference to the accompanying diagrammatic drawing in which:
FIG. 1 shows a diagram of a known high-voltage generating device,
FIG. 2 is a diagram of the voltage present at a number of locations in the device shown in FIG. 1 at a given instant,
FIG. 3 shows a diagram of an embodiment of the device in accordance with the invention,
FIG. 4 is a diagram of the voltage present at a number of locations in the device shown in FIG. 3 at a given instant,
FIG. 5 is a diagram which represents the variation with time of the voltage in a number of locations in the device shown in FIG. 3, and
FIG. 6 shows a diagram to illustrate the voltage variation wih time at a location in various versions of the device shown in FIG. 3.
FIG.1 shows a known high-voltage generating device, comprising a transformer 1 with a primary coil 3 to which a pulse-shaped voltage is applied, for example, a line output transformer in a colour television receiver. The secondary coil is subdivided into four sections 5, 7, 9 and 11, the end of each of the first three sections 5, 7, 9 being connected to the anode of a diode 13,15, 17, respectively, the cathode thereof being connected to the beginning of the next section. The end of the last section 11 is connected to the anode of a diode 19, the cathode of which is connected to a high voltage lead 21 which is connected, for example, to the high voltage connection of a picture tube (not shown). The cathode of the first diode 13 is also connected to a tapping lead 23 wherefrom, for example, the focus voltage for said picture tube can be derived. The beginning of the first section 5 is connected, via a connection lead 25, to a point which carries a fixed potential.
FIG. 2 illustrates the voltage variation in each section, the number of turns n being plotted horizontally and the voltage V being plotted vertically. Each section consists of N turns in which voltage pulses 27 are induced. At the beginning of the first section 5, which is connected to a point carrying a fixed potential, the magnitude of the voltage pulses is zero and at the end of the turn N it is maximum and equal to U volts. The envelope 29 of the voltage pulses 27 is a straight line. Due to the strong capacitive coupling between the sections, no alternating voltages occur between corresponding turns of successive sections, so that the voltage pulses in the second section 7 vary across the section in the same manner as the pulses in the first section 5. The beginning of this second section thus carries a direct voltage U (due to the rectification of the voltage across the first section) and a pulse voltage zero, while the end of this section carries a pulse voltage of the magnitude U which is superposed on the direct voltage U. The same is applicable to the subsequent sections so that the voltage at the end of the fourth section 11 amounts to 4 U. It will be clear that the tapping lead 23 carries a voltage U.
FIG. 3 diagrammatically shows an embodiment of a device of the described kind which has been improved in accordance with the invention. Corresponding parts of the device are denoted by the same reference numerals as in FIG. 1. The difference with respect to FIG. 1 consists in that the beginning of the first section 5 is connected, by means of the connection lead 25, to the cathode of a diode 31 whose anode is connected to a point carrying a fixed potential, and in that at the beginning of the first section there is connected a first capacitor 43, a second capacitor 45 being connected to the end thereof, said capacitors also being connected to the point carrying a fixed potential.
If the capacitances of these capacitors are equal, their combined effect corresponds to that of a capacitor 33 which connects the centre of the section to a point carrying a fixed potential (denoted by a broken line).
The result of these steps is shown in FIG. 4 which shows, like FIG. 2, the voltage variation in the various sections. Thanks to the diode 31 and the effective capacitance 33, no longer the beginning but the centre of the first section 5 is maintained at a fixed potential for alternating voltages. As a result, the voltage pulses 35 induced in this section equal zero at the area of the central turn N/2 and are oppositely directed at the two ends of the section: thus
-U/2 at the beginning and +U/2 at the end. The capacitance 33 is charged so far that the diode 31 just becomes a conductive for each pulse, that is to say to a voltage +U/2 with respect to the point of fixed potential to which the anode of this diode is connected. The first section thus carries a mean voltage +U/2 on which there are superposed voltage pulses of the magnitude -U/2 at the beginning and +U/2 at the end of the section. This is shown in FIG. 5 in which the curve 37 represents the voltage variation as a function of the time at the beginning of the section. The curve 39 represents the voltage variation at the end of the section.
Due to the capacitive coupling between the first section 5 and the second section 7, corresponding turns of these two sections do not carry an alternating voltage with respect to each other, so that the voltage variation at the beginning of the second section corresponds to that of the first section, the mean voltage level, of course, being higher by the amount of te rectified voltage across the first section, so U volts. This is represented by the curve 41 in FIG. 5. It follows that the mean voltage on the tapping lead 23 equals 3 U/2 volts. This voltage is a direct voltage on which voltage pulses of -U/2 volts are superposed. If desired, these superposed voltage pulses can be eliminated by an RC network (not shown) connected to the tapping lead. Thus, a voltage is obtained on the tapping lead which is one and a half times that of the device shown in FIG. 1.
As has already been stated, it has been assumed that the capacitances of the capacitors 43, 45 are equal, so that the overall effect thereof can be represented by a capacitor 33 connected to the central turn. However, the voltage carried by the tapping lead 23 can be influenced by choosing these capacitances to be different.
When the values of the capacitors 43 and 45 are not the same, their combined effect corresponds to that of a capacitor 33 which is connected to a turn other than the central turn. The point in the section where the induced voltage pulses have the value zero is shifted accordingly across the section. When the capacitance of the first capacitor 43 is larger than that of the second capacitor 45, this point is situated nearer to the beginning of the section and vice versa. In extreme cases, this point may be situated at the beginning or at the end of the section. This means that the mean voltage level of the first section can vary from 0 to U volts. The direct voltage level of the curve 41 in FIG. 5 can vary accordingly from U to 2 U volts, the peaks of the negative pulses, of course, always reaching the level of the rectified voltage across the first section (U volts).
This is shown in FIG. 6 for a number of cases. The curve 41 in this Figure is identical to the curve 41 in FIG. 5
and relates to the symmetrical condition in which the capacitances of the capacitors 43 and 45 are equal. The curve 47 is obtained when the capacitance of the capacitor 43 (referred to hereinafter as C43) exceeds that of the capacitor 45 (referred to hereinafter as C45), so C43>C45. Curve 49 is obtained when C43<C45. Curve 51 represents an extreme situation where C43 is so large that the diode 31 is actually short-circuited for alternating voltages. This corresponds to the situation shown in FIG. 1. Finally, curve 53 represents the other extreme situation where C45 is so large that C43 can be neglected.
The foregoing demonstrates that the voltage at the tapping lead 23 can be adjusted between U and 2 U Volts by the choice of C43 and C45. The capacitors 43, 45 may consist of discrete components, but they may alternatively be formed during the winding of the section by using an adapted winding technique.
SUPPLY 4822 212 20302
MATRIX 3122 133 31460
CHROMA 4822 212 20306
SOUND 4822 212 20599
MULTISTABILIZER 4822 212 20304
IF AMPLIFIER 4822 212 20309
3122 133 31490
E/W + 29 /32/225V SUPPLY 4822 212 20305
SYNCRONIZATION 3122 133 31470
IF DETECTOR 3131 118 58690 4822 212 20438
FRAME DEFLECTION 20AX 4822 212 20303
TRD UNIT 8212 860 06032 SAB2015 SAB2024
OSD TUNING TRD UNIT 8212 860 06083
PHILIPS 26C964 PICASSO CHASSIS K12I TDA2581 CONTROL CIRCUIT FOR SMPS/PHILIPS POWER PACK:
The TDA2581 is a monolithic integrated circuit for controlling switched-mode power supplies (SMPS) which are provided with the drive for the horizontal deflection stage.
The circuit features the following:
— Voltage controlled horizontal oscillator.
— Phase detector.
— Duty factor control for the positive-going transient of the output signal.
— Duty factor increases from zero to its normal operation value.
— Adjustable maximum duty factor.
- Over-voltage and over-current protection with automatic re-start after switch-off.
— Counting circuit for permanent switch-off when n~times over~current or over-voltage is sensed
-Protection for open-reference voltage.
- Protection for too low supply voltage.
Protection against loop faults.
Positive tracking of duty factor and feedback voltage when the feedback voltage is smaller than the
reference voltage minus 1,5 V.
PHILIPS 26C964 PICASSO CHASSIS K12I E/W CORRECTION Circuit arrangement in an image display apparatus for (horizontal) line deflection:Line deflection circuit in which the deflection coil is east-west modulated. In order to cancel an east-west dependent horizontal linearity defect the inductance value of the linearity correction coil is made independent of the field frequency, for example by means of a compensating current. In an embodiment this current is supplied by the shunt coil of the east-west modulator.
1. Circuit arrangeme
nt for use with a line deflection coil, said circuit comprising a generator means adapted to be coupled to said coil for producing a sawtooth line-deflection current through said line deflection coil, said deflection current having a field-frequency component current, a horizontal linearity correction coil adapted to be coupled in series with said deflection coil and including an inductor having a bias-magnetized core, and means for making the inductance value of the linearity correction coil substantially independent of the field frequency component current. 2. Circuit arrangement as claimed in claim 1, wherein said making means includes a current supply source means for producing a compensating line-frequency sawtooth current through a winding of the linearity correction coil, the amplitude of the compensating current having a field-frequency variation. 3. Circuit arrangement as claimed in claim 2, wherein the direction of curvature of the field-frequency envelope of the compensating current is opposite to the direction of curvature of the field-frequency component current of the line deflection current, whereby the magnetic fields produced in the core of the correction coil by the two currents have the same direction. 4. Circuit arrangement as claimed in claim 2, wherein the direction of curvature of the field-frequency envelope of the compensating current is the same as the direction of curvature of the field-frequency component current of the line deflection current, whereby the magnetic fields produced in the core of the correction coil by the two currents have opposite directions. 5. Circuit arrangement as claimed in claim 2, wherein said correction coil further comprises an additional winding disposed on the core, said additional winding being coupled to said supply source means to receive the compensating current. 6. Circuit arrangement as claimed in claim 5, further comprising modulator means for modulating the line deflection current with said field frequency component, said modulator including a compensation coil coupled in series with said additional winding. 7. Horizontal linearity correction coil comprising a core made of a magnetic material and bias-magnetized by at least one permanent magnet, and an additional winding disposed on the core. 8. Image display apparatus including a circuit arrangement as claimed in claim 1.
Description:
By means of the linearity correction coil the linearity error due to the ohmic resistance of the deflection circuit is corrected. The sign of the bias magnetisation is chosen so that it is cancelled by the deflection current at the beginning of the deflection interval, so that the inductance of the correction coil is a maximum, whereas the voltage drop across the deflection coil then is a minimum. This voltage drop is adjustable by adjustment of the starting inductance of the correction coil. During the deflection interval the core gradually becomes saturated so that the inductance of, and the voltage drop across, the correction coil decrease. Thus the linearity error can be cancelled exactly at the beginning of the interval, that is to say on the left on the screen of the image display tube, and with a certain approximation at other locations.
In image display tubes using a large deflection angle, raster distortion, which generally is pincushion-shaped, of the image displayed occurs. This distortion can be removed in the horizontal direction, the so-called east-west direction, by means of field-frequency modulation of the line deflection current, the envelope in the case of pincushion-shaped distortion being substantially parabolic so that the amplitude of the line deflection current is a maximum at the middle of the field deflection interval.
It was found in practice that the said two corrections are not independent of one another, that is to say the adjustment of the east-west modulation affects horizontal linearity. As long as the modulation depth is not excessive, a satisfactory compromise can be found. However, in display tubes having a deflection angle of 110° and particularly in colour display tubes in which the deflection coils have a converging effect also, it is difficult to find such a compromise. A tube of this type is described in "Philips Research Reports," volume Feb. 14, 1959, pages 65 to 97; the distribution of the deflection field is such that throughout the display screen the landing points of the electron beams coincide without the need for a converging device. Owing to this field distribution, however, the pin-cushion-shaped distortion in the image displayed in the east-west direction is greater than in comparable display tubes of another type. Hence there must be east-west modulation of the line deflection current to a greater depth. It is true that under these conditions horizontal linearity can correctly be adjusted over a given horizontal strip after the east-west modulation has been adjusted correctly, i.e., for a rectangular image, but it is found that in other parts of the display screen a serious linearity error remains. When vertical straight lines are displayed as straight lines in the right-hand part of the screen, they are displayed as curved lines in the left-hand part.
It is an object of the present invention to remove the said defect so that horizontal linearity can satisfactorily be adjusted throughout the screen, and for this purpose the circuit arrangement according to the invention is characterized in that it includes means by which the inductance of the linearity correction coil is made substantially independent of the field frequency.
The invention is based on the recognition that the defect to be removed is due to a field-frequency variation of the said inductance because the latter is current-dependent. According to a further recognition of the invention the circuit arrangement is characterized in that it includes a current supply source for producing a compensating line-frequency sawtooth current through a winding of the linearity correction coil, the amplitude of the current being field-frequency modulated. The circuit arrangement according to the invention may further be characterized in that an additional winding is provided on the core of the linearity correction coil and is traversed by the compensating current. A circuit arrangement in which the modulator for modulating the line deflection current includes a compensation or bridge coil may according to the invention be characterized in that the additional winding is connected in series with the said coil.
The invention also relates to a linearity correction coil for use in a line deflection circuit having a core which is made of a magnetic material and is bias magnetized by at least one permanent magnet, which coil is characterized in that an additional winding is provided on the core.
Embodiments of the invention will now be described by way of example, with reference to the accompanying diagrammatic drawings, in which
FIG. 1 is the circuit diagram of a known circuit arrangement for line deflection in which the line deflection current is east-west modulated,
FIG. 2 shows the distorted image which is displayed on the screen when the circuit arrangement of FIG. 1,
FIG. 3 is a graph explaining the observed defect, and
FIGS. 4 and 7 show embodiments of the circuit arrangement according to the invention by which this defect can be cancelled.
FIG. 1 is a greatl
simplified circuit diagram of a line deflection circuit of an image display apparatus, not shown further. The circuit includes the series combination of a line deflection coil L y , a linearity correction coil L and a trace capacitor C t , which series combination is traversed by the line deflection current i y . The collector of an npn switching transistor T r and one end of a choke coil L 1 are connected to a junction point A of a diode D, a capacitor C r and the said series combination. The other end of the choke coil is connected to the positive terminal of a supply voltage source which supplies a substantially constant direct voltage V b and to the negative terminal of which the emitter of transistor Tr is connected. This negative terminal may be connected to earth. The other junction point B of elements D and C r and of the series combination of elements C t , L y and L is connected to one terminal of a modulation source M for east-west correction which has its other terminal connected to earth. Diode D has the pass direction shown in the FIG.To the base of transistor Tr line-frequency switching pulses are supplied. In known manner the said series combination is connected to the supply voltage source during the deflection interval (the trace time), diode D and transistor Tr conducting alternately. During the retrace time these elements are both cut off. Under these conditions the current i y is a sawtooth current. The coil L, which has a saturable ferrite core which is bias-magnetized by means of at least one permanent magnet, serves to correct the linearity of the current i y during the trace time, whilst the capacitance of the capacitor C t is chosen so that the currenct i y is subjected to what is generally referred to as S correction. During the retrace time, at point A pulses are produced the amplitude of which is much higher than that of the voltage V b and would be constant in the absence of modulation source M. Information from the field deflection circuit, not shown, of the image display apparatus and line retrace pulses, the latter for example by means of a transformer, are supplied in known manner to modulation source M. Amplitude-modulated line retrace pulses having a field-frequency parabolic envelope, as indicated in the FIG., are produced at point B. During the line trace time the voltage at point B is zero. Thus the current i y is given the desired field-frequency modulated form which is also shown in FIG. 1.
The amplitude of the envelope in point B at the beginning and at the end of the field trace time and the amplitude of this envelope at the middle of the said time can both be adjusted so that the image displayed on the display screen of the display tube (not shown) has the correct substantially rectangular form. If, however, the required modulation depth is comparatively large, a linearity error of the line deflection is produced which cannot be removed by means of the correction coil L.
FIG. 2 shows the image of a pattern of vertical straight lines as it is displayed on the screen with the correction coil L adjusted so that horizontal linearity is satisfactory along and near the central horizontal line. In FIG. 2 the defect is exaggerated. It is found that horizontal linearity is defective in other areas of the screen so that the vertical lines are displayed correctly in the right-hand half of the screen but as curves in the left-hand path, the defect increasing as the line is farther to the left.
This phenomenon can be explained with reference to FIG. 3. In this FIG. the inductance L of the linearity correction coil is plotted as a function of the magnetic field strength H. In the absence of current, H has a value H 0 owing to the bias magnetization. If an approximately linear sawtooth current i (t) as shown in the b
ottom left-hand part of FIG. 3 flows through the coil, the field strength H varies proportionally about the value H 0 , for the mean value of the current is zero. Because the curve of L is not linear, the variation L(t) of L, which is shown in the top right-hand part, is not a linear function of time. The resulting curve may be regarded as composed of a linear component and a substantially parabolic component which is to be taken into account when choosing the capacitance of capacitor C t .Because owing to the east-west modulation the amplitude of current i(t) varies, the amplitude of L(t) also varies. This implies a field-frequency variation of L which is non-linear. This variation is undesirable. In the case of a small variation of the amplitude of current i(t) the variation of L(t) can be more or less neglected, but this is no longer possible when the amplitude of current i(t) varies greatly owing to the east-west modulation. L(t) varies according to different curves. FIG. 3 shows two of such curves and also illustrates the fact that the undesirable variation of L(t) is greatest at the beginning of the trace time and smallest at the end thereof.
FIG. 4 shows a circuit arrangement in which the defect described can be corrected. On the core of the correction coil L of the circuit of FIG. 1 an additional winding L 2 is provided. Winding L 2 is connected to a current source which produces a compensating current i 2 which has a line-frequency sawtooth variation and a field-frequency amplitude modulation. The envelope here also is parabolic, however, with a shape opposite to that of deflection current i y , that is to say having a minimum at the middle of the field trace time. The direction of current i 2 and the winding sense of winding L 2 relative to that of coil L are chosen so that the magnetic field produced in the core by winding L 2 has the same direction as the field produced by coil L. Hence the two field strengths are added. The amplitude of current i 2 and the turns number of winding L 2 can be chosen so that current i y flows through inductances the total value of which is not dependent upon the field frequency. The curve L(t) of FIG. 3 remains substantially unchanged. Consequently the undesirable field-frequency modulation is removed without variation of the bias magnetization, which would have been varied if current i 2 were a field-frequency current. Obviously the same result can be achieved by a choice such of the direction of current i 2 and of the winding sense of winding L 2 that the two field strengths are subtracted one from the other, whilst the curvature of the envelope of current i 2 has the same direction as that of the envelope of current i y .
The current source of FIG. 4 may be formed in known manner by means of a modulator in which a line-frequency sawtooth signal is field-frequency modulated, the envelope being parabolic. FIG. 5 shows a circuit arrangement in wh
ich current i 2 is produced by the modulation source which provides the east-west correction. In FIG. 5, the source M of FIG. 1 comprises a diode D', a coil L' and two capacitors C' r and C' t , which elements constitute a network of the same structure as the network formed by elements D, L y , C r and C t . The capacitor C' t is shunted by a modulation source V m which supplies a field-frequency parabolic voltage having a minimum at the middle of the field trace time.With the exception of the linearity correction means to be described hereinafter, the circuit arrangement of FIG. 5 was described in more detail in U.S. Pat. No. 3,906,305. Hence it will be sufficient to mention that the capacitances of capacitors C r and C' r and of a capacitor C 1 connected between junction point A and earth and the inductance of coil L' are chosen so that the three sawtooth currents flowing through L y , L' and L 1 have the same retrace time. The capacitances of capacitors C t and C' t , which are large, are ignored. When voltage V b is constant, current i y is subjected to the desired east-west modulation having the form shown in FIG. 1.
Coil L y is connected in series with correction coil L, and winding L 2 is connected in series with coil L'. FIG. 5 shows that the current flowing through winding L 2 has the same waveform as the current i 2 of FIG. 4, for its envelope has the same shape as the voltage supplied by source V m . By a suitable choice of the number of turns of winding L 2 it can be ensured that the linearity correction remains the same for every line during the field trace time.
Modified embodiments of the circuit arrangement of FIG. 5 can also be used. FIG. 6 shows such a modified embodiment in which the capacitive voltage divider C r , C' r of FIG. 5 is replaced by an inductive voltage divider by means of a tapping on coil L 1 . A capacitor C 2 is included between the tapping and the junction point of diodes D and D', whilst capacitor C' t here forms part of two networks C t , L y and C' t , L' traversed by a sawtooth current. In FIG. 6 modulation source V m is connected via a choke coil L 3 to the junction point of D, D', C 2 and
C' t . One end of winding L 2 is connected to the junction point of capacitor C' t and the coil L, whilst the other end is connected to earth via coil L'. The capacitances of capacitors C 1 and C 2 and the location of the tapping on coil L 1 are chosen so that the sawtooth currents flowing through L y , and L' and L 1 have the same retrace time, whilst the field-frequency linearity defect of FIg. 2 is cancelled by correctly proportioning winding L 2 .Other east-west modulators are known in which the step of FIGS. 5 and 6 can be used. An example is the modulator described in the publication by Philips, Electronic Components and Materials: "110° Colour television receiver with A66-140X standard-neck picture tube and DT 1062 multisection saddle yoke," May 1971, pages 19 and 20, which modulator also comprises two diodes and a compensation coil L', which are arranged in a slightly different manner. In another example the east-west modulator and the line deflection generator are included in a bridge circuit whilst they are decoupled from one another by means of a bridge coil which has the same function as coil L' in FIGS. 5 and 6. In these circuit arrangements coil L and winding L 2 may be arranged in the same manner as in FIG. 6. The same applies to an east-west modulator using a transductor the operating winding of which is in series with the deflection coil.
In the abovedescribed embodiments of the circuit arrangement according to the invention the compensating current i 1 is provided by transformer action. In the embodiment of FIG. 7 the current source which supplies the current i 2 is connected in parallel with correction coil L, i.e., without an auxiliary winding. In this embodiment the east-west modulation is achieved not by means of a modulator, but by means of the fact that the supply voltage V b is the super-position of a field-frequency parabolic voltage on the direct voltage. In this known manner the supply source also is the modulator.
It will be seen that in the embodiments of FIGS. 4, 5 and 6 current i 2 counteracts the east-west modulation of deflection current i y . It was found in practice, however, that this counteraction is slight.
PHILIPS 26C964 PICASSO CHASSIS K12I Line oscillator synchronizing circuit:A television receiver having a line synchronizing circuit wherein gate pulses for keying the synchronizing signal are derived from the oscillator signal, the gate pulses being positioned, by means of an auxiliary phase control loop, substantially symmetrical relative to
an edge of a reference signal also derived from the oscillator signal. The auxiliary control loop also eliminates the influence of phase variations occurring in the line deflection circuit.1. A television receiver having a line deflection circuit and a line synchronizing circuit, said line synchronizing circuit comprising a controllable oscillator, a signal derived therefrom being applicable to said line deflection circuit; a pulse generator coupled to said oscillator for deriving pulse-shaped gate signals; a coincidence detector; means for applying said pulse-shaped gate signals and pulse-shaped line synchronizing signals to said coincidence detector; a first phase discriminator coupled to said coincidence detector for determining the phase difference between said line synchronizing signal and a reference signal derived from said oscillator signal; a first low-pass filter for smoothing the output voltage from said first phase discriminator, said controllable oscillator being coupled to said first low-pass filter whereby the output therefrom controls the frequency and/or phase of said controllable oscillator; a second phase discriminator for determining the interval between the center instant of a pulse of said pulse-shaped gate signal and the center instant of an edge occurring in said reference signal; a second low-pass filter for smoothing the output voltage from said second phase discriminator; and means for controlling the center instant of the edge in said reference signal using the output from said second low-pass filter; wherein said line synchronizing circuit further comprises gate means having a first input terminal for receiving the output from said pulse generator and a second input terminal for receiving an output signal from said line deflection circuit, said gate means also having an output terminal for generating the gate pulses for said coincidence detector and said second phase dis
Description:
BACKGROUND OF THE INVENTION
The invention relates to a television receiver comprising a line synchronizing circuit and also comprising a line deflection circuit, the line synchronizing circuit comprising a controllable oscillator for generating an oscillator signal applicable to the line deflection circuit and being provided with means for applying a pulse-shaped line synchronizing signal and a pulse-shaped gate, which which is derived from the oscillator signal by means of a pulse generator, to a coincidence stage, an output terminal of which is connected to a first phase discriminator for determining the phase difference between the synchronizing signal and a reference signal which is also derived from the oscil
lator signal, the line synchronizing circuit being further provided with a first low-pass filter for smoothing the output voltage of the first phase discriminator, the frequency and/or phase of the oscillator being controllable by the first smoother voltage thus obtained, with a second phase discriminator for determining the interval between the center instant of a gate pulse and the center instant of an edge occurring in the reference signal, and with a second low-pass filter for smoothing the output voltage of the second phase discriminator, the center instant of said edge being controllable by means of the second smoothed voltage thus obtained. Such a line synchronizing circuit is disclosed in Applicant's Dutch Patent Application No. 7511633 (PHN.8169). In this known circuit a second phase control loop, which comprises the second discriminator and the second low-pass filter ensures that said two instants substantially coincide so that the gate pulses are substantially symmetrical relative to the edge of the reference signal. Consequently, the gate pulses may be of a very short duration, so that the insensitivity to noise is increased. The output signal of the circuit can be applied to the line deflection circuit ensuring that its phase is fixed relative to that of the received line synchronizing pulses.
It may, however, happen that phase variations occur in the line deflection circuit, for example because the turn-off time of a switch, usually a power transistor, present in said circuit is not constant. In order to reinstate the desired fixed phase relation between the deflection and the received synchronizing pulses, it is proposed in said patent application to apply the output signal of the present circuit first to a phase discriminator in which it is compared in known manner to a signal originating from the deflection circuit. This implies a third phase control loop. Consequently, the synchronizing circuit becomes complicated and more difficult to be implemented in integrated form.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a synchronizing circuit comprising only two phase-controlled loops and, to this end, the receiver according to the invention is characterized by a gate having a first input terminal for receivng the output signal of the pulse generator and a second input terminal for receiving an output signal of the line deflection circuit and having an output terminal for applying the gate pulses thus obtained to the coincidence state and to the second phase discriminator.
DESCRIPTION OF THE DRAWINGS
The invention will be further explained by way of non-limitative example with reference to the accompanying figures in which
FIG. 1 shows a block diagram of an implementation of a portion of a television receiver according to the invention and
FIGS. 2 and 3 show wave forms which may be used therein.
In FIG. 1 reference numeral 1 denotes the input terminal of the line synchronizing circuit. Line synchronizing pulses, having the line repetition frequency f H , i.e., for example, 15,625 or 15,750 Hz, are present at the input terminal. These pulses are derived, in known manner in the television receiver, not shown, of which the circuit forms part, from the received signal in a synchronizing-separation stage and are applied to an input terminal of an AND-gate 2. FIG. 2a shows the variation versus the time of these pulses. Herein the symbol T H denotes the line period, i.e. approximately 64 μs.
FIG. 2b shows the variation of gate pulses which are applied to another input terminal of gate 2 and which are generated in the circuit in a manner still to be explained hereafter. FIG. 2b shows each gate pulse symmetrically relative to the center instant t o of the corresponding line synchronising pulse of FIG. 2a. As known this pulse has a duration of, for example, 4.5 to 5 μs. The gate pulses have a somewhat longer duration of, for example, 7.7 μs. The output signal of gate 2 is applied to a controllable switch 3. If the pulses at the inputs of gate 2, as in FIG. 2, occur at least partly simultaneously, then switch 3 is made conductive for the duration of that portion of the line synchronizing pulses.
Switch 3 is supplied with a line frequency reference signal which is generated in a manner still to be explained hereafter and which is shown in FIG. 2c. In the synchronized state it has a falling edge at instant t o and a rising edge at an instant which is, for example, in the center of the time interval between instant t o and the corresponding instant t 1 one cycle later.
In these circumstances the voltage shown in FIG. 2d is present at the output terminal of switch 3. After smoothing by means of a low-pass filter 4, a d.c. voltage is produced which is supplied to a voltage controlled oscillator 5, whose frequency and/or phase is adjusted hereby. Switch 3 behaves as a phase discriminator by means of which the falling edge of the signal of FIG. 2c is adjusted to the center instant t o of the pulse of FIG. 2a. If the frequency of the signal of FIG. 2c deviates from the value f H , then the phase difference between this signal and that of FIG. 2a varies continuously. The control voltage supplied
to oscillator 5 is then an a.c. voltage, namely until the two frequencies are equal again, wherafter the control voltage is a d.c. voltage.
Oscillator 5 is also supplied with a d.c. voltage V o of, for example, 3 V on which the control voltage just mentioned is superimposed. Voltage V o may correspond to the nominal frequency of the line synchronizing pulses in accordance with the television standard for which the television receiver is suited. In the described implementation, however, the signal generated by oscillator 5 has, in the nominal case, a frequency 2f H which is double the line frequency. This signal is applied to a frequency divider circuit 6 in which the frequency is divided by the number of lines per picture in the relevant standard, being, for example, 625 or 525. A field frequency signal of, for example, 50 or 60 Hz, is available at an output terminal of divider circuit 6 in the synchronized state of the line phase-controlled loop, which signal can be applied to a field synchronizing circuit of known type.
The sawtooth signal shown in FIG. 3a is derived from the signal of oscillator 5, the sawtooth signal being applied to a pulse generator 7. By means of a d.c. voltage level V 1 which is applied to generator 7 and which is generated in a manner still to
be explained, the sawtooth signal is converted in this generator into a pulse-shaped signal (FIG. 3b). The leading edges of these pulses and the rising edges in FIG. 3a occur simultaneously; while the instant of occurrence of the trailing edges of the pulses is determined by the value of voltage V 1 . These pulses are applied to a frequency dividing circuit 8 which, for example, is a binary divider circuit of known type, for example a master-slave flip-flop. The output signals thereof have the line frequency f H . The signal at an output terminal Q s thereof (see FIG. 3c) changes levels each time a falling edge occurs in the signal of FIG. 3b, while the signal at an output terminal Q m of circuit 8 (see FIG. 3d) changes levels each time a rising edge occurs in the signal of FIG. 3b. This implies that the signal of FIG. 3b is fixed relative to the time axis while the position of the signal of FIG. 3c depends on the value of voltage V 1 .
The signal at terminal Q m is the signal which is applied as a reference signal to switch 3, while the signal at terminal Q s is applied to a pulse shaper 9. The output signal thereof has the variation which is suitable for being applied, possibly via a driver stage, to a line output stage 10. Stage 10 supplies a line frequency current to the deflection coil, not shown, for the horizontal deflection in the picture display tube. Stage 10 comprises a switch usually a power transistor, whose turn-on time is relatively short, while its turn-off time is considerable, namely in the order of 10 μs. This is caused by the fact that the charge carriers, which are present in an excess in the saturated transistor, must first be removed. As known, the turn-off time depends on variations in the load of stage 10, for example the beam current in the picture display tube. In known manner, the adverse influence of such variations can be compensed for, for example by including a phase-controlled loop between oscillator 5 and the output of stage 10, this loop comprising a phase discriminator, a low-pass filter as well as an oscillator or a phase-shifting network. A signal originating from the output of stage 10 is used as a reference signal for this loop. Dutch Patent Application No. 7103465 (PHN.5499) discloses such a phase-controlled loop. A compensation is effected in the circuit of FIG. 1 in a different manner, which will be explained in the further course of this description.
The sawtooth voltage of FIG. 3a is also applied to a pulse generator 11 in which the sawtooth signal is converted into the pulse-shaped signal of FIG. 3e by means of a d.c. voltage V 2 applied thereto. The rising edges thereof occur simultaneously with those of FIG. 3a while the falling edges occur at the instants at which the sawtooth signal attains the value V 2 . In this manner the frequency of these pulses would have the double line frequency 2f H . However, the signal at the terminal Q m of divider circuit 8 is also applied to generator 11, thus, each rising edge of this signal cuts off generator 11. Other line frequency signals, for example line flyback pulses originating from stage 10, can also be used for this same purpose. The pulses obtained are applied to an input terminal of an OR-gate 12.
FIG. 3f shows line flyback pulses present in output stage 10, for example across a winding of a transformer thereof. For simplicity they are depicted as sine-shaped waves. They occur from approximately the instant at which the switch in stage 10 is switched-off, that is to say a time 96 after the occurrence of a falling edge of signal Q s (FIG. 3c) which time τ may be variable, while the duration of these pulses is substantially constant. The pulses of FIG. 3f are applied to an input terminal of an AND-gate 13, while another input terminal is connected to terminal Q m of the frequencies divider 8. The output terminal of gate 13 is connected to an input terminal of gate 12.
From FIGS. 3d and 3f it appears that the output signal of gate 13 has a leading edge from a time τ after the occurrence of a falling edge of signal Q s , and a trailing edge at the instant at which a falling edge of signal Q m occurs. The output signal of gate 12 has a leading edge at the same instant at which the leading edge of the output signal of gate 13 occurs and a trailing edge at the same instant at which the trailing edge of generator 11 occurs. The pulses at the output terminal of gate 12 are shown in FIG. 3g and are the gate pulses of FIG. 2b which are applied to gate 2. The leading edges thereof occur at instants which depend on the delay τ produced in output stage 10, while the instants at which the trailing edges occur depend only on the, optionally adjustable, voltage V 2 . These pulses do not contain any information concerning the signal Q m , in spite of the fact that Q m is one of the input signals of gate 13, which information is, for the rest not necessary. Said input signal is only used for removing the portion of the pulse of FIG. 3f occurring after the falling edge of signal Q m . The same result can be achieved by means of, for example, a bistable multivibrator, the output signal of which has a leading edge at the same instant as the flyback pulse and a trailing edge at the same instant as the signal of generator 11.
A phase discriminator 14, implemented as a controllable switch, is supplied with the reference signal at the output terminal Q m of divider circuit 8 (FIG. 3d) as well as with the gate pulses originating from gate 12. Switch 14 conducts during the occurrence of the gate pulses and its output voltage is smoothed by a low-pass filter 15.
The smoothed voltage obtained, as well as a d.c. voltage V 3 , derived from the supply voltage of the circuit, are supplied to a differential amplifier 16. The output voltage thereof is the voltage V 1 which is supplied to pulse generator 7. As a result thereof the duration of the pulses of FIG. 3b and, consequently, also the position along the time axis of the edges of signal Q s , depend on the value of the smoothed voltage. Elements 7 to 16 inclusive constitute an auxiliary control loop which operates so that each gate pulse of FIG. 3g remains symmetrical relative to the edge of the reference signal of FIG. 3d and, consequently, also relative to the center instant of the synchronizing pulse of FIG. 2a. This determines the duration of the gate pulse. Since, if the duration of the synchronizing pulse is 4.7 μs while the duration of the flyback pulse is 12 μs and if the interval between the starting instant of the flyback pulse (that is to say that of the blanking pulse in the received video signal) and the starting instant of the synchronizing pulse is equal to 1.5 μs, then the period of time between the leading edge in FIG. 2b and instant t o is equal, in the ideal case, to 1.5 +(4.7/2)=3.85 μs. Due to the action of voltage V 2 in stage 11 and of the auxiliary control loop, the trailing edge in FIG. 2b occurs 3.85 μs after instant t o , so that the duration of the gate pulse is 7.7 μs. In practice the pulse will be somewhat longer but it is obvious that, due to this rather short period of time, it is ensured that the sensitivity of the circuit to noise and disturbances is low, which especially holds for disturbances caused by reflection.
The final state of the auxiliary control loop is attained after a time which is independent of the frequency of oscillator 5, while the auxiliary control loop cannot experience an adverse influence from noise and disturbances. The time constant of filter 15 can therefore be chosen at will. Dutch Patent Application No. 7511633 (PHN.8169) describes all this more extensively. Because, however, the variations of delay τ can be rapid, this time constant must be many times smaller, for example ten times as small as that of filter 4.
If the frequency of oscillator 5 varies, for example due to a variation in the supply voltage, or if the frequency of the received line synchronisation pulses varies, for example because a switch-over to another transmitter is effected, the oscillator 4 is so adjusted by the operation of the control loop formed by elements 3 to 8 inclusive that the situation indicated in FIG. 2 occurs. This implies that the waveforms of the FIGS. 3a, 3b, 3c, 3d and 3e are shifted along the time axis until the leading edges of the pulses of FIG. 3a occur at the center instants of the synchronizing pulses of FIG. 2a. In this way it is ensured that also the trailing edges of the pulses of FIG. 3e and, consequently, also those of the gate pulses of FIGS. 3g and 2b are fixed relative to the synchronizing pulses.
If now the delay τ between the falling edge of the signal of FIG. 3c and the starting instant of the flyback pulse of FIG. 3f vary and/or if a shift of the gate pulses of FIG. 3g occurs relative to the reference signal of FIG. 3d as a result of spread in the properties of the various components and/or of inequalities of the transition times in the various transistors etc., then the pulse generator 7 is so adjusted by the operation of auxiliary control loop 7 to 16 inclusive that the situation shown in FIG. 3d occurs. In this situation the input voltage, originating from filter 15, of differential amplifier 16 is substantially equal to the voltage V 3 . Prior to the occurrence of this situation, said voltages deviate from one another, so that voltage V 1 varies. As a result, the position of the trailing edges of the pulses of FIG. 3b and, consequently, also the position of the edges of the signal Q s of FIG. 3 c change. Thus, the signal Q s is shifted along the time axis until the flyback pulses of FIG. 3f are fixed relative to the synchronizing pulses of FIG. 2a. Therefore, it is ensured, by means of the auxiliary control loop, that the influence of variations in time τ are considerably reduced and that the gate pulses shift only a little relative the reference signal, so that they may be of a short duration.
As in the previously mentioned Dutch Patent Application No. 7511633, the d.c. voltage V o , which is supplied to oscillator 5 in the absence of a control voltage originating from filter 4 and cause the oscillator to generate a signal having the nominal frequency, may be derived from the output voltage of filter 15. Also a pulse may be derived from one of the signals of FIG. 2 or FIG. 3, for example the sawtooth signal of FIG. 3a, for keying out the color synchronizing signal, which pulse may also be used for stabilising the black level. A coincidence detector may be used with which it is possible to reinstate the at least partly simultaneous occurrence of the gate pulses and the synchronizing pulses. In the case of non-coincidence, the gate pulses assume a longer duration, or the supply load for the gate pulses to gate 2 is interrupted, while the loop gain of control loop 3 to 8 inclusive is increased. As known, the locking-in property of the loop is improved by means of this switch-over.
As this loop gain cannot be infinitely large, the situation shown in FIG. 2 does not as a rule occur, that is to say there always remains a residual error. This means that the edge of the reference signal of FIG. 2c occurs, in the nominal state, at an instant which slightly deviates from instant t o , so that the voltage supplied to oscillator 5 slightly deviates from the value V o . The circuit of FIG. 1 is improved in this respect.
The control voltage which is supplied to oscillator 5 is also supplied to an amplifier 17. The output voltage thereof is the voltage V 2 which is supplied to pulse generator 11. Amplifier 17 is so dimensioned that the abovementioned error is corrected. If the error is, for example, such that the falling edge of the signal of FIG. 2c occurs somewhat too early relative to instant t o then amplifier 17 must have a gain of such a value and such a sign that voltage V 2 in FIG. 3a increases by a suitable value. This cause the falling edges in FIG. 3e and, consequently, in FIG. 3g to be shifted to the left. Due to the operation of the auxiliary control loop, when the gate pulses of FIG. 3g are substantially symmetrical in the synchronized state relative to instant t o , the rising edges in FIG. 3g are shifted to the right so that the gate pulses are given a shorter duration. The consequence of the outlined shift is that the flyback pulses occur somewhat later than is the case in FIG. 3f, so that also the signal Q s of FIG. 3c is shifted to the right. This means an identical shift of the falling edges of the signal of FIG. 3b and, consequently, a decrease of voltage V 1 . In this manner a small error is introduced in the auxiliary control loop so that the flyback pulses are slightly shifted relative to the reference signal, whose position along the time axis does not depend on voltage V 1 but, as a consequence of which, with a suitable design of amplifier 17, the flyback pulses are fixed relative to the synchronizing pulses. The center instant of a flyback pulse thus occurs at instant t o . A certain value can be assigned to voltage V 2 in the absence of a control voltage at the input terminal of amplifier 17; the duration of the gate pulses is adjusted by this setting. It will be obvious that a similar adjustment can also be applied in the case amplifier 17 is not present.
The foregoing discusses the idealised wave forms of FIGS. 2 and 3. It is obvious that both the leading and trailing edges in, for example, FIG. 2b and the edges in, for example, FIG. 2c have in practice no infinitely steep slope but a kind of sawtooth shape. Consequently, the symmetry aimed at means that the center instants of the pulses in FIG. 2b and of the edges in FIG. 2c occur substantially simultaneously, wherein center instant must be understood to mean in the first-mentioned case the instant located in the center of the time interval between which the signal is higher than half its maximum value and in the second case the instant at which half of the maximum value is achieved.
During the locking-in of the auxiliary control loop the position of the gate pulses varies in the described circuit along the time axis while that of the reference signal remains unchanged. It is clear that an implementation can be realised in which the position of the gate pulses is not affected
by the control, while the position of the reference signal varies.
With the exception of capacitors which are part of filters 4 and 15, the described circuits can be integrated in a semiconductor body. In the preceding the oscillator has in the nominal state double the line frequency. It will be obvious that this is not essential for the invention, that is to say the invention can also be used if the nominal frequency is the line frequency or another multiple thereof.
The invention relates to a television receiver comprising a line synchronizing circuit and also comprising a line deflection circuit, the line synchronizing circuit comprising a controllable oscillator for generating an oscillator signal applicable to the line deflection circuit and being provided with means for applying a pulse-shaped line synchronizing signal and a pulse-shaped gate, which which is derived from the oscillator signal by means of a pulse generator, to a coincidence stage, an output terminal of which is connected to a first phase discriminator for determining the phase difference between the synchronizing signal and a reference signal which is also derived from the oscil
lator signal, the line synchronizing circuit being further provided with a first low-pass filter for smoothing the output voltage of the first phase discriminator, the frequency and/or phase of the oscillator being controllable by the first smoother voltage thus obtained, with a second phase discriminator for determining the interval between the center instant of a gate pulse and the center instant of an edge occurring in the reference signal, and with a second low-pass filter for smoothing the output voltage of the second phase discriminator, the center instant of said edge being controllable by means of the second smoothed voltage thus obtained. Such a line synchronizing circuit is disclosed in Applicant's Dutch Patent Application No. 7511633 (PHN.8169). In this known circuit a second phase control loop, which comprises the second discriminator and the second low-pass filter ensures that said two instants substantially coincide so that the gate pulses are substantially symmetrical relative to the edge of the reference signal. Consequently, the gate pulses may be of a very short duration, so that the insensitivity to noise is increased. The output signal of the circuit can be applied to the line deflection circuit ensuring that its phase is fixed relative to that of the received line synchronizing pulses.It may, however, happen that phase variations occur in the line deflection circuit, for example because the turn-off time of a switch, usually a power transistor, present in said circuit is not constant. In order to reinstate the desired fixed phase relation between the deflection and the received synchronizing pulses, it is proposed in said patent application to apply the output signal of the present circuit first to a phase discriminator in which it is compared in known manner to a signal originating from the deflection circuit. This implies a third phase control loop. Consequently, the synchronizing circuit becomes complicated and more difficult to be implemented in integrated form.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a synchronizing circuit comprising only two phase-controlled loops and, to this end, the receiver according to the invention is characterized by a gate having a first input terminal for receivng the output signal of the pulse generator and a second input terminal for receiving an output signal of the line deflection circuit and having an output terminal for applying the gate pulses thus obtained to the coincidence state and to the second phase discriminator.
DESCRIPTION OF THE DRAWINGS
The invention will be further explained by way of non-limitative example with reference to the accompanying figures in which
FIG. 1 shows a block diagram of an implementation of a portion of a television receiver according to the invention and
FIGS. 2 and 3 show wave forms which may be used therein.
In FIG. 1 reference numeral 1 denotes the input terminal of the line synchronizing circuit. Line synchroniz
ing pulses, having the line repetition frequency f H , i.e., for example, 15,625 or 15,750 Hz, are present at the input terminal. These pulses are derived, in known manner in the television receiver, not shown, of which the circuit forms part, from the received signal in a synchronizing-separation stage and are applied to an input terminal of an AND-gate 2. FIG. 2a shows the variation versus the time of these pulses. Herein the symbol T H denotes the line period, i.e. approximately 64 μs.FIG. 2b shows the variation of gate pulses which are applied to another input terminal of gate 2 and which are generated in the circuit in a manner still to be explained hereafter. FIG. 2b shows each gate pulse symmetrically relative to the center instant t o of the corresponding line synchronising pulse of FIG. 2a. As known this pulse has a duration of, for example, 4.5 to 5 μs. The gate pulses have a somewhat longer duration of, for example, 7.7 μs. The output signal of gate 2 is applied to a controllable switch 3. If the pulses at the inputs of gate 2, as in FIG. 2, occur at least partly simultaneously, then switch 3 is made conductive for the duration of that portion of the line synchronizing pulses.
Switch 3 is supplied with a line frequency reference signal which is generated in a manner still to be explained hereafter and which is shown in FIG. 2c. In the synchronized state it has a falling edge at instant t o and a rising edge at an instant which is, for example, in the center of the time interval between instant t o and the corresponding instant t 1 one cycle later.
In these circumstances the voltage shown in FIG. 2d is present at the output terminal of switch 3. After smoothing by means of a low-pass filter 4, a d.c. voltage is produced which is supplied to a voltage controlled oscillator 5, whose frequency and/or phase is adjusted hereby. Switch 3 behaves as a phase discriminator by means of which the falling edge of the signal of FIG. 2c is adjusted to the center instant t o of the pulse of FIG. 2a. If the frequency of the signal of FIG. 2c deviates from the value f H , then the phase difference between this signal and that of FIG. 2a varies continuously. The control voltage supplied
Oscillator 5 is also supplied with a d.c. voltage V o of, for example, 3 V on which the control voltage just mentioned is superimposed. Voltage V o may correspond to the nominal frequency of the line synchronizing pulses in accordance with the television standard for which the television receiver is suited. In the described implementation, however, the signal generated by oscillator 5 has, in the nominal case, a frequency 2f H which is double the line frequency. This signal is applied to a frequency divider circuit 6 in which the frequency is divided by the number of lines per picture in the relevant standard, being, for example, 625 or 525. A field frequency signal of, for example, 50 or 60 Hz, is available at an output terminal of divider circuit 6 in the synchronized state of the line phase-controlled loop, which signal can be applied to a field synchronizing circuit of known type.
The sawtooth signal shown in FIG. 3a is derived from the signal of oscillator 5, the sawtooth signal being applied to a pulse generator 7. By means of a d.c. voltage level V 1 which is applied to generator 7 and which is generated in a manner still to
be explained, the sawtooth signal is converted in this generator into a pulse-shaped signal (FIG. 3b). The leading edges of these pulses and the rising edges in FIG. 3a occur simultaneously; while the instant of occurrence of the trailing edges of the pulses is determined by the value of voltage V 1 . These pulses are applied to a frequency dividing circuit 8 which, for example, is a binary divider circuit of known type, for example a master-slave flip-flop. The output signals thereof have the line frequency f H . The signal at an output terminal Q s thereof (see FIG. 3c) changes levels each time a falling edge occurs in the signal of FIG. 3b, while the signal at an output terminal Q m of circuit 8 (see FIG. 3d) changes levels each time a rising edge occurs in the signal of FIG. 3b. This implies that the signal of FIG. 3b is fixed relative to the time axis while the position of the signal of FIG. 3c depends on the value of voltage V 1 .The signal at terminal Q m is the signal which is applied as a reference signal to switch 3, while the signal at terminal Q s is applied to a pulse shaper 9. The output signal thereof has the variation which is suitable for being applied, possibly via a driver stage, to a line output stage 10. Stage 10 supplies a line frequency current to the deflection coil, not shown, for the horizontal deflection in the picture display tube. Stage 10 comprises a switch usually a power transistor, whose turn-on time is relatively short, while its turn-off time is considerable, namely in the order of 10 μs. This is caused by the fact that the charge carriers, which are present in an excess in the saturated transistor, must first be removed. As known, the turn-off time depends on variations in the load of stage 10, for example the beam current in the picture display tube. In known manner, the adverse influence of such variations can be compensed for, for example by including a phase-controlled loop between oscillator 5 and the output of stage 10, this loop comprising a phase discriminator, a low-pass filter as well as an oscillator or a phase-shifting network. A signal originating from the output of stage 10 is used as a reference signal for this loop. Dutch Patent Application No. 7103465 (PHN.5499) discloses such a phase-controlled loop. A compensation is effected in the circuit of FIG. 1 in a different manner, which will be explained in the further course of this description.
The sawtooth voltage of FIG. 3a is also applied to a pulse generator 11 in which the sawtooth signal is converted into the pulse-shaped signal of FIG. 3e by means of a d.c. voltage V 2 applied thereto. The rising edges thereof occur simultaneously with those of FIG. 3a while the falling edges occur at the instants at which the sawtooth signal attains the value V 2 . In this manner the frequency of these pulses would have the double line frequency 2f H . However, the signal at the terminal Q m of divider circuit 8 is also applied to generator 11, thus, each rising edge of this signal cuts off generator 11. Other line frequency signals, for example line flyback pulses originating from stage 10, can also be used for this same purpose. The pulses obtained are applied to an input terminal of an OR-gate 12.
FIG. 3f shows line flyback pulses present in output stage 10, for example across a winding of a transformer thereof. For simplicity they are depicted as sine-shaped waves. They occur from approximately the instant at which the switch in stage 10 is switched-off, that is to say a time 96 after the occurrence of a falling edge of signal Q s (FIG. 3c) which time τ may be variable, while the duration of these pulses is substantially constant. The pulses of FIG. 3f are applied to an input terminal of an AND-gate 13, while another input terminal is connected to terminal Q m of the frequencies divider 8. The output terminal of gate 13 is connected to an input terminal of gate 12.
From FIGS. 3d and 3f it appears that the output signal of gate 13 has a leading edge from a time τ after the occurrence of a falling edge of signal Q s , and a trailing edge at the instant at which a falling edge of signal Q m occurs. The output signal of gate 12 has a leading edge at
the same instant at which the leading edge of the output signal of gate 13 occurs and a trailing edge at the same instant at which the trailing edge of generator 11 occurs. The pulses at the output terminal of gate 12 are shown in FIG. 3g and are the gate pulses of FIG. 2b which are applied to gate 2. The leading edges thereof occur at instants which depend on the delay τ produced in output stage 10, while the instants at which the trailing edges occur depend only on the, optionally adjustable, voltage V 2 . These pulses do not contain any information concerning the signal Q m , in spite of the fact that Q m is one of the input signals of gate 13, which information is, for the rest not necessary. Said input signal is only used for removing the portion of the pulse of FIG. 3f occurring after the falling edge of signal Q m . The same result can be achieved by means of, for example, a bistable multivibrator, the output signal of which has a leading edge at the same instant as the flyback pulse and a trailing edge at the same instant as the signal of generator 11.A phase discriminator 14, implemented as a controllable switch, is supplied with the reference signal at the output terminal Q m of divider circuit 8 (FIG. 3d) as well as with the gate pulses originating from gate 12. Switch 14 conducts during the occurrence of the gate pulses and its output voltage is smoothed by a low-pass filter 15.
The smoothed voltage obtained, as well as a d.c. voltage V 3 , derived from the supply voltage of the circuit, are supplied to a differential amplifier 16. The output voltage thereof is the voltage V 1 which is supplied to pulse generator 7. As a result thereof the duration of the pulses of FIG. 3b and, consequently, also the position along the time axis of the edges of signal Q s , depend on the value of the smoothed voltage. Elements 7 to 16 inclusive constitute an auxiliary control loop which operates so that each gate pulse of FIG. 3g remains symmetrical relative to the edge of the reference signal of FIG. 3d and, consequently, also relative to the center instant of the synchronizing pulse of FIG. 2a. This determines the duration of the gate pulse. Since, if the duration of the synchronizing pulse is 4.7 μs while the duration of the flyback pulse is 12 μs and if the interval between the starting instant of the flyback pulse (that is to say that of the blanking pulse in the received video signal) and the starting instant of the synchronizing pulse is equal to 1.5 μs, then the period of time between the leading edge in FIG. 2b and instant t o is equal, in the ideal case, to 1.5 +(4.7/2)=3.85 μs. Due to the action of voltage V 2 in stage 11 and of the auxiliary control loop, the trailing edge in FIG. 2b occurs 3.85 μs after instant t o , so that the duration of the gate pulse is 7.7 μs. In practice the pulse will be somewhat longer but it is obvious that, due to this rather short period of time, it is ensured that the sensitivity of the circuit to noise and disturbances is low, which especially holds for disturbances caused by reflection.
The final state of the auxiliary control loop is attained after a time which is independent of the frequency of oscillator 5, while the auxiliary control loop cannot experience an adverse influence from noise and disturbances. The time constant of filter 15 can therefore be chosen at will. Dutch Patent Application No. 7511633 (PHN.8169) describes all this more extensively. Because, however, the variations of delay τ can be rapid, this time constant must be many times smaller, for example ten times as small as that of filter 4.
If the frequency of oscillator 5 varies, for example due to a variation in the supply voltage, or if the frequency of the received line synchronisation pulses varies, for example because a switch-over to another transmitter is effected, the oscillator 4 is so adjusted by the operation of the control loop formed by elements 3 to 8 inclusive that the situation indicated in FIG. 2 occurs. This implies that the waveforms of the FIGS. 3a, 3b, 3c, 3d and 3e are shifted along the time axis until the leading edges of the pulses of FIG. 3a occur at the center instants of the synchronizing pulses of FIG. 2a. In this way it is ensured that also the trailing edges of the pulses of FIG. 3e and, consequently, also those of the gate pulses of FIGS. 3g and 2b are fixed relative to the synchronizing pulses.
If now the delay τ between the falling edge of the signal of FIG. 3c and the starting instant of the flyback pulse of FIG. 3f vary and/or if a shift of the gate pulses of FIG. 3g occurs relative to the reference signal of FIG. 3d as a result of spread in the properties of the various components and/or of inequalities of the transition times in the various transistors etc., then the pulse generator 7 is so adjusted by the operation of auxiliary control loop 7 to 16 inclusive that the situation shown in FIG. 3d occurs. In this situation the input voltage, originating from filter 15, of differential amplifier 16 is substantially equal to the voltage V 3 . Prior to the occurrence of this situation, said voltages deviate from one another, so that voltage V 1 varies. As a result, the position of the trailing edges of the pulses of FIG. 3b and, consequently, also the position of the edges of the signal Q s of FIG. 3 c change. Thus, the signal Q s is shifted along the time axis until the flyback pulses of FIG. 3f are fixed relative to the synchronizing pulses of FIG. 2a. Therefore, it is ensured, by means of the auxiliary control loop, that the influence of variations in time τ are considerably reduced and that the gate pulses shift only a little relative the reference signal, so that they may be of a short duration.
As in the previously mentioned Dutch Patent Application No. 7511633, the d.c. voltage V o , which is supplied to oscillator 5 in the absence of a control voltage originating from filter 4 and cause the oscillator to generate a signal having the nominal frequency, may be derived from the output voltage of filter 15. Also a pulse may be derived from one of the signals of FIG. 2 or FIG. 3, for example the sawtooth signal of FIG. 3a, for keying out the color synchronizing signal, which pulse may also be used for st
abilising the black level. A coincidence detector may be used with which it is possible to reinstate the at least partly simultaneous occurrence of the gate pulses and the synchronizing pulses. In the case of non-coincidence, the gate pulses assume a longer duration, or the supply load for the gate pulses to gate 2 is interrupted, while the loop gain of control loop 3 to 8 inclusive is increased. As known, the locking-in property of the loop is improved by means of this switch-over.As this loop gain cannot be infinitely large, the situation shown in FIG. 2 does not as a rule occur, that is to say there always remains a residual error. This means that the edge of the reference signal of FIG. 2c occurs, in the nominal state, at an instant which slightly deviates from instant t o , so that the voltage supplied to oscillator 5 slightly deviates from the value V o . The circuit of FIG. 1 is improved in this respect.
The control voltage which is supplied to oscillator 5 is also supplied to an amplifier 17. The output voltage thereof is the voltage V 2 which is supplied to pulse generator 11. Amplifier 17 is so dimensioned that the abovementioned error is corrected. If the error is, for example, such that the falling edge of the signal of FIG. 2c occurs somewhat too early relative to instant t o then amplifier 17 must have a gain of such a value and such a sign that voltage V 2 in FIG. 3a increases by a suitable value. This cause the falling edges in FIG. 3e and, consequently, in FIG. 3g to be shifted to the left. Due to the operation of the auxiliary control loop, when the gate pulses of FIG. 3g are substantially symmetrical in the synchronized state relative to instant t o , the rising edges in FIG. 3g are shifted to the right so that the gate pulses are given a shorter duration. The consequence of the outlined shift is that the flyback pulses occur somewhat later than is the case in FIG. 3f, so that also the signal Q s of FIG. 3c is shifted to the right. This means an identical shift of the falling edges of the signal of FIG. 3b and, consequently, a decrease of voltage V 1 . In this manner a small error is introduced in the auxiliary control loop so that the flyback pulses are slightly shifted relative to the reference signal, whose position along the time axis does not depend on voltage V 1 but, as a consequence of which, with a suitable design of amplifier 17, the flyback pulses are fixed relative to the synchronizing pulses. The center instant of a flyback pulse thus occurs at instant t o . A certain value can be assigned to voltage V 2 in the absence of a control voltage at the input terminal of amplifier 17; the duration of the gate pulses is adjusted by this setting. It will be obvious that a similar adjustment can also be applied in the case amplifier 17 is not present.
The foregoing discusses the idealised wave forms of FIGS. 2 and 3. It is obvious that both the leading and trailing edges in, for example, FIG. 2b and the edges in, for example, FIG. 2c have in practice no infinitely steep slope but a kind of sawtooth shape. Consequently, the symmetry aimed at means that the center instants of the pulses in FIG. 2b and of the edges in FIG. 2c occur substantially simultaneously, wherein center instant must be understood to mean in the first-mentioned case the instant located in the center of the time interval between which the signal is higher than half its maximum value and in the second case the instant at which half of the maximum value is achieved.
During the locking-in of the auxiliary control loop the position of the gate pulses varies in the described circuit along the time axis while that of the reference signal remains unchanged. It is clear that an implementation can be realised in which the position of the gate pulses is not affected
With the exception of capacitors which are part of filters 4 and 15, the described circuits can be integrated in a semiconductor body. In the preceding the oscillator has in the nominal state double the line frequency. It will be obvious that this is not essential for the invention, that is to say the invention can also be used if the nominal frequency is the line frequency or another multiple thereof.
PHILIPS 26C964 PICASSO CHASSIS K12I RGB HYBRID AMPLIFIER 4822 212 20307 3122 128 58455 CUT-OFF BEAM CONTROL CIRCUIT.
The RGB Amplifier in the chassis PHILIPS K12 is operating on the G1 instead on katode in conventional schemes.
These are realized with HYBRID IC'S technology and they're in ceramic substrate.
PHILIPS CHASSIS K12 (20AX) CRT TUBE RGB AMPLIFIER DETAIL RGB HYBRID AMPLIFIER 4822 212 20307 3122 128 58455
PHILIPS 26C964 PICASSO CHASSIS K12I Hybrid RGB Amplifiers on CRT Socket.
Driving directly: G1 blue G1 red G1 green.Hybrid IC Technology on Ceramic substrate.
1. A hybrid IC comprising:
a substrate including a front face, a back face opposite the front face, and side faces interposed between the front face and the back face which define an outer perimeter of the substrate;
at least one inductor formed on at least one of the front face and the back face of the substrate;
a semiconductor chip mounted on the front face of the substrate by flip-chip bonding;
at least one terminal formed in a predetermined portion of the side faces of the substrate,
wherein the semiconductor chip comprises a plurality of circuit elements provided therein, at least one of the plurality of circuit elements being an MIM capacitor having a metal-insulation film-metal (MIM) structure, the insulation film being composed of a highly dielectric material.
2. A hybrid IC according to claim 1 further comprising at least one matching circuit for matching an input signal to the circuit elements provided inside the semiconductor chip, the matching circuit comprising at least one inductor.
3. A hybrid IC according to claim 2, wherein a wiring pattern is formed of a single metal layer on both the front and back faces of the substrate, the wiring patterns on the respective front and back faces of the substrate being interconnected with each other via through holes, and the at least one inductor comprised in the matching circuit is formed in the wiring pattern on one of the respective front and back faces of the substrate.
4. A hybrid IC according to claim 2, wherein the matching circuit is constituted only by inductors and comprises at least one serial inductor and at least one parallel inductor.
5. A hybrid IC according to claim 4, wherein the parallel inductor comprised in the matching circuit is a spiral-type inductor, outermost wiring of the spiral-type inductor being grounded.
6. A hybrid IC according to claim 2, wherein the inductors comprised in the matching circuit are a spiral-type inductor or a meander-type inductor.
7. A hybrid IC according to claim 2, wherein the matching circuit comprises an inductor and a capacitor, the capacitor being formed inside the semiconductor chip.
8. A hybrid IC according to claim 7, wherein the inductor comprised in the matching circuit is a spiral-type inductor or a meander-type inductor.
9. A hybrid IC according to claim 1, wherein the at least one terminal includes at least an RF terminal functioning as an input terminal for an RF si
gnal, an LO terminal functioning as an input terminal for an LO signal, an IF terminal functioning as an output terminal for an IF signal, a ground terminal, and a supply terminal.---------------------------------------
PHILIPS 26C964 PICASSO CHASSIS K12I ,HERE BELOW A DETAILED DESCRIPTION OF THE PHILIPS CHASSIS K12 CRT DRIVING TECHNOLOGY:
PHILIPS CHASSIS K12I Automatic gray scale control circuit for a color television receiver
The present invention relates to a novel automatic gray scale control circuit for a color television receiver. The circuit senses the cut-off voltage of each gun during the blanking interval, and uses a voltage equal to the cut-off voltage to energize the driver and bias the gun during the video field. The effect is to standardize the emission of each of the three guns against variation in gun cut-off voltage and to produce improved gray scale accuracy at the lowest emission levels. Since the gray scale adjustment is optimized at the lowest emission levels, where the eye is most intolerant to error in hue, one may avoid the need for manual adjustment of the cut-off point, and in cases where the gain does not vary widely from gun to gun, avoid the need for separate gain adjustment. Thus, the circuit may be used either to simplify or eliminate the color set up process at the factory when the receiver is manufactured. It may also reduce or avoid the need for readjustment after periods of use.PHILIPS 26C964 PICASSO CHASSIS K12I PHILIPS CHASSIS K12 CRT Beam current control apparatus:TDA2770 TDA2771
Introducing beam current control:
1. A television picture display device for displaying pictures derived from video signals, said display device comprising a picture display tube having a cathode; an emitter-follower device coupled to said cathode for producing a beam current for driving said picture display tube; a beam current reference level control circuit coupled to said emitter-follower device for controlling the black level of the beam current; a blacker-than-black current compensation circuit incorporated in said beam current reference level control circuit for compensating for a leakage current in said cathode caused by a blacker-than-black level in the video signal; and a blacker-than-black current conduction circuit coupled to said cathode to enable compensation of said leakage current when said beam current is blanked.
2. A television picture display device as claimed in claim 1, wherein the blacker-than-black current conduction circuit comprises a direct current source coupled to the cathode of the picture display tube for keeping said emitter-follower device conductive at the occurrence of a blacker-than-black current in the cathode circuit of the picture display tube thereby allowing for the compensation of said blacker-than-black signal.
3. A television picture display device as claimed in claim 2, wherein the direct current source comprises a first and second resistor serially connected to a supply voltage said first resistor being a.c. coupled to the base of the emitter-follower device.
5. A television picture display device as claimed in claim 4, wherein said difference-forming circuit comprises a current mirror circuit having an input and an output, the input of which is coupled to the collector of the second emitter-follower device and the output to the collector of the first-mentioned emitter-follower device.
6. A television picture display device as claimed in claims 2, 3, 4, 5 or 1, which further comprises a heater, a wehnelt electrode connection of the picture display tube and a leakage current conducting circuit, said heater and said wehnelt electrode connection being coupled to the collector of the first-mentioned emitter-follower device through a said leakage current conducting circuit.
Description:
BACKGROUND OF THE INVENTIONDutch Patent Application No. 7604463 discloses a television picture display device of the above-defined type. In this device a control of the black level, serving as the reference level, of the beam current, to a constant value takes inter alia place by means of a voltage produced across the collector resistor of the emitter-follower. Although in principle this control should furnish a very constant black level this appears not to be the case.
SUMMARY OF THE INVENTION
It is an object of the invention to improve the constancy of the controlled reference level of the beam current.
DESCRIPTION OF THE DRAWINGS
The invention will now be further explained with reference to the drawing.
In the drawing
FIG. 1 shows a circuit of a picture display device according to the invention in which the emitter-follower can be kept conductive by means of a direct current and
FIG. 2 shows a further circuit of a picture display device according to the invention in which the emitter-follower current can be taken over by another circuit and passed to a control circuit.
DESCRIPTION OF THE PREFERRED EMBODIMENT
In FIG. 1 a video signal is applied to an input of an adder circuit 3. A control signal originating from an output 7 of a beam current reference level control circuit 9 appears at a further input 5 of the adder circuit 3. This control signal is added to the video signal and the sum signal is applied to the base of an emitter-follower 13 via an amplifier 11.The emitter of the emitter-follower 13 drives a cathode of a picture display tube 14. The collector circuit of the emitter-follower 13 comprises a resistor 15, an end of which is connected to an input 17 of the beam current reference level control circuit 9. The beam current supplied by the emitter-follower 13 flows through this resistor 15.
The input 17 is, at the same time, the input of an amplifier 19, an output 21 of which is connected to an input 25 of an amplifier 27 via a switch 23. A capacitor 29 is also connected to the input 25. The switch 23 closes periodically under the influence of a signal derived from an output 31 of a switching signal generator 33 during the occurrence of the reference level, for example the black level, in the video signal.
Consequently a voltage, which is a measure of the cathode current of the picture display tube 14 during the occurrence of the reference level, is produced across the capacitor 29. This cathode current is composed of a beam current and a leakage current. To compensate for the influence of this leakage current, a switch 35, which is also connected to the output 21 of the amplifier 19, is periodically closed during the occurrence of a blacker-than-black level in the video signal, under the influence of a signal originating from an output 37 of the switching signal generator 33.
The switching signal generator 33 is synchronized with the video signal by a synchronisation signal, applied to an input 39 thereof, obtained from the video signal.
A capacitor 41, connected to the output of the switch 35, now has a voltage there across which is a measure of the leakage current of the cathode of the picture display tube 14. This voltage is supplied to an input 43 of the amplifier 27. The amplifier 27 amplifies the difference of the voltages across the capacitors 29 and 41 so that a control signal is produced at the output 7 thereof which is a measure of the beam current of the picture display tube during the occurrence of the reference level in the video signal. This control signal counteracts changes in the beam current reference level which corresponds to the video signal reference level.
To enable also a compensation of this direct current in the the blacker-than-black compensation circuit, constituted by the switch 35, the capacitor 41 and the difference formation in the amplifier 27, the value of this direct current must not be dependent on the video signal. Therefore this video signal is applied, via a capacitor 49, to the junction of the resistors 45, 47 so that the voltage across the resistor 45 becomes independent of the video signal.The variation in the leakage current in the cathode circuit of the picture display tube 14 can be many times larger than that in the beam current, which condition occurs if the reference level in the video signal is present. The variation in the voltage difference across the capacitors 28 and 41 would then be many times smaller than the variation in the voltage across one of the capacitors 28, 41. This might adversely affect the accuracy of the control system. To prevent this, two resistors 53 and 55 are provided which pass the leakage current from the wehnelt circuit and the heater circuit to the resistor 15 and, consequently, compensate the cathode leakage current to a large extent.
It will be obvious that the direct current supplied to the cathode of the picture display tube may be obtained, if so desired, by means of a transistor connected as a current source. This transistor should then be suitable for a rather high voltage because the voltage at the cathode of the picture display tube may change very much.
In FIG. 2 elements corresponding to elements of the circuit of FIG. 1 have been given the same reference numerals as in FIG. 1.The blacker-than-black current compensation circuit of FIG. 2 is arranged somewhat differently then in FIG. 1. The capacitor 41 is now arranged in series with the output 21 of the amplifier 19 and the two switches 23 and 35, and the input 43 of the amplifier 27 is connected to ground. The switch 35 now operates as a clamping switch which ensures that the blacker-than-black level is connected to ground and the voltage across the capacitor 29 becomes a measure of the beam current occurring at the reference level in the video signal.
A further difference relative to the circuit of FIG. 1 is that the collector circuit of the second emitter-follower 51 includes a circuit which acts as blacker-than-black current conduction circuit and supplies any current flowing to the cathode to the input 17 of the beam current reference level control circuit 9 so that also these currents can be measured. The direct current supply circuit (45, 47) at the cathode of the picture display tube can then be dispensed with.
The collector current of the second emitter-follower 51 is supplied to the resistor 15 via two current mirror circuits. A first current mirror circuit is constituted by a series arrangement of a resistor 57 and a diode 59 in parallel with the series arrangement of the base-emitter path of a transistor 61 and a resistor 63 to a positive supply voltage. The collector current of the transistor 61 is supplied to a second current mirror circuit having a transistor 65 and a diode 67, which is in parallel with the base-emitter path of the transistor 65. The collector of the transistor 61 is connected to the resistor 15 through which the difference in the collector currents of the two emitter-followers 13, 51 now flows. Independent of the direction of the cathode currents of the picture display tube 14, a voltage, which is a measure of that cathode current, is now produced across the resistor 15.
Instead of determining the difference current by means of current mirror circuits in the described manner, it is alternatively possible, if so desired, to use other difference-determining circuits.
If so desired also the measuring data for a beam current limiting control of the resistor 15 can be obtained in the described circuits.
The amplifier 19 may comprise a circuit which limits the amplitude of the video signal outside the instants in which measuring takes place. This may be a circuit operated by an auxiliary signal or a self-switching circuit, for example a diode limiter circuit.
If the picture
It will be obvious that the choice of the measuring instants and the associated occurrence of the reference levels and blacker-than-black levels are not important for the essence of the invention and may be chosen in a suitable manner.
The blacker-than-black current compensation circuits 9 of the above-described embodiments are interchangeable.
The amplifier 27 may comprise a level reference circuit so that the value of the beam current is determined which is associated with the corresponding reference level in the video signal.
PHILIPS 26C964 PICASSO CHASSIS K12I System for stabilizing cathode ray tube operation:
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1. In a television display apparatus which includes a cathode ray tube having at least one electron gun and means for applying a television video signal to said electron gun; a system for stabilizing the display intensity attributable to said electron gun, comprising:
means for generating first and second test signals during the vertical blanking intervals of said television video signal;
means for applying said first and second test signals to said electron gun during first and second portions, respectively, of said vertical blanking intervals;
means for sampling the beam current of said electron gun during said first and second portions and for generating first and second correction signals, respectively, in accordance with the sampled values; and
means for applying said first and second correction signals to said electron gun so as to stabilize the reference current level of said electron gun.
2. The system as defined by claim 1 wherein said first and second correction signals are applied to grids of said electron gun.
3. The system as defined by claim 2 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.
4. The system as defined by claim 1 wherein means are provided for maintaining the correction signals during the intervals between the successive test signals.
5. The system as defined by claim 1 wherein said first and second test signals are at white and black level viedo, respectively.
6. The system as defined by claim 5 wherein said first correction signal is applied as a multiplying factor to said television video signal.
7. The system as defined by claim 6 wherein the corrected television video signal is applied to the control grid of said electron gun.
8. The system as defined by claim 6 wherein the corrected television video signal is applied to the cathode of said electron gun.
9. The system as defined by claim 6 wherein said second correction signal is applied as a DC reference level to the corrected television video signal.
10. The system as defined by claim 1 wherein said means for sampling the beam current comprises a resistor in series with the cathode of said gun.
11. In a video display apparatus which includes a cathode ray tube having a plurality of electron guns and means for applying a plurality of television video signals representative of color picture information to said electron guns; a system for balancing the color screen temperature of said cathode ray tube, comprising:
means for generating first and second test signals during the vertical blanking intervals of said television video signal;
means for applying said first and second test signals to said electron guns during first and second portions, respectively, of said vertical blanking intervals;
means for sampling the beam curre
nt of each electron gun during said first and second portions and for generating first and second correction signals, respectively, for each electron gun in accordance with the sampled values; andmeans for applying said first and second correction signals to their respective electron guns so as to balance the screen color temperature of said cathode ray tube.
12. The system as defined by claim 11 wherein said first and second correction signals are applied to grids of said electron guns.
13. The system as defined by claim 12 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.
14. The system as defined by claim 11 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.
15. The system as defined by claim 11 wherein said first and second test signals are at white and black level video, respectively.
16. The system as defined by claim 15 wherein said first correction signal is applied as a multiplying factor to each of said plurality of television video signals.
17. The system as defined by claim 16 wherein the corrected plurality of television video signals are applied to the control grids of their respective electron guns.
18. The system as defined by claim 16 wherein the corrected plurality of television video signals are applied to the cathodes of their respective electron guns.
19. The system as defined by claim 16 wherein said second correction signals are applied as DC reference levels to the corrected television video signals.
20. The system as defined by claim 11 wherein said means for sampling the beam current comprises a plurality of resistors in series with the cathode of said electron guns.
Description:
BACKGROUND OF THE INVENTION
This invention relates to improvements in video display apparatus and, more particularly, to a system for stabilizing the display intensity or "color temperature" of a cathode ray tube. The subject matter of this invention is related to subject matter disclosed in copending U.S. application Ser. No. 572,128 of C. W. Smith and R. H. McMann, filed of even date herewith and assigned to the same assignee.
Conventional television display systems employing kinescope cathode ray tubes are subject to performance degradation resulting from instabilities in the operating characteristics of the kinescope or the circuits which drive or bias the kinescope. Prior techniques have been developed which serve to stabilize the signals driving a kinescope. For example, the drive voltages applied to the cathodes of a color kinescope can be stabilized using a feedback scheme; e.g., circuitry which periodically senses the drive voltage at input "black" and "white" levels of operation and corrects for deviations from standard reference voltages by gain adjustment. DC voltages applied to the kinescope can also be stabilized by using precise voltage regulation techniques.
There remains, however, the recognized problem of kinescope electron gun drift which manifests itself as a drift in screen color temperature in a three gun color kinescope. As the electron guns age, their generated beam current per unit of applied voltage (which can be considered a transconductance function) varies, the variations being generally non-uniform in the three different guns. This is a cause of noticeable and undesirable drifts in the display screen color.
The major sources of drift are: aging or long term variations caused by a gradual decrease in cathode activity, not necessarily constant or uniform for each cathode; and cathode operating temperature. The relatively long term variations in emission are caused by filament voltage changes and heat build-up in the gun area, generally a function of how many hours a display tube has been operating. Dynamic heating of each gun depends on the ratio of gun currents drawn to provide the colored picture being instantaneously presented. For example, a long persisting mostly red field causes red gun current almost exclusively, thereby causing an unbalanced heating of the red cathode, which changes its emission characteristics to a different degree than the other cathodes, this change remaining until relative cooling occurs.
Cathode thermal current, I th , is represented by the Dushman equation: I th = SA 0 T 2 e - b s /T amperes
where S and A 0 are constants and b 0 = Dushman constant ≉ 11,600° for an oxide coated cathode.
The derivative of the natural logarithm of this equation gives the change in emission with respect to temperature change: dI th /I th = 2 + (b 0 /t ) (dT/T)
the temperature of the CRT cathode is approximately 1,160° K, which yields (dI th /I th) = 12dT/T
typical ambient temperature variations, such as in a display monitor, are about 40° C, so that the net change of gun current is of the order of 12 . 40/1,160 ≉ 40%
Therefore, a 1° C change in cathode temperature yields about a 1% change in gun current, if the gun is fixed bias and not near cut-off.
It is an object of the present invention to provide a stabilizing system which overcomes the problems set forth.
SUMMARY OF THE INVENTION
The invention pertains to a video display apparatus which includes a cathode ray tube having at least one electron gun and means for deriving a source of excitatory voltage signal representative of picture information. In accordance with the invention there is provided a system for stabilizing the display intensity attributable to the electron gun comprising means coupling the source of voltage signal to the gun for generating a stabilized current in the gun, the level of current in the gun being substantially independent of variations in the operating characteristics of the gun.
In the preferred embodiment of the invention a test signal is periodically applied at a predetermined level to the electron gun. A sampler samples the beam current of the gun during the test signal and generates a correction signal in accordance with the sample value. The correction signal is applied to the gun so as to stabilize its reference current level.
Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified diagram of a color television display kinescope;
FIGS. 2A, 2B and 2C are block diagrams of embodiments of the invention which utilize periodically applied test signals;
FIG. 3 is a schematic representation of an embodiment of the invention which employs a "constant current" technique;
FIG. 4 is a schematic representation of another embodiment of the invention employing a differential amplifier; and
FIG. 5 is a schematic representation of another embodiment of the invention employing direct cathode temperature sensing and heater control.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIG. 1, there is shown a simplified diagram of a color television display cathode ray tube or kinescope 10 as driven by excitatory video voltage signals designated R, G and B, these signals having typical ranges of about 100 volts peak-to-peak. The kinescope 10 has three electron guns, each including a cathode and associated grids. For clarity of illustration, only one of the three guns, designated by reference numeral 11, is represented in some detail, but it will be appreciated that two other complete electron guns (indicated in the Figure by only the two dashed cathodes coupled to the G and B inputs) are normally provided and are substantially identical to the gun 11. Hereinafter, and in the description of the embodiments of the invention, the circuitry associated with only one electron gun in a given kinescope will be described for illustrative clarity, but it will be understood that if the kinescope has two or more guns, similar circuitry can be employed in conjunction with the remaining guns.
The electron gun 11 comprises a cathode 21 and first, second and third grids, 22, 23, and 24, which are sometimes designated as "grid 1," "grid 2," and "grid 3," or as the "control electrode," the "accelerating electrode," and the "focusing electrode," respectively. Generated electrons impinge on an anode 25 near display screen 26 which is coated with an electron-sensitive phosphor as is conventional in the art. Typical voltages applied to the cathode, grid 1, grid 2, grid 3 and the anode are about 235 volts, 150 volts, 700 volts, 5000 volts and 25,000 volts, respectively. In alternate modes of operation, the excitatory voltage input signal may be applied to a control grid with the remaining grid and cathode voltages being set at appropriate values.
Referring to FIG. 2A, there is shown an embodiment of the invention which comprises a system for stabilizing the display intensity or "color temperature" of the electron guns in a kinescope 30. An excitatory voltage signal at input terminal 31, which may be the R, B or G signal in a color system or the luminance signal in a black and white system, is coupled through an adder 41 and DC restorer circuit 42 to grid 1 of the kinescope 30. Cathode 43 is coupled through a resistor R 1 to ground reference. A bias voltage is applied to grid 2 via a voltage amplifier 44 which receives a signal on a line 58A which determines the level of the bias voltage applied to grid 2. Suitable focus and anode voltages are applied to grid 3 and the anode from sources not shown.
The vertical and horizontal synchronizing signals of the composite television signal, available in the television receiver, are applied to a line counter 51 which is adapted to count horizontal scanlines of the television field and to be reset to zero at the end of each television field. The counter generates a first output on a line 51A during the scanlines 15-17 of each television field and a signal on line 51B during lines 18-20 of each television field, all of the lines 15-20 occuring during the vertical blanking period. The signal on line 51A enables a gate 55 and also enables a sample-and-hold circuit 56. The signal on line 51B enables a gate 57 and a sample-and-hold circuit 58. The gates 55 and 57 respectively receive voltages at reference "black level" and "white level." The outputs of gates 55 and 57 are coupled over lines 55A and 57A, respectively, to inputs of the adder 41.
Operation of the system of FIG. 2A is as follows: During lines 15-17 of the vertical blanking interval the gate 55 is enabled so that black level voltage is coupled through adder 41 and circuit 42 to grid 1. With this voltage applied to grid 1 the cathode current should ideally have a certain nominal value that does not vary with the tube life or cathode temperature but, as indicated above in the Background, this is not generally the case in actual practice. The actual cathode current is sampled across resistor R 1 , and a voltage representative of this current is coupled to the sample-and-hold circuit 56 which is enabled to sample the voltage across resistor R 1 during the lines 15-17. The circuit 56 holds the sampled voltage through the subsequent video field and couples the held voltage to circuit 42 via line 56A, this voltage serving to adjust the DC reference level of the output of circuit 42. In this manner, the voltage on line 56A controls the bias level at grid 1 so as to correct for any variations in the cathode current at nominal black level. Thus, for example, if at some point in operation the cathode current for a black level input voltage is lower than its nominal value, the voltage drop across sampling resistor R 1 will also be low. This will decrease the output of sample-and-hold circuit 56 fed to circuit 42 which, in turn, will cause the bias level at grid 1 to decrease (typically, to a less negative value with respect to the cathode). A lesser negative bias level on the control grid 1 will, in turn, cause a proportionate increase in the electron current flowing from cathode 43; the desired result.
Similarly, during lines 18-20 of the vertical blanking period white level voltage is applied via adder 41 and amplifier 42 to grid 1, and during this time the cathode current is sampled by circuit 58 which is enabled to sample by the signal on line 51B. During the remainder of the television field, the bias voltage applied to grid 2, via voltage amplifier 33, is a function of the voltage which had been sampled by circuit 58. For example, in an instance where the cathode current sensed at a white level voltage input is lower than the nominal value, the resultant low voltage sampled by circuit 58 will cause the grid 2 accelerating voltage to decrease. This causes the sampled voltage at black level to appear too negative (when next sampled during the succeeding vertical blanking interval) which, in turn, results in a decrease in grid bias by the black level circuit causing the desired increase in beam current over prior conditions, as previously described.
The embodiment of FIG. 2B is similar to that of FIG. 2A except that the output of sample-and-hold circuit 58 (which is a measure of the sampled white level current) is coupled to an analog multiplier circuit 59, which is in series with DC restorer circuit 52. In this embodiment, corrections resulting from both the white level and black level measurements are achieved via grid 1, with operation otherwise being substantially as described above.
In the embodiment of FIG. 2C the electron gun is driven by application of the video signal to the cathode 43 via a complementary emitter-follower 120 which comprises NPN transistor 121 and PNP transistor 122. (The system to the left of blocks 42 and 56 is the same as in FIG. 2B). The transistor emitters are coupled to the cathode 43 of kinescope 30 and the transistor bases receive the video signal from DC restorer circuit 42. The collector of transistor 121 is coupled to a suitable bias voltage, e.g., 150 volts, and the collector of transistor 122 is coupled to ground reference potential through sampling resistor R 1 .
In operation, during the lines 15-20 the test signals are applied via circuit 42 and cathode 43 is driven while the cathode current is sampled by resistor R 1 , a typical value for which is 1K ohm. Transistor 122 is "on" during the white level test signal (output of circuit 42 about 25 volts) and the black level test signal (output of circuit 42 about 125 volts), and the gun current-representative voltages sampled across resistor R 1 are coupled to the appropriate sample-and-hold circuits as previously described. During the active portion of the television field the analog multiplier 59 and DC restorer circuit 42 apply appropriate corrections, with transistor 122 normally "on." During rapid lighter-to-darker transitions of the video signal the transistor 121 turns momentarily "on" and the tube capacitance and stray capacitance (collectively represented by C in the Figure can be thought of as charging. Diode D 1 prevents inordinate voltage drops across R 1 during the active picture area when R 1 is not used for sampling.
I
n the embodiment of FIG. 3 the video voltage signal at terminal 61 is coupled to cathode 71 of a kinescope 75 by the parallel combination of capacitor 62 and amplifier 63 in a series with resistor R 2 . Amplifier 63 comprises transistors 64 and 65 and has a voltage gain of about 5 and an output capability of about 500 volts. The resistor R 2 is selected to be substantially greater than the input impedance of the cathode 71 and preferably has a resistance at least five times higher than the cathode resistance. Since the effective cathode resistance is the inverse of the gun transconductance (about 8.6 micromhos), a suitable value for R 2 is of the order of 600K ohms. Accordingly, the amplifier 63 in conjunction with resistor R 2 operates as a so-called "constant current" source, which effectively transforms the voltage signal at terminal signal to a current source input to the cathode 71, this current source input being relatively insensitive to variations in the kinescope characteristics. Since normal wiring capacitance and electron gun interelectrode capacitance render high frequency response impractical in a high impedance amplifier drive, the higher frequency portions of the video signal are shunted across the amplifier by capacitor 62 which may have a typical value of about 0.05 microfarads. The higher frequency signals arrive at substantially the same relative level as the low frequencies, thereby preserving their relationship. This is because the lower frequency signals are amplified by a factor of 5 and then undergo a one-fifth loss by virtue of the voltage divider action of resistor R 2 and the cathode impedance.
FIG. 4 shows a further embodiment wherein the video voltage signal at an input terminal 81 is applied to one input of a differential amplifier comprising transistors 82, 83 and 84. The output stage 84 drives the grid 1 electrode of kinescope 90 through series peaking inductor L 1 and shunt peaking inductor L 2 . The cathode 91 of kinescope 90 is coupled to ground reference potential through resistor R 3 which is used to continuously monitor the cathode current, the line 89 coupling a voltage representative of the cathode current to the other input of the differential amplifier; viz., the base of transistor 83.
In operation, the voltage developed across resistor R 3 is proportional to the cathode current. This voltage, for a stable transconductance, should be in a stable relationship with respect to input voltage at terminal 81, and R 3 is selected empirically at a value, typically about 2K ohms, which generates a sample voltage nominally equal to the input voltage at terminal 81. When a deviation exists between the inputs to transistors 82 and 83, the output of the differential amplifier adjusts up or down to correct for the difference, thereby adjusting control of the drive to grid 1 and correcting for drifts in the kinescope transconductance.
A characteristic of the circuit of FIG. 4 is that it linearizes the electron gun transfer function which normally is non-linear, the non-linear function conventionally being known as "gamma" of the kinescope. Television video signals are conventionally precorrected for the gamma of the kinescope. In a color kinescope the gamma may be different for each gun, making it difficult to match the effective light output attributable to each gun over the grey scale; a problem known as "tracking" in the prior art. The present invention allows use of an inverse gamma circuit (which eliminates the precorrection in the conventional television signal) and the linearized gun transfer functions reduce tracking problems.
The invention has been described with reference to particular embodiments, but it will be understood that variations within the spirit and scope of the invention will occur to those skilled in the art. For example, the circuits of the "constant current" generator of FIG. 3 or the differential amplifier of FIG. 4 may be of other suitable forms. Also, in the embodiment of FIG. 2, sampling could be achieved during any suitable blanking or active period. The beam could be deflected off the tube face during sampling time to avoid displaying the trace during this time. Finally, stabilization of cathode temperatures could be achieved directly, such as by providing heater/thermistor stabilization circuits for each cathode. A suitable circuit is shown in FIG. 5 wherein a negative temperature coefficient thermistor 101 is attached to the cathode metal. V 0 is a precision voltage source providing a voltage typically in the range 5-12 volts and R 0 is selected as being substantially equal to the resistance of the thermistor at nominal cathode temperature. If the cathode becomes unduly hot, the resistance of thermistor 101 will decrease which, in turn, causes the voltage at terminal 103 to decrease. This results in a decreased output of operational amplifier 102, so that the cathode heater drive is reduced, as desired. Insufficient cathode temperature can be seen to cause the opposite effect.
This invention relates to improvements in video display apparatus and, more particularly, to a system for stabilizing the display intensity or "color temperature" of a cathode ray tube. The subject matter of this invention is related to subject matter disclosed in copending U.S. application Ser. No. 572,128 of C. W. Smith and R. H. McMann, filed of even date herewith and assigned to the same assignee.Conventional television display systems employing kinescope cathode ray tubes are subject to performance degradation resulting from instabilities in the operating characteristics of the kinescope or the circuits which drive or bias the kinescope. Prior techniques have been developed which serve to stabilize the signals driving a kinescope. For example, the drive voltages applied to the cathodes of a color kinescope can be stabilized using a feedback scheme; e.g., circuitry which periodically senses the drive voltage at input "black" and "white" levels of operation and corrects for deviations from standard reference voltages by gain adjustment. DC voltages applied to the kinescope can also be stabilized by using precise voltage regulation techniques.
There remains, however, the recognized problem of kinescope electron gun drift which manifests itself as a drift in screen color temperature in a three gun color kinescope. As the electron guns age, their generated beam current per unit of applied voltage (which can be considered a transconductance function) varies, the variations being generally non-uniform in the three different guns. This is a cause of noticeable and undesirable drifts in the display screen color.
The major sources of drift are: aging or long term variations caused by a gradual decrease in cathode activity, not necessarily constant or uniform for each cathode; and cathode operating temperature. The relatively long term variations in emission are caused by filament voltage changes and heat build-up in the gun area, generally a function of how many hours a display tube has been operating. Dynamic heating of each gun depends on the ratio of gun currents drawn to provide the colored picture being instantaneously presented. For example, a long persisting mostly red field causes red gun current almost exclusively, thereby causing an unbalanced heating of the red cathode, which changes its emission characteristics to a different degree than the other cathodes, this change remaining until relative cooling occurs.
Cathode thermal current, I th , is represented by the Dushman equation: I th = SA 0 T 2 e - b s /T amperes
where S and A 0 are constants and b 0 = Dushman constant ≉ 11,600° for an oxide coated cathode.
The derivative of the natural logarithm of this equation gives the change in emission with respect to temperature change: dI th /I th = 2 + (b 0 /t ) (dT/T)
the temperature of the CRT cathode is approximately 1,160° K, which yields (dI th /I th) = 12dT/T
typical ambient temperature variations, such as in a display monitor, are about 40° C, so that the net change of gun current is of the order of 12 . 40/1,160 ≉ 40%
Therefore, a 1° C change in cathode temperature yields about a 1% change in gun current, if the gun is fixed bias and not near cut-off.
It is an object of the present invention to provide a stabilizing system which overcomes the problems set forth.
SUMMARY OF THE INVENTION
The invention pertains to a video display apparatus which includes a cathode ray tube having at least one electron gun and means for deriving a source of excitatory voltage signal representative of picture information. In accordance with the invention there is provided a system for stabilizing the display intensity attributable to the electron gun comprising means coupling the source of voltage signal to the gun for generating a stabilized current in the gun, the level of current in the gun being substantially independent of variations in the operating characteristics of the gun.
In the preferred embodiment of the invention a test signal is periodically applied at a predetermined level to the electron gun. A sampler samples the beam current of the gun during the test signal and generates a correction signal in accordance with the sample value. The correction signal is applied to the gun so as to stabilize its reference current level.
Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified diagram of a color television display kinescope;
FIGS. 2A, 2B and 2C are block diagrams of embodiments of the invention which utilize periodically applied test signals;
FIG. 3 is a schematic representation of an embodiment of the invention which employs a "constant current" technique;
FIG. 4 is a schematic representation of another embodiment of the invention employing a differential amplifier; and
FIG. 5 is a schematic representation of another embodiment of the invention employing direct cathode temperature sensing and heater control.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIG. 1, there is shown a simplified diagram of a color television display cathode ray tube or kinescope 10 as driven by excitatory video voltage signals designated R, G and B, these signals having typical ranges of about 100 volts peak-to-peak. The kinescope 10 has three electron guns, each including a cathode and associated grids. For clarity of illustration, only one of the three guns, designated by reference numeral 11, is represented in some detail, but it will be appreciated that two other complete electron guns (indicated in the Figure by only the two dashed cathodes coupled to the G and B inputs) are normally provided and are substantially identical to the gun 11. Hereinafter, and in the description of the embodiments of the invention, the circuitry associated with only one electron gun in a given kinescope will be described for illustrative clarity, but it will be understood that if the kinescope has two or more guns, similar circuitry can be employed in conjunction with the remaining guns.The electron gun 11 comprises a cathode 21 and first, second and third grids, 22, 23, and 24, which are sometimes designated as "grid 1," "grid 2," and "grid 3," or as the "control electrode," the "accelerating electrode," and the "focusing electrode," respectively. Generated electrons impinge on an anode 25 near display screen 26 which is coated with an electron-sensitive phosphor as is conventional in the art. Typical voltages applied to the cathode, grid 1, grid 2, grid 3 and the anode are about 235 volts, 150 volts, 700 volts, 5000 volts and 25,000 volts, respectively. In alternate modes of operation, the excitatory voltage input signal may be applied to a control grid with the remaining grid and cathode voltages being set at appropriate values.
Referring to FIG. 2A, there is shown an embodiment of the invention which comprises a system for stabilizing the display intensity or "color temperature" of the electron guns in a kinescope 30. An excitatory voltage signal at input terminal 31, which may be the R, B or G signal in a color system or the luminance signal in a black and white system, is coupled through an adder 41 and DC restorer circuit 42 to grid 1 of the kinescope 30. Cathode 43 is coupled through a resistor R 1 to ground reference. A bias voltage is applied to grid 2 via a voltage amplifier 44 which receives a signal on a line 58A which determines the level of the bias voltage applied to grid 2. Suitable focus and anode voltages are applied to grid 3 and the anode from sources not shown.The vertical and horizontal synchronizing signals of the composite television signal, available in the television receiver, are applied to a line counter 51 which is adapted to count horizontal scanlines of the television field and to be reset to zero at the end of each television field. The counter generates a first output on a line 51A during the scanlines 15-17 of each television field and a signal on line 51B during lines 18-20 of each television field, all of the lines 15-20 occuring during the vertical blanking period. The signal on line 51A enables a gate 55 and also enables a sample-and-hold circuit 56. The signal on line 51B enables a gate 57 and a sample-and-hold circuit 58. The gates 55 and 57 respectively receive voltages at reference "black level" and "white level." The outputs of gates 55 and 57 are coupled over lines 55A and 57A, respectively, to inputs of the adder 41.
Similarly, during lines 18-20 of the vertical blanking period white level voltage is applied via adder 41 and amplifier 42 to grid 1, and during this time the cathode current is sampled by circuit 58 which is enabled to sample by the signal on line 51B. During the remainder of the television field, the bias voltage applied to grid 2, via voltage amplifier 33, is a function of the voltage which had been sampled by circuit 58. For example, in an instance where the cathode current sensed at a white level voltage input is lower than the nominal value, the resultant low voltage sampled by circuit 58 will cause the grid 2 accelerating voltage to decrease. This causes the sampled voltage at black level to appear too negative (when next sampled during the succeeding vertical blanking interval) which, in turn, results in a decrease in grid bias by the black level circuit causing the desired increase in beam current over prior conditions, as previously described.
The embodiment of FIG. 2B is similar to that of FIG. 2A except that the output of sample-and-hold circuit 58 (which is a measure of the sampled white level current) is coupled to an analog multiplier circuit 59, which is in series with DC restorer circuit 52. In this embodiment, corrections resulting from both the white level and black level measurements are achieved via grid 1, with operation otherwise being substantially as described above.
In the embodiment of FIG. 2C the electron gun is driven by application of the video signal to the cathode 43 via a complementary emitter-follower 120 which comprises NPN transistor 121 and PNP transistor 122. (The system to the left of blocks 42 and 56 is the same as in FIG. 2B). The transistor emitters are coupled to the cathode 43 of kinescope 30 and the transistor bases receive the video signal from DC restorer circuit 42. The collector of transistor 121 is coupled to a suitable bias voltage, e.g., 150 volts, and the collector of transistor 122 is coupled to ground reference potential through sampling resistor R 1 .In operation, during the lines 15-20 the test signals are applied via circuit 42 and cathode 43 is driven while the cathode current is sampled by resistor R 1 , a typical value for which is 1K ohm. Transistor 122 is "on" during the white level test signal (output of circuit 42 about 25 volts) and the black level test signal (output of circuit 42 about 125 volts), and the gun current-representative voltages sampled across resistor R 1 are coupled to the appropriate sample-and-hold circuits as previously described. During the active portion of the television field the analog multiplier 59 and DC restorer circuit 42 apply appropriate corrections, with transistor 122 normally "on." During rapid lighter-to-darker transitions of the video signal the transistor 121 turns momentarily "on" and the tube capacitance and stray capacitance (collectively represented by C in the Figure can be thought of as charging. Diode D 1 prevents inordinate voltage drops across R 1 during the active picture area when R 1 is not used for sampling.
n the embodiment of FIG. 3 the video voltage signal at terminal 61 is coupled to cathode 71 of a kinescope 75 by the parallel combination of capacitor 62 and amplifier 63 in a series with resistor R 2 . Amplifier 63 comprises transistors 64 and 65 and has a voltage gain of about 5 and an output capability of about 500 volts. The resistor R 2 is selected to be substantially greater than the input impedance of the cathode 71 and preferably has a resistance at least five times higher than the cathode resistance. Since the effective cathode resistance is the inverse of the gun transconductance (about 8.6 micromhos), a suitable value for R 2 is of the order of 600K ohms. Accordingly, the amplifier 63 in conjunction with resistor R 2 operates as a so-called "constant current" source, which effectively transforms the voltage signal at terminal signal to a current source input to the cathode 71, this current source input being relatively insensitive to variations in the kinescope characteristics. Since normal wiring capacitance and electron gun interelectrode capacitance render high frequency response impractical in a high impedance amplifier drive, the higher frequency portions of the video signal are shunted across the amplifier by capacitor 62 which may have a typical value of about 0.05 microfarads. The higher frequency signals arrive at substantially the same relative level as the low frequencies, thereby preserving their relationship. This is because the lower frequency signals are amplified by a factor of 5 and then undergo a one-fifth loss by virtue of the voltage divider action of resistor R 2 and the cathode impedance.
FIG. 4 shows a further embodiment wherein the video voltage signal at an input terminal 81 is applied to one input of a differential amplifier comprising transistors 82, 83 and 84. The output stage 84 drives the grid 1 electrode of kinescope 90 through series peaking inductor L 1 and shunt peaking inductor L 2 . The cathode 91 of kinescope 90 is coupled to ground reference potential through resistor R 3 which is used to continuously monitor the cathode current, the line 89 coupling a voltage representative of the cathode current to the other input of the differential amplifier; viz., the base of transistor 83.In operation, the voltage developed across resistor R 3 is proportional to the cathode current. This voltage, for a stable transconductance, should be in a stable relationship with respect to input voltage at terminal 81, and R 3 is selected empirically at a value, typically about 2K ohms, which generates a sample voltage nominally equal to the input voltage at terminal 81. When a deviation exists between the inputs to transistors 82 and 83, the output of the differential amplifier adjusts up or down to correct for the difference, thereby adjusting control of the drive to grid 1 and correcting for drifts in the kinescope transconductance.
A characteristic of the circuit of FIG. 4 is that it linearizes the electron gun transfer function which normally is non-linear, the non-linear function conventionally being known as "gamma" of the kinescope. Television video signals are conventionally precorrected for the gamma of the kinescope. In a color kinescope the gamma may be different for each gun, making it difficult to match the effective light output attributable to each gun over the grey scale; a problem known as "tracking" in the prior art. The present invention allows use of an inverse gamma circuit (which eliminates the precorrection in the conventional television signal) and the linearized gun transfer functions reduce tracking problems.
A beam current clamping control circuit in which in case of a too large deviation of the desired value of the field frequency measured beam current an accelerated correction of this deviation is effected.
1. Television display apparatus including a beam current clamping control circuit having a beam current measuring circuit operable by a pulse generator and coupled to a television display tube for measuring, during at least part of a line scan time of a field blanking time a beam current reference level to be corrected, a level insertion circuit for inserting the reference level during the measuring time into a video signal to be applied to the television display tube and a level correction circuit coupled to an output of the measuring circuit and to a control electrode of the television display tube, the measuring circuit including a threshold circuit and a storage circuit, characterized in that the threshold circuit is a circuit which applies a signal to an output thereof when a too large beam current occurs, said output being coupled to an operation signal input of a circuit means for extending the charge correction time of the storage circuit per field period.
2. Television display apparatus as claimed in claim 1, characterized in that the circuit extending the charge correction time is a circuit means for increasing the measuring frequency, whereby a greater number of measurements per unit time is effected.
3. Television display apparatus as claimed in claim 1, characterized in that the circuit extending the charge correction time is a change-over switch a first input of which is coupled to an input of the measuring circuit, a second input is coupled to a beam current independent charging circuit coupled to a supply source and an output is coupled to the storage circuit.
4. Television display apparatus as claimed in claim 1, characterized in that the pulse generator includes a counting circuit having a feedback which can be switched on by the threshold circuit.
5. A beam current clamping control circuit for a television display tube comprising a beam
Description:
The invention relates to television display apparatus including a beam current clamping control circuit comprising a beam current measuring circuit coupled to a television display tube and operable by a pulse generator for measuring during at least part of a line scan time of a field blanking period a beam current reference level to be corrected, a level insertion circuit for inserting during the measuring time the reference level into a video signal to be applied to the television display tube, and a level correction circuit coupled to an output of the measuring circuit and to a control electrode of the television display tube, the measuring circuit including a threshold circuit and a storage circuit.
Television display apparatus of this type is known from U.S. Patent No. 3,562,409 in which the threshold circuit ensures that in case of a too large deviation of the beam current relative to the desired value the drive of the storage circuit is limited.
It is an object of the invention to provide improved television display apparatus of the kind described in the preamble which is characterized in that the threshold circuit is a circuit which in case of occurrence of a too large beam current applies a signal to an output thereof which output is coupled to an operation signal input of a circuit extending the charge corrections time of the storage circuit per field period.
Due to the limiting circuit in the circuit arrangement described in the abovementioned U.S. Patent Specification, in combination with the short measuring time available it could occur in the known circuit arrangement that, for example, after switching on the apparatus a very brightly lit picture occurred for several seconds. The storage circuit must include a capacitor having a fairly large capacitance the charge of which must be corrected in the known circuit with a current limited by the threshold circuit during the measuring time.
As a result of the step according to the invention the threshold circuit does not serve to limit the current intensity during the correction of the charge but to activate a circuit in case of a too large deviation of the nominal beam current, which circuit accelerates a feedback of the beam current to the nominal value by realising an extended charge correction time for the storage circuit. Consequently a feedback of the beam current to a level which is not troublesome can be obtained in a very quick manner without the current intensity in circuit elements correcting the charge of the storage circuit becoming too large.
The extended charge correction time of the storage circuit can be obtained by applying a correction charge from a current source which is independent of the measuring value under the influence of the threshold circuit during a time which is considerably longer than the measuring time, or by increasing the measuring frequency so that a current source which is dependent on the measuring value can recharge the storage circuit more frequently per unit of time.
The invention will now be described with reference to the drawing and some embodiments.
In the drawing:
FIG. 1 illustrates by way of a block-schematic diagram a television display apparatus according to the invention.
FIG. 2 illustrates by way of a block-schematic diagram a further elaboration of a television display apparatus according to the invention,
FIG. 3 likewise illustrates by way of a block-schematic diagram a further embodiment of a television display apparatus according to the invention,
FIG. 4 illustrates partly by way of a block-schematic diagram and partly by way of a principle circuit diagram a colour television display apparatus according to the invention including a sequential measuring circuit and
FIG. 5 shows a number of wave forms as may occur in the circuit of FIG. 4.
In FIG. 1 a video signal is applied to an input 1 of a level insertion circuit 3 which signal is provided with a reference level every time during some line times of a field some time after a field flyback with the aid of a signal obtained from an output 7 of a pulse generator 9 and applied to a further input 5. The video signal with the reference level is passed from an output 11 of the level insertion circuit 3 to an input 13 of a beam current level correction circuit 15. A level correction quantity obtained from an output 19 of a measuring circuit 21 is applied to a further input 17 of the beam current level correction circuit 15. A video signal having a reference level and an added level correction quantity is obtained from an output 23 and is applied to an input 25 of an amplifier 27 an output 29 of which is connected to the wehnelt electrode of a television display tube 31. A cathode of the television display tube 31 is connected to an input 33 of the measuring circuit 21.
The measuring circuit 21 includes a gating circuit 35 connected to the input 33 which applies a quantity dependent on the beam current to an output 37 during the occurrence of the reference level. The gating circuit 35 is arranged with the aid of a gating signal applied to a gating signal input 39 and originating from an output 41 of the pulse generator 9.
The quantity dependent on the beam current produced during the occurrence of the reference level is applied from the output 37 of the gating circuit 35 to an input 43 of a detection circuit 45 and to an input 47 of a threshold circuit 49.
An output 51 of the detection circuit 45 is connected in the normal operating condition to a storage capacitor 53 which constitutes a storage circuit with the circuit arrangement connected thereto and which has a time constant which is long relative to the field period. The beam current level correction quantity occurring at the output 19 of the measuring circuit 21 is then obtained from the storage capacitor 53 which quantity readjusts the beam current to a constant value.
The threshold circuit 49 has an output 55 which is connected to an operation signal input 57 of a circuit 59 extending the charge correction time of the storage circuit. The circuit 59 extending the charge correction time includes a second storage capacitor 60 which can retain a voltage optionally provided by the threshold circuit for some time and a changeover switch 61 an operation signal input 63 of which is connected to the operation signal input 57 of the circuit 59 extending the recharge time. The changeover switch 61 has an input 67 which is connected to the output 51 of the detection circuit 45 and an input 69 which is connected through a resistor 71 to a positive supply voltage. An output 73 of the change-over switch is connected to the storage capacitor 53 and the output 19 of the measuring circuit 21.
In the normal operating condition the change-over switch 61 occupies the position shown and the above-described beam current control occurs.
When the beam current is very large during the measuring time, which means that the voltage at the storage capacitor 53 is very low, threshold circuit 49 applies a voltage to its output 55 which sets the change-over switch 61 to the position not shown and, dependent on the discharge time of the second storage capacitor 60, retains it in that position for some time, for example, several hundred line times. The resistor 71 then constitutes a current source independent of the measuring value which increases the voltage across the storage capacitor 53. During the next measurement the threshold circuit 49 determines whether this increase has been sufficient or not so that the change-over switch 61 can remain in the position shown or must be reset once more for some time.
The pulse generator 9 has an input 75 to which field frequency pulses derived from field synchronising or field flyback pulses are applied and an input 77 to which pulses derived from line synchronizing or line flyback pulses are applied. The input 75 is connected to an input 79 of a shift register 81 which in this case has four sections but of which the number of sections can of course be chosen arbitrarily. A line frequency pulse originating from the input 77 serves as a clock pulse for the shift register 81 into which, for example, at the end of the field flyback time a one is shifted which is shifted one section further at every subsequently occurring clock pulse. The last two sections of the shift register have outputs 83 and 85 which are connected to inputs 87 and 89, respectively, of a gating circuit 91 which has a further input 93 connected to the input 77. The gating circuit 91 supplies signals to two outputs 95 and 97 which signals are applied to the outputs 7 and 41 of the pulse generator 9 and which have the functions described hereinbefore.
In FIG. 2 corresponding components have the same reference numerals as those in FIG. 1. For the description of this Figure reference is made to FIG. 1.
The circuit arrangement of FIG. 2 differs from that of FIG. 1 in that the second storage capacitor 60 of the circuit 59 extending the recharge time of the first storage capacitor 53 is replaced by a trigger circuit 99 a set input of which is the input 57 which is connected to the output 55 of the threshold circuit and a reset input 101 of which is connected to the input 75 of the pulse generator 9 to which the field frequency pulses are applied. An output 103 of the trigger circuit is connected to the input 63 of the change-over switch 61 and to an operation signal input 105 of a second change-over switch 107 in the pulse generator 9. An input 109 of the second change-over switch 107 is connected to an output 111 of the shift register 81 and an input 113 is connected to the input 75 for field frequency pulses from the pulse generator 9. An output 115 of the change-over switch 107 is connected to the input 79 of the shift register 81.
In the position shown of the change-over switches 61, 107 the operation of the circuit arrangement is the same as in the case of FIG. 1. When a too high beam current is detected by the threshold circuit 49, the trigger circuit 99 will be set and the change-over switches 61 and 107 will be brought to the position not shown. The storage capacitor 53 will then be charged through the resistor 71 likewise as in the case of FIG. 1. The change-over switch 107 connects the output 111 of the shift register 81 to its input 79 so that always a one circulates in the shift register 81 and a continuous measurement of the beam current is effected until the threshold circuit 49 no longer detects a too high beam current and due to the output voltage dropping out or due to the next field frequency pulse at the reset input 101 the trigger circuit 99 is reset and the normal state is restored.
In FIG. 3 corresponding components have the same reference numerals as those in FIGS. 1 and 2 and reference is made to the description associated with the relevent Figures.
The circuit arrangement differs from that of FIG. 2 by the absence of the first change-over switch 61. Consequently, when a too high beam current occurs the normal control loop is maintained and only due to the second change-over switch 107 the shift register 81 is enabled so that a strongly increased measuring frequency and an accelerated feedback occurs through the normal control loop to the normal state. The recharge time of the storage capacitor 53 is in this case extended because per field period a larger number of measurements and associated recharges of this capacitor is effected.
FIG. 4 shows a colour television receiver including a circuit arrangement according to the invention in which the principle as described with reference to FIG. 2 is used. The circuit arrangement has a colour television display apparatus having a sequential beam current measuring circuit whose principle is described in prior application Ser. No. 402,159, filed Oct. 1, 1973, now abandoned.
When a colour television signal is applied to an input 201 of a high frequency-intermediate frequency and detection section 203, a luminance signal Y is produced at an output 205, a chrominance signal Chr is produced at an output 207 and a synchronizing signal S is produced at an output 209.
The synchronizing signal S is applied to an input 211 of a time base generator 213 connected to the output 209. Deflection currents for a television display tube 221 are obtained at two outputs 215 and 217 and an EHT for the supply of the display tube 221 is obtained at an output 223.
An output 227 of the time base generator 213 applies line flyback pulses to an input 229 and an output 231 applies field flyback pulses to an input 233 of a pulse generator 235. These pulses are shown in FIG. 5 by the waveforms 529 and 533, respectively.
Furthermore FIG. 5 shows a number of waveforms 537, 509, 514, 544, 548, 520, 539, 541, 543, 547, 549, 551, 553, 656, 555, 565 and 563 and a number of instants t 1 , t 1 +T 1 , t 3 to t 10 , t 10a , and t 10 + T 2 , t 10 + 2T 2 , T 11 , t 11 + T 1 , t 11 + 2 T 1 , and t 12 which are important for explaining the operation of the circuit arrangement. The waveforms are not shown to scale.
The pulse generator 235 has a number of outputs 237, 239, 241, 243, 244, 245, 247, 249, 251, 253, 255 and an input 256 at which the waveforms 537, 539, 541, 543, 545, 547, 549, 551, 553, 555 and 556, respectively, are present.
The output 255 of the pulse generator 235 is connected to an input 257 of a level insertion circuit 259 an input 261 of which is connected to the output 205 of the section 201 and receives the luminance signal Y therefrom. The level insertion circuit 259 has an output 263 at which the modified luminance signal denoted by the waveform 563 of FIG. 5 is produced which includes a reference level 521 during three line times t 5 -t 6 , t 7 -t 8 , t 9 -t 10 at the commencement of the field, which level is inserted with the aid of the wave-form 555 applied to the input 257.
The waveform 565 is then produced at a further output 265 of the level insertion circuit 259, which waveform is applied to an input 267 of a chrominance signal amplifier 269 for suppressing the chrominance signal applied to an input 271 connected to the output 207 of the section 201.
The output 263 of the level insertion circuit 259 is connected to inputs 285, 287 and 289 of suppression and level correction circuits 291, 293 and 295, respectively, inputs 297, 299 and 301 of which are connected to outputs 247, 249 and 251 of the pulse generator 235 and inputs 303, 305 and 307 of which are connected to outputs 309, 311 and 313, respectively, of a demodulator and matrix circuit 315 to whose input 317 a chrominance signal originating from an output 319 of the chrominance signal amplifier 219 is applied.
The demodulator and matrix circuit applies a (B-Y), (G-Y) and (R-Y) colour difference signal to its outputs 309, 311 and 313, respectively. These colour difference signals are combined in the suppression and level correction circuits 291, 293 and 295 with the modified luminance signal applied to the inputs 285, 287 and 289 to form colour signals R, G and B, while as a result of the signals with the waveforms 547, 549, 551 at the inputs 297, 299 and 301 the reference level 521 originating from the luminance signal is suppressed in a special sequence. In this example a sequence is maintained in which only a reference level is left in the R-signal from t 5 to t 6 , in the G signal from t 7 to t 8 and in the B signal from t 9 to t 10 .
The suppression and level correction circuits 291, 293 and 295 furthermore have outputs 339, 341, 343 connected to the wehnelt electrode of the red, blue and green guns of the display tube 221 and inputs 345, 347 and 349 connected to the output 237 of the pulse generator 235 for receiving a suppression signal of the waveform 537 which prevent a signal supply to the display tube 221 during the time base flyback times. Inputs 351, 353 and 355 are furthermore connected to outputs 357, 359 and 361, respectively, of a measuring circuit 362 which outputs are connected to storage capacitors 363, 365 and 367, respectively, whose other ends are connected to earth. The storage capacitors 363, 365 and 367 are connected to switches 377, 378 and 379 respectively, operation signal inputs 383, 384 and 385 of which are connected to outputs 239, 241 and 243, respectively, of the pulse generator 235.
The switch 377 conducts from t 5 to t 6 , the switch 378 conducts from t 7 to t 8 and the switch 379 conducts from t 9 to t 10 . Each of these switches introduces a level applied to an input 381 thereof into the relevant storage capacitors 363, 365, 367.
The cathodes of the television display tube 221 are interconnected and are connected to an input 389 of the measuring circuit 362. Sequentially by each cathode voltages is generated across a resistor 393 connected to the input 389 which resistor is shunted by a diode 394 and is connected at its other end to a voltage of + 130 Volt during the said periods. This generated voltage produces a corresponding voltage across the storage capacitors 363, 365 and 367 which is retained during the next field flyback time and is passed on for beam current control to the inputs 351, 353 and 355 of the suppression and level correction circuits 291, 293 and 295. The two cathodes which are not measured then do not convey any beam current.
An input 391 of the measuring circuit is connected to the output 245 and an input 392 is connected to the output 253 of the pulse generator 235.
The screen grids of the guns of the television display tube 221 are each connected to an adjusting point of potentiometers 395, 396 and 397 between + 130 Volt and a higher voltage ++.
A signal occurring at the cathodes of the television display tube 221 produces a voltage across the resistor 393 which voltage is limited by the diode 394 blocked during the measuring periods. This voltage is applied to the base of a pnp transistor 401 whose emitter is connected to the other end of the resistor 393. The collector of the transistor 401 is connected to earth through a resistor 403, connected to earth through a capacitor 405 for high frequencies and has a negative feedback to the base through a resistor 407.
A signal amplified by the transistor 401 is applied through a series arrangement of a capacitor 409, a resistor 410 and a resistor 411 to the base of an npn transistor 413. The collector of an npn transistor 415 serving as a clamping switch is connected between the resistors 410 and 411. The emitter is connected to a clamping voltage V kl and the base is connected to the input 391 of the measuring circuit 362.
As a result of the waveform applied to the input 391, which waveform is the inverse form of waveform 544, the transistor 415 is cut off during the occurrence of the signal produced by the reference level 521. During the preceding line periods the capacitor 511 has reached a constant charge condition (clamped) through the then conducting transistor 415 because both the luminance signal and the chrominance signal are suppressed and the cathodes of the display tube 221 do not convey any current.
During the period t 4 -t 10 signals caused by the reference level 521 occur successively during the periods t 5 -t 6 , t 7 - t 8 and t 9 - t 10 at the successive cathodes of the display tube 221 which signals are applied in an amplified manner to the base of the transistor 413 and which furthermore appear at the emitter of an npn transistor 412 connected to the base of the transistor 413.
When the signals have an amplitude which is not too large they are passed on by the transmitter 413 through its emitter and a resistor 423 to the base of an npn transistor 425.
When the signals at the base of the transistor 413 have a too large amplitude the emitter of the transistor 412 will become more negative than its base connected to a threshold voltage V dr and this transistor 412 will start conducting and hence operate a set input of a trigger circuit 414 connected to its collector which then provides a positive voltage for its output 416. This positive voltage (waveform 556) is applied to an output 418 which is connected to the input 256 of the pulse generator 235 and which causes a variation to a free-running state which will be described hereinafter, while this voltage also controls the base of an npn transistor 422 through a resistor 420 and the emitter of this transistor is connected to earth while the collector is connected to the base of the transistor 413. The base of this transistor 413 then is no longer controlled because the transistor 422 acts as a short circuit for its input signal. The trigger circuit 414 furthermore has a reset input 424 to which a field flyback pulse (waveform 533) originating from the output 231 of the time base generator 213 is applied so that the trigger circuit 414 is reset every time at the commencement of the field flyback.
In the state in which the beam current is not too large the transistors 412 and 422 do not conduct and the signal is passed on through the transistor 413 to the base of the transistor 425 whose emitter is connected to the collector of an npn transistor 427 whose emitter is connected to earth and whose base is connected through a resistor 428 to the input 392 of the measuring circuit. The collector of the transistor 425 is connected through a resistor 430 to the base of an npn transistor 433 whose emitter is connected through a resistor 435 to the input 381 of the sequence switches 377, 378 and 379.
The collector of the transistor 425 is connected through a resistor 432 to the emitter of an npn transistor 434 arranged as an emitter follower whose base is connected through a resistor 436 to an input 438 of the measuring circuit 362 which is connected to the output 244 of the pulse generator 235 at which the waveform 544 occurs. This transistor 434 conducts during the measuring period and furthermore every time during a number of line times in the field scan time when the pulse generator 235 has acquired a free-running state (waveform 544) due to a too high beam current with the aid of the trigger circuit 414.
The transistor 427 conducts due to the waveform 553 during the measuring periods so that in the periods t 5 -t 6 , t 7 -t 8 , t 9 -t 10 the emitter of the transistor 425 is connected to earth through the transistor 427 and the transistor 425 acts as an amplifier and passes on a signal to the base of the transistor 433 and recharges through its emitter the storage capacitors 363, 365 and 367 during the corresponding periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 , respectively.
In the state of the circuit arrangement where a too large beam current has been detected and where the trigger circuit 414 is set, the transistor 425 does not conduct due to the short circuit of the base of the transistor 413 so that then the storage capacitors 363, 365 and 367 are recharged by the emitter follower 434, 433 every time during the periods when the waveform 544 is positive. This is effected a large number of times during field scan periods following the set of the trigger circuit 414 so that the storage capacitors are charged quickly to a higher voltage to reduce the beam current through the control loops as quickly as possible again.
The operation of a control loop will now be described. This control loop not only includes the television dislay tube 221 and the measuring circuit 362 but also the suppression and level correction circuit 295.
A modified luminance signal Y m according to the waveform 563 is applied to the input 289 in which signal the reference level 521 is present during the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 and which level is suppressed from t 1 to t 5 . The input 289 is connected to the base of an npn transistor 601 whose emitter is connected to earth through a resistor 603 and whose collector is connected through a resistor 605 to the emitter of an npn transistor 607. The collector of the transistor 607 is connected to a positive voltage. The base is connected to the input 307 and receives a red colour difference signal -(R-Y) which is suppressed from t 1 to t 10a .
Furthermore the emitter of the transistor 601 is connected to the emitter of an npn transistor 609 whose collector is connected to a positive voltage and whose base is connected to the input 301.
A voltage having the waveform 547 is applied to the input 301 so that the transistor 609 conducts during the periods t 7 -t 8 and t 9 -t 10 and thus cuts off the transistor 601 so that also the transistor 607 does not convey current and the signal at the collector of the transistor 601 is suppressed.
When the transistor 609 does not conduct a signal is generated at the collector of the transistor 601 which signal is a combination of the -(R-Y) signal supplied through the emitter follower 607 and the -Y m signal amplified through the transistor 601. This combination is a -R signal in which a level corresponding to the level 521 is present during the period t 5 -t 6 and which is suppressed in the line periods t 1 -t 5 and t 6 -t 10a . This signal is applied to the base of an npn transistor 611 whose collector is connected to a positive voltage and whose emitter is connected through a resistor 613 to the collector of an npn transistor 615 whose emitter is connected to earth through a resistor 617 and whose base is connected to a reference voltage of 1.4 V.
The emitter of the transistor 615 is furthermore connected to the emitters of two npn transistors 619 and 621 whose collectors are connected to a positive supply voltage.
A level correction voltage originating from the capacitor 367 and applied to the input 355 is transferred to the base of the transistor 619 through an npn transistor 623 arranged as an emitter follower while a suppression signal having the waveform 537 applied to the input 349 is passed on to the base of the transistor 621. The latter signal ensures the common suppression of the beam current during the line and field flyback periods. Due to the fact that the otherwise cut-off transistor 621 is blocked during these flyback periods, the transistor 615 is cut off and no signal is passed to the collector of this transistor because then the emitter circuit of the transistor 611 is interrupted.
The level correction voltage applied to the input 355 is then applied through the emitters of the transistors 623 and 619 to the emitter of the transistor 615 and influences the direct current through the resistor 613 provided by the transistor 615 and hence of the direct current level of the -R signal passed through the emitter of the transistor 611 to the collector of the transistor 615.
The collector of the transistor 615 is connected to the base of an npn transistor 625 whose collector is connected to a positive voltage and whose emitter is connected through an adjustable resistor 629 to the base of an npn transistor 631. The emitter of the transistor 631 is connected to earth and the collector is connected to the emitter of an npn transistor 633 whose collector is connected through a resistor 635 to a positive supply voltage of +130 V and whose base is adjusted to a bias voltage of +5 V. The base of the transistor 631 receives a negative feedback voltage from the collector of the transistor 633 through a potential divider 637, 639 to a negative voltage.
A red colour signal amplified by the transistors 631 and 633 is obtained from the collector of the transistor 633 and is applied through the output 343 to the wehnelt electrode of the red gun of the display tube 221. This signal includes the correction level originating from the capacitor 363 with which the beam current in the red gun is adjusted to a desired value.
The amplification of the circuit arrangement is adjustable with the resistor 629 so as to perform for example, a white point correction. Due to the control loop such an adjustment has substantially no influence on the beam current which is produced by the reference level 521 so that the black level and hence the colour of dark picture parts does not change due to the adjustment.
The modified luminance signal Y m for the input 289 is obtained in the level insertion circuit 259.
A luminance signal is applied to the input 261 which signal is applied to an input 701 of an amplifier 703. Furthermore the amplifier 703 has an input 707 to which an adjustable direct voltage is applied with the aid of a potentiometer 709 which serves for luminance adjustment and an input 771 to which a suppression signal is applied as is shown by the waveform 555. The black level of the picture 520 in the waveform 563 is adjustable with the aid of the potentiometer 709 relative to the level occurring during the suppression periods. The waveform 563 is the luminance signal which occurs at the output 263 across an emitter resistor 713 of an npn transistor 715 arranged as an emitter follower whose base is connected to an output 705 of the amplifier 703.
A signal having the waveform 555 is applied to the input 257 of the level insertion circuit through a capacitor 717, which signal is passed at one end through a resistor 721 to the base of an npn transistor 723 and at the other end through a potential divider 725, 727 to the base of an npn transistor 729.
During the most positive parts of the waveform 555 a low voltage is produced across a collector resistor 731 of the transistor 723. The level of the signal during the periods t 5 -t 10 lies below the cut-off point of the transistor 727 so that this is not found back in the collector signal 565 of this transistor. As a result of the potential divider 725, 727 connected to the positive voltage the transistor 729 only reacts to the most negative parts of the signal 555 and the transistor 729 is cut off during the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 so that then positive going square-wave voltages occur at the collector of this transistor.
The collector of the transistor 729 is connected through a resistor 733 to a potential divider including a resistor 735 and a series arrangement of a diode 736 and a resistor 737. The voltage at the wiper of this potential divider has a constant value of + 2.2 V which also occurs at the collector of the transistor 729 during the said periods. This voltage is passed on through a resistor 738 to the base of an npn transistor 739 whose collector is connected to a positive supply voltage and whose emitter is connected to the emitter of the transistor 715. During the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 the emitter of the transistor 739 is brought to a voltage of +1.5 V due to its base voltage so that the transistor 715 is cut off and the reference level 521 is produced at the output 263. The rest of the period the transistor 739 is cut off and a signal is applied to the output 263 through the transistor 715.
In the waveform 563 arrows show that the black level 520 of the signal is adjustable relative to the constant reference level 521 which as a result of the said control corresponds to a constant beam current valve in the guns of the display tube 221.
The pulses for the various parts of the circuit arrangement are supplied by the pulse generator 235.
This generator has four trigger circuits 801, 803, 805 and 807. A signal which relative to the signal 533 at the input is delayed over a time T 1 is applied to a set input 809 of the trigger 801 from the input 233 through a delay circuit including a resistor 811 and a capacitor 813. This signal is shown in the waveform 509. Before this pulse appears the triggers 801, 803, 805 and 807 are assumed to be in the reset condition. At the instant t 1 + T 1 the trigger 801 is brought to the set condition. A signal represented by the waveform 514 then appears at an output 814 thereof which signal is applied to four AND gate circuits 817, 819, 821 and 823.
Furthermore an inverted set signal from the trigger 801 is applied to the gate 817 as well as a line frequency pulse signal originating from the input 229.
In addition a signal represented by the waveform 544 originating from an output 816 of the trigger 803 and a signal originating from an AND gate 817 are applied to the gate 819.
The gate 821 furthermore receives a signal having a waveform 518 from an output 818 of the trigger 805 and a signal originating from an AND gate 829.
Furthermore the gate 823 receives a signal having a waveform 520 from an output 820 of the trigger 807 and an inverted line frequency pulse signal originating from the input 229. An output of this gate 823 is connected through a delay circuit including a resistor 831 and a capacitor 833 to an AND gate 835 which also receives a line frequency pulse signal from the input 229. The output of this gate 835 is connected to the reset inputs of all four triggers. The gates 827 and 829 receive an inverted signal from the input 229 and an output signal from the triggers 805 and 807, respectively.
Furthermore a switchable feedback is present between the output 814 of the trigger 801 and the set input thereof, which feedback is only switched on when the beam current in the display tube 221 is too high. This feedback starts from the output 814 through a resistor 837 which is connected to the base of an npn transistor 839 whose emitter is connected to earth and whose collector is connected through a resistor 841 to the input 256 and is connected to the output of the trigger circuit 414, the base of a transistor 843 connected to the collector of the transistor 839 having its collector connected to a positive supply voltage and being connected through a resistor 845 connected to the emitter of this transistor 843 to the set input 809 of the trigger 801. Together with the capacitor 813 the resistor 845 constitutes a delay circuit having a time delay T 2 . The feedback is not present when the beam current is so low that the trigger circuit 414 is not set; the voltage at the collector of the transistor 839 is then low and the transistor 843 is cut off. This condition is assumed to be present at the commencement of the time axis in FIG. 5.
When the voltage at the input 256 becomes high due to the trigger 414 coming in the set condition the feedback will be switched on. The transistor 839 will then act as an inverter.
When at the instant t 1 + T 1 the trigger 801 is set, the trigger 803 is blocked at the same time by the inverted set signal from the trigger 801 applied to the gate 817. The triggers 803, 805 and 807 then remain in the reset condition. After the end of the set pulse from the trigger 801, i.e. after the instant t 3 = t 2 +T 1 the gate circuit 817 becomes conducting at the instant t 4 due to the next line frequency pulse and brings the trigger 803 in the set condition. The gate 819 then becomes conducting after the end of the line pulse under the influence of the gate 827 and applies a pulse through a delay network 845, 847 to an input of an AND gate 849 to which also the line frequency signals of the input 229 are applied. At the next line pulse at the instant t 6 the trigger 805 is set so that the gate 821 provides a pulse which is delayed by a network 851, 853 and is applied to an input of an AND gate 855 to which furthermore the line frequency pulse signal from the input 229 is applied. This gate 855 becomes conducting at the next line pulse at the instant t 8 under the influence of the gate 829 and brings the trigger 807 to the set condition.
A pulse is obtained from the output of the gate 823 which begins after termination of the line pulse and which is applied delayed through the network 831, 833 to the gate 835 which then passes the next line pulse at the instant t 10 so that the triggers 801, 803, 805 and 807 are reset.
When meanwhile the trigger circuit 414 has not reached the set condition during the time between t 5 and t 10 in which the beam currents in the display tube are measured, the triggers 801, 803, 805 and 807 remain in the reset condition until the next field pulse.
When the trigger circuit 414 changes to the set condition due to a too high beam current for example between t 5 and t 6 , the described feedback from the output 814 of the trigger 801 is provided at its set input 809 and a positive pulse will appear again at the instant t 10 + T 2 at the input 809 which pulse will bring the trigger 809 to the set condition again so that at an instant t 10 + 2T 2 the trigger 803 is set whereafter the triggers repeat the above-described conditions every time.
At the next field pulse at the instant t 11 , however, the trigger 414 is reset so that the feedback in the pulse generator 235 is interrupted and a set cycle of the triggers 801, 803, 805 and 807 already started is terminated at the instant t 12 when the gate 835 applies a line pulse to the reset input of the trigger 801 so that voltage at the output 814 remains equally low and all triggers are reset. After the line pulse drops out at its reset input the trigger 801 is brought immediately to the set condition so that at the next line pulse which lies after the instant which is T 1 later than the trailing edge of the field pulse 533 the trigger 803 is set again and three line times later everything is reset and remains reset when the beam current has become sufficiently low due to the repeated recharge of the capacitors 363, 365, 367 in the measuring circuit 362.
A number of gate circuits supplying the output signals from the pulse generator 235 are coupled to the outputs of the trigger circuits.
The output 239 is connected to an output of an AND gate 857 which has an input connected to the output 816 of the trigger 803, an inverted input which is connected to the output 818 of the trigger 805 and an inverted input which is connected to the input 229 of the pulse generator. The output of this gate then applies the waveform 539.
The output 241 is connected to an output of an AND gate 859 and input of which is connected to the output 818 of the trigger 805, an inverted input is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 859 provides an output signal having the waveform 541.
The output 243 is connected to an output of an AND gate 861 an input of which is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 861 provides an output signal having the waveform 543.
The output 244 is connected to the output 816 of the trigger 803 and the output 245 is connected to an inverted output of this trigger.
The output 247 is connected to an output of an OR gate 863, the output 249 is connected to an output of an OR gate 865 and the output 251 is connected to an output of an OR gate 867. The inputs of the gate 863 are connected to the outputs of the gates 861 and 859, the inputs of the gate 865 are connected to the outputs of the gates 861 and 857 and the inputs of the gate 867 are connected to the outputs of the gates 857 and 859. The gates 863, 865 and 867 supply the signals 547, 549 and 551, respectively.
The output 253 is connected to an output of an AND gate 869 an input of which is connected to the output 816 of the trigger 803 and an inverted input is connected to the input 219 of the pulse generator 235. The waveform 553 is supplied by this gate.
The output 237 is connected to an output of an OR gate 871 whose inputs are connected to the inputs 229 and 233 of the pulse generator. The waveform 537 is provided by the gate 871.
The output 255 is connected to an output of a gate and superimposition circuit 873 an input of which is connected to an inverted output of the trigger 801, an inverted input is connected to the output of the gate 871 and an inverted input is connected to the output of the gate 869. The gate and superimposition circuit 873 provides the waveform 555.
Since the latter waveform is applied through the capacitor 717 to the input 257 of the level insertion circuit 259, an unsatisfactory amplitude selection will take place when the trigger 801, 803, 805 and 807 run free for a long period so that a charge of the capacitors 363, 365, 367 in the measuring circuit 362 is effected independently of the beam current when it has exceeded a given maximum value as described in the foregoing. The level shift due to this capacitor 717 and the results thereof are not important for the understanding of the invention and are therefore not shown in the waveforms.
Although the control voltage in the described embodiments is applied to a wehnelt electrode of the display tube it may alternatively be applied to a different control electrode.
The insertion of the reference level may of course alternatively be effected in a different manner such as, for example, by clamping the video signal on the control signal.
For switching over the described functions in case of a too large beam current value a sch mitt trigger or a monostable multivibrator may be used if desired instead of a bistable trigger circuit having a set and reset, input, or an output signal from the threshold circuit may be used.
The type of measuring circuit is not important for using the step according to the invention. Instead of a sequence measuring circuit it is alternatively possible to use a simultaneous measuring circuit in which all beam currents are simultaneously measured in the case of a multigun display tube. Also the input circuit of the measuring circuit may of course be adapted as desired.
If desired other counting circuits may be used instead of a shift register.
Television display apparatus of this type is known from U.S. Patent No. 3,562,409 in which the threshold circuit ensures that in case of a too large deviation of the beam current relative to the desired value the drive of the storage circuit is limited.
It is an object of the invention to provide improved television display apparatus of the kind described in the preamble which is characterized in that the threshold circuit is a circuit which in case of occurrence of a too large beam current applies a signal to an output thereof which output is coupled to an operation signal input of a circuit extending the charge corrections time of the storage circuit per field period.
Due to the limiting circuit in the circuit arrangement described in the abovementioned U.S. Patent Specification, in combination with the short measuring time available it could occur in the known circuit arrangement that, for example, after switching on the apparatus a very brightly lit picture occurred for several seconds. The storage circuit must include a capacitor having a fairly large capacitance the charge of which must be corrected in the known circuit with a current limited by the threshold circuit during the measuring time.
As a result of the step according to the invention the threshold circuit does not serve to limit the current intensity during the correction of the charge but to activate a circuit in case of a too large deviation of the nominal beam current, which circuit accelerates a feedback of the beam current to the nominal value by realising an extended charge correction time for the storage circuit. Consequently a feedback of the beam current to a level which is not troublesome can be obtained in a very quick manner without the current intensity in circuit elements correcting the charge of the storage circuit becoming too large.
The extended charge correction time of the storage circuit can be obtained by applying a correction charge from a current source which is independent of the measuring value under the influence of the threshold circuit during a time which is considerably longer than the measuring time, or by increasing the measuring frequency so that a current source which is dependent on the measuring value can recharge the storage circuit more frequently per unit of time.
The invention will now be described with reference to the drawing and some embodiments.
In the drawing:
FIG. 1 illustrates by way of a block-schematic diagram a television display apparatus according to the invention.
FIG. 2 illustrates by way of a block-schematic diagram a further elaboration of a television display apparatus according to the invention,
FIG. 3 likewise illustrates by way of a block-schematic diagram a further embodiment of a television display apparatus according to the invention,
FIG. 4 illustrates partly by way of a block-schematic diagram and partly by way of a principle circuit diagram a colour television display apparatus according to the invention including a sequential measuring circuit and
FIG. 5 shows a number of wave forms as may occur in the circuit of FIG. 4.
In FIG. 1 a video signal is applied to an input 1 of a level insertion circuit 3 which signal is provided with a reference level every time during some line times of a field some time after a field flyback with the aid of a signal obtained from an output 7 of a pulse generator 9 and applied to a further input 5. The video signal with the reference level is passed from an output 11 of the level insertion circuit 3 to an input 13 of a beam current level correction circuit 15. A level correction quantity obtained from an output 19 of a measuring circuit 21 is applied to a further input 17 of the beam current level correction circuit 15. A video signal having a reference level and an added level correction quantity is obtained from an output 23 and is applied to an input 25 of an amplifier 27 an output 29 of which is connected to the wehnelt electrode of a television display tube 31. A cathode of the television display tube 31 is connected to an input 33 of the measuring circuit 21.The measuring circuit 21 includes a gating circuit 35 connected to the input 33 which applies a quantity dependent on the beam current to an output 37 during the occurrence of the reference level. The gating circuit 35 is arranged with the aid of a gating signal applied to a gating signal input 39 and originating from an output 41 of the pulse generator 9.
The quantity dependent on the beam current produced during the occurrence of the reference level is applied from the output 37 of the gating circuit 35 to an input 43 of a detection circuit 45 and to an input 47 of a threshold circuit 49.An output 51 of the detection circuit 45 is connected in the normal operating condition to a storage capacitor 53 which constitutes a storage circuit with the circuit arrangement connected thereto and which has a time constant which is long relative to the field period. The beam current level correction quantity occurring at the output 19 of the measuring circuit 21 is then obtained from the storage capacitor 53 which quantity readjusts the beam current to a constant value.
The threshold circuit 49 has an output 55 which is connected to an operation signal input 57 of a circuit 59 extending the charge correction time of the storage circuit. The circuit 59 extending the charge correction time includes a second storage capacitor 60 which can retain a voltage optionally provided by the threshold circuit for some time and a changeover switch 61 an operation signal input 63 of which is connected to the operation signal input 57 of the circuit 59 extending the recharge time. The changeover switch 61 has an input 67 which is connected to the output 51 of the detection circuit 45 and an input 69 which is connected through a resistor 71 to a positive supply voltage. An output 73 of the change-over switch is connected to the storage capacitor 53 and the output 19 of the measuring circuit 21.
In the normal operating condition the change-over switch 61 occupies the position shown and the above-described beam current control occurs.
When the beam current is very large during the measuring time, which means that the voltage at the storage capacitor 53 is very low, threshold circuit 49 applies a voltage to its output 55 which sets the change-over switch 61 to the position not shown and, dependent on the discharge time of the second storage capacitor 60, retains it in that position for some time, for example, several hundred line times. The resistor 71 then constitutes a current source independent of the measuring value which increases the voltage across the storage capacitor 53. During the next measurement the threshold circuit 49 determines whether this increase has been sufficient or not so that the change-over switch 61 can remain in the position shown or must be reset once more for some time.
The pulse generator 9 has an input 75 to which field frequency pulses derived from field synchronising or field flyback pulses are applied and an input 77 to which pulses derived from line synchronizing or line flyback pulses are applied. The input 75 is connected to an input 79 of a shift register 81 which in this case has four sections but of which the number of sections can of course be chosen arbitrarily. A line frequency pulse originating from the input 77 serves as a clock pulse for the shift register 81 into which, for example, at the end of the field flyback time a one is shifted which is shifted one section further at every subsequently occurring clock pulse. The last two sections of the shift register have outputs 83 and 85 which are connected to inputs 87 and 89, respectively, of a gating circuit 91 which has a further input 93 connected to the input 77. The gating circuit 91 supplies signals to two outputs 95 and 97 which signals are applied to the outputs 7 and 41 of the pulse generator 9 and which have the functions described hereinbefore.
In FIG. 2 corresponding components have the same reference numerals as those in FIG. 1. For the description of this Figure reference is made to FIG. 1.The circuit arrangement of FIG. 2 differs from that of FIG. 1 in that the second storage capacitor 60 of the circuit 59 extending the recharge time of the first storage capacitor 53 is replaced by a trigger circuit 99 a set input of which is the input 57 which is connected to the output 55 of the threshold circuit and a reset input 101 of which is connected to the input 75 of the pulse generator 9 to which the field frequency pulses are applied. An output 103 of the trigger circuit is connected to the input 63 of the change-over switch 61 and to an operation signal input 105 of a second change-over switch 107 in the pulse generator 9. An input 109 of the second change-over switch 107 is connected to an output 111 of the shift register 81 and an input 113 is connected to the input 75 for field frequency pulses from the pulse generator 9. An output 115 of the change-over switch 107 is connected to the input 79 of the shift register 81.
In the position shown of the change-over switches 61, 107 the operation of the circuit arrangement is the same as in the case of FIG. 1. When a too high beam current is detected by the threshold circuit 49, the trigger circuit 99 will be set and the change-over switches 61 and 107 will be brought to the position not shown. The storage capacitor 53 will then be charged through the resistor 71 likewise as in the case of FIG. 1. The change-over switch 107 connects the output 111 of the shift register 81 to its input 79 so that always a one circulates in the shift register 81 and a continuous measurement of the beam current is effected until the threshold circuit 49 no longer detects a too high beam current and due to the output voltage dropping out or due to the next field frequency pulse at the reset input 101 the trigger circuit 99 is reset and the normal state is restored.
In FIG. 3 corresponding components have the same reference numerals as those in FIGS. 1 and 2 and reference is made to the description associated with the relevent Figures.
The circuit arrangement differs from that of FIG. 2 by the absence of the first change-over switch 61. Consequently, when a too high beam current occurs the normal control loop is maintained and only due to the second change-over switch 107 the shift register 81 is enabled so that a strongly increased measuring frequency and an accelerated feedback occurs through the normal control loop to the normal state. The recharge time of the storage capacitor 53 is in this case extended because per field period a larger number of measurements and associated recharges of this capacitor is effected.FIG. 4 shows a colour television receiver including a circuit arrangement according to the invention in which the principle as described with reference to FIG. 2 is used. The circuit arrangement has a colour television display apparatus having a sequential beam current measuring circuit whose principle is described in prior application Ser. No. 402,159, filed Oct. 1, 1973, now abandoned.
When a colour television signal is applied to an input 201 of a high frequency-intermediate frequency and detection section 203, a luminance signal Y is produced at an output 205, a chrominance signal Chr is produced at an output 207 and a synchronizing signal S is produced at an output 209.
The synchronizing signal S is applied to an input 211 of a time base generator 213 connected to the output 209. Deflection currents for a television display tube 221 are obtained at two outputs 215 and 217 and an EHT for the supply of the display tube 221 is obtained at an output 223.
An output 227 of the time base generator 213 applies line flyback pulses to an input 229 and an output 231 applies field flyback pulses to an input 233 of a pulse generator 235. These pulses are shown in FIG. 5 by the waveforms 529 and 533, respectively.
Furthermore FIG. 5 shows a number of waveforms 537, 509, 514, 544, 548, 520, 539, 541, 543, 547, 549, 551, 553, 656, 555, 565 and 563 and a number of instants t 1 , t 1 +T 1 , t 3 to t 10 , t 10a , and t 10 + T 2 , t 10 + 2T 2 , T 11 , t 11 + T 1 , t 11 + 2 T 1 , and t 12 which are important for explaining the operation of the circuit arrangement. The waveforms are not shown to scale.The pulse generator 235 has a number of outputs 237, 239, 241, 243, 244, 245, 247, 249, 251, 253, 255 and an input 256 at which the waveforms 537, 539, 541, 543, 545, 547, 549, 551, 553, 555 and 556, respectively, are present.
The output 255 of the pulse generator 235 is connected to an input 257 of a level insertion circuit 259 an input 261 of which is connected to the output 205 of the section 201 and receives the luminance signal Y therefrom. The level insertion circuit 259 has an output 263 at which the modified luminance signal denoted by the waveform 563 of FIG. 5 is produced which includes a reference level 521 during three line times t 5 -t 6 , t 7 -t 8 , t 9 -t 10 at the commencement of the field, which level is inserted with the aid of the wave-form 555 applied to the input 257.
The waveform 565 is then produced at a further output 265 of the level insertion circuit 259, which waveform is applied to an input 267 of a chrominance signal amplifier 269 for suppressing the chrominance signal applied to an input 271 connected to the output 207 of the section 201.The output 263 of the level insertion circuit 259 is connected to inputs 285, 287 and 289 of suppression and level correction circuits 291, 293 and 295, respectively, inputs 297, 299 and 301 of which are connected to outputs 247, 249 and 251 of the pulse generator 235 and inputs 303, 305 and 307 of which are connected to outputs 309, 311 and 313, respectively, of a demodulator and matrix circuit 315 to whose input 317 a chrominance signal originating from an output 319 of the chrominance signal amplifier 219 is applied.
The demodulator and matrix circuit applies a (B-Y), (G-Y) and (R-Y) colour difference signal to its outputs 309, 311 and 313, respectively. These colour difference signals are combined in the suppression and level correction circuits 291, 293 and 295 with the modified luminance signal applied to the inputs 285, 287 and 289 to form colour signals R, G and B, while as a result of the signals with the waveforms 547, 549, 551 at the inputs 297, 299 and 301 the reference level 521 originating from the luminance signal is suppressed in a special sequence. In this example a sequence is maintained in which only a reference level is left in the R-signal from t 5 to t 6 , in the G signal from t 7 to t 8 and in the B signal from t 9 to t 10 .
The suppression and level correction circuits 291, 293 and 295 furthermore have outputs 339, 341, 343 connected to the wehnelt electrode of the red, blue and green guns of the display tube 221 and inputs 345, 347 and 349 connected to the output 237 of the pulse generator 235 for receiving a suppression signal of the waveform 537 which prevent a signal supply to the display tube 221 during the time base flyback times. Inputs 351, 353 and 355 are furthermore connected to outputs 357, 359 and 361, respectively, of a measuring circuit 362 which outputs are connected to storage capacitors 363, 365 and 367, respectively, whose other ends are connected to earth. The storage capacitors 363, 365 and 367 are connected to switches 377, 378 and 379 respectively, operation signal inputs 383, 384 and 385 of which are connected to outputs 239, 241 and 243, respectively, of the pulse generator 235.
The switch 377 conducts from t 5 to t 6 , the switch 378 conducts from t 7 to t 8 and the switch 379 conducts from t 9 to t 10 . Each of these switches introduces a level applied to an input 381 thereof into the relevant storage capacitors 363, 365, 367.
The cathodes of the television display tube 221 are interconnected and are connected to an input 389 of the measuring circuit 362. Sequentially by each cathode voltages is generated across a resistor 393 connected to the input 389 which resistor is shunted by a diode 394 and is connected at its other end to a voltage of + 130 Volt during the said periods. This generated voltage produces a corresponding voltage across the storage capacitors 363, 365 and 367 which is retained during the next field flyback time and is passed on for beam current control to the inputs 351, 353 and 355 of the suppression and level correction circuits 291, 293 and 295. The two cathodes which are not measured then do not convey any beam current.
The screen grids of the guns of the television display tube 221 are each connected to an adjusting point of potentiometers 395, 396 and 397 between + 130 Volt and a higher voltage ++.
A signal occurring at the cathodes of the television display tube 221 produces a voltage across the resistor 393 which voltage is limited by the diode 394 blocked during the measuring periods. This voltage is applied to the base of a pnp transistor 401 whose emitter is connected to the other end of the resistor 393. The collector of the transistor 401 is connected to earth through a resistor 403, connected to earth through a capacitor 405 for high frequencies and has a negative feedback to the base through a resistor 407.
A signal amplified by the transistor 401 is applied through a series arrangement of a capacitor 409, a resistor 410 and a resistor 411 to the base of an npn transistor 413. The collector of an npn transistor 415 serving as a clamping switch is connected between the resistors 410 and 411. The emitter is connected to a clamping voltage V kl and the base is connected to the input 391 of the measuring circuit 362.
As a result of the waveform applied to the input 391, which waveform is the inverse form of waveform 544, the transistor 415 is cut off during the occurrence of the signal produced by the reference level 521. During the preceding line periods the capacitor 511 has reached a constant charge condition (clamped) through the then conducting transistor 415 because both the luminance signal and the chrominance signal are suppressed and the cathodes of the display tube 221 do not convey any current.
During the period t 4 -t 10 signals caused by the reference level 521 occur successively during the periods t 5 -t 6 , t 7 - t 8 and t 9 - t 10 at the successive cathodes of the display tube 221 which signals are applied in an amplified manner to the base of the transistor 413 and which furthermore appear at the emitter of an npn transistor 412 connected to the base of the transistor 413.
When the signals have an amplitude which is not too large they are passed on by the transmitter 413 through its emitter and a resistor 423 to the base of an npn transistor 425.
When the signals at the base of the transistor 413 have a too large amplitude the emitter of the transistor 412 will become more negative than its base connected to a threshold voltage V dr and this transistor 412 will start conducting and hence operate a set input of a trigger circuit 414 connected to its collector which then provides a positive voltage for its output 416. This positive voltage (waveform 556) is applied to an output 418 which is connected to the input 256 of the pulse generator 235 and which causes a variation to a free-running state which will be described hereinafter, while this voltage also controls the base of an npn transistor 422 through a resistor 420 and the emitter of this transistor is connected to earth while the collector is connected to the base of the transistor 413. The base of this transistor 413 then is no longer controlled because the transistor 422 acts as a short circuit for its input signal. The trigger circuit 414 furthermore has a reset input 424 to which a field flyback pulse (waveform 533) originating from the output 231 of the time base generator 213 is applied so that the trigger circuit 414 is reset every time at the commencement of the field flyback.
In the state in which the beam current is not too large the transistors 412 and 422 do not conduct and the signal is passed on through the transistor 413 to the base of the transistor 425 whose emitter is connected to the collector of an npn transistor 427 whose emitter is connected to earth and whose base is connected through a resistor 428 to the input 392 of the measuring circuit. The collector of the transistor 425 is connected through a resistor 430 to the base of an npn transistor 433 whose emitter is connected through a resistor 435 to the input 381 of the sequence switches 377, 378 and 379.
The collector of the transistor 425 is connected through a resistor 432 to the emitter of an npn transistor 434 arranged as an emitter follower whose base is connected through a resistor 436 to an input 438 of the measuring circuit 362 which is connected to the output 244 of the pulse generator 235 at which the waveform 544 occurs. This transistor 434 conducts during the measuring period and furthermore every time during a number of line times in the field scan time when the pulse generator 235 has acquired a free-running state (waveform 544) due to a too high beam current with the aid of the trigger circuit 414.
The transistor 427 conducts due to the waveform 553 during the measuring periods so that in the periods t 5 -t 6 , t 7 -t 8 , t 9 -t 10 the emitter of the transistor 425 is connected to earth through the transistor 427 and the transistor 425 acts as an amplifier and passes on a signal to the base of the transistor 433 and recharges through its emitter the storage capacitors 363, 365 and 367 during the corresponding periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 , respectively.
In the state of the circuit arrangement where a too large beam current has been detected and where the trigger circuit 414 is set, the transistor 425 does not conduct due to the short circuit of the base of the transistor 413 so that then the storage capacitors 363, 365 and 367 are recharged by the emitter follower 434, 433 every time during the periods when the waveform 544 is positive. This is effected a large number of times during field scan periods following the set of the trigger circuit 414 so that the storage capacitors are charged quickly to a higher voltage to reduce the beam current through the control loops as quickly as possible again.
The operation of a control loop will now be described. This control loop not only includes the television dislay tube 221 and the measuring circuit 362 but also the suppression and level correction circuit 295.
Furthermore the emitter of the transistor 601 is connected to the emitter of an npn transistor 609 whose collector is connected to a positive voltage and whose base is connected to the input 301.
A voltage having the waveform 547 is applied to the input 301 so that the transistor 609 conducts during the periods t 7 -t 8 and t 9 -t 10 and thus cuts off the transistor 601 so that also the transistor 607 does not convey current and the signal at the collector of the transistor 601 is suppressed.
When the transistor 609 does not conduct a signal is generated at the collector of the transistor 601 which signal is a combination of the -(R-Y) signal supplied through the emitter follower 607 and the -Y m signal amplified through the transistor 601. This combination is a -R signal in which a level corresponding to the level 521 is present during the period t 5 -t 6 and which is suppressed in the line periods t 1 -t 5 and t 6 -t 10a . This signal is applied to the base of an npn transistor 611 whose collector is connected to a positive voltage and whose emitter is connected through a resistor 613 to the collector of an npn transistor 615 whose emitter is connected to earth through a resistor 617 and whose base is connected to a reference voltage of 1.4 V.
The emitter of the transistor 615 is furthermore connected to the emitters of two npn transistors 619 and 621 whose collectors are connected to a positive supply voltage.
A level correction voltage originating from the capacitor 367 and applied to the input 355 is transferred to the base of the transistor 619 through an npn transistor 623 arranged as an emitter follower while a suppression signal having the waveform 537 applied to the input 349 is passed on to the base of the transistor 621. The latter signal ensures the common suppression of the beam current during the line and field flyback periods. Due to the fact that the otherwise cut-off transistor 621 is blocked during these flyback periods, the transistor 615 is cut off and no signal is passed to the collector of this transistor because then the emitter circuit of the transistor 611 is interrupted.
The level correction voltage applied to the input 355 is then applied through the emitters of the transistors 623 and 619 to the emitter of the transistor 615 and influences the direct current through the resistor 613 provided by the transistor 615 and hence of the direct current level of the -R signal passed through the emitter of the transistor 611 to the collector of the transistor 615.
The collector of the transistor 615 is connected to the base of an npn transistor 625 whose collector is connected to a positive voltage and whose emitter is connected through an adjustable resistor 629 to the base of an npn transistor 631. The emitter of the transistor 631 is connected to earth and the collector is connected to the emitter of an npn transistor 633 whose collector is connected through a resistor 635 to a positive supply voltage of +130 V and whose base is adjusted to a bias voltage of +5 V. The base of the transistor 631 receives a negative feedback voltage from the collector of the transistor 633 through a potential divider 637, 639 to a negative voltage.
A red colour signal amplified by the transistors 631 and 633 is obtained from the collector of the transistor 633 and is applied through the output 343 to the wehnelt electrode of the red gun of the display tube 221. This signal includes the correction level originating from the capacitor 363 with which the beam current in the red gun is adjusted to a desired value.
The amplification of the circuit arrangement is adjustable with the resistor 629 so as to perform for example, a white point correction. Due to the control loop such an adjustment has substantially no influence on the beam current which is produced by the reference level 521 so that the black level and hence the colour of dark picture parts does not change due to the adjustment.
The modified luminance signal Y m for the input 289 is obtained in the level insertion circuit 259.
A luminance signal is applied to the input 261 which signal is applied to an input 701 of an amplifier 703. Furthermore the amplifier 703 has an input 707 to which an adjustable direct voltage is applied with the aid of a potentiometer 709 which serves for luminance adjustment and an input 771 to which a suppression signal is applied as is shown by the waveform 555. The black level of the picture 520 in the waveform 563 is adjustable with the aid of the potentiometer 709 relative to the level occurring during the suppression periods. The waveform 563 is the luminance signal which occurs at the output 263 across an emitter resistor 713 of an npn transistor 715 arranged as an emitter follower whose base is connected to an output 705 of the amplifier 703.
A signal having the waveform 555 is applied to the input 257 of the level insertion circuit through a capacitor 717, which signal is passed at one end through a resistor 721 to the base of an npn transistor 723 and at the other end through a potential divider 725, 727 to the base of an npn transistor 729.
The collector of the transistor 729 is connected through a resistor 733 to a potential divider including a resistor 735 and a series arrangement of a diode 736 and a resistor 737. The voltage at the wiper of this potential divider has a constant value of + 2.2 V which also occurs at the collector of the transistor 729 during the said periods. This voltage is passed on through a resistor 738 to the base of an npn transistor 739 whose collector is connected to a positive supply voltage and whose emitter is connected to the emitter of the transistor 715. During the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 the emitter of the transistor 739 is brought to a voltage of +1.5 V due to its base voltage so that the transistor 715 is cut off and the reference level 521 is produced at the output 263. The rest of the period the transistor 739 is cut off and a signal is applied to the output 263 through the transistor 715.
In the waveform 563 arrows show that the black level 520 of the signal is adjustable relative to the constant reference level 521 which as a result of the said control corresponds to a constant beam current valve in the guns of the display tube 221.
The pulses for the various parts of the circuit arrangement are supplied by the pulse generator 235.
This generator has four trigger circuits 801, 803, 805 and 807. A signal which relative to the signal 533 at the input is delayed over a time T 1 is applied to a set input 809 of the trigger 801 from the input 233 through a delay circuit including a resistor 811 and a capacitor 813. This signal is shown in the waveform 509. Before this pulse appears the triggers 801, 803, 805 and 807 are assumed to be in the reset condition. At the instant t 1 + T 1 the trigger 801 is brought to the set condition. A signal represented by the waveform 514 then appears at an output 814 thereof which signal is applied to four AND gate circuits 817, 819, 821 and 823.
Furthermore an inverted set signal from the trigger 801 is applied to the gate 817 as well as a line frequency pulse signal originating from the input 229.
In addition a signal represented by the waveform 544 originating from an output 816 of the trigger 803 and a signal originating from an AND gate 817 are applied to the gate 819.
The gate 821 furthermore receives a signal having a waveform 518 from an output 818 of the trigger 805 and a signal originating from an AND gate 829.
Furthermore the gate 823 receives a signal having a waveform 520 from an output 820 of the trigger 807 and an inverted line frequency pulse signal originating from the input 229. An output of this gate 823 is connected through a delay circuit including a resistor 831 and a capacitor 833 to an AND gate 835 which also receives a line frequency pulse signal from the input 229. The output of this gate 835 is connected to the reset inputs of all four triggers. The gates 827 and 829 receive an inverted signal from the input 229 and an output signal from the triggers 805 and 807, respectively.
Furthermore a switchable feedback is present between the output 814 of the trigger 801 and the set input thereof, which feedback is only switched on when the beam current in the display tube 221 is too high. This feedback starts from the output 814 through a resistor 837 which is connected to the base of an npn transistor 839 whose emitter is connected to earth and whose collector is connected through a resistor 841 to the input 256 and is connected to the output of the trigger circuit 414, the base of a transistor 843 connected to the collector of the transistor 839 having its collector connected to a positive supply voltage and being connected through a resistor 845 connected to the emitter of this transistor 843 to the set input 809 of the trigger 801. Together with the capacitor 813 the resistor 845 constitutes a delay circuit having a time delay T 2 . The feedback is not present when the beam current is so low that the trigger circuit 414 is not set; the voltage at the collector of the transistor 839 is then low and the transistor 843 is cut off. This condition is assumed to be present at the commencement of the time axis in FIG. 5.
When the voltage at the input 256 becomes high due to the trigger 414 coming in the set condition the feedback will be switched on. The transistor 839 will then act as an inverter.
When at the instant t 1 + T 1 the trigger 801 is set, the trigger 803 is blocked at the same time by the inverted set signal from the trigger 801 applied to the gate 817. The triggers 803, 805 and 807 then remain in the reset condition. After the end of the set pulse from the trigger 801, i.e. after the instant t 3 = t 2 +T 1 the gate circuit 817 becomes conducting at the instant t 4 due to the next line frequency pulse and brings the trigger 803 in the set condition. The gate 819 then becomes conducting after the end of the line pulse under the influence of the gate 827 and applies a pulse through a delay network 845, 847 to an input of an AND gate 849 to which also the line frequency signals of the input 229 are applied. At the next line pulse at the instant t 6 the trigger 805 is set so that the gate 821 provides a pulse which is delayed by a network 851, 853 and is applied to an input of an AND gate 855 to which furthermore the line frequency pulse signal from the input 229 is applied. This gate 855 becomes conducting at the next line pulse at the instant t 8 under the influence of the gate 829 and brings the trigger 807 to the set condition.
A pulse is obtained from the output of the gate 823 which begins after termination of the line pulse and which is applied delayed through the network 831, 833 to the gate 835 which then passes the next line pulse at the instant t 10 so that the triggers 801, 803, 805 and 807 are reset.
When meanwhile the trigger circuit 414 has not reached the set condition during the time between t 5 and t 10 in which the beam currents in the display tube are measured, the triggers 801, 803, 805 and 807 remain in the reset condition until the next field pulse.
When the trigger circuit 414 changes to the set condition due to a too high beam current for example between t 5 and t 6 , the described feedback from the output 814 of the trigger 801 is provided at its set input 809 and a positive pulse will appear again at the instant t 10 + T 2 at the input 809 which pulse will bring the trigger 809 to the set condition again so that at an instant t 10 + 2T 2 the trigger 803 is set whereafter the triggers repeat the above-described conditions every time.
At the next field pulse at the instant t 11 , however, the trigger 414 is reset so that the feedback in the pulse generator 235 is interrupted and a set cycle of the triggers 801, 803, 805 and 807 already started is terminated at the instant t 12 when the gate 835 applies a line pulse to the reset input of the trigger 801 so that voltage at the output 814 remains equally low and all triggers are reset. After the line pulse drops out at its reset input the trigger 801 is brought immediately to the set condition so that at the next line pulse which lies after the instant which is T 1 later than the trailing edge of the field pulse 533 the trigger 803 is set again and three line times later everything is reset and remains reset when the beam current has become sufficiently low due to the repeated recharge of the capacitors 363, 365, 367 in the measuring circuit 362.
A number of gate circuits supplying the output signals from the pulse generator 235 are coupled to the outputs of the trigger circuits.
The output 239 is connected to an output of an AND gate 857 which has an input connected to the output 816 of the trigger 803, an inverted input which is connected to the output 818 of the trigger 805 and an inverted input which is connected to the input 229 of the pulse generator. The output of this gate then applies the waveform 539.
The output 241 is connected to an output of an AND gate 859 and input of which is connected to the output 818 of the trigger 805, an inverted input is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 859 provides an output signal having the waveform 541.
The output 243 is connected to an output of an AND gate 861 an input of which is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 861 provides an output signal having the waveform 543.
The output 244 is connected to the output 816 of the trigger 803 and the output 245 is connected to an inverted output of this trigger.
The output 247 is connected to an output of an OR gate 863, the output 249 is connected to an output of an OR gate 865 and the output 251 is connected to an output of an OR gate 867. The inputs of the gate 863 are connected to the outputs of the gates 861 and 859, the inputs of the gate 865 are connected to the outputs of the gates 861 and 857 and the inputs of the gate 867 are connected to the outputs of the gates 857 and 859. The gates 863, 865 and 867 supply the signals 547, 549 and 551, respectively.
The output 253 is connected to an output of an AND gate 869 an input of which is connected to the output 816 of the trigger 803 and an inverted input is connected to the input 219 of the pulse generator 235. The waveform 553 is supplied by this gate.
The output 237 is connected to an output of an OR gate 871 whose inputs are connected to the inputs 229 and 233 of the pulse generator. The waveform 537 is provided by the gate 871.
The output 255 is connected to an output of a gate and superimposition circuit 873 an input of which is connected to an inverted output of the trigger 801, an inverted input is connected to the output of the gate 871 and an inverted input is connected to the output of the gate 869. The gate and superimposition circuit 873 provides the waveform 555.
Since the latter waveform is applied through the capacitor 717 to the input 257 of the level insertion circuit 259, an unsatisfactory amplitude selection will take place when the trigger 801, 803, 805 and 807 run free for a long period so that a charge of the capacitors 363, 365, 367 in the measuring circuit 362 is effected independently of the beam current when it has exceeded a given maximum value as described in the foregoing. The level shift due to this capacitor 717 and the results thereof are not important for the understanding of the invention and are therefore not shown in the waveforms.
Although the control voltage in the described embodiments is applied to a wehnelt electrode of the display tube it may alternatively be applied to a different control electrode.
The insertion of the reference level may of course alternatively be effected in a different manner such as, for example, by clamping the video signal on the control signal.
For switching over the described functions in case of a too large beam current value a sch mitt trigger or a monostable multivibrator may be used if desired instead of a bistable trigger circuit having a set and reset, input, or an output signal from the threshold circuit may be used.
The type of measuring circuit is not important for using the step according to the invention. Instead of a sequence measuring circuit it is alternatively possible to use a simultaneous measuring circuit in which all beam currents are simultaneously measured in the case of a multigun display tube. Also the input circuit of the measuring circuit may of course be adapted as desired.
If desired other counting circuits may be used instead of a shift register.
PHILIPS 26C964 PICASSO CHASSIS K12I SONG IC Tuning Vertical running COLORED BAR SCREEN display for a television receiver:
1. In a television (TV) receiver which receives TV signals in at least one frequency band which has a plurality of TV channel signals included in lower- and upper-frequency portions thereof separated by a gap, including
tuning means for developing a tuning signal to select one of said TV channel signals and for developing band signals to indicate the one of said lower- and upper-frequency portions which includes said selected one TV channel signal, wherein said tuning signal varies between first and second magnitudes for ones of said TV channel signals in each of said lower- and upper-frequency portions, and wherein said tuning signal can have similar magnitudes for different ones of said TV channel signals,
processing and display means for displaying a TV picture responsive to said selected one TV channel signal, and
tuning indicator means responsive to a control signal for developing a tuning indication of said selected one TV channel signal;
electronic control apparatus for developing said control signal in response to said tuning signals and to said band signals to have different magnitudes corresponding to different ones of said plurality of TV channel signals, comprising:
divider means for developing a proportioned tuning signal in response to said tuning signal;
combining means, coupled to said divider means and to said offsetting means, for combining said proportioned tuning signal developed by said dividing means and said offsetting signal developed by said offsetting means to develop said control signal.
2. The control apparatus of claim 1 wherein said dividing means comprises first voltage divider means receiving said tuning signal at a first end thereof and receiving a reference signal at a second end thereof for developing said proportioned tuning signal at an intermediate connection thereof. 3. The control apparatus of claim 2 wherein said dividing means further comprises:
second voltage divider means receiving said tuning signal at a first end thereof and receiving said reference signal at a second end thereof for developing said proportioned tuning signal at an intermediate connection thereof;
a terminal; and
switch means for selectively connecting the intermediate connection of said first voltage divider means to said terminal when said selected one TV channel signal is included in said lower-frequency portion and for selectively connecting the intermediate connection of said second voltage divider means to said terminal when said selected one TV channel signal is included in said upper-frequency portion.
amplifying means for developing said control signal at an output terminal thereof and having at least one input terminal; and
means for applying said proportioned tuning signal and said offsetting signal to the input terminal of said amplifying means.
7. The control apparatus of claim 1 wherein said combining means comprises:
amplifying means for developing said control signal at an output terminal thereof and having first and second input terminals; and
means for applying said proportioned tuning signal and said offsetting signal to the first and second input terminals, respectively, of said amplifying means.
tuning means responsive to a tuning signal for selecting one of said TV channel signals and responsive to band signals for selecting the one of said lower- and upper-frequency portions which includes said selected one TV channel signal, wherein said tuning signal varies between first and second magnitudes for ones of said TV channel signals in each of said lower- and upper-frequency portions, and wherein said tuning signal can have similar magnitudes for different ones of said TV channel signals, and
processing and display means for displaying a TV picture responsive to said selected one TV channel signal;
apparatus comprising:
a source for supplying a first control signal;
divider means for developing a porportioned control signal in response to said first control signal;
offsetting means for developing an offsetting signal in response to said band signals, said offsetting signal having a magnitude corresponding to the one of said lower- and upper-frequency portions which includes said selected one TV channel signal;
combining means, coupled to said divider means and to said offsetting means, for combining said proportioned control signal developed by said dividing means and said offsetting signal developed by said offsetting means to develop a second control signal;
tuning indicator means responsive to an indicating signal for developing a tuning-indicating display on said display means, the position of said tuning-indicating display on said display means corresponding to the magnitude of said indicating signal;
means for applying one of said first and second control signals to said tuning means as said tuning signal; and
means for applying the other one of said first and second control signals to said tuning indicator means as said tuning-indicating signal.
12. The apparatus means of claim 11 wherein said tuning indicator means comprises bar generating means for developing a bar display as said tuning-indicating display, said bar generating means including:
delaying means for developing a pulse signal controllably delayed in response to said other one of said first and second control signals; and
means for applying said pulse signal to said display means to produce said bar display thereon.
13. The apparatus of claim 12 wherein said bar generating means further includes a panel proximate said display means and upon which indicia of channels of said TV channel signals are provided, the indicia of a particular channel being located on said panel according to the position of said bar display indication corresponding to said particular channel.
Description:
The present invention relates to tuning indicators for television receivers and, in particular, for displaying an apparently continuous tuning indication where the tuning band is in fact discontinuous.
The VHF-TV frequency band, including channels 2-13, is perceived by most viewers as being a single TV band even though it is in fact partitioned into lower and upper frequency portions including channels 2-6 and 7-13, respectively, which are separated by a gap. Voltage controlled tuning systems for such TV receivers employ a tuning voltage which varies over substantially the same range of magnitude from a lower to a higher voltage for each of the frequency portions of the VHF band. Accordingly, conventional channel indicators responsive to the magnitude of the tuning voltage partition the frequency bands to avoid ambiguity in the channel indication.
Tuning indicators of that sort include a display of a vertical or horizontal bar on a TV screen where the position of the bar, horizontally or vertically, respectively, provides an approximate indication of channel selection. The bar position is determined from the magnitude of the tuning voltage. Because tuning voltage is ambiguous as between the lower and upper portions of the VHF-TV band, band partitioning and some auxiliary indication is necessary to unambiguously indicate the selected channel.
Such channel indicators might be confusing to some viewers because the display partitions the VHF-TV band contrary to the viewers' perception of a single VHF-TV band. In addition, where the viewer must manually select the band in which tuning is to be accomplished, the tuning process can become more complex and inconvenient due to the increased number of bands. Moreover, the controls necessary as a result of partioning the VHF band into separate bands tends to unnecessarily increase the cost of the TV receiver.
Some TV receivers have employed mechanical tuning potentiometers having segmented resistance elements and/or segmented conductive rings positioned for developing tuning voltage, band indicating signals or display control signals. Such mechanical potentiometers are disadvantageously complex and expensive unlike the electronic apparatus described herein.
Therefore, there is a need for a tuning indicator which provides an unambiguous, approximate indication of the TV channel selected but which does not entail substantial additional complexity or cost. Such display is particularly advantageous when employed in conjunction with a low-cost scanning-type tuning system in a low cost TV receiver.
The foregoing problems are overcome when the present invention is employed in a TV receiver including a tuning device for developing a tuning signal to select one TV signal and for developing band signals to indicate the one of the lower and upper portions of a frequency band which includes the selected TV signal. The tuning signal varies between first and second magnitudes for each of the upper and lower portions of the frequency band. A processing device displays a TV picture responsive to the selected signal and a tuning indicator is responsive to a control signal for developing a tuning indication of the selected TV signal. Control apparatus which develops the control signal to cause the displayed indication to appear as if the lower and upper portions of the frequency band were substantially continuous comprises a divider for proportioning the tuning signal when the selected TV signal is in the lower and upper portions, a device responsive to the band signals for generating an offsetting signal when the selected TV signal is included in one of the lower and upper portions, and a device for combining the proportioned tuning signal and the offsetting signal to develop the control signal.
In the drawing:
FIG. 1 is a schematic block diagram of a TV receiver including the present invention;
FIG. 2 is a view of a television display;
FIGS. 3, 5 and 6 are diagrams partially in schematic and partially in block form of apparatus useful in the TV receiver of FIG. 1; and
FIG. 4 is a graphical representation of characteristics associated with the TV receiver of FIG. 1.
In the TV receiver shown in FIG. 1, TV signals are received through antenna ANT by tuning system 10 for TV signals including, e.g., channels 2-13 in the VHF-TV frequency band and channels 14-83 in the UHF-TV frequency band. Tuning system 10 develops band signals V-LO-VHF, V-HI-VHF and V-
UHF to select the one of the lower VHF, upper VHF or UHF bands, respectively, in which the selected TV signal channel is included. Tuning system 10 further develops tuning voltage VT in response to which it specifically tunes the selected TV signal in that band. IF signals from tuning system 10 are applied to IF processor 12 which develops automatic fine tuning (AFT) and automatic gain control (AGC) signals for controlling tuning system 10 and further develops a composite video signal.
Sound processor 14 develops from the composite video signal audio program information which is reproduced by loudspeaker LS.
Video processor 16 develops video signals in response to the composite video signal. In a color TV receiver in particular, video processor 16 develops blue (B), red (R) and green (G) color video signals responsive to the chrominance information in the composite video signal, each of which color video signals further includes luminance information. Kine drivers 18 couple the B, R and G color video signals to corresponding electrodes of kine display tube 20 upon which color picture information is displayed.
Sync separator 22 develops vertical synchronization signal VS which is applied to vertical deflection circuits 24 for developing periodic vertical deflection signals for driving the vertical deflection portion of yoke 30. Horizontal synchronization signal HS developed by sync separator 22 is conventionally applied via phantom path HS' for synchronizing horizontal oscillator 26 which drives horizontal deflection circuits 28 for developing periodic horizontal deflection signals in the horizontal portion of yoke 30.
A picture program display is developed on the screen of kine 20 in response to the B, R and G color video signals and the vertical and horizontal deflection signals. The TV receiver thus far described is conventional and an and an exemplary receiver is described in detail in RCA Television Service Data, Chassis CTC-107, File 1981 C-2 and Supplement 1981 C-2-S2, published by RCA Corporation, Consumer Electronics, Indianapolis, Indiana, which data is incorporated herein by reference.
Bar display generator 44 develops an on-screen tuning displa
y. In FIG. 2, TV picture program information 70 is displayed on TV screen 60. A tuning indication, for example, vertical bar 62 is also displayed on screen 60, at least at selected times. Channel numerals 66 for VHF-TV channels 2-13 and channel numerals 68 for UHF-TV channels 14-83 are provided on panel 64 proximate to screen 60. Bar 62 is moved leftward and rightward so that its position relative to channel numerals 66 and 68 indicates the channel number of the selected TV channel. So that bar 62 appears uniform and accentuated, picture information 70 is blanked on the portion of screen 60 where bar 62 is displayed. This is indicated in FIG. 2 by the gap in picture 70 where it intersects with bar 62.
In the VHF-TV band, channels 2-6 (54-88 MHz) are separated from channels 7-13 (174-216 MHz) by a gap (88-174 MHz). Tuning voltage VT developed by tuning system 10 varies between about 0.5-2 volts for voltage level V1 and 20-30 volts for voltage level V2, or about a 20-30 volt range, as illustrated by the graphical representation of FIG. 4a. VT characteristics 102 for the lower portion of the VHF-TV band, 104 for the upper portion thereof, and 106 for the UHF-TV band are ambiguous with respect to the channel selected. However, by employing VT in conjunction with band signals V-LO-VHF, V-HI-VHF and V-UHF in accordance with the present invention, a non-ambiguous tuning indication, such as that of control voltage VC shown in FIG. 4b, is obtainable. Control voltage VC is developed within bar generator 44 for controlling the position of bar 62 on screen 60 as described in detail below.
Bar display generator 44 is described in detail with reference to FIG. 3. Tuning voltage VT is proportioned by voltage dividers R1, R3 and R5 shown by way of example as potentiometers. The proportioned VT signals at the intermediate points of R1, R3 and R5, at which their wiper arms are positioned, are respectively coupled to node N1 through switches S1, S3 and S5. S1, S3 and S5 are rendered respectively conductive by bandswitch signals V-LO-VHF, V-HI-VHF and V-UHF when the selected TV signal is included in the lower VHF, upper VHF or UHF bands, respectively.
In similar fashion, offsetting potentials are developed at node N2 when the potential at the respective wiper arms of potentiometers R2, R4 and R6, developed from operating potential +V, is coupled to node N2 by switches S2, S4 and S6. S2, S4 and S6 are rendered respectively conductive by the aforementioned band signals.
Amplifier DA combines the proportioned tuning voltage at node N1 and the offsetting voltage at N2 to develop a control signal VC which is coupled through diode D to the control terminal of variable one-shot (monostable multivibrator) 80. Amplifier DA modifies the proportioned tuning voltage at N1 by a factor -RF/RI and the offsetting voltage at N2 by a factor [1+(RF/RI)], where RI and RF are the values of resistances RI and RF.
In particular, where bar generator 44 of FIG. 3 employs a CD4098B dual monostable multivibrator COS/MOS integrated circuit, available from RCA Solid-State Division, Somerville, N.J., for one-shots 80 and 82, control signal VC has about a 1.5 volt range as developed at diode D. Switches S1-S6 employ CD4016B quad bilateral switch COS/MOS integrated circuits also available from RCA Solid-State Division. The greatest magnitude control signal VC is voltage VL in FIG. 4b which positions bar 62 near the left edge of screen 60; and decreases therefrom move bar 62 towards the right. At VC equal to voltage VR, bar 62 is at the right edge of screen 62.
For low VHF channels 2-6, control voltage VC follows characteristic 112 of FIG. 4b. Potentiometer R2 is adjusted to develop VC=VL to position bar 62 at numeral "2" of indicia 66 when channel 2 is selected. With channel 6 selected, potentiometer R1 is adjusted to proportion VT to develop VC of value so that bar 62 as at numeral "6" of indicia 66. For high VHF channels 7-13, control voltage VC follows characteristic 114. R4 is adjusted so that the offsetting potential developed at N2 causes control voltage VC at diode D to be of value VL less offsetting voltage VOS so that bar 62 is positioned at numeral "7" (not shown) of indicia 66 when channel 7 is selected. With channel 13 selected, R2 is adjusted to develop VC=VR to position bar 62 at numeral "13".
For UHF channels 14-83, VC follows characteristic 116. R6 is adjusted to develop VC=VL to position bar 62 at numeral "14" of indicia 68 when channel 14 is selected; R5 is adjusted to develop VC=VR to position bar 62 at numeral "83" with channel 83 selected.
Variable one-shot 80 develops a trigger pulse signal at its output connection. The beginning of the trigger pulse signal substantially coincides with the synchronization pulse received from sync substitutor 48; the ter
mination of the trigger pulse signal is delayed from that synchronization pulse by a time period determined by the magnitude of the control signal received from the cathode of diode D. The delay time is shorter than the period of the horizontal deflection signal. Resistor RX and capacitor CX are connected between +V and ground, and determine the maximum duration of the trigger pulse. The control signal reduces that duration by restricting the range of voltage over which CX is charged and discharged.
One-shot 82 produces a pulse signal at its output connection which commences at the termination of the trigger signal from one-shot 80 and which has a duration directly controlled by a signal from control source CS. Commonly, control source CS supplies a fixed magnitude control signal so that the pulse signal from one-shot 82 is of substantially constant time duration and is substantially shorter than the period of the horizontal deflection signal. The bar pulse signal from one-shot 82 is desirably of about 0.6 microseconds duration to determine the width of the bar display and is generated between about 2 and 58 microseconds after a synchronization signal is received from 48 so to position the bar display between the left- and right-hand edges of the displayed picture. That bar pulse signal is developed and applied to an input of AND gate 84 irrespective of whether a bar is to be displayed or not.
When a tuning indication is to be displayed, a BAR ON signal is applied to the other input of AND gate 84 so that the bar pulse signal developed by one-shot 82 is coupled to node N3. The bar pulse is applied to common-emitter NPN driver transistor T1 via its base resistor RB1 and is coupled through resistor RC1 as a BLANKING signal. By way of example, that BLANKING signal can be connected to the base of vertical blank transistor Q702 shown in FIG. 21 of the CTC-107 Service Data referred to above. Alternatively, the BLANKING signal can be inverted and applied to TP 806 also shown in FIG. 21 thereof.
When the TV channel selected for viewing is in either the upper or lower portion of the VHF band, the appropriate one of band signals V-LO-VHF and V-HI-VHF are applied through OR-gate 87 to an input of AND gate 88 so that the bar pulse signal at node N3 passes via resistor RB3, driver transistor T3 and resistor RC3 to develop a RED color video signal to produce a red-colored bar display. Similarly, if the selected TV channel is in the UHF band, band signal V-UHF is applied to an input of AND gate 86 so that bar pulses from N3 causes resistor RC2, driver T2 and resistor RC2 to develop GREEN color video signals to produce a green-colored bar display. By way of example, the RED color video signal can be applied to the emitter of RED driver transistor Q5001 and the GREEN color video signal can be applied to the emitter of GREEN driver transistor Q5002, both shown in FIG. 22 of the CTC-107 Service Data referred to above.
The bar display can be inhibited under certain conditions so that degradation of its appearance does not occur. For example, signal VS applied via AND gate 89 inhibits both RED and GREEN color video signals during vertical retrace. By way of further example, the RED and GREEN color video signals are inhibited by AND gate 91 in response to band change signal BC when the tuning system changes from one band to another, such as between the VHF and UHF bands, and in response to mid-band reset signal MBR when the tuner changes over the gap between channels 6 and 7 in the VHF band. As a result, the position of the bar display is not changed in a confusing manner due to transients of tuning voltage VT or of the bandswitch voltages when the tuning system changes between bands or between portions of the VHF band.
A bar tuning display is desired whenever tuning is being performed and for a short time, for example, four seconds, thereafter, as well as on viewer demand. To that end, one-shot 42 in FIG. 1 develops the BAR ON signal for a four-second period responsive to a RECALL signal developed, for example, by the viewer depressing a pushbutton. While channel tuning is in process, horizontal synchronization signals HS are unavailable from received TV signals. Sync validity detector 40 compares the average level of received synchronization signal HS against a threshold level to develop a SYNC VALID indication which is present during tuning. One-shot 42 develops the BAR ON signal continuously so long as SYNC VALID signal is applied and for four seconds after the SYNC VALID signal is removed when valid synchronization signals are detected.
To avoid bar display tuning indication 62 from being jagged or erratic owing to the absence of an adequate sync signal, sync substitutor 48 ensures that appropriate synchronization signals are always applied to horizontal oscillator 26. To that end, oscillator 46 develops secondary horizontal synchronization signals SHS at the standard horizontal frequency of 15,575 Hz which are applied to sync substitutor 48, as are received horizontal synchronization signals HS when they are present. With respect to the detailed diagram of sync substitutor 48 shown as part of FIG. 3, SYNC VALID signal is applied to AND gate 92, and is inverted and applied as SYNC VALID signal to AND gate 94. As a result, synchronization signal HS is applied to NOR gate 96 when HS is present and valid, and synchronization signal SHS is applied to NOR gate 96 when HS is not present or not valid. NOR gate 96, resistor RC 4 and inverting buffer amplifier transistor T4 together comprise an OR gate to generate synchronization signals applied to horizontal oscillator 26.
FIG. 5 shows a modification of the embodiment described above in relation to FIG. 3. R2, R4, R6, S2, S4 and S6 has been eliminated and replaced by potentiometer R15. R15 is adjusted so that the voltage developed at its wiper is applied to the non-inverting (+) connection of amplifier DA so that DA develops VC=VL. Network 120A serves the same function as potentiometers R1 and R2 of FIG. 3. Tuning voltage VT
is proportioned substantially by R20, R21 and R22. R20 is adjusted for positioning bar 62 in like manner to that described above for R1. Bias voltage +VB is applied through resistors R23 and R24 to switch S1. R23 is adjustable for setting VC=VR for positioning bar 62 as was described above for resistor R2. Switch S1 is rendered conductive by band signal V-LO-VHF when the selected TV channel is in the lower VHF-TV band.
Networks 120B and 120C are similar to network 120A and are employed for positioning bar 62 when the selected channel is in the upper portion of the VHF-TV band and in the UHF-TV band, respectively. However, with respect to network 120B, the variable resistor corresponding to R23 of 120A is employed for developing an offsetting potential; variable resistor R23 is adjusted to establish VC=VL-VOS when channel 7 is selected.
With an embodiment of the sort shown in FIG. 5 connected to an RCA CTC-107 TV receiver, with RI=RF=100 kilohms, with diode D comprising two 1N914 diodes in series, and with DA being an LM358 operational amplifier available from National Semiconductor Corp., Santa Clara, CA., the following voltages were measured:
Examination of the data listed in Table I reveals striking similarities between the values of VC and VT under differing conditions. Specifically, the respective values of VC and VT are substantially the same when either channel 2 or 14 is selected. Moreover, the respective values of VC and VT with channel 13 or 83 selected are also substantially the same. Taking advantage of these similar values permits additional simplification of bar generator 44, such as that shown in the embodiment of FIG. 6.
FIG. 6 shows an embodiment modified from that described in relation to FIG. 5 in that networks 120A, 120B and 120C, and switches S1, S3 and S5 are replaced by resistors R10-R14 and switch S7. Tuning voltage VT is proportioned by the voltage divider comprising resistors R10 and R11 so that the change in VC is substantially VL-VR. When the selected channel is in the VHF frequency band, signal V-UHF is applied rendering switch S7 conductive to connect resistance R14 between node N1 and ground. The additional proportioning introduced by the voltage divider including R12 and R14 further attenuates VT so that the changes in control voltage VC are proportioned for characteristics 112 and 114 as compared to 116 in FIG. 4b. R14 is shown as a variable resistor for adjusting VC=VR.
When the selected channel is in the UHF-TV band, V-UHF is not applied so that S7 is nonconductive and VT is attenuated substantially by R10 and R11 for proportioning characteristic 116 of control voltage VC. When the selected channel is in the upper portion of the VHF-TV band, band voltage V-HI-VHF is applied through resistance R13 to develop an offsetting voltage which is combined at node N1 with the proportioned VT voltage. R13 is adjusted so that control voltage VC is offset by VOS from VL. It is equally satisfactory that signal V-UHF be developed by inverting band signal V-UHF or by combining V-LO-VHF and V-HI-VHF such as by a diode-ORing circuit.
Modifications are contemplated to the present invention which should be limited in scope solely by the claims following. For example, the present invention is equally satisfactory whether used in conjunction with black and white or color TV receivers and may employ either a horizontal or vertical bar type display of tuning information. Moreover, it is equally satisfactory that the tuning information be conveyed by the position of a contrasting bar as described herein or by varying the length of such bar, in which case the variable end of the bar would indicate the selected channel by its correspondence with numerials of indicia 66 and 68 on panel 64.
Although the embodiments of bar generator 44 of FIGS. 3, 5 and 6 have been described as developing an offsetting voltage when the selected TV channel is in the upper portion of the VHF-TV band so that a characteristic of the sort shown in FIG. 4b will obtain, it is equally satisfactory that offsetting potential be developed when the selected channel is in the lower portion of the VHF-TV band. In that case, the offsetting potential would be of polarity sense to shift characteristic 102 in voltage relative to characteristic 104 such that combined characteristics 112 and 114 result.
Additionally, it is equally satisfactory that the present invention be employed in conjunction with a display separate from the TV screen. For example, with a plurality of light-emitting diodes (LED) linearly arrayed, the variable time delay pulse developed by one-shot 80 can be employed to determine the number of LEDs illuminated. The illuminated LEDs appear as the equivalent of a "bar" of variable length the end of which corresponds to numerals on indicia 66 and 68 to indicate the selected channel.
While control source CS of FIG. 3 is described as supplying a fixed control signal to one-shot 82, it is equally satisfactory that CS supply a control signal variable in response to another parameter to be displayed. For example, the strength of the received signal which is readily determinable from the magnitude of AGC voltage developed by IF processor 12 can be applied to CS to vary the width of bar 62.
Additionally, to provide a limited and more precise adjustment for the proportioned tuning voltages and offsetting voltages discussed above in relation to FIG. 3, each of potentiometers R1-R6 could be reduced in resistance value and reconnected with a respective fixed resistance connected in series with each of its respective ends.
The VHF-TV frequency band, including channels 2-13, is perceived by most viewers as being a single TV band even though it is in fact partitioned into lower and upper frequency portions including channels 2-6 and 7-13, respectively, which are separated by a gap. Voltage controlled tuning systems for such TV receivers employ a tuning voltage which varies over substantially the same range of magnitude from a lower to a higher voltage for each of the frequency portions of the VHF band. Accordingly, conventional channel indicators responsive to the magnitude of the tuning voltage partition the frequency bands to avoid ambiguity in the channel indication.
Tuning indicators of that sort include a display of a vertical or horizontal bar on a TV screen where the position of the bar, horizontally or vertically, respectively, provides an approximate indication of channel selection. The bar position is determined from the magnitude of the tuning voltage. Because tuning voltage is ambiguous as between the lower and upper portions of the VHF-TV band, band partitioning and some auxiliary indication is necessary to unambiguously indicate the selected channel.
Some TV receivers have employed mechanical tuning potentiometers having segmented resistance elements and/or segmented conductive rings positioned for developing tuning voltage, band indicating signals or display control signals. Such mechanical potentiometers are disadvantageously complex and expensive unlike the electronic apparatus described herein.
Therefore, there is a need for a tuning indicator which provides an unambiguous, approximate indication of the TV channel selected but which does not entail substantial additional complexity or cost. Such display is particularly advantageous when employed in conjunction with a low-cost scanning-type tuning system in a low cost TV receiver.
The foregoing problems are overcome when the present invention is employed in a TV receiver including a tuning device for developing a tuning signal to select one TV signal and for developing band signals to indicate the one of the lower and upper portions of a frequency band which includes the selected TV signal. The tuning signal varies between first and second magnitudes for each of the upper and lower portions of the frequency band. A processing device displays a TV picture responsive to the selected signal and a tuning indicator is responsive to a control signal for developing a tuning indication of the selected TV signal. Control apparatus which develops the control signal to cause the displayed indication to appear as if the lower and upper portions of the frequency band were substantially continuous comprises a divider for proportioning the tuning signal when the selected TV signal is in the lower and upper portions, a device responsive to the band signals for generating an offsetting signal when the selected TV signal is included in one of the lower and upper portions, and a device for combining the proportioned tuning signal and the offsetting signal to develop the control signal.
In the drawing:
FIG. 1 is a schematic block diagram of a TV receiver including the present invention;
FIG. 2 is a view of a television display;
FIGS. 3, 5 and 6 are diagrams partially in schematic and partially in block form of apparatus useful in the TV receiver of FIG. 1; and
FIG. 4 is a graphical representation of characteristics associated with the TV receiver of FIG. 1.
In the TV receiver shown in FIG. 1, TV signals are received through antenna ANT by tuning system 10 for TV signals including, e.g., channels 2-13 in the VHF-TV frequency band and channels 14-83 in the UHF-TV frequency band. Tuning system 10 develops band signals V-LO-VHF, V-HI-VHF and V-
UHF to select the one of the lower VHF, upper VHF or UHF bands, respectively, in which the selected TV signal channel is included. Tuning system 10 further develops tuning voltage VT in response to which it specifically tunes the selected TV signal in that band. IF signals from tuning system 10 are applied to IF processor 12 which develops automatic fine tuning (AFT) and automatic gain control (AGC) signals for controlling tuning system 10 and further develops a composite video signal.Sound processor 14 develops from the composite video signal audio program information which is reproduced by loudspeaker LS.
Video processor 16 develops video signals in response to the composite video signal. In a color TV receiver in particular, video processor 16 develops blue (B), red (R) and green (G) color video signals responsive to the chrominance information in the composite video signal, each of which color video signals further includes luminance information. Kine drivers 18 couple the B, R and G color video signals to corresponding electrodes of kine display tube 20 upon which color picture information is displayed.
Sync separator 22 develops vertical synchronization signal VS which is applied to vertical deflection circuits 24 for developing periodic vertical deflection signals for driving the vertical deflection portion of yoke 30. Horizontal synchronization signal HS developed by sync separator 22 is conventionally applied via phantom path HS' for synchronizing horizontal oscillator 26 which drives horizontal deflection circuits 28 for developing periodic horizontal deflection signals in the horizontal portion of yoke 30.
A picture program display is developed on the screen of kine 20 in response to the B, R and G color video signals and the vertical and horizontal deflection signals. The TV receiver thus far described is conventional and an and an exemplary receiver is described in detail in RCA Television Service Data, Chassis CTC-107, File 1981 C-2 and Supplement 1981 C-2-S2, published by RCA Corporation, Consumer Electronics, Indianapolis, Indiana, which data is incorporated herein by reference.
Bar display generator 44 develops an on-screen tuning displa
y. In FIG. 2, TV picture program information 70 is displayed on TV screen 60. A tuning indication, for example, vertical bar 62 is also displayed on screen 60, at least at selected times. Channel numerals 66 for VHF-TV channels 2-13 and channel numerals 68 for UHF-TV channels 14-83 are provided on panel 64 proximate to screen 60. Bar 62 is moved leftward and rightward so that its position relative to channel numerals 66 and 68 indicates the channel number of the selected TV channel. So that bar 62 appears uniform and accentuated, picture information 70 is blanked on the portion of screen 60 where bar 62 is displayed. This is indicated in FIG. 2 by the gap in picture 70 where it intersects with bar 62.Bar display generator 44 is described in detail with reference to FIG. 3. Tuning voltage VT is proportioned by voltage dividers R1, R3 and R5 shown by way of example as potentiometers. The proportioned VT signals at the intermediate points of R1, R3 and R5, at which their wiper arms are positioned, are respectively coupled to node N1 through switches S1, S3 and S5. S1, S3 and S5 are rendered respectively conductive by bandswitch signals V-LO-VHF, V-HI-VHF and V-UHF when the selected TV signal is included in the lower VHF, upper VHF or UHF bands, respectively.
Amplifier DA combines the proportioned tuning voltage at node N1 and the offsetting voltage at N2 to develop a control signal VC which is coupled through diode D to the control terminal of variable one-shot (monostable multivibrator) 80. Amplifier DA modifies the proportioned tuning voltage at N1 by a factor -RF/RI and the offsetting voltage at N2 by a factor [1+(RF/RI)], where RI and RF are the values of resistances RI and RF.
For low VHF channels 2-6, control voltage VC follows characteristic 112 of FIG. 4b. Potentiometer R2 is adjusted to develop VC=VL to position bar 62 at numeral "2" of indicia 66 when channel 2 is selected. With channel 6 selected, potentiometer R1 is adjusted to proportion VT to develop VC of value so that bar 62 as at numeral "6" of indicia 66. For high VHF channels 7-13, control voltage VC follows characteristic 114. R4 is adjusted so that the offsetting potential developed at N2 causes control voltage VC at diode D to be of value VL less offsetting voltage VOS so that bar 62 is positioned at numeral "7" (not shown) of indicia 66 when channel 7 is selected. With channel 13 selected, R2 is adjusted to develop VC=VR to position bar 62 at numeral "13".
For UHF channels 14-83, VC follows characteristic 116. R6 is adjusted to develop VC=VL to position bar 62 at numeral "14" of indicia 68 when channel 14 is selected; R5 is adjusted to develop VC=VR to position bar 62 at numeral "83" with channel 83 selected.
Variable one-shot 80 develops a trigger pulse signal at its output connection. The beginning of the trigger pulse signal substantially coincides with the synchronization pulse received from sync substitutor 48; the ter
mination of the trigger pulse signal is delayed from that synchronization pulse by a time period determined by the magnitude of the control signal received from the cathode of diode D. The delay time is shorter than the period of the horizontal deflection signal. Resistor RX and capacitor CX are connected between +V and ground, and determine the maximum duration of the trigger pulse. The control signal reduces that duration by restricting the range of voltage over which CX is charged and discharged.One-shot 82 produces a pulse signal at its output connection which commences at the termination of the trigger signal from one-shot 80 and which has a duration directly controlled by a signal from control source CS. Commonly, control source CS supplies a fixed magnitude control signal so that the pulse signal from one-shot 82 is of substantially constant time duration and is substantially shorter than the period of the horizontal deflection signal. The bar pulse signal from one-shot 82 is desirably of about 0.6 microseconds duration to determine the width of the bar display and is generated between about 2 and 58 microseconds after a synchronization signal is received from 48 so to position the bar display between the left- and right-hand edges of the displayed picture. That bar pulse signal is developed and applied to an input of AND gate 84 irrespective of whether a bar is to be displayed or not.
When a tuning indication is to be displayed, a BAR ON signal is applied to the other input of AND gate 84 so that the bar pulse signal developed by one-shot 82 is coupled to node N3. The bar pulse is applied to common-emitter NPN driver transistor T1 via its base resistor RB1 and is coupled through resistor RC1 as a BLANKING signal. By way of example, that BLANKING signal can be connected to the base of vertical blank transistor Q702 shown in FIG. 21 of the CTC-107 Service Data referred to above. Alternatively, the BLANKING signal can be inverted and applied to TP 806 also shown in FIG. 21 thereof.
When the TV channel selected for viewing is in either the upper or lower portion of the VHF band, the appropriate one of band signals V-LO-VHF and V-HI-VHF are applied through OR-gate 87 to an input of AND gate 88 so that the bar pulse signal at node N3 passes via resistor RB3, driver transistor T3 and resistor RC3 to develop a RED color video signal to produce a red-colored bar display. Similarly, if the selected TV channel is in the UHF band, band signal V-UHF is applied to an input of AND gate 86 so that bar pulses from N3 causes resistor RC2, driver T2 and resistor RC2 to develop GREEN color video signals to produce a green-colored bar display. By way of example, the RED color video signal can be applied to the emitter of RED driver transistor Q5001 and the GREEN color video signal can be applied to the emitter of GREEN driver transistor Q5002, both shown in FIG. 22 of the CTC-107 Service Data referred to above.
The bar display can be inhibited under certain conditions so that degradation of its appearance does not occur. For example, signal VS applied via AND gate 89 inhibits both RED and GREEN color video signals during vertical retrace. By way of further example, the RED and GREEN color video signals are inhibited by AND gate 91 in response to band change signal BC when the tuning system changes from one band to another, such as between the VHF and UHF bands, and in response to mid-band reset signal MBR when the tuner changes over the gap between channels 6 and 7 in the VHF band. As a result, the position of the bar display is not changed in a confusing manner due to transients of tuning voltage VT or of the bandswitch voltages when the tuning system changes between bands or between portions of the VHF band.
A bar tuning display is desired whenever tuning is being performed and for a short time, for example, four seconds, thereafter, as well as on viewer demand. To that end, one-shot 42 in FIG. 1 develops the BAR ON signal for a four-second period responsive to a RECALL signal developed, for example, by the viewer depressing a pushbutton. While channel tuning is in process, horizontal synchronization signals HS are unavailable from received TV signals. Sync validity detector 40 compares the average level of received synchronization signal HS against a threshold level to develop a SYNC VALID indication which is present during tuning. One-shot 42 develops the BAR ON signal continuously so long as SYNC VALID signal is applied and for four seconds after the SYNC VALID signal is removed when valid synchronization signals are detected.
To avoid bar display tuning indication 62 from being jagged or erratic owing to the absence of an adequate sync signal, sync substitutor 48 ensures that appropriate synchronization signals are always applied to horizontal oscillator 26. To that end, oscillator 46 develops secondary horizontal synchronization signals SHS at the standard horizontal frequency of 15,575 Hz which are applied to sync substitutor 48, as are received horizontal synchronization signals HS when they are present. With respect to the detailed diagram of sync substitutor 48 shown as part of FIG. 3, SYNC VALID signal is applied to AND gate 92, and is inverted and applied as SYNC VALID signal to AND gate 94. As a result, synchronization signal HS is applied to NOR gate 96 when HS is present and valid, and synchronization signal SHS is applied to NOR gate 96 when HS is not present or not valid. NOR gate 96, resistor RC 4 and inverting buffer amplifier transistor T4 together comprise an OR gate to generate synchronization signals applied to horizontal oscillator 26.
FIG. 5 shows a modification of the embodiment described above in relation to FIG. 3. R2, R4, R6, S2, S4 and S6 has been eliminated and replaced by potentiometer R15. R15 is adjusted so that the voltage developed at its wiper is applied to the non-inverting (+) connection of amplifier DA so that DA develops VC=VL. Network 120A serves the same function as potentiometers R1 and R2 of FIG. 3. Tuning voltage VT
is proportioned substantially by R20, R21 and R22. R20 is adjusted for positioning bar 62 in like manner to that described above for R1. Bias voltage +VB is applied through resistors R23 and R24 to switch S1. R23 is adjustable for setting VC=VR for positioning bar 62 as was described above for resistor R2. Switch S1 is rendered conductive by band signal V-LO-VHF when the selected TV channel is in the lower VHF-TV band.Networks 120B and 120C are similar to network 120A and are employed for positioning bar 62 when the selected channel is in the upper portion of the VHF-TV band and in the UHF-TV band, respectively. However, with respect to network 120B, the variable resistor corresponding to R23 of 120A is employed for developing an offsetting potential; variable resistor R23 is adjusted to establish VC=VL-VOS when channel 7 is selected.
With an embodiment of the sort shown in FIG. 5 connected to an RCA CTC-107 TV receiver, with RI=RF=100 kilohms, with diode D comprising two 1N914 diodes in series, and with DA being an LM358 operational amplifier available from National Semiconductor Corp., Santa Clara, CA., the following voltages were measured:
| TABLE I |
| ______________________________________ |
| TV Band Low VHF High VHF UHF |
| ______________________________________ |
Channel No. 2 6 7 13 14 83 Control Voltage VC 3.1 2.5 2.2 1.5 3.0 1.6 Tuning Voltage VT 0.9 16.1 7.3 20.4 0.7 20.3 Combined Pro- 1.8 2.4 2.5 3.4 1.9 3.3 portional VT & Offsetting Voltage at N1 Voltage at DA+ 2.5 2.5 2.5 2.5 2.5 2.5 |
| ______________________________________ |
FIG. 6 shows an embodiment modified from that described in relation to FIG. 5 in that networks 120A, 120B and 120C, and switches S1, S3 and S5 are replaced by resistors R10-R14 and switch S7. Tuning voltage VT is proportioned by the voltage divider comprising resistors R10 and R11 so that the change in VC is substantially VL-VR. When the selected channel is in the VHF frequency band, signal V-UHF is applied rendering switch S7 conductive to connect resistance R14 between node N1 and ground. The additional proportioning introduced by the voltage divider including R12 and R14 further attenuates VT so that the changes in control voltage VC are proportioned for characteristics 112 and 114 as compared to 116 in FIG. 4b. R14 is shown as a variable resistor for adjusting VC=VR.
Modifications are contemplated to the present invention which should be limited in scope solely by the claims following. For example, the present invention is equally satisfactory whether used in conjunction with black and white or color TV receivers and may employ either a horizontal or vertical bar type display of tuning information. Moreover, it is equally satisfactory that the tuning information be conveyed by the position of a contrasting bar as described herein or by varying the length of such bar, in which case the variable end of the bar would indicate the selected channel by its correspondence with numerials of indicia 66 and 68 on panel 64.
Additionally, it is equally satisfactory that the present invention be employed in conjunction with a display separate from the TV screen. For example, with a plurality of light-emitting diodes (LED) linearly arrayed, the variable time delay pulse developed by one-shot 80 can be employed to determine the number of LEDs illuminated. The illuminated LEDs appear as the equivalent of a "bar" of variable length the end of which corresponds to numerals on indicia 66 and 68 to indicate the selected channel.
While control source CS of FIG. 3 is described as supplying a fixed control signal to one-shot 82, it is equally satisfactory that CS supply a control signal variable in response to another parameter to be displayed. For example, the strength of the received signal which is readily determinable from the magnitude of AGC voltage developed by IF processor 12 can be applied to CS to vary the width of bar 62.
Additionally, to provide a limited and more precise adjustment for the proportioned tuning voltages and offsetting voltages discussed above in relation to FIG. 3, each of potentiometers R1-R6 could be reduced in resistance value and reconnected with a respective fixed resistance connected in series with each of its respective ends.
1. A receiver tuning circuit for a tuner comprising means for detecting the presence of a received signal having an input means for coupling to said tuner; a search tuning circuit having a capacitor means for a tuning voltage for said tuner, and an automatic frequency control circuit coupled to said capacitor, said tuning circuit and said automatic frequency control circuit charging said capacitor when activated; an operating device means coupled to said detecting means and said search tuning circuit for activation of said search tuning circuit and for subsequent deactivation of said search tuning circuit and activation of said automatic frequency control circuit upon detection of a received signal; and time constant circuit means coupled between said detecting means and said operating device means for repeatedly activating said search tuning circuit and deactivating said automatic frequency control circuit a selected time after said search tuning circuit has been deactivated. 2. A receiver tuning circuit as claimed in claim 1, wherein said operating device has a supply lead and the time constant circuit is coupled to the supply lead of the operating device. 3. A receiver tuning circuit as claimed in claim 1, wherein the detection circuit is coupled to an output of a frequency detector and includes a means for preventing pulling in on the same transmitter upon activation of said search tuning circuit.
Description:
The invention relates to a receiver tuning circuit including a search tuning circuit which can be activated by a control device in which the search tuning circuit is automatically switched off when a received station is detected by a detection circuit and an automatic frequency control circuit is switched on, and in which a time constant circuit changes the state of the receiver tuning circuit after a certain time.This known tuning circuit is only suitable for special receivers. An object of the invention is to provide a tuning circuit which is more suitable for other receiver types.
To this end a receiver tuning circuit of the kind described in the preamble according to the invention is characterized in that the time constant circuit is incorporated in the tuning circuit in such a manner that again and again it switches on the search tuning circuit a certain time after having automatically switched it off and switches off the automatic frequency control as long as the search tuning circuit is maintained operative with the aid of the operating device.
By using the step according to the invention a receiver is obtained which upon activation of the search tuning circuit receives without distortion transmitter after transmitter each during a time determined by the time constant circuit. The search tuning can be rendered inactive with the aid of the operating device after the desired station has been found. The tuning circuit is very suitable for radio or television receivers for domestic use.
2. A television tuning device according to claim 1, further comprising scanning stopping means for stopping the scanning automatically when a television channel has been correctly tuned in, speed reducing means for reducing band-scanning speed, and said detection means comprising first and second detecting means for detecting the presence of a television channel which act in sequence one after another for supplying to said speed reducing means control signals at successive instants so as to increase the effective time interval during which said scanning stopping means may operate.
3. A device according to claim 2, further comprising controlling means for controlling the tuning frequency of the receiver automatically for optimum tuning, said controlling means being activated or de-activated by said switch signal provided by the said detection means for detecting the presence of a television channel.
4. A device according to claim 1, in which said band-scanning circuit means includes means for generating scanning signals at increasing speed starting from the instant scanning commences, and means for stopping and restarting scanning when the presence of a television channel is detected so that scanning continues at the same speed as when it commenced.
5. A device according to claim 1, in which said detecting means includes a coincidence detector means for detecting coincidence between the synchronization signals received and picture tube deflection signals generated inside the television receiver.
6. A device according to claim 1, in which said manual control means includes two push-buttons, one for controlling commencement of band scanning from the lowest to the highest frequencies and the other for controlling commencement of band scanning in the opposite direction and in which scanning commences on pressing one of said buttons and stops upon release of the same button.
7. A device according to claim 3, in which said first detecting means for detecting the presence of a television channel includes a detector means for detecting coincidence between the synchronization signals of the received signal and picture tube deflection signals generated in the television receiver and said second detecting means includes a threshold comparator means for receiving the output signal of said controlling means and processing means for supplying by means of processing means a signal for stopping band scanning.
8. A device according to claim 7, in which said processing means are operative to supply a signal for restarting band scanning at the same speed at which it was commenced.
9. A device according to claim 7, in which said processing means includes a series circuit comprising a disabling circuit which receives the output signals of said first and second detecting means, a Flip Flop, and an exclusive OR logic circuit, which stop the scanning operation and prevent it from being continued until a new scanning-start signal is received from said controlling means and such as to reset the Flip Flop.
10. A device according to claim 9, further comprising means for resetting said series circuit when the receiver is turned on to prevent scanning from being commenced until the scanning-start signal is sent.
Description:
The present invention relates to a television tuning device, comprising a circuit for continuously scanning at least one band of receivable frequencies, and having control means for starting and stopping the said scanning procedure and a terminal for applying a switch signal for switching from a first band-scanning speed to a second band-scanning speed slower than the first.
The name usually applied to a unit consisting of circuits of this type for selecting and memorising a given number of preferred channels is "station memory".
Many types of station memories are already being sold on the market which can be divided into two main groups: those with automatic and those with manual television channel searching.
The automatic types are fitted with electronic searching circuits which locate television channels automatically when started by the user. This is done by scanning a given band (VHF or UHF, for example) and stopping on the located channel. Data relative to the located channel can then be memorised by the user in a memory circuit and the same channel recalled whenever required by simply pressing a button which recalls the said data from the memory and supplies it to the channel selection circuit.
This type of circuit is also fitted with components which sense, during search, if a television channel has been tuned into and disable automatic searching to prevent television band scanning from continuing. Most of these circuits are fitted with a phase detector which senses the coincidence between the sync signals received and those regenerated in the receiver (in particular, the flyback signal).
Manual station memories, on the other hand, are fitted with controls which, when activated by the user, start a device for scanning a given television band. These controls also stop the said device when required by the user. When the user sees the required channel appear on the screen, the device is stopped to disable search and enable the channel to be memorised in the appropriate circuit.
In these cases, the simplest way of starting and stopping the search is to fit the circuits with a button which, when pressed, supplies a search-start signal and, when released, stops the searching operation. For best tuning, two buttons are usually provided for band scanning in both directions.
Both the types discussed up to now present drawbacks. In the case of automatic station memories, for example, tuning quality depends on correct operation of all the search-stop circuits and the automatic tuning circuit (AFC=automatic frequency control). Even in cases where these circuits are operating correctly, tuning could still be impaired by noise or amplitude distortion on the received signal.
Tuning quality on manual station memories, on the other hand, depends on the tuning ability of the user. Television receivers can be manipulated by anybody not all of whom are gifted with this ability. A further drawback of manual station memories is that the user has very little time in which to decide whether the received channel is the right one and to estimate tuning quality. If the whole television band is to be sca
nned in a reasonable length of time (let us say, the UHF band in one minute) band-scanning speed needs to be fairly high. Consequently, if the user is not quick enough in sending out the search-stop control signal, it is more than likely that the control will be sent when the required television channel has been overshot. If, by chance, there are two channels close to one another, the searching device may even stop on the second of the two, thus confusing the user who will not know which of the two channels he has tuned into.The aim of the present invention is to provide a tuning device to overcome these problems.
With this aim in view, the present invention provides a television tuning device comprising a circuit for continuously scanning at least one band of receivable frequencies, manual control means for starting and stopping the said scanning procedure, a terminal for applying a switch signal for switching from a first band-scanning speed to a second band-scanning speed lower than the first, and detection means for detecting the presence of a television channel by comparing the received sync signals with local signals generated in the television receiver, and applying a switch signal to the said terminal for switching from the said first scanning speed to the said second scanning speed in the presence of the said switch signal, so that the band scanning continues at said lower speed until the manual control means produce the stopping scanning procedure.
BRIEF DESCRIPTION OF THE FIGURES
FIG. 1 shows a block and circuit diagram of an exemplary television tuning device according to the invention; and
FIG. 2 shows the internal structure of exemplary integrated circuits used in the diagram of FIG. 1.
In the diagram, an input terminal receives an input signal from a freque
ncy discriminating circuit, which forms part of a known automatic frequency control (AFC) circuit, the input signal being applied to a known Schmitt trigger circuit, generally designated 2. The output of circuit 2 is connected to a first input of a circuit 3 which has two outputs, one connected to set input S and one to reset input R of Flip Flop circuit 4. Input S of the said Flip Flop is also connected to a first input of an exclusive OR logic circuit 5 and a first output of a control circuit 6 which has a second output connected to input R of circuit 4 and an input connected to a terminal of a first push-button 7 the other terminal of which is grounded.Number 8 represents an input for receiving line sync signals obtained in the known way from sync separating circuits, the signals being applied to a first input of a coincidence detecting circuit 10 the second input of which is connected to receive a line flyback pulse 9, obtained from the horizontal deflection circuits. The output of circuit 10 is connected to a signal translation circuit 11, the second input of circuit 3 and an output 12 which can be sent to activate the AFC circuits on the set. ON reset circuit 13 has a first output connected to the second input of circuit 5, which is also connected to the output of circuit 4 through disconnecting resistor 22, and a second output connected to the control input of circuit 3, which is also connected to the output of circuit 5 through resistor 14. The output of EX-OR circuit 5 is also connected to the input of matching stage 15 the output of which is connected to a second push-button 16 and a first control input (UP) of a tuning detection and memorising circuit 17. This has a second control (down) input connected to a third push-button 18. A detection speed switch input is connected to the output of circuit 11. Input 21 can be connected, in the known way, to a station keyboard, outputs 19 and 20 representing respectively the tuning voltage to be sent to the tuning circuit and the channel indication to be sent to an appropriate display, using known methods. Push-buttons 16 and 18 are the same as push-button 7 and therefore have their second terminals grounded.
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NPN transistors BC 148B PNP transistors BC 158B Diodes 1N4148 NOR gates 1/4 F4001 (+ A supply) NAND gates 1/4 F4011 (+ A supply) + A 5V + B 12.5V + C 33V
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The circuit operates as follows:
When one of the buttons on the television panel connected to inputs 21 of circuit 17 is pressed, the corresponding memory register in circuit 17 (I.C. Ser. No. 76,720) is activated to give a voltage at output 19 corresponding to the tuning voltage of a given television channel memorised previously. If a video signal is present, the horizontal deflection circuits on the set are synchronized by the sync signals in the received signal, coincidence detector circuit 10 supplies a high output voltage so that the AFC circuit comes into operation, controlled by output 12 for optimum tuning. In this case, the voltage at the output of stage 15 is high and circuit 17 undertakes no further operations to detect other emitting stations. The voltage at the output of EX-OR stage 5 is also high so that the circuit at gate 3 is kept closed, a situation which persists until one of the control buttons is pressed. By pressing other keys on the board, it is possible to tune into other stations memorised previously in the same way as described already. If there is no television signal present for the key pressed, circuit 10 detects no coincidence, its output remains low and the AFC circuit does not come into operation.
A third mode of operation is possible in which searching and memorising are performed automatically. When button 7 is pressed, low and high voltages are applied, through circuit 6, to the set and reset inputs of Flip Flop 4 respectively so as to force the output to zero. Two zeroes are thus applied to EX-OR circuit 5 so as to create a low voltage at its output. In this way, the voltage at the output of circuit 15 moves to zero and circuit 17 starts searching upwards exactly in the same way as when button 16 was pressed. After a given interval, determined by resistor 14 and the condenser at the control input of circuit 3, this gate circuit opens so that the signals at its inputs can be sent to the inputs of Flip Flop 4. During the search, in the absence of any stations, the output of circuit 10 is low while that of trigger circuit 2 is high. This results in a 1 at the reset input and a 0 at the set input of the Flip Flop so that the output of circuit 15 remains low and the search is continued. As soon as a station is approached, on the video carrier side, given the searching direction chosen, the horizontal deflection circuits are synchronized with the signal, the coincidence detector supplies a high output and the AFT circuits become activated through output 12 to reduce searching speed (circuits 11 and 17).
The reset input of the Flip Flop moves to zero but the output remains unchanged and the search continues at low speed. Over time, the AFC voltage at input 1 describes a curve in the form of an S, that is it starts at zero, rises to a maximum, returns to zero (optimum tuning), reaches a minimum and then returns to zero.
When the threshold of trigger 2 is reached, the latter switches, that is, its output becomes low, Flip Flop inputs S and R become 1 and 0 and switching commences. For a time period equal to the delay of the Flip Flop, a 1-0 condition exists at the input of the EX-OR circuit so that its output presents a positive peak which stops searching for an instant. After the Flip Flop switches (high output) a 1-1 condition exists at the EX OR input so that the output becomes low and searching continues at minimum speed. When the falling AFC voltage crosses the trigger threshold again, the trigger output becomes high causing it to switch. Two zeroes are present at the Flip Flop input, therefore its output remains at 1 with a 1 and 0 at the EX OR input. The result is its output becomes high, searching is stopped on the required station and this tuning condition memorised automatically in circuit 17. Following the delay determined by resistor 14, gate circuit 3 closes and the tuning condition reached can no longer be disturbed. For searching to be continued, button 7 must be pressed after which the cycle is repeated in the same way.
FIG. 2 shows the details of the integrated circuits used in the circuit of FIG. 1. The I.C. type Ser. No. 76,727 provides a clock signal to the other I.C. Ser. No. 76,720. This circuit features an oscillator which is controlled by an exte
rnal crystal coupled to pins 2 and 3. A pair of cascaded divide-by-two flip-flops provide the proper clock signal at pin 4. A D-type flip-flop, which provides waveform shaping, is coupled to pin 4, and has both Q and Q output signals applied to pins 13 and 14 respectively. Two additional cascaded divide-by-two flip-flops are coupled to the Q output of the D-type flipflop and provide buffered output signals on pins 6 and 9 for driving a LED display (not shown). Two keyboard scanning output signals are provided at pins 5 and 10 which are in synchronization with the LED output signals at pins 6 and 9 but are narrowed and delayed to avoid edge coincidence glitches.The station memory is Texas Instrument integrated circuit of the type Ser. No. 76,720 which receives the clock signal at its pin 9 and applies it to 12 bit synchronous counter. Pins 15 to 18 and 1 correspond to the input terminal 21 of the present invention and are intended to carry a five bit code identifying the manually selected channel. The signals are applied to 5 to 20 line decoder which in turn applies signals to a 12 bit tuning voltage RAM. The pins 10 and 11 are the up and down frequency scanning controls shown in FIG. 1 and the VHF/UHF pin 13 is also scanning speed controlled. The scanning is effected by transferring the data of the prevailing channel into the transparent counter and modifying this data under the control of the tuning program generator, the counter being clocked up or down at rate determined by the tuning timer and the countdown frequency select circuit. When one or the other buttons connected to the pins 10 and 11 is depressed, the count is incremented initially at a slower rate, the rate increasing gradually until it reaches a miximum level determined by the signal applied to pin 13.
The advantages of the circuit according to the present invention will be clear from the description given. First and foremost, as compared with known solutions, is the extra time allowed to the user for stopping the search when this is done manually. This is possible with no increase in the time taken for a complete band to be scanned. A further advantage is the possibility of two types of search: automatic and manual. The advantages of both operating modes are thus combined in one device to provide the best results. In particularly delicate cases, the user can leave aside automatic searching and perform the operation manually. A further advantage is that, when operating automatically the circuit described is provided with two circuits which, as optimum tuning is approached, both slow down band-scanning speed one after the other to facilitate operation of the automatic searching-stop 2/3 circuit and recognition of correct tuning. One last advantage is that the arrangement described is particularly simple and economical considering the functions it performs. To those skilled in the art it will be clear that variations can be made to the circuit described without, however, departing from the scope of the present invention as defined in the claims. Of these we shall mention just a few. For example, the possibility of using only one type of search, e.g. manual. Another variation could be to use a different type of station memory, for example another of the "dedicated" integrated circuits available on the market or a station memory circuit made using a microprocessor. It should be pointed out that the circuits shown in the blocks on the diagram are only a few of the many types capable of performing the functions required and that numerous variations can be made to them.
"Fernseh-Portable mit Suchlauf-Automatik", Funkschau, vol. 45, No. 13, Jun. 22, 1973, Munich, Germany, pp. 469-472.
Other References:
Olson et al., "The Practical Application of On-Screen Display to a Television Receiver", IEEE Transactions on Broadcast and TV Receivers, _Aug. 1973, pp. 169-175.Walker, "For TV Tuners a Digital Look", Electronics, Jun. 26, 1975, pp. 65-66.
Evans et al., "Direct Address Television Tuning and Display System Using Digital MOS Large Scale Integration", IEEE Transactions on Consumer Electronics, vol. CE-22, No. 4, pp. 267-288, Nov. 1976.
Electronics, vol. 48, No. 24, Nov. 27, 1975, "Philips TV Set Indicates Station Tuning and Color Settings on Screen", pp. 6E and 8E.
Werner, "Linear Color Bar Display for CTV Sets", Radio Mentor Electronic, vol. 41, No. 9, pp. 350-351, Sep. 1975.
PHILIPS 26C964 PICASSO CHASSIS K12I Programmable television receiver controllers which may be manually programmed by a user to select or to limit the viewing selections for random times, typically in one-half hour intervals, throughout a predetermined time period such as a one week time period. Program selections may be made by setting suitable controls for the day, AM or PM, the half hour of the day and the channel desired, and entered into a memory by a push-button control. Thereafter a digital control clock automatically selects the pre-entered information at the appropriate times and provides a control signal which may be used to automatically select the identified channels to the exclusion of all others. Alternatively, the signal may be used to exclude the selected channel from selection manually. In one embodiment, the programmable controller is incorporated in the original design of the television receiver and in a second embodiment, an external controller is disclosed which can be attached to the antenna terminals of a conventional television. Additional embodiments include means for controlling other functions such as the ON-OFF function of the receiver.
1. A programmable television controller comprising:
a random-access memory means for storing data;
storing means for storing data corresponding to channel selections in said memory means at write-addresses corresponding to future time periods, with said storing means including a write-address for application to said memory means means for generating said write-addresses;
read means for reading out said data from said memory means by application of real time related read-addresses thereto when real time coincides with said future time periods and
control means for controlling the reception of a television receiver according to said data read from said memory means.
2. The controller of claim 1 wherein said memory means is a semiconductor memory. 3. The controller of claim 1 wherein said storing means includes a means for generating said write-addresses which is responsive to the position of at least one first switch and a means for generating said data corresponding to channel selections which is responsive to the position of at least one second switch. 4. The controller of claim 1 wherein said controller means controls the reception of said television receiver by limiting the reception to a channel corresponding to said data read from said memory means if said data is present. 5. A programmable television controller comprising: random-access memory means for storing data;
write-address means selectively generating a write-address corresponding to a future time for application to said memory means;
program means for selectively storing said data in said memory means at said write-address;
read-address means for generating said read-addresses responsive to real time;
memory read means for applying said read-addresses to said memory means for reading out said data stored in said memory means; and
control means for controlling the reception of a television receiver according to said data read from said memory means.
6. The controller of claim 5 wherein said memory means is a semiconductor memory. 7. The controller of claim 5 wherein said data means comprises at least one switch. 8. The controller of claim 5 wherein said write-address means comprises at least one switch. 9. The controller of claim 5 wherein said program means comprises:
means for normally coupling said read-address means to said memory;
means for normally placing said memory in a read mode;
switching means for momentarily decoupling the read-address means from said memory means, coupling said write-address means to said memory means, and switching said memory means from said read mode to a write mode.
10. The controller of claim 5 wherein said read-addresses are binary coded signals which increment on one-half hour intervals. 11. The controller of claim 5 wherein said control means controls said reception of said television receiver by limiting the reception to a channel corresponding to said data read from said memory means if said data is present. 12. The controller of claim 5 wherein said control means controls the reception of said television receiver by limiting the reception to a channel other than the channel corresponding to said data received from said memory means if said data is present. 13. The controller of claim 5 wherein said control means includes a pretuner means having at least one input for coupling to a television receiver antenna and a pretuner output for coupling to an input on a television receiver, said pretuner means being a means for selectively converting any one of a plurality of multi-frequency television signals present at said pretuner input to a fixed frequency signal. 14. The controller of claim 13 wherein said control means further includes a disable means for disabling said control means thereby preventing reception of any channel when a power source powering said controller is interrupted, said disable means continuing to disable said controller until said disable means is reset. 15. The controller of claim 13 wherein said controller is installed within a controller housing, said controller housing being located outside a television receiver housing which encloses the television receiver controlled by said controller. 16. The controller of claim 13 wherein said pretuner output is for coupling to an antenna input on the television receiver and the frequency of said fixed frequency signal corresponds to a predetermined television signal. 17. The controller of claim 13 wherein said pretuner output is for coupling to an input of an intermediate frequency amplifier stage in the television receiver and the frequency of said fixed frequency signal corresponds to the intermediate frequency amplifier stage frequency of operation. 18. A programmable television controller comprising:
a random-access memory means for storing data;
storing means for storing data corresponding to channel selections in said memory means at write-addresses corresponding to future time periods, with said storing means including a write-address means for generating said write-addresses for application to said memory means;
read means for reading out said data from said memory means by application of real time related read-addresses thereto when real time coincides with said future time periods and,
control means for controlling the reception of a television receiver according to said data read from said memory means, said control means including a pretuner means having at least one input for coupling to a television receiver antenna and pretuner output for coupling to an input on the television receiver, said pretuner means being a means for selectively converting any one of a plurality of multi-frequency television signals present at said pretuner input to a fixed frequency signal;
a controller housing for housing said controller, said controller housing being located outside a television receiver housing which encloses the television receiver controlled by said controller.
Description:
BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to the field of automatic controllers, and more particularly, to programmable controllers for use with television receivers and like equipment.
2. Prior Art
Many systems have been proposed for the automatic control of television receivers, that is, automatic channel selection for particular times of the day based upon programming information entered into the controller at some previous time. Most of these systems, however, are in substantial part mechanical systems which are not particularly easy to program, thereby being relatively expensive to manufacture and difficult to use. Accordingly, such systems have not enjoyed significant commercial use on conventional receivers.
U.S. Pat. Nos. 3,215,798 and 3,388,308 disclose automatic television programming systems of the mechanical or electromechanical type, whereby a rotary device mechanically tied to a time clock is programmed to provide some physical movement indicative of the channel to be selected at that time. Devices of the same general type involving some form of motor driven switching unit are also disclosed in U.S. Pat. Nos. 2,755,424, 3,496438, and 3,569,839. In all of these patents the mechanical complexity of the system disclosed is believed to preclude the widespread adoption thereof on receivers intended for consumer use. Further, most of these systems are operative on a number of switching signals equal to the number of selections desired, though some coding to somewhat reduce the complexity of such systems is known, such as that in U.S. Pat. No. 3,496,438. Also, obviously timing mechanisms or the electromechanical type for various other applications are also known, that disclosed in U.S. Pat. No. 3,603,961 being but one example of such devices.
BRIEF SUMMARY OF THE INVENTION
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