PHILIPS I24B301 /08K NUOVO RENO CHASSIS NGE INTERNAL VIEW.

The PHILIPS  I24B301 /08K  NUOVO RENO was adverstised as "NUOVO RENO"  new model with new chassis type NGE suppressing models fitted with older chassis E2 types and was first large screen b/w PHILIPS tv chassis  with mains separated power supply.


The tuning circuits has a large knob potentiometers tuning system which use voltage controlled capacitances such as varactor diodes as the frequency determining elements.
How AFC Circuit Works in B/W Analog Television Receiver:

Push-Button tuning on u.h.f. while being very convenient often leaves a margin of mistuning, especially after some wear and tear has occurred on the mechanism. Even dial tuning can lead to errors due to the difficulty many people experience in judging the correct point. Oscillator drift due to temperature changes can also cause mistuning. Automatic frequency control (a.f.c.) will correct all these faults. The vision carrier when the set is correctly tuned on u.h.f. is at 39.5MHz as it passes down the i.f. strip. Thus if at the end of the i.f. strip a discriminator tuned circuit is incorporated centred on 39.5MHz the discriminator output will be zero at 39.5MHz and will move positively' one side of 39.5MHz and negatively the other as the tuning drifts. This response is shown in Fig. 1.

If the tuning is not correct then the discriminator output is not zero and if this output is applied to change the reverse bias on a tuning diode mounted in the oscillator section of the u.h.f. tuner it will correct most of the error. Tuning, varicap or varactor diodes-to give them a few of their names-are junction diodes normally operated with reverse bias but not sufficient to bias them into the breakdown region in which zener diodes operate. The greater the reverse bias the lower their capacitance: a typical curve, for the PHILIPS BB105 or STC BA141 tuning diode, is shown in Fig. 2. All diodes exhibit this basic type of characteristic but special diodes have to be used for u.h.f. because they must not introduce any excessive loss into the tuned circuits they control. In other words, just as a coil has to have a good Q so does a varicap diode. Normally, we don't worry about the Q of a capacitor as it is usually very good. However, a tuning diode is not a true capacitor. It has, for example, leakage current so the Q of the diode is a factor which has to be considered. The diode manufacturer however will have considered these points and if you buy a diode specified for u.h.f. use you will have no trouble. These points have been mentioned to clear up any misunderstandings and to show why any old diode won't do.

Basic AFC System
To return to our TV set, if the oscillator frequency is too high then the vision carrier frequency will also be too high and in the simple arrangement shown in Fig. 3 the discriminator will give a negative signal to decrease the bias on the tuning diode thus increasing its capacitance and in turn reducing the oscillator frequency and correcting the error. Note that in this diagram the reverse bias on the diode is applied to its cathode. It is therefore positive with respect to ground so that a negative signal from the discriminator will reduce the positive voltage on the diode thus reducing its bias and increasing its capacitance. In this arrangement the diode is biased somewhere near the mid point of its characteristic by the positive d.c. bias fed into one side of the discriminator. The discriminator thus adds to or subtracts from this d.c. bias.

AFC Loop Gain:
The amount by which the error is reduced depends on the gain of the circuit. An estimate of the gain required must first be made by guessing how much error is likely to be given by your push -buttons or hand tuning: 1MHz would be an outside figure as a tuning error of that magnitude would produce a very bad picture of low definition in one direction and badly broken up in the other. This error should be reduced to about 100kHz to be really unnoticeable, indicating a required gain of ten. In fitting a.f.c. to an existing set some measure- ments should be done as an experiment before finally deciding on the circuit gain. The first thing to do is  to add the suggested discriminator to the i.f. strip. As the circuit (Fig. 4) shows a Foster -Seeley type discriminator is used and with the coils specified and the driver circuit shown it should give ±4V for 0.5MHz input variation.

EXAMPLE of Circuit Description:
The driver stage Tr1 takes a small sample signal from the i.f. strip but this should be large enough to drive Tr1 into saturation. That is to say Tr1 is a limiter stage so that the signal amplitude applied to the discriminator coil L2 stays constant over the normal range of signal levels. Trl is biased at approximately 7mA which, according to the original report ("Simple a.f.c. system for 625 -line TV receivers" by P. Bissmire, PHILIPS Technical Communications, March, 1970), gives the best limiting performance. C1, R14 and R3 damp the stage to prevent oscillation. C2 decouples the power feed and should be close to the circuit. The coil former and can are the normal ones used for TV sets and so should be easily obtainable: the former diameter is 5mm. and length 40mm. and winding details are given in Fig. 5.

The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the developed apparates both tubes or transistors.

Therefore a stable AFC circuit is developed:

A superheterodyne receiver having an automatic intermediate frequency control circuit with means to prevent the faulty regulation thereof. The receiver has means for receiving a radio frequency signal and mixing the same with the output of a superheterodyne oscillator. This produces an intermediate frequency signal which is coupled to a frequency or phase discriminator to produce an error signal for controlling the frequency of the superheterodyne oscillator. A regulation circuit is provided having an electronic switch to interrupt the feedback circuit when only unwanted frequencies tend to produce faulty regulation of the superheterodyne oscillator.

TDA3190 TV SOUND CHANNEL (sgs)

The TDA3190 is a monolithic integrated circuit in a
16-lead dual in-line plastic package. It performs all
the functions needed for the TV sound channel :

.IF LIMITER AMPLIFIER .ACTIVE LOW-PASS FILTER
.FM DETECTOR
.DC VOLUMECONTROL
.AF PREAMPLIFIER .AF OUTPUT STAGE

DESCRIPTION
The TDA3190 can give an output power of 4.2 W
(d = 10 %) into a 16 W load at VS = 24 V, or 1.5 W
(d = 10 %) into an 8 W load at VS = 12 V. This
performance, togetherwith the FM-IF section characteristics
of high sensitivity, highAM rejection and
low distortion, enables the device to be used in
almost every type of television receivers.
The device has no irradiation problems, hence no
external screening is needed.
The TDA3190 is a pin to pin replacement of
TDA1190Z.

The electrical characteristics of the TDA3190 remain
almost constant over the frequencyrange 4.5
to 6 MHz, therefore it can be used in all television
standards (FM mod.). The TDA3190 has a high
input impedance,so it can work with a ceramic filter
or with a tuned circuit that provide the necessary
input selectivity.
The value of the resistors connected to pin 9,
determine the AC gain of the audio frequency amplifier.
This enables the desired gain to be selected
in relation to the frequency deviation at which the
output stage of the AF amplifier, must enter into
clipping.
Capacitor C8, connected between pins 10 and 11,
determines the upper cutoff frequency of the audio
bandwidth.To increase the bandwidth
the values of C8 and C7 must be reduced, keeping the ratio
C7/C8 as shown in the table of fig. 16.
The capacitor connected between pin 16 and
ground, together with the internal resistor of 10 KW
forms the de-emphasis network. The Boucherot
cell eliminates the high frequency oscillations
caused by the inductiveload and thewires connecting
the loudspeaker.



Power supply is realized with mains transformer and Linear transistorized power supply stabilizer, A DC power supply apparatus includes a rectifier circuit which rectifies an input commercial AC voltage. The rectifier output voltage is smoothed in a smoothing capacitor. Voltage stabilization is provided in the stabilizing circuits by the use of Zener diode circuits to provide biasing to control the collector-emitter paths of respective transistors.A linear regulator circuit according to an embodiment of the present invention has an input node receiving an unregulated voltage and an output node providing a regulated voltage. The linear regulator circuit includes a voltage regulator, a bias circuit, and a current control device.

In one embodiment, the current control device is implemented as an NPN bipolar junction transistor (BJT) having a collector electrode forming the input node of the linear regulator circuit, an emitter electrode coupled to the input of the voltage regulator, and a base electrode coupled to the second terminal of the bias circuit. A first capacitor may be coupled between the input and reference terminals of the voltage regulator and a second capacitor may be coupled between the output and reference terminals of the voltage regulator. The voltage regulator may be implemented as known to those skilled in the art, such as an LDO or non-LDO 3-terminal regulator or the like.
The bias circuit may include a bias device and a current source. The bias device has a first terminal coupled to the output terminal of the voltage regulator and a second terminal coupled to the control electrode of the current control device. The current source has an input coupled to the first current electrode of the current control device and an output coupled to the second terminal of the bias device. A capacitor may be coupled between the first and second terminals of the bias device.
In the bias device and current source embodiment, the bias device may be implemented as a Zener diode, one or more diodes coupled in series, at least one light emitting diode, or any other bias device which develops sufficient voltage while receiving current from the current source. The current source may be implemented with a PNP BJT having its collector electrode coupled to the second terminal of the bias device, at least one first resistor having a first end coupled to the emitter electrode of the PNP BJT and a second end, a Zener diode and a second resistor. The Zener diode has an anode coupled to the base electrode of the PNP BJT and a cathode coupled to the second end of the first resistor. The second resistor has a first end coupled to the anode of the Zener diode and a second end coupled to the reference terminal of the voltage regulator. A second Zener diode may be included having an anode coupled to the cathode of the first Zener diode and a cathode coupled to the first current electrode of the current control device.
A circuit is disclosed for improving operation of a linear regulator, having an input terminal, an output terminal, and a reference terminal. The circuit includes an input node, a transistor, a bias circuit, and first and second capacitors. The transistor has a first current electrode coupled to the input node, a second current electrode for coupling to the input terminal of the linear regulator, and a control electrode. The bias circuit has a first terminal for coupling to the output terminal of the linear regulator and a second terminal coupled to the control electrode of the transistor. The first capacitor is for coupling between the input and reference terminals of the linear regulator, and the second capacitor is for coupling between the output and reference terminals of the linear regulator. The bias circuit develops a voltage sufficient to drive the control terminal of the transistor and to operate the linear regulator. The bias circuit may be a battery, a bias device and a current source, a floating power supply, a charge pump, or any combination thereof. The transistor may be implemented as a BJT or FET or any other suitable current controlled device.



TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
television receivers using PNP or NPN tuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).






TDA1170 vertical deflection FRAME DEFLECTION INTEGRATED CIRCUIT

GENERAL DESCRIPTION f The TDA1170 and TDA1270 are monolithic integrated
circuits designed for use in TV vertical deflection systems. They are manufactured using
the Fairchild Planar* process.
Both devices are supplied in the 12-pin plastic power package with the heat sink fins bent
for insertion into the printed circuit board.
The TDA1170 is designed primarily for large and small screen black and white TV
receivers and industrial TV monitors. The TDA1270 is designed primarily for driving
complementary vertical deflection output stages in color TV receivers and industrial
monitors.
APPLICATION INFORMATION (TDA1170)
The vertical oscillator is directly synchronized by the sync pulses (positive or negative); therefore its free
running frequency must be lower than the sync frequency. The use of current feedback causes the yoke
current to be independent of yoke resistance variations due to thermal effects, Therefore no thermistor is
required in series with the yoke. The flyback generator applies a voltage, about twice the supply voltage, to
the yoke. This produces a short flyback time together with a high useful power to dissipated power
ratio.

1. A transformerless output vertical deflection circuit, comprising a vertical oscillator circuit for generating a vertical pulse train in response to vertical synchronizing pulses applied thereto, a sawtooth signal generator for generating a series of sawtooth signals, each cycle of said sawtooth signal including a pulse component, a vertical output circuit coupled to said sawtooth generator for amplifying said sawtooth signal including said pulse component and loading a vertical deflection coil, and stabilizing means connected between said vertical oscillator and said sawtooth signal generator for varying the width of the pulse component which is to be fed to said vertical output circuit in response to the average level of DC output voltage fed from the vertical output circuit. 2. A transformerless output vertical deflection circuit claimed in claim 1, wherein said stabilizing means comprises a control circuit means for receiving a series of pulses from the vertical oscillator and a feedback signal from the vertical output circuit and for varying the width of the pulse which is to be fed to the vertical output circuit in response to a DC control signal proportional to the width of the pulse component included in the vertical output signal and smoothing circuit means connected between said vertical output circuit and said stabalizing means for smoothing said feedback signal. 3.

A transformerless output vertical deflection circuit claimed in claim 2, wherein said control circuit comprises a charging capacitor which is parallel to a transistor, said transistor being switched on in response to pulses fed from the vertical oscillator wherein said capacitor is charged by the voltage fed from said smoothing circuit, and discharged in response to conduction of the transistor, a differential amplifier circuit which receives the voltage on said capacitor and a fixed voltage, and a gating circuit for producing a pulse which has a width equal to the difference between the width of the pulse fed from the vertical oscillator circuit and the width of pulse fed from the differential amplifier circuit. 4. A transformerless output vertical deflection circuit claimed in claim 2, wherein said control circuit comprises a capacitor which is charged by a fixed power source and is discharged by means of a switching transistor operated by the pulses fed from the vertical oscillator circuit and a differential amplifier circuit receiving the voltage on the capacitor and the output of said smoothing circuit. 5. A transformable output vertical deflection circuit comprising a vertical oscillator for generating a vertical pulse train in response to vertical synchronizing pulses applied thereto, a sawtooth signal generator for generating a series of sawtooth signals each cycle of said sawtooth signal including a pulse component, a vertical output circuit for amplifying said sawtooth signal including said pulse component and loading a vertical deflection coil, and pulse stabilizing means coupled between the vertical oscillator circuit a

nd the sawtooth signal generator, said stabilizing means comprising a capacitor which is charged by a fixed power source and discharged by means of a discharging means operated in response to the vertical pulse fed from the vertical oscillator, a circuit means for generating a train of output pulses each starting at the time when the voltage appearing on the capacitor exceeds a predetermined value and terminating in synchronism with termination of the pulse fed from the vertical oscillator, and gating means for generating pulses having a width equal to the difference between the width of the pulse fed from the vertical oscillator and the width of the output pulse of the circuit means. 6. A transformerless output vertical deflection circuit, comprising a vertical oscillator circuit for generating a vertical pulse train in response to vertical synchronizing pulses applied thereto, a sawtooth signal generator for generating a series of sawtooth signals, each cycle of said sawtooth signal including a pulse component, a vertical output circuit coupled to said sawtooth generator for amplifying said sawtooth signal including said pulse component and loading a vertical deflection coil, and stabilizing means, comprising a control circuit connected between said vertical output circuit and said vertical oscillator circuit for varying the width of each pulse produced by the vertical oscillator circuit in response to a DC control signal having a value corresponding to the width of the pulse component applied to the vertical deflection coil of the vertical output circuit for controlling the pulse width of the output of said vertical oscillator circuit and thereby the pulse width of said pulse component.

Description:

BACKGROUND OF THE INVENTION

The present invention relates to a vertical deflection circuit for use in a television receiver and, more particularly, to a vertical deflection circuit of a type wherein no vertical output transformer is employed. This type of vertical deflection circuit with no output transformer is generally referred to as an OTL (Output Transformerless) type vertical deflection circuit.

It is known that variation of the pulse width of the flyback pulse produced in a vertical output stage of the vertical deflection circuit is the cause in the raster on the television picture tube, of a white bar, flicker, jitter, line crowding and/or other raster disorders. In addition thereto, in the vertical deflection output circuit where the output stage is composed of a single-ended push-pull amplifier having a vertical output transistor, an excessive load is often imposed on the output transistor and, in an extreme case, the output transistor is destroyed.

TDA1180P TV HORIZONTAL PROCESSOR:

DESCRIPTION
The TDA1180P is a horizontal processor circuit for
b.w. and colour monitors. It is a monolithic inte-
grated circuit encapsulated in 16-lead dual in-line
plastic package.

INOISE GATED HORIZONTAL SYNC SEPARA-
TOR
INOISE GATED VERTICAL SYNC SEPARATOR
IHORIZONTAL
OSCILLATOR
WITH
FRE-
QUENCY RANGE LIMITER
IPHASE COMPARATOR BETWEEN SYNC
PULSES AND OSCILLATOR PULSES (PLL)
IPHASE COMPARATOR BETWEEN FLYBACK
PULSES AND OSCILLATOR PULSES (PLL)
ILOOP GAIN AND TIME CONSTANT SWITCH-
ING ( VCR)
ICOMPOSITE BLANKING AND KEY PULSE
GENERATOR
IPROTECTION CIRCUITS
IOUTPUT STAGES WITH HIGH CURRENT CA-
PABILITY.

APPLICATION INFORMATION
Pin 1 - Positive supply
The operating supply voltage of the device ranges
from 10V to 13.2V
Pin 2 and 3 - Output
The outputs of TDA1180P are suitable for driving
transistor output stages, they deliver positive pulse
at Pin 3 and negative pulse at Pin 2.
The negative pulse is used for direct driving of the
output stage, while positive pulse is useful when a
driver stage is required.
The rise and fall times of the output pulses are
about 150 ns so that interference due to radiation
are avoided.
Furthermore the output stages are internally pro-
tected against short circuit.
Pin 4 - Protection circuit input
By connecting Pin 4 of the IC to earth the output
pulses at Pin 2 and 3 are shut off ; this function has
been introduced to produced to protect the final
stages from overloads.
The same pulses are also shut off when the supply
voltage falls below 4V.
Pin 5 - Phase shifter filter
To compensate for the delay introduced by the line
final stages, the flyback pulses to Pin 6 and the
oscillator waveform are compared in the oscillator-
flyback pulse phase comparator.
The result of the comparison is a control current
which, after it has been filtered by the external
capacitor connected to Pin 5, is sent to a phase
shifter which adequately regulates the phase of the
output pulses.
The maximum phase shift allowed is: td = tp - tf
where tf is the flyback pulse duration.
Pin 5 has high input and output resistance (current
generator).
Pin 6 - Flyback input
The flyback pulse drives the high impedance input
through a resistor in order to limit the input current
to suitable maximum values.
The flyback input pulses are processed by a double
threshold circuit; this generates the blanking pulses
by sensing low level flyback voltage and the pulses
to drive the phase comparator by sensing high level
flyback voltage, therefore phase jitter caused by
ringing normally associated with the flyback pulse,
is avoided.
Pin 7 - Key and blanking pulse output
The key pulse for taking out the burst from the
chrominance signal is generated from the oscillator
ramp and has therefore a fixed phase position with
respect to the sync.
The key pulse is then added internally to the blank-
ing pulse obtained by correctly forming the flyback
pulse present at Pin 6.
The sum of the two signals (sandcastle pulse) is
available on low impedance at output Pin 7.
Pin 8 and 9 - Sync separators inputs
The video signal is applied by means of two distinct
biasing networks to pins 8 and 9 of the IC and
therefore to the respective vertical and horizontal
sync separators.
The latter take the sync pulses out of the video
signal and make them available to the rest of the
circuit for further processing.

Pin 10 - Vertical sync output
The vertical sync pulse, obtained by internal inte-
gration of the synchronizing signal, is available at
this pin.
The output impedance is typically 10kΩ and the
lowest amplitude without load is 11V.
Pin 11 - Coincidence detector
From the oscillator waveform a gate pulse 7 µs
wide is taken whose phase position is centered on
the horizontal synchronism.
The gate pulse not only controls a logic block which
permits the sync to reach the oscillator-sync phase
comparator only for as long as its duration, but also
allows the latching and de-latching conditions of
the oscillator to be established.This function is
obtained by a coincidence detector which com-
pares the phase of the gate pulses with that of the
sync.
When the two signals are not accurately aligned in
time it means that the oscillator is not synchronized.
In this case the detector acts on the logic block to
eliminate its filtering effect and on the time constant
switching block to establish a high impedance on
Pin 12 (small time constant of low-pass filter).
This latter block also acts on the oscillator-sync
phase detector to increase its sensitivity and with it
the loop gain of the synchronizing system.
In this conditions the phase lock has low noise
immunity (wide equivalent noise bandwidth) and
rapid pull-in time which allows fairly short synchro-
nization times.
Once locking has taken place the coincidence de-
tector enables the logic block, causes a low imped-
ance on Pin 12 and reduces the sensitivity of the
phase comparator.
In these conditions the phase lock has high noise
immunity ( narrow equivalent noise bandwidth) due
to the complete elimination of interference which
occurs during the scanning period and the greater
inertia with which the oscillator can change its
frequency.
To optimize the behaviour of the IC if a video
recorder is used, the state of the detector can be
forced by connecting Pin 11 to earth or to + VS. The
characteristics of the phase lock thus correspond
to the lack of synchronization.
Pin 12 - Time constant switch, (see Pin 11)
Pin 13 - Control current output
The oscillator is synchronized by comparing the
phase of its waveform with that of the sync pulses
in the oscillator-sync phase comparator and send-
ing its output current I13 (proportional to the phase
difference between the two signals) to Pin 15 of the
oscillator after it has been filtered properly with an
external low-pass circuit.
The time constant of the filter can be switched
between two values according to the impedance
presented by Pin 12.
The voltage limiter at the output of the phase
comparator limits the voltage excursion on Pin 13
and therefore the frequency range in which the
oscillator remains held-in.
The output resistance of Pin 13 is:
G low when V13 > 4.3 or V13 < 1.6V
G high when 1.6V < V13 < 4.3V
To prevent the vertical sync from reaching the
oscillator-sync phase comparator along with the
horizontal sync,a signal which inhibits the phase
detector during the vertical interval is taken from
the vertical output stage; inhibition remain even if
the video signal is not present.
The free running frequenc of the oscillator is deter-
mined by the values of the capacitor and of the
resistor connected to Pins 14 and 15 respectively.
To generate the line frequency output pulses, two
theresholds are fixed along the fall ramp of the
triangular waveform of the oscillator.
Pin14 - Oscillator (see Pin 13)
Pin 15 - Oscillator control current input (see
Pin 13)
Pin 16 - Ground.



INTEGRATED circuits are slowly but surely taking over more and more of the circuitry used in television sets even B/W.
The first step, some many years ago now, was to wrap the 6MHz intercarrier sound strip into a neat package such as the TAA350 or TAA570. Then came the "jungle" i.c. which took over the sync separator and a.g.c. operations. Colour receiver decoder circuitry was the next obvious area to be parcelled up in i.c. form,  two i.c. decoder and the more sophisticated Philips four i.c. design was coming on the scene. The latter is about to be superseded by a three i.c. version in which the TBA530 and TBA990 are replaced by the new TCA800 which provides chrominance signal demodulation, matrixing, clamping and preamplification, with RGB outputs of typically 5V peak -to -peak.
To improve performance a number of sets adopted a synchronous detector i.c.-the MC1330P -for vision demodulation, which of course overcomes the problem of quadrature distortion. In one monochrome chassis this i.c. is partnered by a complete vision i.f. strip i.c., the MC1352P. In the timebase section the TBA920 sync separator/line generator i.c. has found its way into several chassis was a Texas's SN76544N 07 i.c. which wraps up the sync separator and both the field and line timebase generators has come into use. Several monochrome portables have had in use a high -power audio output i.c. as the field output stage. Audio i.c.s are of course common, and in several  chassis the Philips TCA270 has put in an appearance. This device incorporates a synchronous detector for vision demodulation, a video preamplifier with noise inversion and the a.g.c. and a.f.c. circuits. The   development to be adopted in a production chassis was that remarkable Plessey i.c., the SL437F, which combines the vision i.f. strip, vision demodulator, a.g.c. system and the intercarrier sound channel.

SGS-Aces Range
Now, from the, at the time,  Italian Development Division of SGS-Ates, comes a new range of i.c.s which SGS  will set a standard pattern for TV chassis IN 1975. How this range combines to provide a complete colour receiver is shown in Fig. 1. The only sections of the receiver left in discrete component form are the video output stages, the tuner, the a.f.c. circuit and of course the line output stage and power supplies. It will be seen that the colour decoder section is split up as in the Philips three i.c. design. The TDA1150 chrominance and burst channel carries out the same functions as the TBA560, the TDA1140 reference section the same functions as the TBA540 and the TDA1160 chrominance demodulator/matrix- ing i.c. the same functions as Philips's new TCA800. It looks therefore as if this basic decoder pattern could become widely established. The other five i.c.s in the range are common to both colour and monochrome receivers. Particularly interesting are the TDA1170 which comprises a complete monochrome receiver field timebase-for colour set use an output stage using discrete com- ponents is suggested-and the TDA440 which incorporates the vision i.f. strip, vision detector and a.g.c. circuitry. The intercarrier sound i.f. strip is neatly packed away with the audio circuitry in the TDA1190 while the TDA1180 sync separator/line oscillator i.c. is a very similar animal to the now well known TBA920. The fifth i.c., the TBA271, is a stabiliser for the varicap tuner tuning supply. The novel i.c.s in this family then were the TDA 440, TDA1170 and the TDA1190 and we shall next take a closer look at each of these.

Vision IF IC:
The TDA440 vision i.f. strip i.c. is housed in a 16 -pin plastic pack with a copper frame. There is a three -stage vision i.f. amplifier with a.g.c. applied over two stages, synchronous vision demodulator, gated a.g.c. system and a pair of video signal pre amplifiers which provide either positive- or negative - going outputs. Fig. 2 shows the i.c. in block diagram form. It is possible to design a very compact i.f. strip using this device and very exact performance is claimed. Note that apart from the tuned circuits which shape the passband at the input the only tuned circuit is the 39.5MHz carrier tank circuit in the limiter/demodulator section. The only other adjustments are the tuner a.g.c. delay potentiometer and a potentiometer (the one shown on the right-hand side) which sets the white level at the demodulator. This of course gives ease of setting up, a help to setmaker and service department alike. For a sensitivity of 200/4V the output is 3.3V peak - to -peak, giving an overall gain in the region of 82 to 85dB. The a.g.c. range is 55dB, a further 30 to 40dB being provided at the tuner. The tuner a.g.c. output is intended for use with a pnp transistor or pin diode tuner unit: an external inverter stage is required with the npn transistor tuner units generally used. discrete component video output stage; in a colour In a monochrome set the output would be fed to a design the output is fed to the chrominance section of the TDA1150 and, via the luminance delay line, to the luminance channel in the TDA1150. Also of course in both cases to the sync separator which in this series of i.c.s is contained in the TDA1180.

Field Timebase IC :
The TDA1170 field timebase i.c. is shown in block diagram form in Fig. 3. The i.c. is housed in a 12 -pin package with copper frame and heat dissipation tabs. It is capable of supplying up to 1.6A peak -to -peak to drive any type of saddle -wound scanning yoke but for a colour receiver it is suggested that the toroidal deflection coil system developed by RCA is used. In this case the i.c. acts as a driver in conjunction with a complementary pair of output transistors. The yoke current in this case is in the region of 6A. The TDA1170 is designed for operation with a nominal 22V supply. It can be operated at up to 35V however. A voltage doubler within the i.c. is brought into action during the flyback time to raise the supply to 70V. Good frequency stability is claimed and the yoke current stability with changes in ambient temperature is such that the usual thermistor in series with the field coils is not required. For monochrome receiver use the power supplied to the yoke would be 0-83W for a yoke current of lA peak -to -peak with a 1012 coil impedance and 20V supply. As the power dissipation rating of the i.c. is 2.2W no further heatsink is required. For use in a colour receiver with a toroidal coil impedance of 1.6Ohm the scanning current would be 7A peak -to -peak. The power supplied to the yoke may be as much as 6.5W while the dissipation in the i.c. would be up to 2-3W. In this case a simple heatsink can be formed from a thin copper sheet soldered to the heat fins- an area of about 3-4 sq. in. should be adequate. The sync circuit at the input gives good noise immunity while the difference between the actual and ideal interlace is less than 0-3% of the field amplitude. Because of the high output impedance a relatively low value (1/iF or less) output coupling capacitor can be used. This means that mylar types instead of electrolytics can be used, reducing the problems of linearity and amplitude stability with respect to temperature and ageing. The external controls shown in Fig. 3 are hold, height and linearity (from left to right).

Complete Sound Channel:
The TDA1190 sound channel (see Fig. 4) is housed in a 12 -pin package. Possible radiation pick-up and thermal feedback risks have been avoided by careful layout of the chip. This pack also has a copper frame, with two cooling tabs which are used as the earthing terminals. The built-in low-pass filter overcomes radiation problems and with a response 3dB down at 3MHz allows for a flat amplitude response throughout the audio range: this particular feature will appeal to hi-fi enthusiasts as well since it makes the i.c. a good proposition for f.m. radio reception. The d.c. volume control has a range of 100dB. The external CR circuit (top, Fig. 4) sets the closed - loop gain of the power amplifier. The external feedback capacitor network (right) provides a.f. bandwidth and frequency compensation while the CR circuit across the output limits any r.f. which could cause severe audio distortion. The TDA1190 does not require an extra heatsink when operating in normal ambient temperatures-up to 55°C-because of the new technique of soldering the chip directly on to the copper frame that forms part of the external tabs. By doing this, SGS-Ates have reduced the thermal resistance of the device to 12°C per watt. The device can dissipate up to 2.2W at 55°C without using an external heatsink other than the printed circuit pad (about 2 sq. in.) which is soldered to the tab. The output stages of the TDA1190 are in quasi - complementary mode (with patented features), eliminating the need for bootstrap operation without loss of power. The absolute maximum output power is 4.2W with a supply voltage of 24V and a nominal loudspeaker impedance of 1612. At 12V and 812 an output of 1.8W can be achieved. Total harmonic distortion is 0.5% for 1 mV f.m. input and 2W output into 1611 at 24V. Satisfactory operation is possible over a voltage supply range of 9 to 28V, making this versatile i.c. suitable for a wide range of applications. The whole audio circuit can be mounted on a p.c.b. 2in. x 25in. without a heatsink.

Mounting: The complete family of i.c.s has been designed so that it can be incorporated in very small and simple printed circuit modules. The use of a copper frame assists in improving the thermal stability as well as facilitating the mounting of the i.c.s on the board. Where an extra heatsink is required this can be a simple fin added to the mounting tabs or a metal clamp on the top of the pack. SGS claim that insta- bility experienced with conventional layouts in colour receivers has been eliminated provided their recommendations are observed.

Power Supplies:
A simple power supply circuit without sophisticated stabilisation can be used. The requirements are for outputs ranging between 10V and 35V with adequate decoupling and smoothing. It was  possible to provide only three supply lines to feed the whole receiver system-plus of course the high- voltage supplies required by the c.r.t. The power supply requirements are simplified since the TDA1170 incorporates a voltage regulator for its oscillator, the TDA440 incorporates a regulator for the vision i.f. strip and the TDA1190 a regulator for the low -voltage stages and the d.c. volume control.