GRUNDIG SUPER COLOR P51-242A CTI CHASSIS CUC2401 INTERNAL VIEW.

 

 

 

 

 .TUNER UNIT

- IF ZF-MONO-TP 29504-102.21

- FARB/RGB 29504-105.21

- ABLENKUNG 29504.007.25

 

GRUNDIG SUPER COLOR  P51-242A CTI  CHASSIS CUC2401    DESCRIPTION OF THE ZNT - LINE SUPPLY TRANSFORMER TECHNOLOGY, ONE TRANSFORMER FOR ALL SUPPLY FUNCTIONS  :


Short Functional Description
The GRUNDIG line/power supply unit has two important features:

- the line/mains transformer (ZNT) with ferrite core.
This transformer is provided with windings for the power supply and line output stages:

- the supply frequency corresponds to the line frequency.

The ZNT is used for electrical isolation, horizontal deflection, and generation of the operating voltage. The ZNT windings are tightly and loosely coupled to ensure that the load capacity of the supplies is high enough and that back effects on the line transformer winding N-M are avoided.

Startup Circuit
The starting voltage for IC 655 PHILIPS TDA3640 is obtained from the bridge rectifier D 621 via R 641. lf the voltage on pin 2, which is derived from the resistor network R 642, 643, and 644, reaches a level of approximately 10 V, the IC 655 starts to drive T 6  61 via pin 3 (precondition: pin ‘8>10V).
The line/power supply circuit starts to oscillate.
Simultaneously, the current consumption drawn via pin 2 rises and the winding E-D of
the ZNT takes over the operating voltage supply function (D 647, R 647, C 647).
Oscillator in IC PHILIPS TDA3640 The control pulses for the T 661 are generated by an oscillator which operates on the threshold principle where C 653 is an externaly connected frequency-determining component (oscillator retaining range 14-17 kHz approx.). The oscillator oscillates at a free-run frequency until the reference pulses from the ZNT exceed 1 Vp at pin 12.
ln full operating condition (ON) avoltage of about +5 Vp is applied to pin 12.

Line 0utputStage
The deflection transistor T 521 is activated in stand-by mode. The cyclic line-frequency control of the deflection transistor corresponds to the “ON" operating mode.
The power for the horizontal sweep circuit is derived from the electromotive force of coil M-N that no additional operating voltage is necessary for T 521.

Voltage Stabilisation
ln stand-by mode the pulse from winding E-D (tightly coupled with winding A-B) is used as a reference for stahilisation. The controlled variation is +10.5 V on pin 2 TDA3640.

ln full operating condition, that is 'ON“. the voltage in the horizontal sweep circuit (transformer winding M-N) must be stabilised to a constant level. This is achieved by means of a reference pulse from winding C-D which is tightly coupled with winding M-N. The resulting direct voltage
obtained via D 633 is proportional to the width of the picture or high voltage and is applied to pin 10 and compared with the reference voltage (about 3 V) on pin 11. ln this part of the circuit the +C voltage is adjusted by means of R 637 to 196 V and 192Vf'or 25" receivers and 28" receivers.
respectively.

Protective Circuits of PHILIPS TDA3640
The protective circuits respond immediately if:
- the operating voltage on pin 2 is too low (<7 V):
- ICE of T 521 is too high (more negative than -1 V at pin 7);
- the power supply voltage is too high (voltage at pin 18 is 2.8 V higher than at pin 2);
- the power supply voltage is too low (voltage at pin 18 is 1.4 V lower than at pin 2);
- the high voltage is excessivley high (line flyback pulses >6V at pin 12):
- the crystal temperature is too high (>135° C).



The invention relates to a horizontal deflection circuit for a picture display apparatus, comprising:
a horizontal output stage provided with a switching element which is coupled to a horizontal output transformer for generating at least one voltage, and
a drive circuit for generating a drive signal for switching the switching element, and provided with a duty cycle control circuit for modulating a duty cycle, of the drive signal during changes of state of the horizontal deflection circuit.
The invention also relates to a method of horizontally deflecting a cathode ray of a picture display tube, and to a picture display apparatus provided with the horizontal deflection circuit.
2. Description of the Related Art
Such a horizontal deflection circuit is known from German Patent Application DE-A-4021940, corresponding to U.S. Pat. No. 5,381,329. This Application describes a power supply circuit in which a switching element (a transistor in this case) is coupled to a power supply transformer and a horizontal output transformer. Such a power supply circuit, which is known as Wessel circuit, supplies power supply voltages by means of the power supply transformer and a horizontal deflection current, fly-back voltages and/or scan voltages by means of the horizontal output transformer. In normal operation, the power supply circuit, further referred to as combined circuit, generates a drive signal of which one edge is used for fixing a switch-off instant of the switching element. This switch-off instant initiates a horizontal fly-back, and is controlled in normal operation by what is generally referred to as a phi2-control circuit. To this end, the drive circuit compares instants of occurrence of fly-back pulses supplied by the horizontal output stage and related to the horizontal fly-back, on the one hand, with instants of occurrence of the horizontal synchronizing pulses, on the other hand. A possible difference in instants of occurrence is corrected so that the video signal is displayed at the correct horizontal position on the display tube.
During a described change of state from stand-by operation to normal operation, a duty cycle of the drive signal is controlled so as to continuously increase an on-time of the switching element from a small value to a nominal value. With such a variation of the duty cycle, the switching element is protected from a too large dissipation. However, a duty cycle modulation, as used in the combined circuit, does not provide the possibility of having a variation of voltages generated by the combined circuit during the change of state to satisfy various requirements imposed by different components that are coupled to the scan and fly-back voltages.
SUMMARY OF THE INVENTION
It is, inter alia, an object of the invention to provide a horizontal deflection circuit and a method in which, during a change of state, a duty cycle variation is influenced by at least one of the voltages generated by the horizontal deflection circuit so as to satisfy the various requirements which are imposed on a variation of different voltages. The requirements referred to relate to, for example, a maximum admissible current in components connected with the voltages or a maximum admissible rate at which a voltage may vary around a specific value.
To this end, a first aspect of the invention provides a horizontal deflection circuit for a picture display apparatus, comprising a horizontal output stage provided with a switching element which is coupled to a horizontal output transformer for at least generating a voltage, and a drive circuit for generating a drive signal for switching the switching element, and provided with a duty cycle control circuit for modulating a duty cycle of the drive signal during changes of state of the horizontal deflection circuit, characterized in that the horizontal deflection circuit is provided with a feedback circuit having at least one feedback input which is coupled to an output of the horizontal output stage for receiving a DC signal which varies during said changes of state, said feedback circuit having an output for applying a control signal to a control input of the duty cycle control circuit. By an arranged feedback with a voltage generated by the horizontal output stage, a first rate of growth of the duty cycle of the drive signal determined by the maximum admissible dissipation in the switching element is changed at an instant when the variation of one of the fed-back voltages tends to reach an unwanted range. According to the invention, the control of the duty cycle variation provides the possibility of inhibiting the rate at which voltages rise at the instant when one of the components tends to violate an imposed requirement. It consequently is not necessary to choose a constant, very slow increase of the voltages, satisfying all requirements, but unnecessarily extending the duration of the change of state.
An embodiment of the horizontal deflection circuit having the characterizing feature that the DC signal is related to at least a scan voltage generated by the horizontal output transformer, provides the possibility of an accurately defined desired variation of a scan voltage, with the advantage that charging of the capacitors coupled to the scan voltage varies at a chosen second rate. Consequently, too large currents and loads are not produced in these capacitors and components arranged in series therewith such as diodes, coils, resisters or fuses. In this way, the current in a horizontal output transformer coupled to the switching element, can also be maintained below a saturation value, and the peak lead of a power supply circuit feeding the horizontal deflection circuit decreases.
An embodiment of the horizontal deflection circuit, with the characterizing feature that the DC signal s related to at least a fly-back voltage generated by the horizontal output transformer, provides the possibility of an accurately defined desired variation of a fly-back voltage. This also has the advantage that too large loads of components arranged in series with the above-mentioned capacitors, such as diodes, coils, resisters or fuses cannot be produced. To prevent flash-over in display tubes which are sensitive thereto, a desired third rate can be fixed at which the anode voltage of the display tube, which is also a fly-back voltage, increases. To this end, a voltage derived from the anode voltage or another fly-back voltage can be fed back. It is alternatively possible to reduce or eliminate the noises which may occur due to large current variations or due to a fast rise and fall of the anode voltage during switching on and switching off the picture display apparatus.
The embodiment of the horizontal deflection circuit, with the characterizing feature that the feedback circuit is provided with change detector means coupled to the feedback input for supplying output signals which are a measure of a change of the DC signal, has the advantage that only the variation in DC signals is fed back, with which in normal operation, in which the DC signals have reached their final value, the feedback does not have any influence on the duty cycle control.
An embodiment of the horizontal deflection circuit, with the characterizing feature that the feedback circuit is further provided with a threshold circuit arranged between the feedback input and the change detector means, provides the possibility of limiting the variation of a scan or fly-back voltage above a level determined by a threshold circuit at a fourth rate. This provides the advantage of obtaining an extra slow increase of the anode voltage above this level which is necessary for display tubes which are sensitive to flash-over during a rise of the anode voltage close to a final value.



GRUNDIG SUPER COLOR  P51-242A CTI  CHASSIS CUC2401  Standby mode operation of a horizontal output stage combined with a switched-mode power supply unit. STANDBY-BETRIEB BEI EINER MIT EINEM SCHALTNETZTEIL KOMBINIERTEN HORIZONTALENDSTUFENSCHALTUNG:

1. Switched-mode power supply with a combined horizontal output stage circuit in television receivers, in which, as a point of electrical isolation between mains and chassis side, only a transformer (1) is provided, the primary winding (n1 ) of which is tightly coupled to at least one chassis-side secondary winding (n3 ) and one mains-side secondary winding (n5 ) and is loosely coupled to further secondary windings (n2 , n4 , n6 , n7 ) which, in turn, are tightly coupled to each other, in which arrangement one of the secondary windings (n2 ) tightly coupled to each other is electrically connected to the deflection transistor (4) of the horizontal output stage (14), and in which a primary-side regulating circuit (2), which is synchronized by flyback pulses in normal operation, controls a regulating switch which is arranged in series with the primary winding (n1 ) of the transformer (1), characterized in that - the deflection transistor (4), which is periodically triggered in normal operation, of the horizontal output stage (14) is kept continuously conductive by the driver circuit (13) in standby mode of operation, - the amount of energy transferred from the mains-side to the chassis side is corrected in accordance with the determination of the supply voltage of the regulating circuit (2), which is obtained via the mains-side secondary winding (n5 ) tightly coupled to the primary winding (n1 ), during the standby mode of operation during which no flyback pulses are supplied to the regulating circuit, - and the energy needed in standby mode of operation on the chassis side for the driver circuit (13) and other loads is transferred via the chassis-side secondary winding (n3 ) tightly coupled to the primary winding (n1 ).

1. Schaltnetzteil mit kombinierter Horizontalendstufenschaltung in Fernsehempf·angern, bei dem als galvanische Trennstelle zwischen Netz- und Chassisseite nur ein Transformator vorgesehen ist, dessen Prim·arwicklung mit mindestens einer weiteren Wicklung fest und den anderen Wicklungen, die fest aneinandergekoppelt sind, lose gekoppelt ist, wobei eine der fest miteinander verkoppelten Sekund·arwicklungen mit dem Ablenktransistor der Horizontalendstufe elektrisch verbunden ist, d a d u r c h g e k e n n z e i c h n e t , dass der Ablenktransistor (4) der Horizontalendstufe und der Regelkreis (2), der von einer lose an die Prim·arwicklung (n1) angekoppelten Sekund·arwicklung (n4) mit R·uckschlagimpulsen versorgt wird, zur Steuerung des Standby-Betriebes verwendet werden.

2. Schaltnetzteil nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t , dass der Ablenktransistor (4) der Horizontalendstufe zum Einschalten und/oder zum Wiedereinschalten des Normalbetriebes verwendet wird.

3. Schaltnetzteil nach Anspruch 1 oder 2, d a d u r c h g e k e n n z e i c h n e t , dass zum Einschalten des Standby-Betriebes der Ablenktransistor (4) leitend geschaltet, zum Aufrechterhalten des Standby-Betriebes leitend gehalten und zum Wiedereinschalten des Normalbetriebes gesperrt wird.

4. Schaltnetzteil nach einem oder mehreren der vorhergehenden Anspr·uche, d a d u r c h g e k e n n z e i c h n e t , dass der Regelkreis (2) bei einem Kurzschluss der Wicklung infolge einer sekund·arseitigen St·orung zur·uckgeregelt wird bzw. in den Standby-Betrieb umschaltet. EMI11.1

Description:

STANDBY-BETRIEB BEI EINER MIT EINEM SCHALTNETZTEIL KOMBINIERTEN HORI ZONTALENDSTUFENSCHALTUNG BESCHREIBUNG Die Erfindung betrifft ein Schaltnetzteil mit kombinierter Horizontal-Endstufenschaltung in Fernsehempf·angern, bei dem als galvanische Trennstelle zwischen Netz- und Chassisseite nur ein Transformator vorgesehen ist, dessen Prim·arwicklung mit mindestens einer weiteren Wicklung fest und den anderen Wicklungen, die fest aneinandergekoppelt sind, lose gekoppelt ist, wobei eine der fest miteinander verkoppelten Sekund·arwicklungen mit dem Ablenktransistor der Horizontalendstufe elektrisch verbunden ist.

Ein solches Schaltnetzteil wurde von derselben Anmelderin in der deutschen Patentanmeldung P 32 10 908 vorgestellt. Dieses Schaltnetzteil zeichnet sich aus durch einen prim·arseitigen frei anlaufenden Regelkreis zur Steuerung des Hauptstromweges und einen Regelschalter, ·uber den die aus dem Netz gewonnene, ungeregelte Gleichspannung der Prim·arwicklung n1 des Transformators zugef·uhrt wird. In der lose an die Prim·arwidiung n1 gekoppelten Sekund·arwicklung n2 wird ein Strom induziert, der zum Anlauf und zur Versorgung der Horizontalendstufe vorgesehen ist.
In einer zweiten, fest an die Prim·arwicklung n1 angekoppelten Wicklung n3 wird die Niedervoltspannung f·ur die Horizontalansteuerung, die einen internen Treiber enth·alt, und die Kleinsignalstufen erzeugt. Weiterhin sind Sekund·arwicklungen vorgesehen, die fest an n2 gekoppelt sind und die Spannungen f·ur die kGB-Endstufen, Heizung, usw. erzeugen.
·Uber die Trennstelle n /n des Transformators wird 12 w·ahrend des R·ucklaufintervalles des Ablenktransistors (4) eine Spannung auf die Prim·arwicklung n1 ·ubertragen, die zur Ausschaltung des Regel schalters verwendet wird. In der fest an die Wicklung n2 gekoppelten Wicklung n4 wird eine Spannung induziert, die zur Synchronisation und Steuerung des Regelkreises 2 herangezogen wird. Der durch den Widerstand (6) fliessende Strom kann als ·Uberlast-Referenzstrom zum Abschalten des Regelschalters herangezogen werden.
Belastungs·anderungen werden in der fest an n2 gekoppelten Wicklung n4 erfasst und ·uber eine Beeinflussung der Stromflusszeit des Hauptstromkreises ausgeregelt.
Die deutsche Anmeldung P 32 10 908 enth·alt jedoch keinen Hinweis auf einen Standby-Betrieb.
Weiterhin ist aus der DE-PS 24 58 302 ein Sperrwandler-Netzteil f·ur einen Fernsehempf·anger mit Ultraschall-Fernbedienung bekannt, der als Betriebszustand u. a. einen Bereitschaftsbetrieb aufweist. Bei dieser Schaltung sind der Fernsehempf·anger und der Ultraschallempf·anger an denselben Trenntransformator sekund·arseitig angeschlossen. Die Umschaltung zwischen Normalbetrieb und Bereitschaftsbetrieb wird auf der Sekund·arseite des Trenntransformators vorgenommen.
Bei dieser Schaltung ist jedoch ein zus·atzlicher Transformator f·ur die Horizontalendstufe n·otig.
Die Aufgabe der Erfindung besteht darin, bei einem Schaltnetzteil mit kombinierter Horizontal-Endstufenschaltung der im Oberbegriff des Anspruchs 1 angegebenen Art auf besonders einfache Art und Weise den Standby-Betrieb zu erm·oglichen.
Diese Aufgabe wird durch das Kennzeichen des Patentanpsruchs 1 gel·ost. Besonders vorteilhafte Weiterbildungen der Erfindung sind in den Unteranspr·uchen gekennzeichnet.
Dic Vorteile der Erfindung liegen insbesondere darin, dass als galvanische Trennstelle nur ein Transformator f·ur die Erzeugung der Betriebsspannung, der Hochspannung, der Horizontalablenkung und der Heizspannung n·otig ist und aufgrund der gew·ahlten Wicklungsanordnung mit Hilfe des Horizontal-Ablenktransistors und der prim·arseitigen Regelschaltung auf besonders einfache Art und Weise eine Steuerung des Standby-Betriebes durchgef·uhrt werden kann.
Ein weiterer Vorteil besteht darin, dass im Falle einer sekund·arseitigen St·orung automatisch der Standby-Betrieb herbeigef·uhrt wird.
Die Erfindung wird nachfolgend unter Bezugnahme auf das aus der Figur 1 ersichtliche Ausf·uhrungsbeispiel n·aher erl·autert.
Die Schaltung wird ·uber die Netzspannung UN mit nachgeschalteter Gleichrichterbr·ucke mit einer ungeregelten Gleichspannung versorgt und ist ·uber nur einen Transformator 1 vom Netz getrennt, wobei der Transformator die Stromversorgung f·ur das synchronisierte Schaltnetzteil sowie die Impuls- bzw. Hochspannungserzeugung ·ubernimmt. Wie durch die gestrichelte Linie zum Ausdruck kommt, ist die Netzseite v·ollig von der Schaltungsseite galvanisch getrennt.
In der Anlaufphase wird ·uber eine Startschaltung 7, die im einfachsten Fall aus einem hochohmigen Widerstand besteht, der Kondensator 11 aufgeladen. In dieser Phase gibt die Regelschaltung 2 keine Impulse an die Basis des Regelschalters 3 ab. Erst wenn die Spannung am Punkt A einen vorgegebenen Wert (z. B.
10 V) erreicht hat, wird ·uber eine regelschaltungsinterne Stabilisierungsschaltung die gesamte Schaltung in Betrieb genommen. Die Regelschaltung 2 liefert Impulse an die Basis des Regelschalters 3, tastet also den Regelschalter 3 auf. ueber den Regelschalter 3 fliesst somit ein pulsierender Strom in die Prim·arwicklung n1 des Transformators.
Die Wicklungen nl, n3 und n5 sind fest miteinander verkoppelt. Die Wicklungen n2, n4, n6 und n7 sind untereinander fest, aber lose an die vorgenannten Wicklungen nl, n3 und n5 gekoppelt. Ein Beispiel daf·ur, wie die genannten Kopplungsverh·altnisse erreicht werden k·onnen, zeigt die Figur 2.
Die Wicklung n5 liefert ·uber eine Diode 10 einen gegen·uber der Anlaufphase h·oheren Strom an den Kondensator 11, so dass in der weiteren Folge die Versorgung der Regelschaltung 2 sichergestellt ist.
Durch die zweite, fest an n1 und lose an n2 angekoppelte Sekund·arwicklung n3 wird die Niedervoltspannung f·ur die Kleinsignalstufen und die NF-Stufe und den Horizontaloszillator bzw. die Treiberschaltung 13 der Horizontalendstufe 14 gewonnen, und damit die Ansteuerung des Ablenktransistors 4 sichergestellt. In die lose an n1 gekoppelte Sekund·arwicklung wird n2 In die lose an n1 gekoppelte Sekund·arwickl£ung n2 wird eine Spannung induziert, die nach Gleichrichtung mittels einer Diode 8 an den Kondensator 9 die ben·otigte Betriebsspannung f·ur den Ablenkkreis liefert und somit den Anlauf der Horizontalendstufe herbeif·uhrt.
·Uber die Trennstelle n 1/n2 wird ferner die an der Ablenkwicklung 15 stehende Spannung w·ahrend des K·ucklaufintervalls der Ablenkschaltung invertiert auf die Prim·arwicklung n1 betragen, um den Strom im Hauptstromweg w·ahrend der R·ucklaufzeit bei der Schaltung des Regelschalters 3 und damit die Abschaltverluste zu vermindern. Dieser Vorgang ist ausf·uhrlich beispielsweise in der DE-OS 28 35 946 dargestellt.
Aus einer fest an die Wicklung n2 und lose an n1 angekoppelten Wicklung n4 des Transformators wird eine R·ucklauf spannung gewonnen, die abh·angig von der Belastung der Wicklung n2 ist.

Strahlstrom·anderungen in der Hochspannungserzeugung ·uber die Wicklung n6 und der Hochspannungskaskade 12 (bzw. Split) werden ·uber die fest an n6 gekoppelte Wicklung n2 bzw. die fest an n2 gekoppelte Wicklung n4 an die Regelschaltung 2 weitergegeben, die die Stromflusszeit im Hauptstromkreis bzw. den Regelschalter 3 beeinflusst. Somit werden ·uber die Regelschaltung 2 Belastungsschwankungen ausgeregelt.
Hingegen werden Belastungs·anderungen in der Wicklung n3, wie sie beispielsweise durch NF-Last·anderungen gegeben sind, fast nicht nachgeregelt, da die Wicklung n3 nur lose mit den Wicklungen n2 und n4 verkoppelt ist. Deshalb ist die Zeilenablenkschaltung weitgehend unabh·angig von Last·anderungen in der Sekund·arwicklung n3.
Die Netzspannungsnachregelung f·ur die Spannungen, die aus der Wicklung n3 gewonnen werden, erfolgt indirekt ·uber die Regelimpulse der Wicklung n4 So w·urde sich beispielsweise bei Netzunterspannung die R·ucklauf spannung ohne Nachregelung verringern.
Durch die Impulse der Wicklung n4 wird jedoch ·uber die Regelschaltung 2 die Leitzeit des Regelschalters 3 verl·angert. Damit wird mehr Energie von der Prim·arauf die Sekund·arseite ·ubertragen und demzufolge Netzspannungs·anderungen ausgeglichen.
Bei der Umschaltung vom Normalbetrieb in den Standby- Betrieb schaltet der Regelkreis 2 die Spannung ¢am Punkt A auf den vorgegebenen Wert von z. B. 10 V.
Diese Standby-Umschaltung steht in Verbindung mit einer Verk·urzung der Leitzeit des Regel schalters 3, die wie folgt ausgel·ost wird: ·Uber die Wicklung n3 bzw. eine Treiberschaltung 13 der Horizontalansteuerstufe wird die Basis des Ablenk transistors 4 so gesteuert, dass der Ablenktransistor st·andig leitet. Demzufolge kann sich im Kondensator 9 und damit auch in der Sekund·arwicklung n2 keine Spannung aufbauen. Da die Wicklung n6 f·ur die Hoch spannungs erzeugung, die Wicklung n7 f·ur die Erzeugung einer Heizspannung und sonstige Impulsspannungen sowie die Wicklung n4 f·ur die Synchronisation und Steuerung der Regelschaltung 2 fest mit der Wicklung n2 verkoppelt sind, k·onnen weder Hochspannung noch Heizung noch sonstige Impuls spannungen entstehen.
Damit sind s·amtliche im Standby-Betrieb nicht ben·otigten Spannungen abgeschaltet, ziehen also keine Leistung aus dem Netz. Ausserdem schaltet wegen des Wegfalls der R·ucklauf spannungen an n4 die Regelschaltung im beschriebenen Sinne den Regel schalter 3 auf Standby-Betrieb um.
Dagegen ist die im Standby-Betrieb n·otige Versorgung der Sekund·arseite mit Niedervoltspannung weiterhin gew·ahrleistet, da die Wicklung n3, ·uber die diese Versorgung erfolgt, fest mit der Prim·arwicklung n1 und nur lose mit der Sekund·arwicklung n2 verkoppelt ist. Die Nachregelung der Niedervoltspannung kann - falls n·otig - mit Hilfe der Spannung erfolgen, die in die ebenfalls fest an n1 gekoppelte Wicklung n5 induziert wird, die ansonsten nur die Energie f·ur die Versorgung der Regelschaltung liefert.
Der ·Ubergang vom Standby-Betrieb auf den Normalbetrieb geschieht durch die Sperrung des Ablenktransistors 4 und dessen weitere periodische Ansteuerung. Die an der Wicklung n2 entstehende Spannung wird in der fest an n2 gekoppelten Wicklung n4 induziert. Diese R·uckschlagimpulse gelangen an den Triggereingang der Regelschaltung 2. Diese f·uhrt einen internen Spannungsvergleich durch und f·uhrt die Schaltung wieder in den geregelten Normalzustand ·uber.
Die dargestellte Schaltung erm·oglicht es somit, den Ablenktransistor 4 der Horizontalendstufenschaltung in besonders einfacher Weise f·ur die Steuerung des Standby-Betriebes zu verwenden.
Ein besonderer Vorteil der erfindungsgem·assen Schaltung liegt darin, dass im Falle einer sekund·arseitigen St·orung, z. B. einem Kurzschluss der Diode oder des Kondensators 16, die Schaltung automatisch in den Standby-Betrieb ·ubergef·uhrt wird. Denn im Falle eines Kurzschlusses der Diode 8 oder des Kondensators 16 kann sich an n2 keine Spannung aufbauen. Dies gilt ebenso f·ur die Wicklung n4, die fest an n2 gekoppelt ist und die R·uckschlagimpulse an den Triggereingang der Regelschaltung 2 liefert. Auch an der Wicklung n6 f·ur die Hochspannungserzeugung und der Wicklung n7 f·ur die Erzeugung einer Heizspannung, die beide ebenfalls fest an n2 gekoppelt sind, kann sich keine Spannung aufbauen.

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CRT   TV EHT VOLTAGE MULTIPLIER - KASKADE COCKCROFT-WALTON CASCADE CIRCUIT FOR VOLTAGE MULTIPLICATION:

A Cockcroft-Walton cascade circuit comprises an input voltage source and a pumping and storage circuit with a series array of capacitors with pumping and storage portions of the circuit being interconnected by silicon rectifiers, constructed and arranged so that at least the capacitor nearest the voltage source, and preferably one or more of the next adjacent capacitors in the series array, have lower tendency to internally discharge than the capacitors in the array more remote from the voltage source.


1. An improved voltage multiplying circuit comprising,

2. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor is a self-healing impregnated capacitor which is impregnated with a high voltage impregnant.

3. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor comprises a foil capacitor.

Description:
BACKGROUND OF THE INVENTION

The invention relates in general to Cockcroft-Walton cascade circuits for voltage multiplication and more particularly to such circuits with a pumping circuit and a storage circuit composed of capacitors connected in series, said pumping circuits and storage circuit being linked with one another by a rectifier circuit whose rectifiers are preferably silicon rectifiers, especially for a switching arrangement sensitive to internal discharges of capacitors, and more especially a switching arrangement containing transistors, and especially an image tube switching arrangement.

Voltage multiplication cascades composed of capacitors and rectifiers are used to produce high D.C. voltages from sinusoidal or pulsed alternating voltages. All known voltage multiplication cascades and voltage multipliers are designed to be capacitance-symmetrical, i.e., all capacitors used have the same capacitance. If U for example is the maximum value of an applied alternating voltage, the input capacitor connected directly to the alternating voltage source is charged to a D.C. voltage with a value U, while all other capacitors are charged to the value of 2U. Therefore, a total voltage can be obtained from the series-connected capacitors of a capacitor array.

In voltage multipliers, internal resistance is highly significant. In order to obtain high load currents on the D.C. side, the emphasis in the prior art has been on constructing voltage multipliers with internal resistances that are as low as possible.

Internal resistance of voltage multipliers can be reduced by increasing the capacitances of the individual capacitors by equal amounts. However, the critical significance of size of the assembly in the practical application of a voltage multiplier, limits the extent to which capacitance of the individual capacitors can be increased as a practical matter.

In television sets, especially color television sets, voltage multiplication cascades are required whose internal resistance is generally 400 to 500 kOhms. Thus far, it has been possible to achieve this low internal resistance with small dimensions only by using silicon diodes as rectifiers and metallized film capacitors as the capacitors.

When silicon rectifiers are used to achieve low internal resistance, their low forward resistance produces high peak currents and therefore leads to problems involving the pulse resistance of the capacitors. Metallized film capacitors are used because of space requirements, i.e., in order to ensure that the assembly will have the smallest possible dimensions, and also for cost reasons. These film capacitors have a self-healing effect, in which the damage caused to the capacitor by partial evaporation of the metal coating around the point of puncture (pinhole), which develops as a result of internal spark-overs, is cured again. This selfhealing effect is highly desirable as far as the capacitors themselves are concerned, but is not without its disadvantages as far as the other cirucit components are concerned, especially the silicon rectifiers, the image tubes, and the components which conduct the image tube voltage.

It is therefore an important object of the invention to improve voltage multiplication cascades of the type described above.

It is a further object of the invention to keep the size of the entire assembly small and the internal resistance low.

It is a further object of the invention to increase pulse resistance of the entire circuit.

It is a further object of the invention to avoid the above-described disadvantageous effects on adjacent elements.

It is a further object of the invention to achieve multiples of the foregoing objects and preferably all of them consistent with each other.

SUMMARY OF THE INVENTION

In accordance with the invention, the foregoing objects are met by making at least one of the capacitors in the pumping circuit, preferably including the one which is adjacent to the input voltage source, one which is less prone to internal discharges than any of the individual capacitors in the storage circuit.

The Cockcroft-Walton cascade circuit is not provided with identical capacitors. Instead, the individual capacitors are arranged according to their loads and designed in such a way that a higher pulse resistance is attained only in certain capacitors. It can be shown that the load produced by the voltage in all the capacitors in the multiplication circuit is approximately the same. But the pulse currents of the capacitors as well as their forward flow angles are different. In particular, the capacitors of the pumping circuit are subjected to very high loads in a pulsed mode. In the voltage multiplication cascade according to the invention, these capacitors are arranged so that they exhibit fewer internal discharges than the capacitors in the storage circuit.

The external dimensions of the entire assembly would be unacceptably large if one constructed the entire switching arrangement using such capacitors.

The voltage multiplication cascade according to the invention also makes it possible to construct a reliably operating

arrangement which has no tendency toward spark-overs, consistent with satisfactory internal resistance of the voltage multiplication cascade and small dimensions of the entire assembly. This avoids the above cited disadvantages with respect to the particularly sensitive components in the rest of the circuit and makes it possible to design voltage multiplication cascades with silicon rectifiers, which are characterized by long lifetimes. Hence, a voltage multiplication cascade has been developed particularly for image tube circuits in television sets, especially color television sets, and this cascade satisfies the highest requirements in addition to having an average lifetime which in every case is greater than that of the television set.

A further aspect of the invention is that at least one of the capacitors that are less prone to internal discharges is a capacitor which is impregnated with a high-voltage impregnating substance, especially a high-voltage oil such as polybutene or silicone oil, or mixtures thereof. In contrast to capacitors made of metallized film which have not been impregnated, this allows the discharge frequency due to internal discharges or spark-overs to be reduced by a factor of 10 to 100.

According to a further important aspect of the invention, at least one of the capacitors that are less prone to internal discharges is either a foil capacitor or a self-healing capacitor. In addition, the capacitor in the pumping circuit which is adjacent to the voltage source input can be a foil capacitor which has been impregnated in the manner described above, while the next capacitor in the pumping circuit is a self-healing capacitor impregnated in the same fashion.

Other objects, features and advantages of the invention will be apparent from the following detailed description of preferred embodiments, taken in connection with the accompanying drawing, the single FIGURE of which:

BRIEF DESCRIPTION OF THE DRAWING

is a schematic diagram of a circuit made according to a preferred embodiment of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The voltage multiplier comprises capacitors C1 to C5 and rectifiers D1 to D5 connected in a cascade. An alternating voltage source UE is connected to terminals 1 and 2, said voltage source supplying for example a pulsed alternating voltage. Capacitors C1 and C2 form the pumping circuit while capacitors C3, C4 and C5 form the storage circuit.

In the steady state, capacitor C1 is charged to the maximum value of the alternating voltage UE as are the other capacitors C2 to C5. The desired high D.C. voltage UA is picked off at terminals 3 and 4, said D.C. voltage being composed of the D.C. voltages from capacitors C3 to C5. Terminal 3 and terminal 2 are connected to one pole of the alternating voltage source UE feeding the circuit, which can be at ground potential. In the circuit described here, a D.C. voltage UA can be picked off whose voltage value is approximately 3 times the maximum value of the pulsed alternating voltage UE. By using more than five capacitors, a correspondingly higher D.C. voltage can be obtained.

The individual capacitors are discharged by disconnecting D.C. voltage UA. However, they are constantly being recharged by the electrical energy supplied by the alternating voltage source UE, so that the voltage multiplier can be continuously charged on the output side.

According to the invention, in this preferred embodiment, capacitor C1 and/or C2 in the pumping circuit are designed so that they have a lower tendency toward internal discharges than any of the individual capacitors C3, C4 and C5 in the storage circuit.

It is evident that those skilled in the art, once given the benefit of the foregoing disclosure, may now make numerous other uses and modifications of, and departures from the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.

Inventors:Petrick, Paul (Landshut, DT)
Schwedler, Hans-peter (Landshut, DT)
Holzer, Alfred (Schonbrunn, DT)
ERNST ROEDERSTEIN SPEZIALFABRIK

US Patent References:
3714528    ELECTRICAL CAPACITOR WITH FILM-PAPER DIELECTRIC    1973-01-30    Vail    
3699410    SELF-HEALING ELECTRICAL CONDENSER    1972-10-17    Maylandt    
3463992    ELECTRICAL CAPACITOR SYSTEMS HAVING LONG-TERM STORAGE CHARACTERISTICS    1969-08-26    Solberg    
3457478    WOUND FILM CAPACITORS    1969-07-22    Lehrer    
3363156    Capacitor with a polyolefin dielectric    1968-01-09    Cox    
2213199    Voltage multiplier    1940-09-03    Bouwers et al.  


TDA8140 HORIZONTAL DEFLECTION POWER DRIVER
DESCRIPTION
The TDA 8140 is a monolithic integrated circuit designed
to drive the horizontal deflectionpower transistor.
The current source characteristic of this device is
adapted to the on-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8140 is internally protected
against short circuit and thermal overload.

During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitry mustbe adaptedto the required
base current in order to ensure the power transistor
saturation.
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 5
wegive a comparisonbetweenthe typical real base
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base current
which gives an additional power dissipation on
the power transistor.
Furthermoreduring the turn-ONand turn-OFFtransient
phase of the chassis the power transistor is
extremely stressed when the conventionalnetwork
cannot guarantee the saturation ; for this reason,
generally, the driving circuit must be carefully designed
and is different for each deflection system.
The new approach, using the TDA 8140, overcomes
these restrictions by means of a feedback
principle.

As shown in Figure 5, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the required
base current Ib can be easily generated by a feedback
transconductanceamplifier gm which senses
the deflection current across the resistor Rs at the
emitter of the power transistor and delivers :
Ib = RS . gm . Ie
The transconductance must only fulfill the condition
:
1
1 + bmin V 1
RS
<>
RS
Where bmin is the minimum current gain of the
transistor. This method always ensures the correct
base current and acts time independent on principle.For the turn-OFF, the base of the power transistor
must be discharged by a quasi linear time decreasing
current as given in Figure 6.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
This is due to the constant base charge in the
turn-ON phase independent from the collector current
; hence a high peak current results into a low
storage time of the transistor because the excess
base charge is a minimum and vice versa. In the
active deflection the required function, high peak
current-fast switch-OFF and low peak current-slow
switch-OFF, is obtained by a controlled base discharge
current for the power transistor ; the negative
slope of this ramp is proportional to the actual
sensed current.
As a result, the active driving system even improves
the sharpnessof vertical lines on the screen
compared with the traditional solution due to the
increasedstability factor of the loop representedas
the variation of the storagetime versus the collector
peak current.


TUA2000-4 (SIEMENS)
Bipolar Television Tuner IC for Frequency Ranges up to 700 MHz


SDA3202-2
General Purpose Phase Locked Loop Device - VCO tuner combo PLL, I2C Bus








SDA2516 EAROM

Features- Word-organized reprogrammable nonvolatile memory
in n-channel floating-gate technology (E2PROM)
- 128 ´ 8-bit organization
- Supply voltage 5 V
- Serial 2-line bus for data input and output (I2C Bus)
- Reprogramming mode, 10 ms erase/write cycle
- Reprogramming by means of on-chip control (without
external control)
- Check for end of programming process
- Data retention > 10 years
- More than 104 reprogramming cycles per address
- Compatible with SDA 2516. Exception:
Conditions for total erase and current consumption.
I2C Bus Interface
The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits.
It consists of a serial data line SDA and a serial clock line SCL. The data line requires an external
pull-up resistor to VCC (open drain output stage).
The possible operational states of the I2C Bus are shown in figure 1. In the quiescent state, both
lines SDA and SCL are high, i.e. the output stage of the data line is disabled. As long a SCL remains
"1", information changes on the data bus indicate the start or the end of data transfer between two
components.
The transition on SDA from "1" to "0" is a start condition, the transition from "0" to "1" a stop
condition. During a data transfer the information on the data bus will only change while the clock line
SCL is "0". The information on SDA is valid as long as SCL is "1".
In conjunction with an I2C Bus system, the memory component can operate as a receiver and as a
transmitter (slave receiver or slave transmitter). Between a start and stop condition, information is
always transmitted in byte-organized form. Between the trailing edge of the eighth clock pulse and a ninth acknowledge clock pulse, the memory component sets the SDA line to low as a confirmation
of reception, if the chip select conditions have been met. During the output of data, the data output
of the memory is high in impedance during the ninth clock pulse (acknowledge master).
The signal timing required for the operation of the I2C Bus is summarized in figure 2.
Control Functions of the I2C Bus
The memory component is controlled by the controller (master) via the I2C Bus in two operating
modes: read-out cycle, and reprogramming cycle, including erase and write to a memory address.
In both operating modes, the controller, as transmitter, has to provide 3 bytes and an additional
acknowledge clock pulse to the bus after the start condition. During a memory read, at least nine
additional clock pulses are required to accept the data from the memory and the acknowledge
master, before the stop condition may follow. In the case of programming, the active programming
process is only started by the stop condition after data input (see figure 3).
The chip select word contains the 3 chip select bits CS0, CS1 and CS2, thus allowing 8 memory
chips to be connected in parallel. Chip select is achieved when the three control bits logically
correspond to the selected conditions at the select inputs.
Check for End of Programming or Abortion of Programming Process
If the chip is addressed during active reprogramming by entering CS/E, the programming process
is terminated. If, however, it is addressed by entering CS/A, the entry will be ignored. Only after
programming has been terminated will the chip respond to CS/A. This allows the user to check
whether the end of the programming process has been reached (see figure 3).
Memory Read
After the input of the first two control words CS/E and WA, the resetting of the start condition and the
input of a third control word CS/A, the memory is set ready to read. During acknowledge clock
nine, the memory information is transferred in parallel mode to the shift register. Subsequent to the
trailing edge of the acknowledge clock, the data output is low impedance and the first data bit can
be sampled, (see figure 4).
With every shift clock, an additional bit reaches the output. After reading a byte, the internal address
counter is automatically incremented when the master receiver switches the data line to “low” during
the ninth clock (acknowledge master). Any number of memory locations can thus be read one after
the other. At address 128, an overflow to address 0 is not initiated. With the stop condition, the data
output returns to high-impedance mode. The internal sequence control of the memory component
is reset from the read to the quiescent with the stop condition.
Memory Reprogramming
The reprogramming cycle of a memory word comprises an erase and a subsequent write process.
During erase, all eight bits of the selected word are set into "1" state. During write, "0" states are
generated according to the information in the internal data register, i.e. according to the third input
control word.
After the 27th and the last clock of the control word input, the active programming process is started
by the stop condition. The active reprogramming process is executed under onchip control.
The time required for reprogramming depends on component deviation and data patterns.
Therefore, with rated supply voltage, the erase/write process extends over max. 20 ms, or more
typically, 10 ms. In the case of data word input without write request (write request is defined as data
bit in data register set to “0”), the write process is suppressed and the programming time is
shortened. During a subsequent programming of an already erased memory address, the erase
process is suppressed again, so that the reprogramming time is also shortened.




PHILIPS TDA4555 Multistandard decoderGENERAL DESCRIPTION
The TDA4555 and TDA4556 are monolithic integrated
multistandard colour decoders for the PAL, SECAM,
NTSC 3,58 MHz and NTSC 4,43 MHz standards. The
difference between the TDA4555 and TDA4556 is the
polarity of the colour difference output signals (B-Y)
and (R-Y).
Features
Chrominance part
· Gain controlled chrominance amplifier for PAL, SECAM
and NTSC
· ACC rectifier circuits (PAL/NTSC, SECAM)
· Burst blanking (PAL) in front of 64 ms glass delay line
· Chrominance output stage for driving the 64 ms glass
delay line (PAL, SECAM)
· Limiter stages for direct and delayed SECAM signal
· SECAM permutator
Demodulator part
· Flyback blanking incorporated in the two synchronous
demodulators (PAL, NTSC)
· PAL switch
· Internal PAL matrix
· Two quadrature demodulators with external reference
tuned circuits (SECAM)
· Internal filtering of residual carrier
· De-emphasis (SECAM)
· Insertion of reference voltages as achromatic value
(SECAM) in the (B-Y) and (R-Y) colour difference output
stages (blanking)
Identification part
· Automatic standard recognition by sequential inquiry
· Delay for colour-on and scanning-on
· Reliable SECAM identification by PAL priority circuit
· Forced switch-on of a standard
· Four switching voltages for chrominance filters, traps
and crystals
· Two identification circuits for PAL/SECAM (H/2) and
NTSC
· PAL/SECAM flip-flop
· SECAM identification mode switch (horizontal, vertical
or combined horizontal and vertical)
· Crystal oscillator with divider stages and PLL circuitry
(PAL, NTSC) for double colour subcarrier frequency
· HUE control (NTSC)
· Service switchPHILIPS TDA2595 Horizontal combination;


 GENERAL DESCRIPTION
The TDA2595 is a monolithic integrated circuit intended for use in colour television receivers.
Features
• Positive video input; capacitively coupled (source impedance < 200 Ω)
• Adaptive sync separator; slicing level at 50% of sync amplitude
• Internal vertical pulse separator with double slope integrator
• Output stage for vertical sync pulse or composite sync depending on the load; both are switched off at muting
• ϕ1 phase control between horizontal sync and oscillator
• Coincidence detector ϕ3 for automatic time-constant switching; overruled by the VCR switch
• Time-constant switch between two external time-constants or loop-gain; both controlled by the coincidence detector ϕ3
• ϕ1 gating pulse controlled by coincidence detector ϕ3
• Mute circuit depending on TV transmitter identification
• ϕ2 phase control between line flyback and oscillator; the slicing levels for ϕ2 control and horizontal blanking can be set
separately
• Burst keying and horizontal blanking pulse generation, in combination with clamping of the vertical blanking pulse
(three-level sandcastle)
• Horizontal drive output with constant duty cycle inhibited by the protection circuit or the supply voltage sensor
• Detector for too low supply voltage
• Protection circuit for switching off the horizontal drive output continuously if the input voltage is below 4 V or higher
than 8 V
• Line flyback control causing the horizontal blanking level at the sandcastle output continuously in case of a missing
flyback pulse
• Spot-suppressor controlled by the line flyback control




TELEFUNKEN TDA4442 VIDEO IF AMPLIFIER
GENERAL DESCRIPTION:
This video IF processin
g circuit integrates the following
functional blocks : .Three symmetrical, very stable, gain controlled
wideband amplifier stages - without feedback
by a quasi-galvanic coupling. .Demodulator controlled by the picture carrier .Video output amplifier with high supply voltage
rejection .Polarity switch for the video output signal .AGC on peak white level .GatedAGC .Discharge control .Delayed tuner AGC .At VTR Reading mode the video output signal
is at ultra white level.



PHILIPS TDA3505 Video control combination circuit with automatic cut-off controlGENERAL DESCRIPTION
The TDA3505 and TDA3506 are monolithic integrated circuits which perform video control functions in a PAL/SECAM
decoder. The TDA3505 is for negative colour difference signals -(R-Y), -(B-Y) and the TDA3506 is for positive colour
difference signals +(R-Y), +(B-Y).
The required input signals are: luminance and colour difference (negative or positive) and a 3-level sandcastle pulse for
control purposes. Linear RGB signals can be inserted from an external source. RGB output signals are available for
driving the video output stages. The circuits provide automatic cut-off control of the picture tube.
Features
· Capacitive coupling of the colour difference and
luminance input signals with black level clamping in the
input stages
· Linear saturation control acting on the colour difference
signals
· (G-Y) and RGB matrix
· Linear transmission of inserted signals
· Equal black levels for inserted and matrixed signals
· 3 identical channels for the RGB signals
· Linear contrast and brightness controls, operating on
both the inserted and matrixed RGB signals
· Peak beam current limiting input
· Clamping, horizontal and vertical blanking of the three
input signals controlled by a 3-level sandcastle pulse
· 3 DC gain controls for the RGB output signals (white
point adjustment)
· Emitter-follower outputs for driving the RGB output
stages
· Input for automatic cut-off control with compensation for
leakage current of the picture tube.


TDA4565 Colour transient improvement circuit
GENERAL DESCRIPTION
The TDA4565 Is a monolithic integrated circuit for colour transient improvement (CTI) and luminance delay line in gyrator
technique in colour television receivers.
Features
· Colour transient improvement for colour difference signals (R-Y) and (B-Y) with transient detecting-, storage- and
switching stages resulting in high transients of colour difference output signals
· A luminance signal path (Y) which substitutes the conventional Y-delay coil with an integrated Y-delay line
· Switchable delay time from 730 ns to 1000 ns in steps of 90 ns and additional fine adjustment of 50 ns
· Two Y output signals; one of 180 ns less delay.

THOMSON TDA1905 5W AUDIO AMPLIFIER WITH MUTING:

DESCRIPTION
The TDA1905 is a monolithic integrated circuit in POWERDIP package, intended for use as low
frequencypower amplifier in a wide range of appli-
cations in radio and TV sets:
– muting facility
– protectionagainst chip over temperature
– very lownoise
– high supply voltagerejection
– low ”switch-on” noise
– voltagerange 4V to 30V

The TDA 1905 is assembled in a newplasticpack-
age,thePOWERDIP,thatoffersthesameassembly
ease,spaceandcost savingof a normaldual in-line
packagebutwithapowerdissipationofupto6Wand
a thermalresistance of 15°C/W (junction to pins).

 THERMAL SHUT-DOWN
The presence of a thermallimiting circuit offers the followingadvantages:
1) Anoverloadon theoutput(even if itis permanent),oran abovelimitambienttemperaturecanbeeasily
tolerated since the Tj cannot be higher than 150 °C.
2) The heatsinkcan havea smallerfactor of safety comparedwith that of a conventionalcircuit. There is
no possibility of device damage due to high junction temperature.
Ifforanyreason,thejunctiontemperatureincreasesupto150°C,thethermalshut-downsimplyreduces
the power dissipationand the current consumption.
The maximum allowable power dissipationdependsupon the size of the externalheatsink(i.e. its thermal
resistance);


PHILIPS  TDA8442  I2C-bus interface for colour  decoders,

GENERAL DESCRIPTION
The TDA8442 provides control of four analogue functions
and has one high-current and two switching outputs.
Control of the IC is performed via the two-line, bidirectional
I2C-bus.
Features
• Four analogue control outputs
• One high-current output port (npn open emitter)
• Two switching output ports (npn collector with internal
pull-up resistor)
• I2C-bus slave receiver
• Power-down reset.
PACKAGE OUTLINE
16-lead DIL; plastic (SOT38); SOT38-1;

FUNCTIONAL DESCRIPTION
Control
Analogue control is facilitated by four 6-bit digital-to-analogue converters (DAC0 to DAC3).
The values of the output voltages from the DACs are set via the I2C-bus.
The high-current output port (P1) is suitable for switching between internal and external RGB signals.
It is an open npn emitter output capable of sourcing 14 mA (min.).
The two output ports (P2 and P2N) can be used for NTSC/PAL switching. These are npn collector outputs with internal
pull-up resistors of 10 kΩ (typ.). Both outputs are capable of sinking up to 2 mA with a voltage drop of less than 400 mV.
If one output is switched on (LOW), the other output is switched off, and vice versa.
Reset
The power-down-reset mode occurs whenever the positive supply voltage falls below 8.5 V (typ.) and resets all registers
to a defined state.