PHILIPS 14PT135A/00 PHILETTA CHASSIS ANUBIS A S Switched-mode self oscillating supply voltage circuit:POWER SUPPLY (PHILIPS SOPS - Self Oscillating Power Supply)A switched-mode self-oscillating supply voltage circuit for converting an input voltage into an output d.c. voltage which is substantially independent of variations of the input voltage and/or a load connected to the output voltage. The circuit comprises a first controllable switch connected in series with a transformer winding and a second controllable switch for turning-off the first switch. The conduction period of the first switch is controlled by means of a control voltage present on a control electrode of the second switch. The circuit can be switched-over to a stand-up state in which the energy supplied to the load is reduced to zero. A starting network is connected between the input voltage and the second switch so that the current therein flows through the second switch during the period of time this switch conducts and does not flow to the control electode of the first switch in the stand-by state.
1. A switched-mode
self-oscillating supply voltage circuit for converting an input voltage
into an output d.c. voltage which is substantially independent of
variations of the input voltage and/or of a load connected to the
terminals of the output voltage, comprising a transformer having a
primary and a feedback winding, a first controllable switch connected
in series with the primary winding, the series arrangement thus formed
being coupled between terminals for the input voltage, a second
controllable switch coupled via a turn-off capacitor to the control
electrode of the first switch to turn it off, means coupling the
feedback winding to said control electrode, a transformer winding being
coupled via a rectifier to an output capacitor having terminals which
supply the output voltage, an output voltage-dependent control voltage
being present on a control electrode of the second switch for
controlling the conduction period of the first switch, the circuit
being switchable between an operating state and a stand-by state in
which relative to the operating state the supply energy supplied to the
load is considerably reduced, a starting network connected to a
terminal for the input voltage, means for adjusting the control voltage
in the stand-by state to a value at which the first controllable
switch is cut-off, a connection which carries current during the
conduction period for the second controllable switch being provided
between the starting network and said second switch, and means
providing a connection between the starting network and the control
electrode of the first switch, which connection does not carry current
in the stand-by state.2. A supply voltage circuit as claimed in claim 1, further comprising a resistor included between the connection of the starting network to the second switch and a turn-off capacitor present in the connection to the control electrode of the first switch.
3. A supply voltage circuit as claimed in claim 2, characterized in that the second controllable switch comprises a thyristor having a main current path included in the control electrode connection of the first controllable switch, said thyristor having a first control gate electrode for adjusting the turn-off instant of the first switch and a second control electrode to which the starting network and the resistor are connected.
4. A supply voltage circuit as claimed in claim 1, characterized in that a resistor is included in the connection to the control electrode of the second controllable switch so that a current flows through said resistor in the stand-by state of a value sufficient to cut-off the first controllable switch.
Description:
The
invention relates to a switched-mode self-oscillating supply voltage
circuit for converting an input voltage into an output d.c. voltage
which is substantially independent
of variations of the input voltage and/or of a load connected to the
terminals of the output voltage. This circuit comprises a transformer
having a primary and a feedback winding and a first controllable switch
arranged in series with the primary winding. The series arrangement
thus formed is coupled between the terminals of the input voltage. A
second controllable switch which is coupled via a turnoff capacitor to
the control electrode of the first switch to turn it off. The feedback
winding is coupled to this control electrode and the primary winding is
coupled via a rectifier to an output capacitor the terminals of which
are the terminals for the output voltage. An output voltage-dependent
control voltage is present on a control electrode of the second switch
for controlling the conduction period of the first switch. The circuit
is switchable between an operating state and a stand-by state in which
relative to the operating state the energy supplied to the load is
considerably reduced, and the circuit further comprises a starting
network connected to a terminal for the input voltage. Such a supply voltage circuit is disclosed in German Patent Application No. 2,651,196. With this prior art circuit supply energy can be applied in the operating state to the different portions of a television receiver. In the stand-by state the majority of the output voltages of the circuit are so low that the receiver is substantially in the switched-off condition. In the prior art circuit the starting network is formed by a resistor connected to the unstabilized input voltage and through which on turn-on of the circuit a current flows via the feedback winding to the control electrode of the first controllable switch, which is a switching transistor, and brings it to and maintains it in the conductive state, as a result of which the circuit can start.
In the stand-by state the transistor is non-conducting in a large part of the period of the generated oscillation so that little energy is stored in the transformer. However, the starting resistor is connected via a diode to the second controllable switch, which is a thyristor. As the sum of the voltages across these elements is higher than the base-emitter threshold voltage of the transistor, the diode and the thyristor cannot simultaneously carry current. This implies that current flows through the starting resistor to the base of the transistor via the feedback winding after a capacitor connected to the feedback winding has been charged.
The invention has for its object to provide an improved circuit of the same type in which in the stand-by state the supply energy applied to the load is reduced to
zero. The prior art circuit cannot be improved in this respect without
the use of mechanical switches, for example relays. According to the
invention, the switched-mode self-oscillating supply voltage circuit
does not comprise such relays and is characterized in that it further
comprises means for adjusting the control voltage in the stand-by state
to a value at which the first controllable switch is cut-off. A
connection which carries current during the conduction period of the
second controllable switch is provided between the starting network and
said second switch while a connection present between the starting
network and the control electrode of the first switch does not carry
current in the stand-by state. 
The invention is based on the recognition that the prior art supply voltage circuit cannot oscillate, so that the energy supplied by it is zero, if the control voltage obtains a value as referred to, while the starting network is connected in such a manner that in the stand-by state no current can flow through it to the control electrode of the first controllable switch.
It should be noted that in the said German Patent Application the starting network is in the form of a resistor which is connected to an unstabilized input d.c. voltage. It is, however, known, for example, from German Patent Specification No. 2,417,628 to employ for this purpose a rectifier network connected to an a.c. voltage from which the said input d.c. voltage is derived by rectification.
The self-oscillating supply circuit shown in the FIGURE comprises a npn-switching transistor Tr1 having its collector connected to the primary winding L1 of a transformer T, while the emitter is connected to ground via a small resistor R1, for example 1.5 Ohm. Resistor R1 is decoupled for the high frequencies by means of a 150 nF capacitor C1. One end of winding L1 is connected to a conductor which carries an unstabilized input d.c. voltage V B of, for example, 300 V. Voltage V B has a negative rail connected to ground and is derived from the electric power supply by rectification. One end of a feedback winding L2 is connected to the base of transistor Tr1 via the parallel arrangement of a small inductance L3 and a damping resistor R2. A terminal of a 47 μF capacitor C2 is connected to the junction of the elements L2, L3 and R2. The series arrangement of a diode D1 and a 2.2 Ohm-limiting resistor R3 is arranged between the other terminal of capacitor C2 and the
other end of winding L2 and the series arrangement
of a resistor R4 of 12 Ohm and a diode D2 is arranged between the same
end of winding L2 and the emitter of transistor Tr1. A 150 nF
capacitor C3 is connected in parallel with diode D2. The anode of diode
D1 is connected to that end of winding L2 which is not connected to
capacitor C2, while the anode of diode D2 is connected to the emitter
of transistor Tr1. In the FIGURE the winding sense of windings L1 and
L2 is indicated by means of dots. The junction of capacitor C2 and resistor R3 is connected to a 100 Ohm resistor R5 and to the emitter of a pnp-transistor Tr2. The base of transistor Tr2 is connected to the other terminal of resistor R5 and to the collector of an npn-transistor Tr3, whose emitter is connected to ground. The base of Tr3 is connected to the collector of transistor Tr2. Transistors Tr2 and Tr3 form an artificial thyristor, i.e. a controllable diode whose anode is the emitter of transistor Tr2 while the cathode is the emitter of transistor Tr3. The base of transistor Tr2 is the anode gate and the base of transistor Tr3 is the cathode gate of the thyristor formed. Between the last-mentioned base and the emitter of transistor Tr1 there is arranged the series network of a 2.2 kOhm resistor R6 with the parallel arrangement of a 2.2 kOhm resistor R7 and a 100 μF capacitor C4. The series arrangement of a diode D11 and a 220 Ohm limiting resistor R19 is arranged between the junction of components R6, R7 and C4 and the junction of components C2, L2, R2 and L3. The cathode of diode D11 is connected to capacitor C2.
Because
of the feedback the described circuit oscillates independently as soon
as the steady state is achieved. It will be described hereinafter how
this state is obtained. During the time transistor Tr1 conducts the
current flowing through the resistor R1 increases linearly. The resistor
R4 then partly determines the base current of transistor Tr1.
Capacitor C4 and resistor R7 form a voltage source the voltage of which
is subtracted from the voltage drop across resistor R1. As soon as the
voltage on the base of transistor Tr3 is equal to approximately 0.7 V
this transistor becomes conductive, as a result of which the thyristor
formed by transistors Tr2 and Tr3 becomes rapidly conductive and
remains so. Across capacitor C2 there is a negative voltage by means of
which transistor Tr1 is turned off. The inverse base current thereof
flows through thyristor Tr2, Tr3. This causes charge to be withdrawn
from capacitor C2, while the charge carriers stored in transistor Tr1
are removed with the aid of inductance L3. As soon as the collector
current of transistor Tr1 has been turned off, the voltage across
winding L2 reverses its polarity, which current recharges the
capacitor. Now the voltage at the junction of components C2, R3 and R5
is negative, causing thyristor Tr2, Tr3 to extinguish. Secondary windings L4, L5 and L6 are provided on the core of transformer T with the indicated winding senses. When transistor Tr1 is turned off, a current which recharges a smoothing capacitor C5, C6 or C7 via a rectifier D3, D4 or D5 flows through each of these windings. The voltages across these capacitors are the output voltages of the supply circuit for loads connectable thereto. These loads, which are not shown in the FIGURE, are, for example, portions of a television receiver.
In parallel with winding L1 there is the series network of a 2.2 nF tuning capacitor C8 and a 100 Ohm limiting resistor R8. The anode of a diode D6 is connected to the junction of components R8 and C8, while the cathode is connected to the other terminal of resi
stor R8. Winding
L1 and capacitor C8 form a resonant circuit across which an oscillation
is produced after windings L4, L5 and L6 have become currentless. At a
later instant the current through circuit L1, C8 reverses its
direction. As a result thereof a current is generated in winding L2
which flows via diode D2 and resistor R4 to the base of transistor Tr1
and makes this transistor conductive and maintains it in this state.
The dissipation in resistor R8 is reduced by means of diode D6. A
clamping network formed by the parallel arrangement of a 22 kOhm
resistor R9 and a 120 nF capacitor C9 is arranged in series with a
diode D7. This whole assembly is in parallel with winding L1 and
cuts-off parasitic oscillations which would be produced during the
period of time in which transistor Tr1 is non-conductive. The output
voltages of the supply circuit are kept substantially constant in spite
of variations of voltage V B and/or the loads, thanks to a
control of the turning-on instant of thyrisistor Tr2, Tr3. For this
purpose the emitter of a light-sensitive transistor Tr4 is connected to
the base of transistor Tr3. The collector of transistor Tr4 is
connected via a resistor R10 to the conductor which carries the voltage
V B and to a Zener diode Z1 which has a positive voltage
of approximately 7.5 V, while the base is unconnected. The other end of
diode Z1 is connected to ground. A light-emitting diode D8, whose
cathode is connected to the collector of an npn-transistor Tr5, is
optically coupled to transistor Tr4. By means of a potentiometer R11
the base of transistor Tr5 can be adjusted to a d.c. voltage which is
derived from the voltage V 0 of approximately 130 V across capacitor C6. The anode of diode D8 is connected to a d.c. voltage V 1 of approximately 13 V. A resistor R12 is also connected to voltage V 1 ,
the other end of the resistor being connected to the emitter of
transistor Tr5, to the cathode of a Zener diode Z2 which has a voltage
of approximately 7.5 V and to a smoothing capacitor C10. The other ends
of diode Z2 and capacitor C10 are connected to ground. Voltage V1 can
be generated by means of a transformer connected to the electric AC
supply and a rectifier, which are not shown for the sake of simplicity,
more specifically for a remote control to which constantly supply
energy is always applied, even when the majority of the components of
the receiver in what is referred to as the stand-by state are not
supplied with supply energy. A portion of voltage V 0 is compared with the voltage of diode Z2 by means of transistor Tr5. The measured difference determines the collector current of transistor Tr5 and consequently the emitter current of transistor Tr4. This emitter current produces across resistor R6 a voltage drop whose polarity is the opposite of the polarity of the voltage source formed by resistor R7 and capacitor C4. Under the influence of this voltage drop the turn-on instant of thyristor Tr2, Tr3 is controlled as a function of voltage V 0 . If, for example, voltage V 0 tends to decrease owing to an increasing load thereon and/or in response to a decrease in voltage V B , then the collector current of transistor Tr5 decreases and consequently also the said voltage drop. Thyristor Tr2, Tr3 is turned on at a later instant than would otherwise be the case, causing transistor Tr1 to be cut-off at a later instant. The final value of the collector current of this transistor is consequently higher. Consequently, the ratio of the time interval in which transistor Tr1 is conductive to the entire period, commonly referred to as the duty cycle, increases, while the frequency decreases.
ontinues to conduct. This conduction time is predominantly
determined by the values of capacitor C7, resistor R14 and a resistor
R15 connected between the base and the emitter of transistor Tr6. A
thyristor is advantageously used here to render it possible to switch
off a large current even with a low level signal and to obtain the
required hysteresis. The circuit comprises a 1 MOhm starting resistor R16, one end of which is connected to the base of transistor Tr2 and the other end to the conductor which carries the voltage V B . Upon turn-on of the circuit current flows through resistors R16 and R5 and through capacitor C2, which has as yet no charge, to the base of transistor Tr1. The voltage drop thus produced across resistor R5 keeps transistor Tr2, and consequently also transistor Tr3, in the non-conductive state, while transistor Tr1 is made conductive and is maintained so by this current. Current also flows through winding L2. In this manner the circuit can start as energy is built up in transformer T.
ent of transistor Tr4 be sufficiently large in all
circumstances, which implies that the voltage drop produced across
resistor R6 by this current is always higher than the sum of the voltage
across voltage source R7, C4, of the base-emitter threshold voltage of
transistor Tr3 in the conductive state thereof, and of the voltage at
the emitter of transistor Tr1. So the said voltage drop must be higher
than the sum of the first two voltages, which corresponds to the worst
dimensioning case in which the stand-by state is initiated while
transistor Tr1 is in the non-conductive state. If thyristor Tr2, Tr3 conducts, either in the operating state or in the stand-by state, current flows through resistor R16 via the collector emitter path of transistor Tr3 to ground. This current is too small to have any appreciable influence on the behaviour of the circuit. W
hen
thyristor Tr2, Tr3 does not conduct, the voltage on the left hand
terminal of capacitor C2 is equal to approximately 1 V, while the
voltage across the capacitor is approximately -4 V. So transistor Tr1
remains in the non-conductive state and a premature turn-on thereof
cannot occur. If in the operating state transistor Tr1 conducts while
thyristor Tr2, Tr3 is cut-off, then the current flows through resistor
R16 in the same manner as it flows during the start to the base of
transistor Tr1, but has relatively little influence as the base current
caused by the energy stored in winding L2 is many times larger. If
both transistor Tr1 and thyristor Tr2, Tr3 are non-conductive, then the
current through resistor R16 flows through components R5, C2, L2, R4,
C3 and R1. In this stand-by state capacitor C2 has indeed substantially
no negative charge any longer but, in spite thereof, transistor Tr1
cannot become conductive since no current flows to its base. It will
furthermore be noted that the circuit is protected in the event that
thyristor Tr2, Tr3 has an interruption. Namely, in such a case the
circuit cannot start. 
PHILIPS TDA3504 Video control combination circuit:
The TDA3504 is an integrated circuit which performs video
control functions in a PAL/SECAM decoder for negative
colour difference signals −(R−Y) and −(B−Y).
The required input signals are luminance and colour
difference and a 3-level sandcastle pulse for control
purposes. Linear RGB signals can be inserted from an
external source. RGB output signals are available for
driving the video output stages.
FEATURES
• Capacitive coupling of the colour difference and
luminance input signals with black level clamping in the
input stages
• Linear saturation control acting on the colour difference
signals
• (G−Y) and RGB matrix
• Linear transmission of inserted signals
• Equal black levels for inserted and matrixed signals
• 3 identical channels for the RGB signals
• Linear contrast and brightness controls, operating on
both the inserted and matrixed RGB signals
• Clamping, horizontal and vertical blanking of the three
input signals controlled by a 3-level sandcastle pulse
• Emitter-follower outputs for driving the RGB output
stages.
PHILIPS TDA4504B Small signal combination for multistandard colour TV:
GENE
RAL DESCRIPTIONHaving the capability to demodulate IF signals with either
positive or negative-going video information, the
TDA4504B (Fig.1) is contained within a 32 pin
encapsulation. It includes a three-stage vision IF amplifier,
mute circuit, AFC and AGC circuitry, fully synchronised
horizontal and vertical timebases with drive circuits and
integral three-level sandcastle pulse generator.
A functional colour tv receiver can thus be realized with the
addition of a tuner, audio demodulator and amplifier,
chroma decoder and respective line and field deflection
circuitry.
FEATURES
• Gain controlled vision IF amplifier
• Synchronous demodulator for negative and positive
demodulation
• AGC detector operating on peak sync amplitude for
negative demodulation and on peak white level for
positive demodulation
• Tuner AGC
• AFC circuit with two control polarities and on/off-switch
• Video preamplifier
• Video switch to select either the internal video signal or
an external video signal
• Horizontal oscillator and synchronization circuit with two
control loops
• Vertical synchronization (divider system), ramp
generator and driver with automatic amplitude
adjustment for 50 and 60 Hz
• Transmitter identification (mute)
• Sandcastle pulse generation
• VCR/auto VCR switch
• Start-up circuit
• Vertical guard.
PHILIPS TDA4504B FUNCTIONAL DESCRIPTION
Vision IF amplifier, demodulator
and video amplifier
Each of the three AC-coupled IF
stages permit the omission of DC
feedback
and possess a controlrange in excess of 20 dB.
The IF amplifier, which is completely
symmetrical, is followed by a passive
synchronous demodulator providing a
regenerated carrier signal. This is
limited by a logarithmic limiter circuit
prior to its application to the
demodulator.
A noise clamp circuit is provided at
the video input (pin 16) to limit
interference pulses below the sync tip
level and is more efficient than a
noise inverter in providing improved
picture stability during the presence of
interference.
The video amplifier has good linearity
and bandwidth figures.
AFC-circuit
Obtaining the AFC reference signal
from the demodulator tuned circuit
presents the advantage of utilizing a
single tuned circuit and one
adjustment. However, since the
frequency spectrum of the signal
applied to the demodulator is
determined by the characteristic of
the SAW filter, the resultant
asymmetrical spectrum with respect
to the vision carrier causes the AFC
output voltage to be dependent upon
the video signal. The TDA4504B thus
contains a sample-and-hold circuit.
With negative-going vision signals the
AFC is active only during the sync
pulse period. When positive-going
signals are applied to the device,
however, the AFC is continuously
active but filtered to ensure only a
small by-pass current is present in the
sample-and-hold circuit.
With weak input signals the drive
signal will contain considerable noise
which also possesses an
asymmetrical frequency spectrum
and could create an offset in the AFC
output voltage. The inclusion of a
notch in the demodulator tuned circuit
minimises this effect.
The sample-and-hold circuit is
followed by a high impedance output
amplifier. Thus the AFC control
gradient depends upon the load
impedance.
The AFC polarity switch is combined
with the start circuit (pin 12). It has a
negative slope when pin 12 is open or
connected to the main supply and a
positive slo
pe when pin 12 isgrounded. The AFC is disabled when
the sample connection (pin 22) is
grounded.
AGC circuit
For signals employing negative modulation the AGC detector operates on peak sync level but upon peak white content with those having positive modulation. Selection is facilitated by the system switch (pin 32):
The AGC detector currents are:
With a 6.8 µF AGC capacitor, the video tilt will be < 10% for positively modulated signals and < 2% for negative modulation.
To obtain a rapid AGC action when executing a search tuning operation with the circuit set for peak white AGC, the charge current is held at 55 µA until the detection of a transmitted signal.
The transmitter identification
A mute signal is generated to disable the audio preamplifier of an audio demodulator during the absence of a transmission signal. When the video switch is in the internal mode, the identification of a transmitted signal is derived from the coincidence detector.
In the external mode the IF part of the circuit has its own identification system. The system relies upon the detection of sync. pulses on the incoming IF signal. The separated horizontal sync pulse charges the capacitor on pin 25 which drives the mute output (pin 14).
The connection of a 1 MΩ resistor between pin 25 and VCC results in the mute information being overruled by the 50/60 Hz information derived from the internal vertical divider section
50/60 Hz Information
In the external video mode and with a resistor of 1 MΩ from pin 25 to VCC the mute is overruled by the 50/60 Hz information from the divider system.
VCR switch Flywheel horizontal synchronization is desirable when receiving weak signals marred by noise but is usually unnecessary when receiving stronger off-air signals unless certain types of interference or multipath reception are apparent. Due to the inherent instability of VCR signals, however, the horizontal time constant should be shorter to prevent loss of horizontal synchronization in the early part of the scan. Provision is therefore incorporated to automatically switch the short time constant such that a strong signal instigates the 'VCR' mode and a weak signal triggers the 'TV' mode.
The connection of a switch to pin 17 provides for this to be accomplished manually and may take the form of an auxiliary switching function associated with a designated program selector button.
Video-switch
Video output from the demodulator is filtered to remove the audio carrier and DC-coupled to pin 16. If AC-coupling is employed the internal noise clamp will operate on sync. tips.
The TDA4504B provides the opportunity for a direct video connection (e.g. via a peritel connector) to be made to the device at pin 13. Selection between internal and external video is made by applying a switching potential to pin 18.Gain reduction
To prevent crosstalk between the IF stages and the horizontal oscillator when the device is operated in its external video mode with no RF input, the TDA4504B incorporates an option to reduce IF gain by 20 dB. This is accomplished by connecting a 39 kΩ resistor between pin 17 and ground. Omission of this component results in th e IF amplifier remaining at full gain.
In the internal video mode the resistor must be disconnected to achieve the auto-VCR mode.
Horizontal synchronization
The horizontal synchronization circuit
of the TDA4504B has been designed
as follows:
• The retrace of the horizontal
oscillator occurs during the
horizontal retrace and not during
the scan period. This has the
advantage that no interference will
be visible on the screen when
receiving weak input signals. Video
crosstalk will not disturb the phase
of the horizontal locking.
• Reduced frequency shift of the
horizontal oscillator due to noise
since the horizontal phase detector
reference signal is more
symmetrical and independent of
the supply voltage and
temperature.
• The phase detector current ratio for
strong and weak signals is
increased to obtain a better
performance during both VCR
playback and weak signal
reception. The switching level is
also independent of temperature
and supply voltage.
Vertical synchronization
Generation of the vertical sawtooth
(pin 3) is accomplished by a divider
that permits the production of a
vertical frequency of either 50 Hz or
60 Hz with freedom from adjustment,
amplitude correction and maximum
interference/disturbance protection.
A discriminator window checks the
vertical trigger pulse. When the
trigger pulse occurs before count 576,
the divider system operates in the
60 Hz mode otherwise the 50 Hz
mode is selected. (2 clock pulses
equal one horizontal line).
The divider section operates with
different reset windows. These
windows are activated via an up/down
counter. This increases its count by 1
for each occasion the separated
vertical sync pulse is within the
selected window. On each occasion
the vertical sync. pulse is not within
the selected window, the count is
reduced by 1.
LARGE (SEARCH) WINDOW; DIVIDER
RATIO BETWEEN 488 - 722
This mode is valid for the following
conditions:
1
divider locking to another
transmitter
2
divider ratio found, not within
the narrow window limits
3
up/down counter value of the
divider system operating in
narrow window mode, count
falls below 10.
NARROW WINDOW; DIVIDER RATIO
BETWEEN 522 - 528 (60 HZ) OR 622 -
628 (50 HZ)
The divider switches to this mode
when the up/down counter has
reached its maximum value of 15
approved vertical sync pulses. When
the divider operates in this mode and
a vertical sync pulse is missing within
the window, the divider is reset at the
end of the window and the count
lowered by 1. At a counter value
below 10, the divider switches to the
large window mode.
An anti-top flutter pulse is also
generated by the divider system. This
inhibits the horizontal phase-1
detector during the vertical sync
pulse. The width of this pulse
depends upon the divider mode. For
the large window mode the start is
generated at the divider reset. In the
narrow window mode the anti-top
flutter pulse starts at the beginning of
the first equalizing pulse. The anti-top
flutter pulse ends at count 10 for 50
Hz and count 12 for 60 Hz.
When out-of-sync is detected by the
coincidence detector, the divider is
switched to count 625. This results in
a stable vertical amplitude when no
input signal is available.
PHILIPS TDA4510 PAL decoder:
GEN
ERAL DESCRIPTIONThe TDA4510 is a colour decoder for the PAL standard, which is pin sequent compatible with multistandard decoder
TDA4555 and also pin compatible with NTSC decoder TDA4570. It incorporates the following functions:
Chrominance part
• Gain controlled chrominance amplifier with operating point control stage
• Chrominance output stage for driving the 64 µs delay line
• Blanking circuit for the colour burst signal
• Automatic chrominance control (ACC) with sampled rectifier during burst-key
Oscillator and control voltage part
• Reference oscillator for double subcarrier frequency
• Gated phase comparison
• Identification demodulator and automatic colour killer
• Sandcastle pulse detector
• Service switch
Demodulator part
• Two synchronous demodulators for the (B-Y) and (R-Y) signals
• PAL flip-flop and PAL switch
• Colour switching stages
• Separate colour switching output
• (B-Y) and (R-Y) signal output stages
• Internal filtering of residual carrier.
FUNCTIONAL DESCRIPTION
DIVIDER STAGES
The divider stages provide −(R-Y) and −(B-Y) reference signals with the correct 90 degrees relation for the demodulators.
PHASE COMPARATOR
The phase comparator compares the −(R-Y) reference signal with the burst pulse and controls the frequency and phase
of the reference oscillator.
IDENTIFICATION DEMODULATOR
The identification demodulator delivers a positive going identification signal for PAL-signals at pin 14, also used for the
automatic colour-killer.
SERVICE SWITCH
The service switch has two functions. The first position (V14-3< 1 V) allows the adjustment of the reference oscillator.
Therefore the colour is switched on and the burst for the oscillator PLL is switched off. The second position (V14-3> 5 V)
switches the colour on and the output signals can be observed.
SANDCASTLE PULSE DETECTOR
Sandcastle pulse detector for burst-gate, line and blanking (horizontal and vertical) pulse detection. The vertical part of
the sandcastle pulse is needed for the internal colour-on and colour-off delay.
PULSE PROCESSING PART
Pulse processing part which shall prevent a premature switching on of the colour. The colour-on delay, two or three field
periods after identification of the PAL signal, is achieved by a counter. The colour is switched off immediately or at the
latest one field period after disappearance of the identification voltage.
TDA3843 Sound-IF circuit for TV AM-sound standard L and L’:
GENERAL DESCRIPTION
The TDA3843 performs the AM-sound demodulation for the L- and L’-standard.
Features
• 5 to 8 V power supply and an alternative 12 V power supply
• Low power consumption (200 mW) at 5 V supply voltage
• New AC-coupled wideband IF-amplifier (high dynamic ranges, less intermodulation)
• In-phase wideband AM demodulator without external reference circuit
• Reduced THD figures even for low AF frequencies (typical 1%)
• Stabilizer circuit for ripple rejection and constant output signals
• All pins are ESD protected.
PHILIPS TDA3827 TV-sound demodulator circuit with SCART switches and AF control:GENERAL DESCRIPTION
The TDA3827 contains a single FM
demodulator with SCART switches, a
mute function and volume control.
FEATURES
• Wide supply voltage range from
4.5 V to 13.2 V
• Wide frequency range from 4 to
12 MHz
• High ripple rejection
• High precision and temperature
compensated FM-demodulator
output
• Multiple-input AF operational
amplifiers with offset compensation
• SCART AF input / AF output (low
impedance)
• External AF input
• High-level AF output voltage with
low distortion
• External selection of the source
selector AF gain
• Low switching noise between AF
and mute
• Wide volume-control range.
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