The tuning circuits has a large knob potentiometers tuning system which use voltage controlled capacitances such as varactor diodes as the frequency determining elements.
How AFC Circuit Works in B/W Analog Television Receiver:

If the tuning is not correct then the discriminator output is not zero and if this output is applied to change the reverse bias on a tuning diode mounted in the oscillator section of the u.h.f. tuner it will correct most of the error. Tuning, varicap or varactor diodes-to give them a few of their names-are junction diodes normally operated with reverse bias but not sufficient to bias them into the breakdown region in which zener diodes operate. The greater the reverse bias the lower their capacitance: a typical curve, for the PHILIPS BB105 or STC BA141 tuning diode, is shown in Fig. 2. All diodes e

Basic AFC System
To return to our TV set, if the oscillator frequency is too high then the vision carrier frequency will also be too high and in the simple arrangement shown in Fig. 3 the discriminator will give a negative signal to decrease the bias on the tuning diode thus increasing its

AFC Loop Gain:
The amount by which the error is reduced depends on the gain of the circuit. An estimate of the gain required must first be made by guessing how much error is likely to be given by your push -buttons or hand tuning: 1MHz would be an outside figure as a tuning error of that magnitude would produce a very bad picture of low definition in one direction and badly broken up in the other. This error should be reduced to

EXAMPLE of Circuit Description:
The driver stage Tr1 takes a small sample signal from the i.f. strip but this should be large enough to drive Tr1 into saturation. That is to say Tr1 is a limiter stage so that the signal amplitude applied to the discriminator coil L2 stays constant over the normal range of signal levels. Trl is biased at approximately 7mA which, according to the original report ("Simple a.f.c. system for 625 -line TV receivers" by P. Bissmire, PHILIPS Technical Communications, March, 1970), gives the best limiting performance. C1, R

The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the developed apparates both tubes or transistors.
Therefore a stable AFC circuit is developed:
Power supply is realized with mains transformer and Linear transistorized power supply stabilizer, A DC power supply apparatus includes a rectifier circuit which rectifies an input commercial AC voltage. The rectifier output voltage is smoothed in a smoothing capacitor. Voltage stabilization is provided in the stabilizing circuits by the use of Zener diode circuits to provide biasing to control the collector-emitter paths of respective transistors.A linear regulator circuit according to an embodiment of the present invention has an input node receiving an unregulated voltage and an output node providing a regulated voltage. The linear regulator circuit includes a voltage regulator, a bias circuit, and a current control device.
In one embodiment, the current control device is implemented as an NPN bipolar junction transistor (BJT) having a collector electrode forming the input node of the linear regulator circuit, an emitter electrode coupled to the input of the voltage regulator, and a base electrode coupled to the second terminal of the bias circuit. A first capacitor may be coupled between the input and reference terminals of the voltage regulator and a second capacitor may be coupled between the output and reference terminals of the voltage regulator. The voltage regulator may be implemented as known to those skilled in the art, such as an LDO or non-LDO 3-terminal regulator or the like.
The bias circuit may include a bias device and a current source. The bias device has a first terminal coupled to the output terminal of the voltage regulator and a second terminal coupled to the control electrode of the current control device. The current source has an input coupled to the first current electrode of the current control device and an output coupled to the second terminal of the bias device. A capacitor may be coupled between the first and second terminals of the bias device.

circuits designed for use in TV vertical deflection systems. They are manufactured using
the Fairchild Planar* process.
Both devices are supplied in the 12-pin plastic power package with the heat sink fins bent
for insertion into the printed circuit board.
The TDA1170 is designed primarily for large and small screen black and white TV
receivers and industrial TV monitors. The TDA1270 is designed primarily for driving
complementary vertical deflection output stages in color TV receivers and industrial
monitors.
APPLICATION INFORMATION (TDA1170)
The vertical oscillator is directly synchronized by the sync pulses (positive or negative); therefore its free
running frequency must be lower than the sync frequency. The use of current feedback causes the yoke
current to be independent of yoke resistance variations due to thermal effects, Therefore no thermistor is
required in series with the yoke. The flyback generator applies a voltage, about twice the supply voltage, to
the yoke. This produces a short flyback time together with a high useful power to dissipated power
ratio.

The basic essentials of a transistor line output stage are shown in Fig. 1(a). They comprise: a line output transformer which provides the d.c. feed to the line output transistor and serves mainly to generate the high -voltage pulse from which the e.h.t. is derived, and also in practice other supplies for various sections of the receiver; the line output transistor and its parallel efficiency diode which form a bidirectional switch; a tuning capacitor which resonates with the line output transformer primary winding and the scan coils to determine the flyback time; and the scan coils, with a series capacitor which provides a d.c. block and also serves to provide slight integration of the deflection current to compensate for the scan distortion that would otherwise be present due to the use of flat screen, wide deflection angle c.r.t.s. This basic circuit is widely used in small -screen portable receivers with little elaboration - some use a pnp output transistor however, with its collector connected to chassis.
Circuit Variations:
Variations to the basic circuit commonly found include: transposition of the scan coils and the correction capacitor; connection of the line output transformer primary winding and its e.h.t. overwinding in series; connection of the deflection components to a tap on the transformer to obtain correct matching of the components and conditions in the stage; use of a boost diode which operates in identical manner to the arrangement used in valve line output stages, thereby increasing the effective supply to the stage; omission of the efficiency diode where the stage is operated from an h.t. line, the collector -base junction of the line output transistor then providing the efficiency diode action without, in doing so, producing scan distortion; addition of inductors to provide linearity and width adjustment; use of a pair of series -connected line output transistors in some large -screen colour chassis; and in colour sets the addition of line convergence circuitry which is normally connected in series between the line scan coils and chassis. These variations on the basic circuit do not alter the basic mode of operation however.
Resonance

The most important fact to appreciate about the circuit is that when the transistor and diode are cut off during the flyback period - when the beam is being rapidly returned from the right-hand side of the screen to the left-hand side the tuning capacitor together with the scan coils and the primary winding of the line output transformer form a parallel resonant circuit: the equivalent circuit is shown in Fig. 1(b). The line output transformer primary winding and the tuning capacitor as drawn in Fig. 1(a) may look like a series tuned circuit, but from the signal point of view the end of the transformer primary winding connected to the power supply is earthy, giving the equivalent arrangement shown in Fig. 1(b).
The Flyback Period:
Since the operation of the circuit depends mainly upon what happens during the line flyback period, the simplest point at which to break into the scanning cycle is at the end of the forward scan, i.e. with the


Energy Recovery:
First Part of Forward Scan The circuit then tries to continue the cycle of oscillation, i.e. the magnetic fields again collapse, maintaining a current flow which this time would charge the tuning capacitor negatively (upper plate). When the voltage at A reaches about -0.6V however the efficiency diode becomes forward biased and switches on. This damps the circuit, preventing further oscillation, but the magnetic fields continue to collapse and in doing so produce a linearly decaying current flow which provides the first part of the forward s


Efficiency:
The transistor is then cut off again, to give the flyback, and the cycle of events recurs. The efficiency of the circuit is high since there is negligible resistance present. Energy is fed into the circuit in the form of the magnetic fields that build up when the output transistor is switched on. This action connects the line output transformer primary winding across the supply, and as a result a linearly increasing current flows through it. Since the width is
dependent on the supply voltage, this must be stabilised.
Harmonic Tuning:
There is another oscillatory action in the circuit during the flyback period. The considerable leakage inductance between the primary and the e.h.t. windings of the line output transformer, and the appreciable self -capacitance present, form a tuned circuit which is shocked into oscillation by the flyback pulse. Unless this oscillation is controlled, it will continue into and modulate the scan. The technique used to overcome this effect is to tune the leakage inductance and the associated capacitance to an odd harmonic of the line flyback oscillation frequency. By doing this the oscillatory actions present at the beginning of the scan cancel. Either third or fifth harmonic tuning is used. Third harmonic tuning also has the effect of increasing the amplitude of the e.h.t. pulse, and is generally used where a half -wave e.h.t. rectifier is employed. Fifth harmonic tuning results in a flat-topped e.h.t. pulse, giving improved e.h.t. regulation, and is generally used where an e.h.t. tripler is employed to produce the e.h.t. The tuning is mainly built into the line output transformer, though an external variable inductance is commonly found in colour chassis so that the tuning can be adjusted. With a following post I will go into the subject of modern TV line timebases in greater detail with other models and technology shown here at Obsolete Technology Tellye !
RCA CA920 CA920AE / TBA920 line oscillator combination

The line oscillator combination CA920 TBA920 is a monolithic
integrated circuit intended for the horizontal deflection of the black and white
and colour TV sets
picture tube.
FEATURES:
SYNC-PULSE SEPARATION
OPTIONAL NOISE INVERSION
GENERATION OF A LINE FREQUENCY VOL-
TAGE BY MEANS OF AN OSCILLATOR
PHASE COMPARISON BETWEEN SYNC-
PHASE COMPARISON BETWEEN THE OS-
CILLATOR WAVEFORM AND THE MIDDLE OF
THE LINE FLY-BACK PULSE
AUTOMATIC SWITCHING OF THE VARIABLE
TRANSCONDUCTANCE AND THE VARIABLE
TIME CONSTANT TO ACHIEVE NOISE SUP-
PRESSION AND, BY SWITCHING OFF, POS-
SIBILITY OF TAPE-VIDEO-REGISTERED RE-
PRODUCTION
SHAPING AND AMPLIFICATION OF THE OS-
CILLATOR WAVEFORM TO OBTAIN PULSES
FOR THE CONTROL OF DRIVING STAGES IN
HORIZONTAL, DEFLECTION CIRCUITS
USING EITHER TRANSISTORS OR THYRISTORS.
In a conventional line scan circuit, such as in the Plessey or Mullard TBA920 integrated circuit, a phase-locked oscillator is synchronized with the incoming horizontal synchronization (H-sync) pulses to provide a control signal to the line output circuit. This ensures that oscillation is maintained in the absence of the H-sync signal, for example, during maintenance in the case of a display terminal, or, in the case of a TV receiver, when untuned, and noise on the incoming signal is smoothed out. The phase relationship between the output and input is very precisely maintained to prevent line tearing and other picture defects.
Flyback voltage pulses occur at the terminals of the yoke of the cathode ray tube (CRT) between successive horizontal scans of the electron beam while the screen is blanked. Due to component tolerances and temperature effects, the flyback voltage pulses may be broadened and unless the broadened pulse falls within the blanking period, picture defects can occur. Conventionally, this problem has been overcome by designing the CRT circuits to allow a broad blanking period between the line scans: however, this has a deleterious effect on the efficiency of the display.
The above design requirements place severe limitations on the horizontal driver transistor and transformer design. In typical circuits conduction by the driver transistor during retrace and the first half of trace switches the output transistor off. The driver transformer stores energy during conduction by the driver transistor which is used to provide forward base current to the horizontal output transistor during the following conduction interval of the output transistor. Accordingly, the drive current in the primary winding must be of the proper amplitude and duration to maintain the horizontal output transistor in conduction in saturation during the second half of trace. When the driver transistor turns on again, the initial current flow through the primary winding of the driver transformer provides a turn-off pulse to the base of the output transistor. The amplitude and duration of the turn-off pulse are dependent on the inductances and the turns ratio of the driver transformer windings.

The video signal at about 2-7V peak -peak is fed to the sync separator section at pin 8, the composite sync waveform appearing at pin 7.
The noise gate switches off the sync separator when a positive -going input pulse is fed in at pin 9, an external noise limiter circuit being required .
The line sync pulses are shaped by R1 /C1 /C2/R2 and fed in to the oscillator phase detector section at pin 6.
The line oscillator waveform is fed internally to the oscillator phase detector circuit which produces at pin 12 a d.c. potential which is used to lock the line oscillator to the sync pulse frequency, the control potential being fed in at pin 15. The oscillator itself is a CR type whose waveform is produced by the charge and discharge of the external capacitor (C7) connected to pin 14. The oscillator frequency is set basically by C7 and R6 and can be varied by the control potential appearing at pin 15 from pin 12 and the external line hold control. Internally the line oscillator feeds a triangular waveform to the oscillator and flyback phase detector sections and the pulse width control section. The coincidence detector section is used to set the time constant of the oscillator phase detector circuit. It is fed internally with sync pulses from the sync separator section, and with line flyback pulses via pin 5. When the flyback pulses are out of phase with the sync pulses the impedance looking into pin 11 is high (21(Q). When the pulses are coincident the impedance falls to about 150Q and the oscillator phase detector circuit is then slow acting. The effect of this is to give fast pull -in when the pulses are out of sync and good noise immunity when they are in sync. The coincidence detector is controlled by the voltage on pin 10. When the sync and flyback pulses are in sync C3 is charged: when they are out of sync C3 discharges via R3. VTR use has been taken into consideration here. With a video recorder it is necessary to be able to follow the sync pulse phase variations that occur as a result of wow and flutter in the tape transport system, while noise is much less of a problem. For use with a VTR therefore the network on pin 10 can simply be left out so that the oscillator phase detector circuit is always fast acting. A second control loop is used to adjust the timing of the pulse output obtained from pin 2 to take into account the delay in the line output stage. The fly back phase detector compares the frequency of the flyback pulses fed in at pin 5 with the oscillator signal which has already been synchronised to the sync pulse frequency.
Any phase difference results in an output from pin 4 which is integrated and fed into the pulse width control section at pin 3. The potential at pin 3 sets the width of the output pulse obtained at pin 2: with a high positive voltage (via R11 and R12) at pin 3 a 1:1 mark -space ratio out- put pulse (32/us on, 32/us off) will be produced while a low potential at pin 3 (negative output at pin 4) will give a 16us output pulse at the same frequency. The action of this control loop continues until the fly- back pulses are in phase with a fixed point on the oscillator waveform: the flyback pulses are then in phase with the sync pulses and delays in the line output stage are compensated. The output obtained at pin 2 is of low impedance and is suitable for driving valves, transistors or thyristors: R9 is necessary to provide current limiting.
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