GRUNDIG SUPER COLOR A 8402/96 SERIE F3026 CHASSIS CUC 720 (CUC720 IT) INTERNAL VIEW.

In 1981 begins a NEW ERA in GRUNDIG CHASSIS DEVELOPMENT: It starts with the COMPACT UNIVERSAL CHASSIS, a completely NEW CHASSIS DESIGN which doesn't SHARE anything with the older chassis GSC types or 29304......... From this CUC720 GRUNDIG abandoned all the previous chassis technology in all stages and parts. This chassis is so called COMPACT UNIVERSAL CHASSIS not by the "Compact" feature but more for the EXPANDABILITYIES: Teletext decoder / Further Chroma Standards / Stereo and bilingual Sound and other improvements which was possible to put in, even under final customer special request. This Chassis was Universally used in ALL SETS produced by GRUNDIG (Even PORTABLE) until came out another type of CUC The CUC70 / CUC50 which we will see sooner or later HERE THE CUC 720 was the most reliable chassis made by GRUNDIG and one of the most in the ERA in which came out, in 1981. (Except for some dry joints in TUNER UNIT). The set here in collection has approx 65.000 working Hours and it's still in perfect working order. All parts and components (except some electrolytics capacitors in Power Supply) are original !! !! !! !! !! !! !!!!! Remote control television with external data bus connection, Remote Control With MOS IC's For TV Sets: THE GRUNDIG AV FEATURE CONNECTOR TECHNOLOGY: A television receiver is provided for use as a picture display terminal for electronic peripheral equipment, where a control system with a data-bus is built into the television receiver for multitude of commands and in which the television receiver is intended to be used in addition to the normal direct reception of televised pictures for other possible applications. The television receiver can serve as a monitor for a picture tape recorder, which is equipped for recording independently of the television receiver. A complete television receiving set is provided with automatic transmitter seeking mechanism and electronic channel storage. 1. A system for the use of a television receiver for external control of electronic peripheral devices, said television being of the type including a built-in integrated circuit remote control receiver, said remote control receiver being divided into two sections, one section being allocated to the remote control of the receiving and reproduction sections of the television receiver and the other section being allocated to a databus having nothing to do with the television receiver receiving and reproduction sections; an output terminal of said databus comprising an adaptor connector between said television receiver and an external peripheral device; a peripheral device external to the television receiver; cable means connecting the output of said databus with said peripheral device; and a decoder interposed between said databus output terminal and peripheral device for converting data from said databus into a form suitable for controlling functions of said peripheral device. 2. A television receiver as a picture terminal according to claim 1, in which said external coupling includes a connecting cable between the external connections of the television set and the peripheral device forming a unitary unit together with a decoder which transforms the data from the data collector into a code which directly controls the functions of the peripheral device. 3. A television receiver as a picture terminal according to claim 1 or 2, in which the peripheral device is a picture taping device which operates for recording independently from the television set which acts as a monitor. 4. A television receiver as a picture terminal according to claim 1, in which the functions controlled by said first commands include the on-off switching, picture, sound and channel selection of the television receiver and the functions controlled by said second commands include electronic program storage and changeover functions.

Description:

BACKGROUND OF THE INVENTION

Integrated circuits are presently known in the art for the convenient operation of television receivers, whereby the functions of on-off switching, channel selection, picture (video) and sound (audio) can be remotely controlled by the received telecontrol signal. In particular, the following function can be operated by such a system: Switching on and off of the equipment, calling for different program channels, variations and basic adjustments of sound level, brightness and color saturation, silencing of the sound as well as inserting of time references. With a known and presently available operating system up to 16 channels can be installed, so that it is possible, to select directly that number of programs and to tune the receiver to the appropriate channel.

Television receivers available today in many designs provide for up to 30 remotely controlled channels or channels controlled by the received signal (tele-signal) to properly operate. Additionally, infrared control is also becoming popular. These controls provide commands by means of a databus so that the operation of the various functions is possible with the provision of additional commands.

It is further known to equip peripheral equipment such as video tape recorders with a so-called electronic-tap-key rather than keys with a long throw so that all parts which are susceptable to mechanical wear are eliminated and replaced by digital controls.

It has become of interest to connect the peripheral equipment such as the video tape recorder to the television receiver so that both can be conveniently operated. With the development of new concepts simplification of design becomes critical for ease of operation and reduction of expense.

SUMMARY OF THE INVENTION

A 

television receiver as a picture display terminal for electronic peripheral devices wherein a remote control system with a data collector is installed for receiving a plurality of commands and in which only a portion of the commands is used for the remote control functions of the receiving and display portions of the television set, while another portion of the commands is used for adjusting the functions of an electronic peripheral device which may be coupled with a television set, and that the data collector is electrically coupled by means of an external coupling of the television set with the corresponding stages of the peripheral device.

BRIEF DESCRIPTION OF THE DRAWING

The FIGURE is a diagrammatic showing of a television receiver and electronic periphery device incorporating the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A television receiver and electronic peripheral device incorporating the invention are shown in the FIGURE. The television receiver 10 can be used as a picture display terminal for peripheral device 12. This provides the advantage, that by means of a single tele-control signal, the control of functions of the receiving and displaying sections of the television receiver can be accomplished as well as the control functions of the peripheral equipment 12, which is connected to the receiver. The peripheral device does not require a separate tele-control system since that which is already installed in the television receiver can be used. To accomplish this, portion A of the available commands A, B of the tele-control system 11 are used for the function of the television receiver 10. The remaining portion B of the available commands A, B, which is made available at databus or data collector 14 is used for the control of functions of the peripheral equipment. The databus, which is coordinated with the peripheral equipment, and which is built into the tele-control system of the television receiver, is connected electrically to external terminal 16 of the television receiver. The external terminals at television receivers and peripheral equipment are relatively inexpensive.

The primary expenses result from the necessary cable connections between the external terminals of the television receiver and the peripheral equipment, as well as the auxiliary apparatus, such as decoder 18, which decodes the data from the databus 14 and prepares it for the peripheral equipment. These expenses are reduced by simplified design, in which the connecting cables 20 and 22 together with the auxiliary apparatus or decoder 18 are combined in one component or building block. This building block can be offered as an accessory to the user of television receivers with peripheral equipment.

The invention can be used with especial advantage in connecting a television receiver with a picture tape recorder as a peripheral equipment. The picture tape recorder is equipped preferably for recording independently from the television receiver, so that the latter serves as a monitor only. With such a switching combination it is possible, for example, to accomplish this with a single control system, and by the help of a tele-control system, which is built into the television receiver, to operate the channel selection and drive mechanism control, the control for an electronic switch clock and programming of the switch commands of the picture tape recorder as well as the control of the function of the receiving and displaying unit of the receiver. In this way it is possible to use the tele-control of a television receiver additionally for the tele-control of the picture tape recorder without substantial higher expenses.

Siemens Digital Tuning System SDA200

Description of the system
A digital tuning system essentially consists of 3 blocks. Frequency synthesis Controller and display Station memory

Frequency synthesis
The desired frequencies are generated according to the PLL principle (Fig. 2). The PLL
comprises a VCO {the equivalent tuner oscillator), a prescaler with fixed divider factor P, a
divider with digitally selectable divider factor N, a phase detector, and an integrator. The
reference frequency for the phase detector can be obtained from a crystal oscillator with
following divider {divider factor Q).

The selection of the parameter is as follows: 1. VCO frequency range fosc. min· fosc. max• 2. Necessary frequency raster Llf 3. Max. permissible tuning time and noise phase shift. In TV applications a frequency raster of Llf = 125 kHz is sufficient. Therefore it follows that N _ fosc. min and N fosc. max min - Llf max= j f Hence a 13 bit programmable divider N = 2 ...... 8191 is required. The reference frequency fret decisively determines the tuning time and the noise phase shift of the oscilla- Llf tor. It results from the frequency raster Llfand the prescaler factor P: fret= p. On the other hand, the prescaler factor P determines the max. input frequency for the pro- grammable divider f.1max = fosc. p max · The reference frequency fret is obtained from an oscillator fref = ~ . Hence, it follows: fosc = p~ · fa. In the given system P = 64, Q = 2048, and fa = 4 MHz have been determined. The reference frequency thus results in: fret = ~f = ~ = 1.953125 kHz. 1.

The prescaler SDA 2001 is an ECL divider with a fixed divider factor P = 64. The max. input frequency is 1 GHz. A broadband preamplifier with 20 dB gain and separated switchover inputs for VHF and UHF is integrated in the SDA 2001. To ensure reliable operation, the sinusoidal input voltage covering a frequency range between 80 and 1000 MHz should be V; = 20 mV. The push-pull outputs result in good noise immunity against cross talking. The output levels of 1 VPP only cause low noise radiation.

2. The PLL IC SDA 2002 The IC contains a 13 bit binary programmable synchronous divider (divider factor N = 256 ....... 8191), a 16 bit shift register, a quartz oscillator (fosc = 4 MHz) with fol- lowing divider stage (divider factor Q = 2048), and a frequency and phase sensitive digital phase detector. Together with the 3-bit information "VHF Bd I", "VHF Bd Ill" and "UHF" the divider factor N is serially mored in the 16 bit dual code into the 16 bit shift register with parallel output. First the LSB (least significant bit) is put in, at least the MSB (most s.b.) as last bit. The transition at information input (IFO) is done only during the H state of the enable input (PLE).

The infeeding is done with the L-H slope of the clock (CPL). A 16-bit buffer memory fol- lows the 16-bit shift register. The information transition into the buffer is done with the L-level of the enable input (PLE). Referred to the H-L trailing edge of the enable input only the last 16 clocks are interpreted. Possibly preceding dummy bits will not be interpreted. A clock with the frequency f = 62.5 kHz. Appears at the open collector output CL· The out- puts VHF Bd I, VHF Bd Ill, and UHF are active low current sources (open collector). The sync divider has symmetrical push-pull inputs (F, F) for ECL level. In the case of frequency and phase synchronization, an L-signal is obtained at the output LOCK IND. The phase detector can be driven with a separated supply voltage ( V 52 ). The outputs PD and Vo are connected with an RC network. Vo delivers the tuning voltage for the VCO (tuner).

3. The SDA 2003 controller

The integrated MOS circuit, part of the frequenc synthesis tuning system, is located be- tween the programmable divider of the PLL circuit and both the tuning memories which electrically memorize the allocation of the tuning information (fine tuning) and the pro- gram number. The controller converts the tuning information into frequency information (divider ratio). The frequency information is a binary number, representing the divider fac- tor for the PLL divider; it is serially transferred into the PLL. Under usual operation, only the station selection buttons of the TV set are actuated. A fixed program address in the tuning memory is assigned to every static on button. This program address is intended to store the actual tuning information as well as the pertinent channel. After actuating a station button, a program change instruction PC is issued from the remote control receiver or from the front-end keyboard to the controller. This instruc- tion causes the controller to read the tuning information (fine tuning) out of the tuning memory and to assign it to the corresponding channel; hence the TV set is precisely tuned to the requested frequency by means of the PLL. Setting of a not yet stored TV transmitter is done by means of the actuating buttons: K 1 for setting of channel units digits and K 10 for setting of channel tens digits. By means of the button K 1 the channel number units digits 0 to 9 without carry and by means of the button K 10 the channel number tens digits can be set. After every button operation, the concerned channel number is incremented by 1. For every adjustment of the channel number, the controller converts this information into frequency information (the PLL divider factor) and provides serial output to the PLL circuit. The success of every tuning step can be watched on the screen. In addition to that, the SDA 2003 is designed for station search, which can also be used for setting a TV channel. The station search is started via the setting button: Search Start SL. Thereupon the controller sequentially issues every frequency information contained in the internal ROM individually to the PLL circuit. This process is automatically stopped as soon as an operating TV broadcast station is found. This is indicated to the controller by a pulse (active low) at the input "Search STOP", which can be derived from line synchronization and the video signal.

Via the setting buttons "fine tuning plus FT+" and "fine tuning minus FT - " frequency de- viations from the rated frequency of the individual channel can be set in steps of 125 kHz up to 3,875 MHz and down to - 4 MHz. Frequency tuning, moreover, readjusts automati- cally every 250 ms, as soon as the proper button is pressed. Within the tuning limits men- tioned above, fine tuning runs against a stop (owerflow inhibit). After having attained it, the channel number display lights up as long as the setting button is kept pressed. The tuning information of a tuned TV broadcast station can be stored in the tuning mem- ory by actuating the store button. The SDA 2003 then serially outputs the tuning data on the output IFO. The tuning data comprises the fine tuning information and the channel number information. From the tuning information serially read into the MOS memories, it is the channel num- ber which is used for addressing the internal ROM table. Frequency information from 100TV channels as well as band selection (2 bytes) are stored in the ROM table. There are some frequencies to which several TV channels are allocated (stored in the ROM), hence no unambiguous channel designition can be gathered from the frequency. This is the reason why the channel number is used as tuning information, since only in this way unambiguous channel designation and frequency information can be gained, simul- taneously. The frequency information is obtained by adding up the ROM divider factor and the center position of fine tuning. At every process of setting a new channel number, fine tuning is adjusted to center position. The PLL divider factor then complies with the nominal divider factor. The nominal divider factor results in an oscillator frequency lying only by f = 25 kHz below the nominal value. It represents the frequency information of the exact channel frequency, except the deviation of 25 kHz which is needed to attain a 125 kHz raster frequency at a given IF of 38.9 MHz. The band selection information is programmed in the internal ROM for every frequency information and is serially output from the con- troller. Band selection differentiates between VHF range I/Ill and UHF. The internal ROM table is made up such that between the CCIR channels - designated with corresponding channel numbers - other channels are allocated. Thus, the Italian TV channels A-H are stored between channel 12 and channel 21 under channel Nos. 13 to 20. Data communication between the SDA 2003 and the memory is done via a data bus that comprises shift clock CNVM, actual information (IFO), and an enable signal (EX/REC). The data word contains information on channel number and fine tuning.

4. Display driver SDA 2004
The LED display driver decodes in the remote-controlled tuning system of TV sets the channel and program numbers from a serially offered BCD code and drives in multiplex operation 2 or 4 digits, as required. The information D (active H) for the four digits is coded in 16 bits and is serially input in two shift registers of 8 bits, each. The input for the digits D, and D, and/or D3 and D. is provided by 8 falling edges of the driving clock pulses T,, or T3•. respectively, if Enable EN is on high level. The contents of both the shift registers is stored in an eight bit broad memory, if EN is on low level. The 16 memory outputs operate on a multiplexer. The multi- plexer and the digit selection outputs Dl 1, Dl 2, Dl 3 and Dl 4 (digit driver for the LED dis- plays, active low) are serviced by an internal clock generator. The 7 outputs of the de-coder, series-connected to the multiplexer, are used for driving the segments (active high)
in the LEDs.
If input 01 4 is grounded, the multiplexer only works for the digits 1 and 2. Thereby the duty
cycle for the clock pulse of the multiplexer is changed over.

5. On-screen IC SDA 2105
The SDA 2105 IC is intended to display channel and program numbers on the screen of the TV set and is adapted to the SDA 2003 Siemens channel processor. The on-screen device provides 2 display panels of 2 digits, each, and 1 display panel of 5 digits. The information for the display panels is serially transferred via the DATA line. The display panels are activated via the pertinent ENABLE line.

6. Nonvolatile memory SDA 2006
This IC allows the nonvolatile, wordoriented reprogrammable storage of 32 x 16 bit words. Thus, up to 32 programs or channels as well as their possible allocations can be stored. The SDA 2006 is fabricated in the n-channel floating gate technology in order to provide extremely long storage times and as many read-out operations as required refresh. Addressing and instruction input is done serially and may comprise 8 or 12 bits as re- quired. The entailing erase and write cycles are determined by a complex, chip-internal control.

7. IR remote control receiver SDA 2007
The device is a further development of the types SAB 3209 and SAB 4209. Like those, it utilizes the proven biphase code for IR transmission and, therefore, it can be applied with the SAB 3210 or SDA 2008 as IR instruction generator. It is, in particular, designed for operation in connection with the tuning system SDA 200. The program memory has, there- fore, been relocated from the remote control receiver to the channel processor SDA 2003.

Particulars:
2 combined series interfaces with common DATA line for information transfer (leading bit LB = H and 6 information bits A, B, C, D, E, and F). Distinction is made by the enable signals OLE and TE (7 pulses, each, i.e. 1 pulse/bit). Modification is possible through the outputs of the TUS 1/2 flip-flops, thus different groups of equipment such as teletext de- coder and the VCR device can be addressed precisely. H level at one of the TUS outputs drops the OLE pulses (OLE = L) out and switches the TE output over to single mode operation. For a better adaptation to a microprocessor the output is now executed by means of 4 T osc/bit (64 μs/bit at 62.5 kHz).

During the "standby" status (ON/OFF = H), all outputs of the 4 analog memories VOLU, BRIG, COLO and CONT are kept on L level. Corrective instructions (instruction Nos. 8 to 15) will then not be executed, i.e. the last set status of the analog memories is retained. The connection VPM, included in the volume memory VOLU, is provided for front end con- trolling, which acts like the instructions "volume+" and "volume-", respectively. 2 spare outputs, controlled by 2 alternating flip-flops with different quiescent levels open up additional individual applications (e.g. clock time display).


There is, moreover, the possibility to switch over the start bit for IR reception. Thus, two
receiver units can be operated in the same room at the same clock frequency indepen-
dently of each other.

8. Remote control transmitter SDA 2008
The transmitter module SDA 2008 is an advanced product of the SAB 3210 IC within the
frame of the IR 60 Siemens infrared remote control system. In detail,the IC includes the
following:

1. The keyboard is completely latched against incorrect operation. Even in case of double operation as provided for instruction input within one column with one of the lines 1 to 7 incl. line 8, practically no misinstruction can be generated by pressing two buttons, since for that both the buttons had to be pressed absolutely simultaneously.

2. After outputting the first information instruction, the instruction can only be changed by switching off the transmitter (releasing all buttons). This avoids further incorrect ser- vicing because no unwanted instruction change can be effected by premature releasing the "shift button" (keyboard changeover) or pressing a further button.

3. Instruction expansion to more than 32 instructions can be done as previously by diode wiring, and recently additionally via a "shift button" (connects PPIN to SA). Moreover, the instructions 40 to 47 can be issued by connecting the line inputs to - Vs without re- quiring any additional component.

4. The start bit in infrared transmission can be changed over from outside (connecting PPIN to SC). Thus, selective addressing of 2 different receivers by one transmitter is possible. A TV transmitter and a broadcasting set with one transmitter can, therefore, be serviced independently of each other in one room.

5. The oscillator was converted to 8 times the frequency in order to permit operation with a ceramic resonator. Hence, also lowcost AM IF resonators (appr. 500 kHz or 455 kHz) can be used instead of the oscillator.

6. In addition to the hitherto existing final instruction, an "initial instruction" is transmit- ted. The initial instruction exactly complies with the final instruction, except that it is issued by information instructions. Thus separation between 2 button operations can be recognized even more precisely, and more time is provided for the gain control of the preamplifiers on the receiver side.

7. No external column resistors are required.