PHILIPS 22CS5755 /08R CHOPIN CHASSIS K40 UNITS VIEW.

- 8204 004 04271 CITAC CONTROL UNIT WITH SAB3035 Computer Interface for Tuning and Control (CITAC)

- 8220 280 3593.2 STEREO MATRIX DECODER UNIT WITH TDA3803A + TBA120S + TC4066B



- 8222.280.3372.2 AV GROUPING SIGNAL UNIT.




TDA2545A Quasi-split-sound circuit
GENERAL DESCRIPTION The TDA2545A is a monolithic integrated circuit for quasi-split-sound processing in television receivers. Features · 3-stage gain controlled i.f. amplifier · A.G.C. circuit · Reference amplifier and limiter amplifier for vision carrier (V.C.) processing · Linear multiplier for quadrature demodulation.

TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
television receivers using PNP or NPN tuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).



.SUPPLYVOLTAGE : 12V TYP
.SUPPLYCURRENT : 50mATYP
.I.F. INPUT VOLTAGE SENSITIVITY AT
F = 38.9MHz : 85mVRMS TYP
.VIDEO OUTPUT VOLTAGE (white at 10% of
top synchro) : 2.7VPP TYP
.I.F. VOLTAGE GAIN CONTROL RANGE :
64dB TYP .SIGNAL TO NOISE RATIO AT VI = 10mV :
58dB TYP
.A.F.C. OUTPUT VOLTAGE SWING FOR
Df = 100kHz : 10V TYP


TDA3803A Stereo/dual TV sound decoder circuit
GENERAL DESCRIPTION The TDA3803A is a stereo/dual TV sound decoder circuit with static switching for processing two AF signals in TV and VCR equipment. The LOW/HIGH static switching signals control the AF output selector. Two operational amplifiers perform bandpass filtering of the identification signals. Features · Amplification of the two AF input signals by integrated operational amplifiers · Low distortion stereo de-matrix · All operational amplifiers offset compensated · De-emphasis with operational amplifiers, preferably applied to the output terminals · Two output ports each with two channels for headphones and loudspeakers · Dual sound information at one port, each port individually switchable from sound I to sound II and sound II to sound I · Mute function; while mute is active, it is possible to connect an external mono AF input signal to pin 10 appearing at pins 20 to 23. · Identification without additional signals (horizontal etc.)


TDA1524A Stereo-tone/volume control circuit
GENERAL DESCRIPTION The device is designed as an active stereo-tone/volume control for car radios, TV receivers and mains-fed equipment. It includes functions for bass and treble control, volume control with built-in contour (can be switched off) and balance. All these functions can be controlled by d.c. voltages or by single linear potentiometers. Features · Few external components necessary · Low noise due to internal gain · Bass emphasis can be increased by a double-pole low-pass filter · Wide power supply voltage range.

TDA3810 Spatial, stereo and pseudo-stereo sound circuit
DESCRIPTION The TDA3810 integrated circuit provides spatial, stereo and pseudo-stereo sound for radio and television equipment. Features · Three switched functions: – spatial (widened stereo image) – stereo – pseudo-stereo (artificial stereo from a mono source) · Offset compensated operational amplifiers to reduce switch noise · LED driver outputs to facilitate indication of selected operating mode · Start/stop circuit to reduce switch noise and to prevent LED-flicker · TTL-compatible control inputs.

MAB8420P

8-Bit Microcontroller-Microcomputer
Various
8-Bit Microcontrollers
Clock Frequency - Max. (Hz)=4.43M
Min Instruction Length (bits)=8
Max Instruction Length (bits)=16
Number of Addressing Modes=5
On-Chip RAM (Bytes)=64
On-Chip ROM (bytes)=2k
Number of Interrupt Lines=1
Number of Maskable Interrupts=1
Vsup Nom.(V) Supply Voltage=5.0
Status=Discontinued
Package=DIP
Pins=N/A
Military=N
Technology=NMOS




SAB3035 COMPUTER INTERFACE FOR TUNING AND CONTROL (CITAC)

GENERAL DESCRIPTION
The SAB3035 provides closed-loop digital tuning of TV receivers, with or without a.f.c., as required. lt
also controls up to 8 analogue functions, 4 general purpose I/O ports and 4 high-current outputs for
tuner band selection.
The IC is used in conjunction with a microcomputer from the MAB84OO family and is controlled via a two-wire, bidirectional I2 C bus.
Featu res
Combined analogue and digital circuitry minimizes the number of additional interfacing components
required
Frequency measurement with resolution of 50 KHz
Selectable prescaler divisor of 64 or 256
32 V tuning voltage amplifier
4 high-current outputs for direct band selection
8 static digital to analogue converters (DACSI for control of analogue functions
Four general purpose input/output (l/O) ports
Tuning with control of speed and direction
Tuning with or without a.f.c.
Single-pin, 4 MHZ on-chip oscillator
I2 C bus slave transceiver

FUNCTIONAL DESCRIPTION
The SAB3035 is a monolithic computer interface which provides tuning and control functions and
operates in conjunction with a microcomputer via an I2 C bus.
Tuning
This is performed using frequency-locked loop digital control. Data corresponding to the required tuner
frequency is stored in a 15-bit frequency buffer. The actual tuner frequency, divided by a factor of 256
(or by 64) by a prescaler, is applied via a gate to a 15-bit frequency counter. This input (FDIV) is
measured over a period controlled by a time reference counter and is compared with the contents of the frequency buffer. The result of the comparison is used to control the tuning voltage so that the tuner frequency equals the contents of the frequency buffer multiplied by 50 kHz within a programmable tuning window (TUW).

The system cycles over a period of 6,4 ms (or 2,56 ms), controlled by the time reference counter which is clocked by an on-chip 4 lVlHz reference oscillator. Regulation of the tuning voltage is performed by a charge pump frequency-locked loop system. The charge IT flowing into the tuning voltage amplifier is controlled by the tuning counter, 3-bit DAC and the charge pump circuit. The charge IT is linear with the frequency deviation Af in steps of 50 l