SINUDYNE STUDIO 2568Q DIGI-SYSTEM CHASSIS PROFESSIONAL T6700 INTERNAL VIEW.

SINUDYNE STUDIO 2568Q  CHASSIS  PROFESSIONAL T 6700 TEA2164 /2165 SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT


.POSITIVE AND NEGATIVE OUTPUT CURRENT
UP TO 1.2AAND – 1.7A .A TWO LEVEL COLLECTOR CURRENT LIMITATION
.COMPLETE TURN OFF AFTER LONG DURATION
OVERLOADS .UNDER AND OVER VOLTAGELOCK-OUT .SOFT START BY PROGRESSIVE CURRENT
LIMITATION .DOUBLE PULSE SUPPRESSION .BURST MODE OPERATION UNDER STANDBY
CONDITIONS
DESCRIPTION
In amaster slave architecture, the TEA2164control
IC achieves the slave function. Primarily designed
for TV receivers and monitors applications, this
circuit provides an easy synchronizationand smart
solution for low power stand by operation.
Located at the primary side the TEA2164 Control
IC ensures :
- the power supply start-up
- the power supply control under stand-by conditions
- the process of the regulation signals sent by the
master circuit located at the secondary side
- directbasedrive of the bipolarswitching transistor
- the protection of the transistor and the power
supply under abnormal conditions.

II. GENERAL DESCRIPTION
In a master slave architecture, the TEA2164 Control
IC, located at the primary side of an off line
power supply achievesthe slave function ;whereas
the master circuit is located at the secondary side.
The link between both circuits is realized by a small
pulse transformer

In the operation of the master-slave architecture,
four majors cases must be considered :
- normal operating
- stand-bymode
- power supply start-up
- abnormal conditions : off load, short circuit, ...
II.1. Normal Operating (master slave mode)
In this configuration, the master circuit generatesa
pulse widthmodulatedsignal issued from themonitoring
of the output voltage which needs the best
accuracy (in TV applications : the horizontal deflection
stagesupplyvoltage).Themaster circuit power
supply can be supplied by another output.
The PWM signal are sent towards the primary side
through small differentiating transformer. For the
TEA2164 positive pulses are transistor switchingon
commands ; and negative pulses are transistor
switching-offcommands (Figure 4). In this configuration,
only by synchronizing the master oscillator,
the switching transistor may be synchronized with
an external signal.
II.2. Stand-by Mode
In this configuration the master circuit no longer
sends PWM signals, the structure is not synchronized
; and the TEA2164 operates in burst mode.
The average power consumption at the secondary
side may be very low 1W 3 P 3 6W (as it is
consumed in TV set during stand by).
By action on the maximum duty cycle control, a
primary loop maintains a semi-regulation of the
output voltages.Voltage on feed-back is applied on
Pin 9.
Burst period is externally programmedby capacitor
C1.
II.3. Power Supply Start-up
After the mains have been switched-on, the VCC
storage capacitor of the TEA2164 is charged
through a high value resistor connected to the
rectified high voltage.When Vcc reaches VCC start
threshold (9V typ), the TEA2164 starts operatingin
burst mode. Since available output power is low in
burst mode the output power consumption must
remain low before complete setting-up of output
voltage. In TV application it can be achieved by
maintaining the TV in stand-by mode during startup.

Overvoltage Protection
When VCC exceeds VCC max, an internal flip-flop
stops output conduction signals. The circuit will
start again after the capacitor C1 discharge ; it
means : after loss of synchronization or after Vcc
stop crossing (Figure 7).
In flyback converters, this function protects the
power supply against output voltage runaway.


SINUDYNE STUDIO 2568Q  CHASSIS  PROFESSIONAL T6700 Synchronized switch-mode power supply:

In a switch mode power supply, a first switching transistor is coupled to a primary winding of an isolation transformer. A second switching transistor periodically applies a low impedance across a second winding of the transformer that is coupled to an oscillator for synchronizing the oscillator to the horizontal frequency. A third winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a DC control voltage in the capacitor that varies in accordance with a supply voltage B+. The control voltage is applied via the transformer to a pulse width modulator that is responsive to the oscillator output signal for producing a pulse-width modulated control signal. The control signal is applied to a mains coupled chopper transistor for generating and regulating the supply voltage B+ in accordance with the pulse width modulation of the control signal.

Description:

The invention relates to switch-mode power supplies.

Some television receivers have signal terminals for receiving, for example, external video input signals such as R, G and B input signals, that are to be developed relative to the common conductor of the receiver. Such signal terminals and the receiver common conductor may be coupled to corresponding signal terminals and common conductors of external devices, such as, for example, a VCR or a teletext decoder.

To simplify the coupling of signals between the external devices and the television receiver, the common conductors of the receiver and of the external devices are connected together so that all are at the same potential. The signal lines of each external device are coupled to the corresponding signal terminals of the receiver. In such an arrangement, the common conductor of each device, such as of the television receiver, may be held "floating", or conductively isolated, relative to the corresponding AC mains supply source that energizes the device. When the common conductor is held floating, a user touching a terminal that is at the potential of the common conductor will not suffer an electrical shock.

Therefore, it may be desirable to isolate the common conductor, or ground, of, for example, the television receiver from the potentials of the terminals of the AC mains supply source that provide power to the television receiver. Such isolation is typically achieved by a transformer. The isolated common conductor is sometimes referred to as a "cold" ground conductor.

In a typical switch mode power supply (SMPS) of a television receiver the AC mains supply voltage is coupled, for example, directly, and without using transformer coupling, to a bridge rectifier. An unregulated direct current (DC) input supply voltage is produced that is, for example, referenced to a common conductor, referred to as "hot" ground, and that is conductively isolated from the cold ground conductor. A pulse width modulator controls the duty cycle of a chopper transistor switch that applies the unregulated supply voltage across a primary winding of an isolating flyback transformer. A flyback voltage at a frequency that is determined by the modulator is developed at a secondary winding of the transformer and is rectified to produce a DC output supply voltage such as a voltage B+ that energizes a horizontal deflection circuit of the television receiver. The primary winding of the flyback transformer is, for example, conductively coupled to the hot ground conductor. The secondary winding of the flyback transformer and voltage B+ may be conductively isolated from the hot ground conductor by the hot-cold barrier formed by the transformer.

It may be desirable to synchronize the operation of the chopper transistor to horizontal scanning frequency for preventing the occurrence of an objectionable visual pattern in an image displayed in a display of the television receiver.

It may be further desirable to couple a horizontal synchronizing signal that is referenced to the cold ground to the pulse-width modulator that is referenced to the hot ground such that isolation is maintained.

A synchronized switch mode power supply, embodying an aspect of the invention, includes a transfromer having first and second windings. A first switching arrangement is coupled to the first winding for generating a first switching current in the first winding to periodically energize the second winding. A source of a synchronizing input signal at a frequency that is related to a deflection frequency is provided. A second switching arrangement responsive to the input signal and coupled to the second winding periodically applies a low impedance across the energized second winding that by transformer action produces a substantial increase in the first switching current. A periodic first control signal is generated. The increase in the first switching current is sensed to synchronize the first control signal to the input signal. An output supply voltage is generated from an input supply voltage in accordance with the first control signal.


SINUDYNE STUDIO 2568Q  CHASSIS  PROFESSIONAL T6700 Switch-mode power supply with burst mode standby operation:

In a switch mode power supply, a first switching transistor is coupled to a primary winding of a transformer for generating pulses of a switching current. A secondary winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a control signal in the capacitor. The control signal is applied to a mains coupled chopper second transistor for generating and regulating supply voltages in accordance with pulse width modulation of the control signal. During standby operation, the first and second transistors operate in a burst mode that is repetitive at a frequency of the AC mains supply voltage such as 50 Hz. In the burst mode operation, during intervals in which pulses of the switching current occur, the pulse width and peak amplitude of the switching current pulses progressively increase in accordance with the waveform of the mains supply voltage to provide a soft start operation in the standby mode of operation within each burst group.

Description:

The invention relates to switch-mode power supplies.

In a typical switch mode power supply (SMPS) of a television receiver the AC mains supply voltage is coupled to a bridge rectifier. An unregulated direct current (DC) input supply voltage is produced. A pulse width modulator controls the duty cycle of a chopper transistor switch that applies the unregulated supply voltage across a primary winding of a flyback transformer. A flyback voltage at a frequency that is determined by the modulator is developed at a secondary winding of the transformer and is rectified to produce DC output supply voltages such as a voltage B+ that energizes a horizontal deflection circuit of the television receiver and a voltage that energizes a remote control unit.

During normal operation, the DC output supply voltages are regulated by the pulse width modulator in a negative feedback manner. During standby operation, the SMPS is required to generate the DC output supply voltage that energizes the remote control unit. However, most other stages of the television receiver are inoperative and do not draw supply currents. Consequently, the average value of the duty cycle of the chopper transistor may have to be substantially lower during standby than during normal operation.

Because of, for example, storage time limitation in the chopper transistor, it may not be possible to reduce the length of the conduction interval in a given cycle below a minimum level. Thus, in order to maintain the average value of the duty cycle low, it may be desirable to operate the chopper transistor in an intermittent or burst mode, during standby. During standby, a long dead time interval occurs between consecutively occurring burst mode operation intervals. Only during the burst mode operation interval switching operation occurs in the chopper transistor. The result is that each of the conduction intervals is of a sufficient length.

In accordance with an aspect of the invention, burst mode operation intervals are initiated and occur at a rate that is determined by a repetitive signal at the frequency of the AC mains supply voltage. For example, when the mains supply voltage is at 50 Hz, each burst mode operation interval, when switching cycles occur, may last 5 milliseconds and the dead time interval when no switching cycles occur, may last during the remainder portion or 15 milliseconds. Such arrangement that is triggered by a signal at the frequency of the mains supply voltage simplifies the design of the SMPS.

The burst mode operation intervals that occur in standby operation are synchronized to the 50 Hz signal. During each such interval, pulses of current are produced in transformers and inductances of the SMPS. The pulses of current occur in clusters that are repetitive at 50 Hz. The pulses of current occur at a frequency that is equal to the switching frequency of the chopper transistor within each burst mode operation interval. Such qurrent pulses might produce an objectionable sound during power-off or standby operation. The objectionable sound might be produced due to possible parasitic mechanical vibrations as a result of the pulse currents in, for example, the inductances and transformers of the SMPS.

In accordance with another aspect of the invention, the change in the AC mains supply voltage during each period causes the length of the conduction interval in consecutively occurring switching cycle during the burst mode operation interval to increase progressively. Such operation that occurs during each burst mode operation interval may be referred to as soft start operation. The soft start operation causes, for example, gradual charging of capacitors in the SMPS. Consequently, the parasitic mechanical vibrations are substantially reduced. Also, the frequency of the switching cycles within each burst mode operation interval is maintained above the audible range for further reducing the level of such audible noise during standby operation.

A switch mode power supply, embodying an aspect of the invention, for generating an output supply voltage during both a standby-mode of operation and during a run-mode of operation includes a source of AC mains input supply voltage. A control signal at a given frequency is generated. A switching arrangement energized by the input supply voltage and responsive to the first control signal produces a switching current during both the standby-mode of operation and the run-mode operation. The output supply voltage is generated from the switching current. An arrangement coupled to the switching arrangement and responsive to a standby-mode/run-mode control signal and to a signal at a frequency that is determined by a frequency of the AC mains input supply voltage controls the switching arrangement in a burst mode manner during the standby-mode of operation. During a burst interval, a plurality of switching cycles are performed and during an alternating dead time interval no switching cycles are performed. The two intervals alternate at a frequency that is determined by the frequency of the AC mains input supply voltage.



TEA5170 SWITCH MODE POWER SUPPLY SECONDARY CIRCUIT:

.INTERNAL PWM SIGNAL GENERATOR .POWER SUPPLY WIDE RANGE 4.5V – 14.5V .SOFT START .REFERENCE VOLTAGE 2V ± 5% .WIDE FREQUENCY RANGE 250kHz .MINIMUM OUTPUT PULSE WIDTH 500nS
.MAXIMUM PRESET DUTY CYCLE
.SYNCHRONIZATION WINDOW
.OUTPUT SWITCH .UNDERVOLTAGELOCKOUT .FREQUENCYRANGE WITH SYNCHRONIZATION 64kHz



DESCRIPTION
The TEA5170 is designed to work in the secondary
part of an off-line SMPS, sending pulses to the
slaved TEA2260/61 which are located on the primary
side of the main transformer. An accurate
regulated voltage is obtained by duty cycle control.
The TEA5170 can be externally synchronized by
higher or lower frequency signal, then it could be
used in applications like TV set ones.



GENERAL DESCRIPTION
The TEA5170 takes place in the secondary part of
an isolated off-line SMPS. During normal mode
operation, it sends pulses to the slave circuit located
in the primary side (TEA2164, TEA2260/61)
through a pulse transformer to achieve a very
precisely regulated voltage by duty cycle control.
The main blocs of the circuit are :
- an error voltage amplifier
- an RC oscillator
- an output stage
- a VCC monitor
- a voltage reference bloc
- a pulse width modulator
- two logic blocs
- a soft start and Duty cycle limiting bloc
PRINCIPLE OF OPERATION
The TEA5170 sends pulses continuously to the
slave circuit in order to insure a proper behaviour
of the primary side.
- According to this, the output duty cycle is varying
between DON (min.) (0.05) and DON (max.) (0.75) :
then even in case of open load, pulses are still
sent to the slave circuit.

SYNCHRONIZED MODE
The TEA5170 will enter the Synchronized Mode
when it receives one pulse through Rt during Ct
discharge.
At that time Ct charging current will be multiplied
by 0.75 and period will increase up to To x 1.26.
Apulse occuring during the synchro window, commands
the Ct downloading. If none, the TEA5170
will return to normalmode at the end of the period.

STARTING
When VCC is under 4V, output pulses are not
allowed and the slave circuit keeps its own mode.
When VCC is going over 4V, output pulses are sent
via the pulse transformer (or an optical device) to
the slave circuit which is synchronizing and entering
the slaved mode. Output pulses can be shut
down only if VCC goes below 3.8 Volt.
SOFT START
Using Csf, it is possible to make a soft start sequence.
When VCC grows from 0V to 4V, voltage
on Csf equals0V.When VCC is higher than 4V, Csf
is loaded by a 3.7mA current, then TonMAX (Vcsf)
will vary linearly from Tonmin to Tonmax according
to Csfst bias.
When VCC will go low (3.8 Volt threshold), Csf will
be downloadedby an internal transistor.





TDA8175 TV VERTICAL DEFLECTION OUTPUT CIRCUIT
POWER AMPLIFIER
.FLYBACK GENERATOR
.AUTOMATIC PUMPING COMPENSATION
.THERMAL PROTECTION
.REFERENCE VOLTAGE

DESCRIPTION
The TDA8175 is a monolithic integrated circuit in
HEPTAWATT package. It is a high efficiency power
booster for direct driving of vertical windings of TV
yokes. It is intended for use in Color and B & W
television sets as well as in monitors and displays. THERMAL PROTECTION
The thermal protection circuit intervenes when the
die temperatures reaches 150oC and turns-off the
output power device.
PUMPING COMPENSATION
The device incorporatesa special preampliflier, the
gain of which varies withchanges in supplyvoltage.
This functionallows perfect compensationof height
variations caused by changes in brightness.



TDA8140 HORIZONTAL DEFLECTION POWER DRIVER
DESCRIPTION
The TDA 8140 is a monolithic integrated circuit designed
to drive the horizontal deflectionpower transistor.
The current source characteristic of this device is
adapted to the on-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8140 is internally protected
against short circuit and thermal overload.

During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitry mustbe adaptedto the required
base current in order to ensure the power transistor
saturation.
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 5
wegive a comparisonbetweenthe typical real base
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base current
which gives an additional power dissipation on
the power transistor.
Furthermoreduring the turn-ONand turn-OFFtransient
phase of the chassis the power transistor is
extremely stressed when the conventionalnetwork
cannot guarantee the saturation ; for this reason,
generally, the driving circuit must be carefully designed
and is different for each deflection system.
The new approach, using the TDA 8140, overcomes
these restrictions by means of a feedback
principle.
As shown in Figure 5, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the required
base current Ib can be easily generated by a feedback
transconductanceamplifier gm which senses
the deflection current across the resistor Rs at the
emitter of the power transistor and delivers :
Ib = RS . gm . Ie
The transconductance must only fulfill the condition
:
1
1 + bmin V 1
RS
<>
RS
Where bmin is the minimum current gain of the
transistor. This method always ensures the correct
base current and acts time independent on principle.For the turn-OFF, the base of the power transistor
must be discharged by a quasi linear time decreasing
current as given in Figure 6.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
This is due to the constant base charge in the
turn-ON phase independent from the collector current
; hence a high peak current results into a low
storage time of the transistor because the excess
base charge is a minimum and vice versa. In the
active deflection the required function, high peak
current-fast switch-OFF and low peak current-slow
switch-OFF, is obtained by a controlled base discharge
current for the power transistor ; the negative
slope of this ramp is proportional to the actual
sensed current.
As a result, the active driving system even improves
the sharpnessof vertical lines on the screen
compared with the traditional solution due to the
increasedstability factor of the loop representedas
the variation of the storagetime versus the collector
peak current.


TDA2545A Quasi-split-sound circuitGENERAL DESCRIPTION The TDA2545A is a monolithic integrated circuit for quasi-split-sound processing in television receivers. Features · 3-stage gain controlled i.f. amplifier · A.G.C. circuit · Reference amplifier and limiter amplifier for vision carrier (V.C.) processing · Linear multiplier for quadrature demodulation.


TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
televisionreceiversusingPNPorNPNtuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).







TDA1521 TDA1521Q 2 x 12 W hi-fi audio power amplifier:
GENERAL DESCRIPTION
The TDA1521/TDA1521Q is a dual hi-fi audio power amplifier encapsulated in a 9-lead plastic power package.
The device is especially designed for mains fed applications (e.g. stereo tv sound and stereo radio).
Features
· Requires very few external components
· Input muted during power-on and off
(no switch-on or switch-off clicks)
· Low offset voltage between output and ground
· Excellent gain balance between channels
· Hi-fi according to IEC 268 and DIN 45500.

FUNCTIONAL DESCRIPTION
This hi-fi stereo power amplifier is designed for mains fed applications. The circuit is designed for both symmetrical and
asymmetrical power supply systems. An output power of 2 ´ 12 watts (THD = 0,5%) can be delivered into an 8 W load
with a symmetrical power supply of ± 16 V.
The gain is fixed internally at 30 dB. Internal gain fixing gives low gain spread and very good balance between the
amplifiers (0,2 dB).
A special feature of this device is a mute circuit which suppresses unwanted input signals during switching on and off.
Referring to Fig.13, the 100 mF capacitor creates a time delay when the voltage at pin 3 is lower than an internally fixed
reference voltage. During the delay the amplifiers remain in their DC operating mode but are isolated from the
non-inverting inputs on pins 1 and 9.
Two thermal protection circuits are provided, one monitors the average junction temperature and the other the
instantaneous temperature of the power transistors. Both protection circuits activate at 150 °C allowing safe operation to
a maximum junction temperature of 150°C without added distortion.

Input mute circuit
The input mute circuit operates only during switching on and off of the supply voltage. The circuit compares the 1/2 supply
voltage (at pin 3) with an internally fixed reference voltage (Vref), derived directly from the supply voltage. When the
voltage at pin 3 is lower than Vref the non-inverting inputs (pins 1 and 9) are disconnected from the amplifier. The voltage
at pin 3 is determined by an internal voltage divider and the external 100 mF capacitor.
During switching on, a time delay is created between the reference voltage and the voltage at pin 3, during which the
input terminal is disconnected.