Richtige Fernseher haben Röhren!

Richtige Fernseher haben Röhren!

In Brief: On this site you will find pictures and information about some of the electronic, electrical and electrotechnical Obsolete technology relics that the Frank Sharp Private museum has accumulated over the years .
Premise: There are lots of vintage electrical and electronic items that have not survived well or even completely disappeared and forgotten.

Or are not being collected nowadays in proportion to their significance or prevalence in their heyday, this is bad and the main part of the death land. The heavy, ugly sarcophagus; models with few endearing qualities, devices that have some over-riding disadvantage to ownership such as heavy weight,toxicity or inflated value when dismantled, tend to be under-represented by all but the most comprehensive collections and museums. They get relegated to the bottom of the wants list, derided as 'more trouble than they are worth', or just forgotten entirely. As a result, I started to notice gaps in the current representation of the history of electronic and electrical technology to the interested member of the public.

Following this idea around a bit, convinced me that a collection of the peculiar alone could not hope to survive on its own merits, but a museum that gave equal display space to the popular and the unpopular, would bring things to the attention of the average person that he has previously passed by or been shielded from. It's a matter of culture. From this, the Obsolete Technology Tellye Web Museum concept developed and all my other things too. It's an open platform for all electrical Electronic TV technology to have its few, but NOT last, moments of fame in a working, hand-on environment. We'll never own Colossus or Faraday's first transformer, but I can show things that you can't see at the Science Museum, and let you play with things that the Smithsonian can't allow people to touch, because my remit is different.

There was a society once that was the polar opposite of our disposable, junk society. A whole nation was built on the idea of placing quality before quantity in all things. The goal was not “more and newer,” but “better and higher" .This attitude was reflected not only in the manufacturing of material goods, but also in the realms of art and architecture, as well as in the social fabric of everyday life. The goal was for each new cohort of children to stand on a higher level than the preceding cohort: they were to be healthier, stronger, more intelligent, and more vibrant in every way.

The society that prioritized human, social and material quality is a Winner. Truly, it is the high point of all Western civilization. Consequently, its defeat meant the defeat of civilization itself.

Today, the West is headed for the abyss. For the ultimate fate of our disposable society is for that society itself to be disposed of. And this will happen sooner, rather than later.

OLD, but ORIGINAL, Well made, Funny, Not remotely controlled............. and not Made in CHINA.

How to use the site:
- If you landed here via any Search Engine, you will get what you searched for and you can search more using the search this blog feature provided by Google. You can visit more posts scrolling the left blog archive of all posts of the month/year,
or you can click on the main photo-page to start from the main page. Doing so it starts from the most recent post to the older post simple clicking on the Older Post button on the bottom of each page after reading , post after post.

You can even visit all posts, time to time, when reaching the bottom end of each page and click on the Older Post button.

- If you arrived here at the main page via bookmark you can visit all the site scrolling the left blog archive of all posts of the month/year pointing were you want , or more simple You can even visit all blog posts, from newer to older, clicking at the end of each bottom page on the Older Post button.
So you can see all the blog/site content surfing all pages in it.

- The search this blog feature provided by Google is a real search engine. If you're pointing particular things it will search IT for you; or you can place a brand name in the search query at your choice and visit all results page by page. It's useful since the content of the site is very large.

Note that if you don't find what you searched for, try it after a period of time; the site is a never ending job !

Every CRT Television saved let revive knowledge, thoughts, moments of the past life which will never return again.........

Many contemporary "televisions" (more correctly named as displays) would not have this level of staying power, many would ware out or require major services within just five years or less and of course, there is that perennial bug bear of planned obsolescence where components are deliberately designed to fail and, or manufactured with limited edition specificities..... and without considering........picture......sound........quality........
..............The bitterness of poor quality is remembered long after the sweetness of todays funny gadgets low price has faded from memory........ . . . . . .....
Don't forget the past, the end of the world is upon us! Pretty soon it will all turn to dust!

Have big FUN ! !
©2010, 2011, 2012, 2013, 2014 Frank Sharp - You do not have permission to copy photos and words from this blog, and any content may be never used it for auctions or commercial purposes, however feel free to post anything you see here with a courtesy link back, btw a link to the original post here , is mandatory.
All sets and apparates appearing here are property of Engineer Frank Sharp. NOTHING HERE IS FOR SALE !
All posts are presented here for informative, historical and educative purposes as applicable within Fair Use.

Saturday, October 5, 2013


The PANASONIC CHASSIS Z5 is a monocarrier based mainly around the PHILIPS TDA8361.

Aside the classic number of dry joint around the chassis it was reliable and durable offering great features for an analog 21 Inches color set.

Sometimes the power supply which is sligtly complex was difficult to repair unless getting original parts from PANASONIC.

Panasonic Z5 chassis was introduced in 1993 as a lower - cost replacement for the Z4 chassis in small -screen, monophonic sound sets. Whereas the Z4 had been designed to drive the more expensive Invar-mask FST picture tubes, the Z5 can drive cheaper iron -mask non-FST displays. The chassis was mainly developed by Panasonic's Cardiff design team. It employs a significant feature that's new for a non -Japanese Panasonic chassis, a 'hot' line output stage. This, in conjunction with a 'cold' field deflection circuit, means that an isolation split is required in the yoke. In fact the chopper, line driver and output transformers and the scan coils all have to provide mains isolation. Thus while the line scan circuit is hot, the EHT system and the field scan circuit remain cold. Obviously the picture tube, or at least the deflection coils, can't be replaced with a conventional non -isolated type. Other innovations include a linear transformerless remote -control standby circuit and a simple teletext option mounted on a small subpanel. This features four -page text storage with both FLOF and TOP text. Initially only 21in. models were equipped with CATS (Contrast Auto Tracking System), an automatic contrast control system that employs a light -dependent resistor to sense the ambient light level. This feature was subsequently added to all UK models. The rather exotic on -screen calendar/calculator/`mood light' used in the Z4 chassis was dropped however. A single AV input is provided, via both scart and phono sockets, with no S video connector. Unlike the Z4, NTSC playback is not possible, though continental variants have Secam and modified NTSC facilities. The scart connector does allow for external RGB signal display however, and has a tuner AV output. The non -text TC14S1R and TC21S1R and the text TX14S1T and TX21S1T are amongst the more popular models fitted with the chassis. Some models with cosmetic variations have been added - the S2R and S2T versions. There are also cabinet colour variants. Some sets are fitted with Philips tubes (suffix /B) while others have Thomson types (suffix /BH). Layout and Access From the servicing point of view the most obvious improvement in the Z5 compared with the Z4 is the reduced number of PCBs. There are usually only two, the main panel E and the CRT base panel Y. When added, the text board T is a daughter board that's soldered directly into panel E. This is the first Panasonic chassis to have so few interconnecting leads! The circuitry is arranged as follows: Panel E contains the power supply, the tuner, the IF, vision and sound processing stages, the sync and timebase circuitry, the audio output chip, the microcontroller chip and its associated devices and the AV connectors. Panel Y contains the RGB output stages and CRT base. Option panel T contains the teletext decoder and an RGB switch. Option panel A contains a Secam L decoder (for French models only).

 Fig. 1 shows the general layout. Service access is very good. Simply remove the back cover screws and a front panel retaining screw near the AV connector. Panel E can then be gently pulled up and back. As usual with Panasonic models a 'service position' is provided: panel E can be clipped to the inside vertical side of the cabinet. The set can be operated normally in this condition, with access to both sides of the main PCB. IC Complement The accompanying table lists the ICs used in the chassis. The mixture of European and Japanese devices reflects the origins of different parts of the design. There are various differences with continental models, as follows. The TDA3843 in position IC201 is an additional sound IF chip for Secam L and L' sets (French models), which also have a 4053 CMOS switch (IC202). IC601 is type TDA8362 and IC602 type TDA4662 to provide multistandard operation.

 On panel E IC251 IC451 IC601 AN5265 TDA3653C TDA8361 IC602 TDA4661V2 IC801 STR5 1 203M STR51224M IC851 AN78M05LB I IC852 AN78M12LB1 IC1202 MN152811XXX IC1203 MN128OR IC 1204 RPM637CBRS IC1205 ST24CO2CB I On panel T IC3501 IC3502 IC3504 IC3505 CF72306 CF70205ANW LA7222TV AN5862K Audio amplifier Field driver and output IF, colour decoder, RGB switching, timebase generators Chroma delay line Chopper (14in. models) Chopper (21 in. models) 5V regulator 12V regulator Microcontroller (suffix depends on model) Reset Remote control receiver EEROM Video data slicer Text decoder AV switch RGB switch.

 IC603, type TDA8395, is a Secam chroma delay line used in French models. The text decoder 1C3502 is type CF70204NW for Central and Eastern Europe, type CF70209NW for Russian and type CF70210NW for Hebrew.


The Power Supply The chopper power supply, which operates in synchronism with the line timebase, uses a new Sanken chip. Fig. 2 shows the circuitry on the primary side. A feature of the design is that when the microcontroller chip switches the set to standby the power supply doesn't stop, as with many designs. Instead, its duty cycle is reduced until the output is just sufficient to run the control system but not the other parts of the set. There is thus no need for an extra standby power supply transformer. This has two advantages, reduced cost and lower power consumption in the standby mode. The power supply has two distinct operating modes therefore, standby and full operation. We'll look at each in turn. Standby Mode After passing via the usual fuse, filter and on/off switch the AC mains input is presented to the bridge rectifier D801-4 which charges its reservoir capacitor C807. Approximately 300V DC is developed across this capacitor and is fed via the primary winding (P1-2) on the chopper transformer T801 to the collector of transistor Q1 in the chopper chip IC801 (pin 3). Q1 's base (pin 2) receives a small start-up bias via R818, R802 and L804. As a result it conducts and a voltage appears at pin 4 of the chip. This is fed to the +B2 line via R828. It appears at the collector of the standby switching transistor Q803 via D810 and R812. The standby command optocoupler D813 is off, and Q803' s base is forward biased via R813 and R821. Q803 is thus switched on, and the +B2 voltage is held at typically 1V. The current flowing in T801's primary winding produces a reverse current in winding B1-2. D811 rectifies the voltage at pin B1, charging C813 whose positive terminal is connected to the +B2 link C813's negative terminal will be at approximately -2V. As a result Q804 and in turn zener diode D817 conduct, clamping the DC voltage at pin 2 of IC801 ataround 1V. Chopper transistor Q1 is therefore prevented from being switched to full on. Because of the feedback via D816 and R803, the circuit oscillates. This is the stable standby state. In the standby mode T801 produces, via rectifier D851 with its reservoir capacitor C852, about 12V on the +B4 rail. The 5V regulator IC851 produces the +B10 supply for the microcontroller chip IC1202. Fig. 3 shows, somewhat simplified, the secondary side of the chopper power supply circuit. Note that in standby the microcontroller's power on/off output signal is also used to switch off Q851 so that there's no voltage on the +B9 rail. Otherwise the +B4 and +B9 rails would be linked. This prevents the IF/colour decoder/timebase generator chip IC601 being powered. Operating Mode When the microcontroller issues a power on command, Q851 and the optocoupler D813 switch on. With D813 conductive, the voltage at the base of Q803 falls to zero and it switches off. The rise in its collector voltage triggers thyristor D820, which switches on. C814 is now able to charge from the 300V supply via R811, R819 and R810. In addition, with D820 conductive the charge (around 90V) developed across C818 in the standby mode is available on the +B2 rail, which is used to power the line output tranistor - both are on the hot side of the circuitry. With Q851 switched on IC601, which contains the line generator, can come into operation. The line timebase starts up, producing flyback pulses. These are coupled via R806 and D809 to pin 2 of IC801, i.e. the base of the chopper transistor Q 1. This pulse feed does not require isolation, as it comes from the hot side of the line output transformer. As the +B2 voltage rises, so the voltage at the negative  low terminal of C813 becomes positive and Q804 switches off. Q2 in IC801 is also switched off, enabling Q1 to be triggered by the line pulses at its base. It is now able to switch on fully, driven by the feedback to its base via D816, R803 and L804. When it saturates, the voltage across winding B1-2 falls and Q1 then switches off until the next line pulse appears. The power supply and the line timebase thus operate synchronously. The efficiency of the power supply is increased by charging C814 via D806 and D820 when Q1 switches off. Q3 adjusts the DC conditions at the base of Q1 to provide regulation. Q805 provides excess current protection by sensing the voltage developed across R828. It switches on under excess -current conditions to remove the drive to Q 1 . D808 provides overvoltage protection. The chopper power supply provides several outputs. Others are derived from the line output transformer. Most vary depending on whether the set is in the standby or operational condition. They are listed in the accompanying table.  

The Microcontroller As in all current Panasonic models the microcontroller chip IC1202 is a Matsushita device. It has 42 pins and contains 8K of ROM. Other features include frequency - synthesis tuning, two resistive keyboard scan inputs, a contrast sensor input, 50/60Hz detection and switching, an on -screen display character generator, AV switch control, seven pulse -width modulated control outputs, a self -test mode and I2C bus operation.The use of presettable option pins enables the chip to be set up for text/non-text or UK/continental operation. Associated devices in the control system are as follows: IC1205, a serial EEROM for storage of the customer settings; the reset generator IC1203; and the remote control receiver IC1204. Fig. 4 shows the basic arrangement. IC1202' s pin functions are listed in the accompanying table. Note that several functions, particularly those related to multi -standard operation, are not used in UK sets. Most of the pins have a 470pF capacitor connected to chassis to provide antistatic protection. These are not shown in the accompanying diagrams.  Some pins may or may not be connected to external circuitry depending on the options in use. Even when connected, some operations function with only certain models. Pins 2 and 12 for example are used with French sets, while pin 41 was initially used with 21in. models only. Pins 3 and 40 are always connected to chassis, as the Z5 chassis does not provide NTSC colour reception or S video operation. Pins 29 and 33 are left open -circuit, as only green OSD characters are displayed. All models now use the scart slow -switch feature (pin 39). Pins 20 and 21 have dual functions. They operate as keyscan inputs able to sense the value of a resistor or a push-button selected resistor ladder. The residual resistance, when no button is depressed, sets the option mode. As these models have only five user control buttons (TV/AV, up, down, function and store), only keyscan 1 is used. Use is made of both option 1 and 2 however. The on -board keys are all connected to the resistor ladder. When a button is pressed, a different resistance value and thus voltage at pin 21 is selected. The last resistor in the chain (R1215) is fitted only in teletext models, its presence confirming that a text decoder is fitted (option 1). The keyscan 2/option 2 input is used to tell IC1202 in which area the set is to be used. This enables the micro to set the correct channel numbers and select the required frequency bands. The values of R1212/3 set the voltage at pin 20: 5V is the UK mode, 2.7V indicates French use and less than 1V continental use. Self Test and the EEROM A useful feature is the microcontroller chip's self -test mode. Access to this is obtained by reducing the colour and sharpness settings to minimum then simultaneously
pressing the set's function button and the remote control unit's off -timer button. This should produce the result CHECK 1+ 2- 3+, representing the tuner, the text processor and the EEROM respectively. If any check fails, there will be a minus instead of a plus symbol. Non- text models will of course show 1+ 2- 3+ when operating correctly. A second row of self -test display digits indicates the settings of options 1-6. A typical display is 11 47 46. Options 1 and 2 are, as previously mentioned,set by hardware. Options 3-6 can be selected from the self-test screen. Most of these options will not operate if the respective hardware is not fitted. They enable the text, tuning and audio options to be changed, as wellas turning the CATS system on or off. The numbers displayedare decimal values that correspond with six data bits which define each option, including some extra option 1 and 2 bits that are not accessible by means of hardware changes. These values are stored in the EEROM. Further information can be found in the Panasonic Z5 Technical Guide. The EEROM also stores user information, defining the 50 -channel programme memory, AFC offset and, with non -UK models, the colour system and subcarrier settings. It also retains a 'last memory' of theuser control settings. This includes the programme number, all the DAC settings and the last CATS eye value. Analogue Controls The analogue control outputs are all provided by 64-step pulse -width modulated output drivers within IC1202. A large mark -space ratio output represents the maximum level, a small mark -space ratio the minimum level. Digital to analogue conversion is achieved by filtering the outputs. As each output is a DC control level, preset levels (such as the factory sub -colour setting) can be obtained by adding a preset potentiometer across the output. The contrast PWM output at pin 13 is mixed with a control voltage obtained from the CATS circuit. A potential divider network is used to add voltages, a light - dependent resistor forming the bottom section. This item is fitted just behind the set's front panel. Variations in the ambient light level and the CATS sensitivity setting (pin 41, IC1202) alter the voltage at the base of Q1210 and thus its conduction. As the conduction of Q1210 increases, the contrast control voltage falls. There is also a small effect on the brightness, via R1254 and R321. Pin 41 of IC1202 can be set at chassis potential,open - circuit or high. This changes the CATS sensitivity to off, medium and high respectively. On -screen Display and RGB Switching The Z5 chassis uses a simplified on -screen display system. Green OSD signals from pin 32 of IC1202 and composite blanking from pin 31 are buffered by emitter- followers and then mixed directly with the RGB outputs from IC601 as they pass to the output stages on the tube's base panel. In text sets the external RGB inputs from the scart socket go to panel T, where IC3505 carries out text/AV RGB selection. Fig. 5 shows this. The selected signals go to IC601 on panel E, where they or the video/OSD RGB signals are selected. Jumper leads to bypass panel T are used for the external RGB inputs in non -text models. AV Switching Pin 10 of IC1202 sets the mode to TV or AV while pin 9 sets to text or normal. In text equipped sets, external video SIP from T201 5 6 SIF External audio AV TV 15 13 Part IC501 Audio Video Video polarity select from the scart connector or the phono socket and demodulated video from IC601 leave the E panel andpass to the video switching chip IC3504 on panel T. Pin 4 of this device receives the mode select signal from IC1202, low for TV (normal) or high for external AV. A further switch in IC3504 is used to select either the output from the first switch or teletext sync pulses from the text processor chip. The selected signals are buffered on panel T after which they return to panel E where theyare fed to pins 13 and 15 of IC601. These pins are the inputs ofan internal video mode switch which is not used in text equipped models. Audio signals are switched within IC601, also under the control of IC1202. IC601 has an internal sound IF filter, so it can accept either the audio from the W circuit or external (baseband) audio. Fig. 6 shows the AV switching arrangement. Innon -text models without panel T the external and internal videogo straight to IC601 for selection, via jumper links JEK and JEL respectively. Audio selection remains as in the text models. French models have an additional control signal from pin 12 of IC1202. This is used to invert the video polarity when system L signals with positive video modulationare received. Standby Control IC1202 sets the receiver to standby by producing a low level output at pin 24 - see Fig. 3. This switches off Q1203, preventing current flow in optocoupler D813. Q803 is thus able to conduct, as previously described. Q1203 also switches Q851 off, via Q853, isolating the 8V line - again as described earlier. The standby status is indicated by D1203, which is driven by pin 5 of IC1202 via Q1202 and the optocoupler D822. In the standby mode pin 5 is high so D1203, Q1202 and D822 are all conductive. In normal operation pin 5 of IC1202 is low and the standby LED D1203 is off. When a remote control command is received, the output from pin 5 is modulated. The standby LED thus flickers. If the mains power is disconnected or the set is switched off, the microcontroller's 5V supply continues for a few seconds. Optocoupler D822 is in thiscase used to break the circuit to the LED so that it goes out immediately.

Microcontroller Pin Functions Pin Function 1 5V supply 22 Field pulse for OSD sync 2 Mute 2 input (from sync) 23 Volume control output (PWM) 3 Tint mode select (NTSC only) 24 On/standby output 4 Mute 1 input (from VIF) 25 Factory test pin 5 Standby/remote LED drive 26 50/60Hz detect (field pulse input) 6 50/60Hz select 27 Video mute output 7 Reset input 28 NTSC tint control output (PWM) 8 Subcarrier select (Secam/Zwietone) 29 OSD blue output 9 TV/text select 30 Line sync pulse input 10 AV1 select 31 OSD blanking output 11 AV2 select 32 OSD green output 12 Video polarity select (Secam) 33 OSD red output 13 Contrast control output (PWM) 34 Remote control data input 14 Sharpness control output (PWM) 35 Crystal osc. 2 15 Colour control output (PWM) 36 Crystal osc. 1 16 Brightness control output (PWM) 37 I2C bus clock in/out 17 RGB, mode select 38 I2C data bus in/out 18 AFC input 39 Scarf slow switch input 19 Mute 1 input 40 S video select output 20 Keyscan 2/option 2 41 CATS sensitivity 21 Keyscan 1/option 1 42 Chassis


PANASONIC TC-14S1RC  CHASSIS Z5   Synchronized switch-mode power supply:

In a switch mode power supply, a first switching transistor is coupled to a primary winding of an isolation transformer. A second switching transistor periodically applies a low impedance across a second winding of the transformer that is coupled to an oscillator for synchronizing the oscillator to the horizontal frequency. A third winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a DC control voltage in the capacitor that varies in accordance with a supply voltage B+. The control voltage is applied via the transformer to a pulse width modulator that is responsive to the oscillator output signal for producing a pulse-width modulated control signal. The control signal is applied to a mains coupled chopper transistor for generating and regulating the supply voltage B+ in accordance with the pulse width modulation of the control signal.


The invention relates to switch-mode power supplies.

Some television receivers have signal terminals for receiving, for example, external video input signals such as R, G and B input signals, that are to be developed relative to the common conductor of the receiver. Such signal terminals and the receiver common conductor may be coupled to corresponding signal terminals and common conductors of external devices, such as, for example, a VCR or a teletext decoder.

To simplify the coupling of signals between the external devices and the television receiver, the common conductors of the receiver and of the external devices are connected together so that all are at the same potential. The signal lines of each external device are coupled to the corresponding signal terminals of the receiver. In such an arrangement, the common conductor of each device, such as of the television receiver, may be held "floating", or conductively isolated, relative to the corresponding AC mains supply source that energizes the device. When the common conductor is held floating, a user touching a terminal that is at the potential of the common conductor will not suffer an electrical shock.

Therefore, it may be desirable to isolate the common conductor, or ground, of, for example, the television receiver from the potentials of the terminals of the AC mains supply source that provide power to the television receiver. Such isolation is typically achieved by a transformer. The isolated common conductor is sometimes referred to as a "cold" ground conductor.

In a typical switch mode power supply (SMPS) of a television receiver the AC mains supply voltage is coupled, for example, directly, and without using transformer coupling, to a bridge rectifier. An unregulated direct current (DC) input supply voltage is produced that is, for example, referenced to a common conductor, referred to as "hot" ground, and that is conductively isolated from the cold ground conductor. A pulse width modulator controls the duty cycle of a chopper transistor switch that applies the unregulated supply voltage across a primary winding of an isolating flyback transformer. A flyback voltage at a frequency that is determined by the modulator is developed at a secondary winding of the transformer and is rectified to produce a DC output supply voltage such as a voltage B+ that energizes a horizontal deflection circuit of the television receiver. The primary winding of the flyback transformer is, for example, conductively coupled to the hot ground conductor. The secondary winding of the flyback transformer and voltage B+ may be conductively isolated from the hot ground conductor by the hot-cold barrier formed by the transformer.

It may be desirable to synchronize the operation of the chopper transistor to horizontal scanning frequency for preventing the occurrence of an objectionable visual pattern in an image displayed in a display of the television receiver.

It may be further desirable to couple a horizontal synchronizing signal that is referenced to the cold ground to the pulse-width modulator that is referenced to the hot ground such that isolation is maintained.

A synchronized switch mode power supply, embodying an aspect of the invention, includes a transfromer having first and second windings. A first switching arrangement is coupled to the first winding for generating a first switching current in the first winding to periodically energize the second winding. A source of a synchronizing input signal at a frequency that is related to a deflection frequency is provided. A second switching arrangement responsive to the input signal and coupled to the second winding periodically applies a low impedance across the energized second winding that by transformer action produces a substantial increase in the first switching current. A periodic first control signal is generated. The increase in the first switching current is sensed to synchronize the first control signal to the input signal. An output supply voltage is generated from an input supply voltage in accordance with the first control signal.

TDA8361 Integrated PAL and PAL/NTSC TV processor
The TDA8362 television processor microcircuit contains an intermediate frequency (IF) signal processing circuit, a multi-standard demodulator of a frequency-modulated sound signal, automatically tuned notch and band-pass filters in the video signal processing channel, a luminance signal delay line, a color signal decoder in the PAL and NTSC system with automatic detection systems, TV / AV input selector, RGB signal switching scheme, horizontal and vertical scanning synchronization circuits.
Variant TDA8362A also contains automatic white balance circuits. Thus, the TDA8362 includes all the basic low signal circuits needed to build a color television receiver.
The minimum number of elements connected to external circuits and only one element requiring adjustment (reference circuit of the IF signal demodulator) creates an exceptional usability of the TDA8362. As a result, the TDA8362 processor has become one of the most widely used chips in modern television technology.
The main characteristics of TDA8362 are given in table. 1.
Parameter Value
Supply voltage 8 ± 0.8
Current consumption, mA 80
Power consumption 0.7
Sensitivity of the IFI, μV 70
Sensitivity UPCHZ, mV 1
Sound signal from an external input, mVeff 350
Video signal from external input, Vp_p 1
Signals at the inputs in RGB, Bn n 0.7
Demodulated PTsTS, Vp-p 2,4
Tuner AGC control current, mA 0 ... 5
The range of voltage changes AFCG, V 6
Audio output signal (vyv. 50), mV 700
Output signals in RGB, Bn_n 4
Horizontal line output current, mA 10
Framing output current, mA 1
Control voltage range, V 0 ... 5
Table 1. Key Features of the TDA8362 Processor
The construction, pinout and basic parameters of all modifications of the TDA8362 microcircuits (with the exception of the TDA8362A variant) are the same. Features of their application will be discussed below.

Table 2 gives the pin assignment of TDA8362, and also shows the difference in pinout of the TDA8362 and TDA8362A options.
The latter contains a circuit for automatic white balance, the measuring signal at the input of which comes from pin 14 of TDA8362.

TDA8362 TDA8362A Pin assignment
1 1 Pre-emphasis correction of sound signal and switching to positive modulation
2 2 IF signal demodulator reference circuit
3 3 IF signal demodulator reference circuit
4 4 Video identification circuit output, sound switch input
5 5 IF signal input and volume control
6 6 Audio input from external connectors
7 7 PCTS output
8 8 Decoupling capacitor of the power supply circuit of the digital part
9 41 Earth 1 (common)
10 10 Power input
eleven eleven Earth 2 (common)
12 12 Decoupling capacitor filter settings
thirteen thirteen Internal video input
14 14 RF correction circuit adjustment input (sharpness)
fifteen fifteen External video input
16 16 Chroma input
17 17 Brightness adjustment
18 18 Exit to
19 19 Output G
20 20 Output R
21 21 RGB switch and blanking output
22 22 Signal output R (from external sources)
23 23 Signal output G (from external sources)
24 24 Signal output B (from external sources)
25 25 Contrast adjustment
26 26 Saturation Adjustment
27 27 Color tone adjustment (or color signal output)
28 28 CV input BY (from delay line)
29th 29th RRS input RY (from delay line)
thirty thirty RCS RY output (to delay line)
31 31 TsRS BY output (to the delay line)
32 32 4.43 MHz reference signal output on TDA8395
33 33 Phase detector filter
34 34 Conclusion connection of a quartz resonator of 3.58 MHz
35 35 4.43 MHz quartz resonator connection terminal
36 36 Power output to trigger horizontal scanning
37 37 Horizontal scan trigger output
38 38 Horizontal Flyback Pulse Input / Gating Pulse Output (SSC)
39 39 Phase Detector Filter 2
40 40 Phase Detector Filter 1
41 42 Frame Reverse Pulse Input
42 43 Conclusion conclusion of an RC chain of ZG frame scan
43 44 Firing trigger pulses output
44 9 AFC output
45 45 IF signal input 1
46 46 IF signal input 2
47 47 AGC circuit output
48 48 A conclusion of the connection of the decoupling capacitor of the AGC circuit
49 49 Tuner AGC adjustment input
fifty fifty Sound output
51 51 Conclusion connection output decoupling capacitor demodulator sound
52 52 Decoupling capacitor of the power control circuit
Table 2. TDA8362 Processor Pin Assignment

The IF image signal amplifier (IFI) is a three-stage differential amplifier with an adjustable gain and a symmetrical differential input (vyv. 45 and 46 TDA8362). The gain variation range is at least 64 dB. The sensitivity of the IFI (70 μV) is comparable to the parameters of modern specialized TDA8362 IFI.
Maximum input signal up to 100 mV eff. The IF signal is demodulated using a reference carrier frequency generated by passive regeneration of the carrier image. The reference circuit of the demodulator is connected to pin 2 and 3 of the TDA8362. It is the only item that needs to be configured. The demodulator provides the ability to process IF signals with both negative and positive modulation. The automatic frequency control circuit (AFC) generates a signal at pin 44 of TDA8362, which provides tuning of the tuner local oscillator frequency with an error of no more than 50 kHz.
The circuit uses the same reference signal as for the demodulator.
The built-in sampling-storage circuit ensures the protection of the AFC circuit from the penetration of a video signal. A storage capacitor is built into the TDA8362. The steepness of the characteristics of the AFC circuit (33 mV / kHz) directly depends on the quality factor of the reference circuit. To reduce the steepness, a resistor is connected to pin 44 of the TDA8362. The output voltage range is 6 V (at a nominal frequency of 3.5 V). The characteristic of the AFC for the TDA8362-N5 modification is optimized for the European IF standard. The automatic gain control (AGC) circuit generates the control voltage of the amplifier and the tuner (vv. 47 TDA8362), ensuring a constant amplitude of the signals at the input of the amplifier and at the output of the video amplifier.
To exclude the influence of the AGC circuit on the tuner at low levels of the input signal, an AGC response delay is introduced. The delay value is regulated by applying a control voltage to pin 49 of the TDA8362. The voltage variation range is 0.5 ... 4.5 V. The minimum and maximum signal levels at pin 49, at which the tuner AGC is triggered, are 0.2 mV eff and 150 mV eff, respectively.
The AGC detector monitors the amplitude of the clock pulses with negative modulation of the IF signal and white peaks with positive modulation. To ensure noise immunity, the gating of the detector is used. Gating is disabled for the duration of the reverse frame scan. This allows you to avoid changing the amplitude of the video signal in the playback mode from the VCR due to phase shifts that occur during the switching of video heads. A capacitor (usually 2.2 μF) is connected to pin 48 of the TDA8362, which sets the time constant of the AGC circuit.
The external connection of this capacitor provides the flexibility of using the TDA8362. The permissible leakage current of the capacitor is 10 μA for negative and 200 nA for positive modulation. An increase in leakage current degrades the characteristics of the AGC circuit and leads to a change in the amplitude of the video signal during the field. The voltage at the output of the AGC circuit (vyv. 47) is at maximum gain (U pit +1) V and at minimum gain (saturation voltage) - 0.3 V.
Switching the demodulator and the AGC circuit to the IF signal processing mode with positive modulation is carried out by supplying voltage (U pit -1) V to pin 1 of TDA8362. The video signal identification circuit works independently of the synchronization circuit, which ensures that the setting is saved to the received television channel during translation TV to monitor mode.
The circuit generates the following signals at the output (pin 4 of TDA8362):
  • voltage no more than 0.5 V in the absence of a video signal (in this case, the sound detector is turned off);
  • voltage of 6 V when receiving a signal with a frequency of a subcarrier of color of 3.58 MHz;
  • voltage of 8 V when receiving a signal with a frequency of a subcarrier of color 4.43 MHz.
In the modification of TDA8362-N5, an identification mode is provided for tuner detuning. To do this, when the signal is weak, the gating of the tuner AGC circuitry for the time of receiving horizontal synchronization pulses is disabled, which prevents erroneous identification of color subcarrier outbreaks by signals. The video amplifier provides amplification of the detected video signal, matching with the load and limiting noise emissions in the video signal.
The signal amplitude at the output (pin 7 of TDA8362) is 2.4 V. The output impedance of the amplifier is not more than 50 Ohms, the load current is not more than 5 mA. The bandwidth of the video amplifier (at the level of -3 dB) is up to 9 MHz, which makes it possible to use TDA8362 in all broadcasting standards. The emission control scheme provides the inversion of white peaks exceeding 4.8 V, noise emissions having a level below 1.4 V (the tops of the clock pulses have a level of 2 V), and their introduction into the video signal at 3.2 V and 2.6 V , respectively. At the same time, the noise emission inversion circuit only works during the reception of a large signal, since with a weak signal it negatively affects the operation of the audio signal processing channel.
In the modification of TDA8362-N4, an ultra-white peaks binding scheme is used in the video signal. The TDA8362-N5 modification does not use a white peak limiting scheme, since when there are a large number of white peaks, inverting and introducing them at 3.2 V results in the image becoming gray.
The sound signal to the second PC sound extracted from the full television signal is fed to pin 5 of the television processor (TDA8362). To the same output, a control voltage is supplied through the resistor to adjust the volume. The control voltage range is 0 ... 5 V.
The IF signal of the sound is limited and fed to the demodulator, made in the form of a phase locked loop (PLL). The PLL system is automatically tuned to the input frequency and does not require adjustments. The PLL system capture range is 4.2 ... 6.8 MHz.
The preliminary amplifier (PU) provides amplification of the detected sound signal to a level of 350 mV eff. This signal, which is not adjustable in magnitude, is fed to pin 1 of the TDA8362, to which an external capacitor is connected to correct the distortion of the sound signal, and to the switching and volume control circuitry. PU also provides mute when there is no identification of the video signal.
The signal from pin 1 of the TDA8362 is used to output to external connectors (for example, SCART). The sound signal from external connectors is fed to pin 6 of the TDA8362, its magnitude is 350 mV eff. The switching circuit, controlled by the voltage supplied to pin 16 of the TDA8362, provides for the output of pin 50 of the TDA8362 sound output signal, which then goes to the low-frequency amplifier.
The value of the output signal, which is -6 dB from the maximum is 700 mB eff, when adjusting the volume changes in the range of 80 dB. DC voltage at the terminal 50 TDA8362 3.3 V (when turning off the sound 10 ... 50 mB). The TDA8362-N5 modification provides click protection in the speakers when the sound is turned on, while using the previous TDA8362 modifications, a 290 kOhm resistor was needed between pin 1 of the TDA8362 and the +8 B bus to solve this problem.
Switching the TDA8362 to the signal processing mode with positive modulation is carried out by supplying at least 1 (U pit - 1) V to pin 1 of the TDA8362.
The selection of clock pulses (SI) from the video signal arriving at vyv.13 or 15 TDA8362 is carried out by a selector containing an amplifier, an amplitude selector and a circuit for the selection of lowercase and frame SI.
Lower case SIs are supplied to the first phase detector (PD1) and a coincidence detector, which identifies the presence of a video signal and controls the synchronization of the master oscillator (ZG) of horizontal scanning. In the absence of synchronization, the voltage at pin 14 of the TDA8362 becomes low, which can be used to identify the presence of a video signal. PD1, together with a low-pass filter (LPF) connected to pin 40 of TDA8362, and a horizontal scan line generator form a PLL that provides frequency and phase adjustment of the pulse pulses to lower case SI parameters.
The time constant ФД1 is automatically switched (by switching internal resistance) according to the signals from the noise detector and from the coincidence detector. With an increase in the noise level in the video signal at pin 13 of TDA8362, the PD1 time constant increases (the output current is 30 μA). In the absence of a video signal, the time constant increases even more (output current 6 μA), which ensures synchronization in the on-screen display (OSD) mode.
When a normal signal is received, as well as when processing a signal fed to pin 15 of the TDA8362, the time constant decreases (output current 180 μA) to expand the capture band and increase the noise immunity of the synchronization circuit.
To ensure quick compensation of the phase error that occurs in the signal from the VCR when switching the video heads, the time constant is further reduced by about 1.5 times for the reverse scan time of the vertical scan (output current 270 μA). Thus, good synchronization circuit characteristics are achieved both in the case of receiving a weak signal and in the case of signal processing from a VCR.
The video signal span on pin 13 of the TDA8362 (including sync pulses) must be at least 2 V when a normal signal is received. Otherwise, the noise detector will switch the time constant at a lower IF signal level (switching occurs at a signal-to-noise ratio of 20 dB), which will lead to a “jitter” phase of the horizontal scanning signal.
To ensure the independence of the image phase from the horizontal frequency (15.625 or 15.734 kHz), the PD1 static characteristic has a very high slope. Horizontal scanning operates at a double horizontal scanning frequency. Its frequency is automatically calibrated using the tuning circuit by comparing it with the frequency of the generator with quartz stabilization of the color decoder. As a result, the frequency of free oscillations of the GB has a deviation of no more than 2% of the central value. At startup, calibration is always performed with 4.43 MHz quartz, unless the 3.58 MHz quartz forced mode is selected.
The second phase detector (FD2) ensures the formation of horizontal line triggering pulses on pin 37 of the TDA8362 and maintaining the phase of these pulses relative to 3G pulses in the capture mode in PD1. PD2 together with the low-pass filter connected to pin 39 of the TDA8362 and the 3G form a PLL. The initial phase of the image is set by changing the external load connected to pin 39 of TDA8362. The shift range is ± 2 μs when the control current changes within ± 6 μA. The horizontal flyback pulses necessary for the operation of PD2 are received at pin 38 of TDA8362.
At the same output, combined strobe pulses are formed, which are necessary for operation of integrated delay line microcircuits (TDA4661 or TDA4665) and SECAM decoder (TDA 8395).
Gating pulses have the following parameters:
  • binding voltage during the reverse pulse: 3 ± 0.4 V;
  • voltage during the quenching pulse: 2 ± 0.2 V;
  • voltage during the color subcarrier flash: 5.3 ± 0.5 V;
  • field blanking pulse width: 14 lines;
  • flash highlight pulse width: 3.5 ± 0.2 μs.
When using the TDA8362 in question, X-ray protection can be implemented. For this, the external detector must provide switching of a constant voltage (at least 6 V) on pin 39 of TDA8362. In this case, the formation of horizontal line triggering pulses stops, and the voltage at pin 37 of the TDA8362 becomes approximately equal to the supply voltage. If the voltage on pin 39 returns to its normal level, then trigger pulses reappear on pin 37.
Parameters of pulses of start of horizontal scanning:
  • lower level of output voltage: 0.3 V;
  • maximum level: U pit;
  • pulse duty cycle: 2;
  • maximum permissible output current: 10 mA.
The launch of the horizontal scanning line is carried out by applying a voltage of 8 V to terminal 36 of the TDA8362 (minimum starting current of 6.5 mA). It should be noted that it is possible to start when the current is 5.5 mA. At the same time, calibration of the ZG is not carried out and its frequency will be higher than the nominal (maximum frequency deviation is 75%).
 In TDA8362-N5, the maximum trigger pulse frequency is limited to 20 kHz. When the voltage on pin 36 of TDA8362 decreases to 5.8, the formation of start pulses immediately stops. If the pre-start mode of the ЗГ is not used, then pin 36 and 10 of the TDA8362 are connected to the 8 V power bus. With separate power supply, the voltage at pin 36 must always be greater than or equal to the voltage at pin 10 of the TDA8362.

The control pulses for the HR horizontal scan, which is a sawtooth voltage generator, are obtained by dividing the frequency of the horizontal horizontal scan.
The frequency divider has two operating modes.
The “large window” mode is activated when there is no synchronization or when a non-standard signal is received (the number of lines in a half-frame is from 311 to 314 in 50 Hz mode and from 261 to 264 in 60 Hz mode). In this case, the divider is in search mode and switches from a frequency of 45 Hz to a frequency of 64.5 Hz.
The narrow window mode is activated when more than 15 consecutive frame sync pulses are detected.
This is the standard mode of operation. In the absence of clock pulses, the reverse motion of Zr turns on at the end of the half-frame (window), which ensures minimal image distortion.
The divider switches back to search mode if there are no frame sync pulses for 6 consecutive periods of frame scan. To pin 42 of TDA8362 is connected an external RC chain of a 3G frame scan.
The amplitude of the sawtooth voltage at pin 42 is 1.5 ... 1.8 V. At pin 41 of the TDA8362, reverse-frequency pulses of a vertical sweep (from the output stage) are applied to ensure the linearity of the output voltage.
The constant voltage on pin 41 is 2.5 ± 0.5 V, the alternating voltage is 1 V. In the TDA8362, the kinescope is protected against burn-through in the event of a frame scan failure, which dampens the rays when the direct voltage on pin 41 of the TDA8362 increases or decreases by 1 5 in (relative to the above). Framing control pulses are formed on pin 43 of TDA8362. The maximum and minimum voltage are respectively 4 and 0.3 V.
The maximum permissible output current is 1 mA. The delay in turning on the vertical scan at power-on is 140 ms, and the output voltage is high. When you start the HR frame scan is turned on at a frequency of 60 Hz.
In the TDA8362-N5 modification, the launch is carried out at a frequency of 50 Hz, which is used for the on-screen display. The voltage at pin 43 of the TDA8362 when turned on is low, which makes it easier to start the frame sweep.
TDA8362 synchronization circuit The TDA8362 provides reliable horizontal and frame synchronization of the image when processing a signal from a VCR, both in the case of phase displacement of the clock pulses (with a stretched tape), and in the case of playing back video tapes with copy protection.

The full color television signal allocated on pin 7 of the TDA8362 passes notch filters to suppress the second intermediate frequency of the sound and goes to pin 13 of the TDA8362 (internal signal). On pin 15 of the TDA8362, a signal is supplied from external inputs (external signal).
The signal swing at pin 13 (including sync pulses) is 2 ... 2.8 V, and at pin 15 is TDA8362 1 ... 1.4 V. Switching the input video signal is carried out by a switching circuit controlled by voltage level on pin 16 of TDA8362 (U 16). At U 16 <0.5B, internal video and audio signals are processed (a notch filter that suppresses the color signal is turned on). With 3 <U16 <5V, external video and audio signals in the S-VHS standard are processed. In this case, a color signal is supplied to pin 16 of the TDA8362, and a brightness signal to pin 15. The notch filter is disabled in this mode. At U16> 7.5 V, external video and audio signals are processed (notch filter on).
The TDA8362 contains notch and bandpass filters to separate color and luminance signals.
The filter tuning scheme provides automatic adjustment of the filters in accordance with the frequency of the crystal oscillator included in the decoder. A pin 12 of the TDA8362 is connected to a decoupling capacitor of the tuning circuit.

In modification TDA8362-N5, the resonant frequency of the notch filter during signal processing in the SECAM system is reduced to 4.2 MHz to provide better suppression of the DR and DB subcarriers in the luminance signal. Filters are calibrated during the reverse frame scan. The luminance signal enters the delay line (480 ns) and the RF correction circuit, which provides an increase in the frequency response in the high-frequency region, and then to the matrixing circuit. pin 14 TDA8362 is used to control the RF correction circuit (image sharpness). The control voltage range is 0 ... 5 V. When a voltage of 7 V is applied to pin 14, the correction circuit is switched off (nominal mode). In the absence of a video signal, the current consumed by TDA8362 according to pin 14 increases to 1 mA (in versions N3 and N4 - up to 200 μA). The voltage on pin 14 is reduced. This information can be used to identify the video signal.

 The color signal is fed to a band-pass filter and an amplifier with AGC, and then to a decoder, which includes a generator with quartz frequency stabilization, a color difference signal demodulator (CRS), and a color off circuit.
The generator generating the signal of the reference subcarrier, the PD, and the low-pass filter connected to pin 33 of the TDA8362 form a PLL system that provides synchronization in frequency and phase of the signals of the reference subcarrier with a color burst signal (SCC). Quartz resonators are connected to pin 34 and 35 of the TDA8362, while a resonator with a frequency of 4.43 MHz is connected to pin 35. This frequency is used for calibrating 3G horizontal scanning, and to pin 34 - a resonator with a frequency of 3.58 MHz.
When using one quartz or connecting two quartz to one pin (usually to pin 34) and using an external switching circuit, pin 35, the TDA8362 is connected to the power bus through a 47 kOhm resistor. This ensures the forced inclusion of the generator.

When using modifications N4 and N5 TDA8362, the value of the resistor is reduced to 8.2 kOhm. This is essential to enable 3G line scan calibration. The system's automatic detection circuitry provides recognition of color signals in PAL and NTSC systems and switching of signal processing circuits.
To process the color signal in the SECAM system, a TDA8395 decoder is used, to which a 4.43 MHz reference signal is supplied from pin 32 of the TDA8362. The amplitude of the reference signal is 0.25 ± 0.5 V. In the case of identifying a color signal in a PAL or NTSC system, the voltage at pin 32 of the TDA8362 is 1.5 V. If there is no identification, the color scheme disables the outputs of the demodulator central circuit (pin 30 and 31) , and the voltage on pin 32 of the TDA8362 increases to 5 V. This voltage blocks the TDA8395 color shutdown circuit in m / s and connects its outputs to the central control system.

The current consumed by TDA8395 with pin 32 of TDA8362 when identifying a color signal in the SECAM system is 150 μA. Increasing the current to this value forces the TDA8362 to SECAM mode. In this case, the system automatic detection circuit does not search for color signals in PAL and SECAM systems. Forcing the TDA8362 to NTSC mode is not possible.

The color signal for the TDA8395 can be obtained on pin 27 of the TDA8362 by connecting this output to the power bus via a 4.7 ... 12 kΩ resistor. The signal span is 330 mV. This combination of chips can only be used as a PAL / SECAM decoder. In the case of color signals processing, PAL / SECAM / NTSC systems use an external color signal extraction circuit for TDA8395.

It should be noted that when using modifications N4 and N5 of TDA8362, to prevent erroneous identification of the signal from the video recorder in the SECAM system as NTSC, it is necessary to provide a voltage at the terminal 27 of TDA8362 of at least 6 V.

Available in TDA8360, TDA8361
and TDA8362
· Vision IF amplifier with high
sensitivity and good differential
gain and phase
· Multistandard FM sound
demodulator (4.5 MHz to 6.5 MHz)
· Integrated chrominance trap and
bandpass filters (automatically
· Integrated luminance delay line
· RGB control circuit with linear RGB
inputs and fast blanking
· Horizontal synchronization with two
control loops and alignment-free
horizontal oscillator without
external components
· Vertical count-down circuit
(50/60 Hz) and vertical preamplifier
· Low dissipation (700 mW)
· Small amount of peripheral
components compared with
competition ICs
· Only one adjustment (vision IF
· The supply voltage for the ICs is
8 V. They are mounted in a shrink
DIL envelope with 52 pins and are
pin compatible.
Additional features
· Alignment-free PAL colour decoder
for all PAL standards, including
PAL-N and PAL-M.
· PAL/NTSC colour decoder with
automatic search system
· Source selection for external
audio/video (A/V) inputs (separate
Y/C signals can also be applied).
· Multistandard vision IF circuit
(positive and negative modulation)
· PAL/NTSC colour decoder with
automatic search system
· Source selection for external
A/V inputs (separate Y/C signals
can also be applied)
· Easy interfacing with the TDA8395
(SECAM decoder) for
multistandard applications.
The TDA8360, TDA8361 and
TDA8362 are single-chip TV
processors which contain nearly all
small signal functions that are
required for a colour television
receiver. For a complete receiver the
following circuits need to be added:
a base-band delay line (TDA4661),
a tuner and output stages for audio,
video and horizontal and vertical
Because of the different functional
contents of the ICs the set maker can
make the optimum choice depending
on the requirements for the receiver.
The TDA8360 is intended for simple
PAL receivers (all PAL standards,
including PAL-N and PAL-M are
The TDA8361 contains a PAL/NTSC
decoder and has an A/V switch.
For real multistandard applications
the TDA8362 is available. In addition
to the extra functions which are
available in the TDA8361, the
TDA8362 can handle signals with
positive modulation and it supplies
the signals which are required for the
SECAM decoder TDA8395.

The TDA8361 has the following
differences to the pinning:
Pin 1: only audio de-emphasis
Pin 27: only hue control
Pin 32: 4.43 MHz output for TDA8395
is not connected.
Video IF amplifier
The IF amplifier contains
3 AC-coupled control stages with a
total gain control range of greater
than 60 dB. The sensitivity of the
circuit is comparable with that of
modern IF ICs.
The reference carrier for the video
demodulator is obtained by means of
passive regeneration of the picture
carrier. The external reference tuned
circuit is the only remaining
adjustment of the IC.
In the TDA8362 the polarity of the
demodulator can be switched so that
the circuit is suitable for both positive
and negative modulated signals.
The AFC circuit is driven with the
same reference signal as the video
demodulator. To ensure that the
video content does not disturb the
AFC operation a sample-and-hold
circuit is incorporated; the capacitor
for this function is internal. The AFC
output voltage is 6 V.
The AGC detector operates on levels,
top sync for negative modulated and
top white for positive modulated
signals.The AGC detector time
constant capacitor is connected
externally. This is mainly because of
the flexibility of the application.
The time constant of the AGC system
during positive modulation
(TDA8362) is slow, this is to avoid any
visible picture variations. This,
however, causes the system to react
very slowly to sudden changes in the
input signal amplitude.
To overcome this problem a speed-up
circuit has been included which
detects whether the AGC detector is
activated every frame period. If,
during a 3-frame period, no action is
detected the speed of the system is
increased. When the incoming signal
has no peak white information (e.g.
test lines in the vertical retrace period)
the gain would be video signal
dependent. To avoid this effect the
circuit also contains a black level
AGC detector which is activated when
the black level of the video signal
exceeds a certain level.
The TDA8361 and TDA8362 contain
a video identification circuit which is
independent of the synchronization
circuit. Therefore search tuning is
possible when the display section of
the receiver is used as a monitor. In
the TDA8360 this circuit is only used
for stable OSD at no signal input. In
the normal television mode the
identification output is connected to
the coincidence detector, this applies
to all three devices. The identification
output voltage is LOW when no
transmitter is identified. In this
condition the sound demodulator is
switched off (mute function). When a
transmitter is identified the output
voltage is HIGH. The voltage level is
dependent on the frequency of the
incoming chrominance signal.

Sound circuit
The sound bandpass and trap filters
have to be connected externally. The
filtered intercarrier signal is fed to a
limiter circuit and is demodulated by
means of a PLL demodulator. The
PLL circuit tunes itself automatically
to the incoming signal, consequently,
no adjustment is required.
The volume is DC controlled. The
composite audio output signal has an
amplitude of 700 mV RMS at a
volume control setting of -6 dB. The
de-emphasis capacitor has to be
connected externally. The
non-controlled audio signal can be
obtained from this pin via a buffer
stage. The amplitude of this signal is
350 mV RMS.
The TDA8361 and TDA8362 external
audio input signal must have an
amplitude of 350 mV RMS. The
audio/video switch is controlled via
the chrominance input pin.
Synchronization circuit
The sync separator is preceded by a
voltage controlled amplifier which
adjusts the sync pulse amplitude to a
fixed level. The sync pulses are then
fed to the slicing stage (separator)
which operates at 50% of the
The separated sync pulses are fed to
the first phase detector and to the
coincidence detector. The
coincidence detector is used for
transmitter identification and to detect
whether the line oscillator is
synchronized. When the circuit is not
synchronized the voltage on the
peaking control pin (pin 14) is LOW
so that this condition can be detected
externally. The first PLL has a very
high static steepness, this ensures
that the phase of the picture is
independent of the line frequency.
The line oscillator operates at twice
the line frequency.
The oscillator network is internal.
Because of the spread of internal
components an automatic adjustment
circuit has been added to the IC.
The circuit compares the oscillator
frequency with that of the crystal
oscillator in the colour decoder. This
results in a free-running frequency
which deviates less than 2% from the
typical value.
The circuit employs a second control
loop to generate the drive pulses for
the horizontal driver stage.
X-ray protection can be realised by
switching the pin of the second
control loop to the positive supply line.
The detection circuit must be
connected externally. When the X-ray
protection is active the horizontal
output voltage is switched to a high
level. When the voltage on this pin
returns to its normal level the
horizontal output is released again.
The IC contains a start-up circuit for
the horizontal oscillator. When this
feature is required a current of 6.5 mA
has to be supplied to pin 36. For an
application without start-up both
supply pins (10 and 36) must be
connected to the 8 V supply line.
The drive signal for the vertical ramp
generator is generated by means of a
divider circuit. The RC network for the
ramp generator is external.
Integrated video filters
The circuit contains a chrominance
bandpass and trap circuit. The filters
are realised by means of gyrator
circuits and are automatically tuned
by comparing the tuning frequency
with the crystal frequency of the
In the TDA8361 and TDA8362 the
chrominance trap is active only when
the separate chrominance input pin is
connected to ground or to the positive
supply voltage and when a colour
signal is recognized.
When the pin is left open-circuit the
trap is switched off so that the circuit
can also be used for S-VHS
The luminance delay line and the
delay for the peaking circuit are also
realised by means of gyrator circuits.
Colour decoder
The colour decoder in the various ICs
contains an alignment-free crystal
oscillator, a colour killer circuit and
colour difference demodulators.
The 90° phase shift for the reference
signal is achieved internally. Because
the main differences of the 3 ICs are
found in the colour decoder the
various types will be discussed.
This IC contains only a PAL decoder.
Depending on the frequency of the
crystals which are connected to the IC
the decoder can demodulate all PAL
standards. Because the horizontal
oscillator is calibrated by using the
crystal frequency as a reference the
4.4 MHz crystal must be connected to
pin 35 and the 3.5 MHz crystal to
pin 34. When only one crystal is
connected to the IC the other crystal
pin must be connected to the positive
supply rail via a 47 kW resistor. For
applications with two 3.5 MHz
crystals both must be connected to
pin 34 and the switching between the
crystals must be made externally.
Switching of the crystals is only
allowed directly after the vertical
retrace. The circuit will indicate
whether a PAL signal has been
identified by the colour decoder via
the saturation control pin.
When two crystals are connected to
the IC the output voltage of the video
identification circuit indicates the
frequency of the incoming
chrominance signal.

The conditions are:
· Signal identified at
fosc = 3.6 MHz; VO = 6 V
· Signal identified at
fosc = 4.4 MHz (or no colour);
VO = 8 V.
This information can be used to
switch the sound bandpass filter and
trap filter.
This IC contains an automatic
PAL/NTSC decoder. The conditions
for connecting the reference crystals
are the same as for the TDA8360.
The decoder can be forced to PAL
when the hue control pin is connected
to the positive supply voltage via a
5 kW or 10 kW resistor
(approximately). The decoder cannot
be forced to the NTSC standard. It is
also possible to see if a colour signal
is recognized via the saturation pin.
In addition to the possibilities of the
TDA8361, the TDA8362 can
co-operate with the SECAM add-on
decoder TDA8395.
The communication between the two
ICs is achieved via pin 32. The
TDA8362 supplies the reference
signal (4.43 MHz) for the calibration
system of the TDA8395, identification
of the colour standard is via the same
connection. When a SECAM signal is
detected by the TDA8395 the IC will
draw a current of 150 mA. When
TDA8362 has not identified a colour
signal in this condition it will go into
the SECAM mode, that means it will
switch off the R-Y and B-Y outputs
and increase the voltage level on
pin 32.
This voltage will switch off the
colour-killer in the TDA8395 and
switch on the R-Y and B-Y outputs of
the TDA8395. Forcing the system to
the SECAM standard can be
achieved by loading pin 32 with a
current of 150 mA. Then the system
manager in the TDA8362 will not
search for PAL or NTSC signals.
Forcing to NTSC is not possible.
For PAL/SECAM applications the
input signal for the TDA8395 can be
obtained from pin 27 (hue control)
when this pin is connected to the
positive supply rail via the 5 kW or
10 kW resistor. An external source
selector is required by the
TDA8395/TDA8362 combination for
PAL/SECAM/NTSC applications.
RGB output circuit
The colour difference signals are
matrixed with the luminance signal to
obtain the RGB signals. Linear
amplifiers have been chosen for the
RGB inputs so that the circuit is
suitable for incoming signals from the
SCART connector. The contrast and
brightness controls operate on
internal and external signals.
The fast blanking pin has a second
detection level at 3.5 V.
When this level is exceeded the
RGB outputs are blanked so that
“On-Screen-Display” signals can be
applied to the outputs.
The output signal has an amplitude of
approximately 4 V, black-to-white,
with nominal input signals and
nominal control settings. The nominal
black level is 1.3 V.

TDA3654 TDA3654Q Vertical deflection and guard circuit (110°).

The TDA3654 is a full performance vertical deflection output circuit for direct drive of the deflection coils and can be used
for a wide range of 90° and 110° deflection systems.
A guard circuit is provided which blanks the picture tube screen in the absence of deflection current.
· Direct drive to the deflection coils
· 90° and 110° deflection system
· Internal blanking guard circuit
· Internal voltage stabilizer


Output voltage V5-2 max. 60 V
Output current (peak-to-peak) I5(p-p) max. 3 A
Supply voltage V9-2 max. 40 V
Guard circuit output voltage V7-2 max. 5,6 V
Operating ambient temperature range Tamb -25 to +60 °C
Storage temperature Tstg -55 to +150 °C

Output stage and protection circuits
The output stage consists of two Darlington configurations in class B arrangement.
Each output transistor can deliver 1,5 A maximum and the VCEO is 60 V.
Protection of the output stage is such that the operation of the transistors remains well within the SOAR area in all
circumstances at the output pin, (pin 5). This is obtained by the cooperation of the thermal protection circuit, the
current-voltage detector and the short circuit protection.
Special measures in the internal circuit layout give the output transistors extra solidity, this is illustrated in Fig.5 where
typical SOAR curves of the lower output transistor are given. The same curves also apply for the upper output device.
The supply for the output stage is fed to pin 6 and the output stage ground is connected to pin 4.
Driver and switching circuit
Pin 1 is the input for the driver of the output stage. The signal at pin 1 is also applied to pin 3 which is the input of a
switching circuit (pin 1 and 3 are connected via external resistors).
This switching circuit rapidly turns off the lower output stage when the flyback starts and it, therefore, allows a quick start
of the flyback generator. The maximum required input signal for the maximum output current peak-to-peak value of 3 A
is only 3 V, the sum of the currents in pins 1 and 3 is then maximum 1 mA.
Flyback generator
During scan, the capacitor between pins 6 and 8 is charged to a level which is dependent on the value of the resistor at
pin 8 (see Fig.1).
When the flyback starts and the voltage at the output pin (pin 5) exceeds the supply voltage, the flyback generator is
The supply voltage is then connected in series, via pin 8, with the voltage across the capacitor during the flyback period.
This implies that during scan the supply voltage can be reduced to the required scan voltage plus saturation voltage of
the output transistors.
The amplitude of the flyback voltage can be chosen by changing the value of the external resistor at pin 8.
It should be noted that the application is chosen such that the lowest voltage at pin 8 is > 1,5 V, during normal operation.
Guard circuit
When there is no deflection current, for any reason, the voltage at pin 8 becomes less than 1 V, the guard circuit will
produce a d.c. voltage at pin 7. This voltage can be used to blank the picture tube, so that the screen will not burn in.
Voltage stabilizer
The internal voltage stabilizer provides a stabilized supply of 6 V to drive the output stage, so the drive current is not
affected by supply voltage variations.

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