PHILIPS STEREO RECEIVER V6820 CHASSIS K40 INTERNAL VIEW.

- Deflection Board on the right called large signal board. Line deflection output (BU508A) + EHT, E/W






























Correction, FRAME Deflection Output with IC TDA3650 (PHILIPS)




PHILIPS STEREO RECEIVER V6820 CHASSIS K40 was using in this chassis the RC-5 infrared remote protocol widely used in after developed products for over 25 Years.

The RC-5 infrared remote protocol was developed by Philips in the late 1980s as a semi-proprietary consumer IR (infrared) remote control communication protocol for consumer electronics. However, it was also adopted by most European manufacturers, as well as many US manufacturers of specialty audio and video equipment.
The RC-5 infrared remote protocol was developed by Philips in the late 1980s as a semi-proprietary consumer IR (infrared) remote control communication protocol for consumer electronics. However, it was also adopted by most European manufacturers, as well as many US manufacturers of specialty audio and video equipment.The advantage of the RC-5 protocol is that (when properly followed) any CD handset (for example) may be used to control any brand of CD player using the RC-5 protocol.

Protocol Details

The basics of the protocol are well known. The handset contains a keypad and a transmitter integrated circuit (IC) driving an IR LED. The command data is a bi-phase encoded bitstream modulating a 36 kHz carrier. (Often the carrier used is 38 kHz or 40 kHz, apparently due to misinformation about the actual protocol.) The IR signal from the transmitter is detected by a specialized IC with an integral photo-diode, and is amplified, filtered, and demodulated so that the receiving device can act upon the received command. RC-5 only provides a one-way link, with information traveling from the handset to the receiving unit.
The command comprises 14 bits:

• A start bit, which is always logic 1 and allows the receiving IC to set the proper gain.
• A field bit, which denotes whether the command sent is in the lower field (logic 1 = 0 to 63 decimal) or the upper field (logic 0 = 64 to 127 decimal). The field bit was added later by Philips when it was realized that 64 commands per device were insufficient. Previously, the field bit was combined with the start bit. Many devices still use this original system.
• A control bit, which toggles with each button press. This allows the receiving device to distinguish between two successive button presses (such as "1", "1" for "11") as opposed to the user simply holding down the button and the repeating commands being interrupted by a person walking by, for example.
• A five-bit system address, that selects one of 32 possible systems.
• A six-bit command, that (in conjunction with the field bit) represents one of the 128 possible RC-5 commands.

The 36 kHz carrier frequency was chosen to render the system immune to interference from TV scan lines. Since the repetition of the 36 kHz carrier is 27.778 μs and the duty factor is 25%, the carrier pulse duration is 6.944 μs. Since the high half of each symbol (bit) of the RC-5 code word contains 32 carrier pulses, the symbol period is 64 x 27.778 μs = 1.778 ms, and the 14 symbols (bits) of a complete RC-5 code word takes 24.889 ms to transmit. The code word is repeated every 113.778 ms (4096 / 36 kHz) as long as a key remains pressed. (Again, please note that these timings are not strictly followed by all manufacturers, due to a lack of widespread distribution of accurate information on the RC-5 protocol.)

PHILIPS RC-5 System and Command Codes:

While the protocol is well known and understood, what is not so well documented are the system number allocations and the actual RC-5 commands used for each system. The information provided below is the most complete and accurate information available at this time. It is from a printed document from Philips dated December 1992 that is unfortunately not available in electronic format (e.g., PDF), nor is an updated version available. This information is provided so that companies that wish to use the RC-5 protocol can use it properly, and avoid conflicts with other equipment that may or may not be using the correct system numbers and commands.

This code has an instruction set of 2048 different instructions and is divided into 32 address
of each 64 instructions. Every kind of equipment use his own address,
so this makes it possible to change the volume of the TV without change the volume of the hifi.
The transmitted code is a dataword wich consists of 14 bits and is defined as:


2 startbits for the automatic gain control in the infrared receiver.
1 toggle bit (change everytime when a new button is pressed on the ir transmitter)
5 address bits for the systemaddress
6 instructionbits for the pressed key.













The Philips RC5 IR transmission protocol uses Manchester encoding of the message bits. Each pulse burst (mark – RC transmitter ON) is 889us in length, at a carrier frequency of 36kHz (27.7us). Logical bits are transmitted as follows:

• Logical '0' – an 889us pulse burst followed by an 889us space, with a total transmit time of 1.778ms

• Logical '1' – an 889us space followed by an 889us pulse burst, with a total transmit time of 1.778ms

The pulse/pause ratio of the 36kHz carrier frequency is 1/3 or 1/4, which reduces power consumption.

When a key is pressed on the remote controller, the message frame transmitted consists of the following 14 bits, in order:

• two Start bits (S1 and S2), both logical '1'.

• a Toggle bit (T). This bit is inverted each time a key is released and pressed again.

• the 5-bit address for the receiving device

• the 6-bit command.

The address and command bits are each sent most significant bit first. Figure 1 illustrates the format of a Philips RC5 IR transmission frame, for an address of 05h (00101b) and a command of 35h (110101b).



Figure 1. Example message frame using the Philips RC5 IR transmission protocol.
From Figure 1 we can see that it takes:

• 5.334ms to transmit the Start and Toggle bits (S1, S2 and T). Notice that, as the first half-bit of S1 is a space, the receiver will only notice the real start of the message frame after 889us.

• 8.89ms to transmit the 5 bits for the address

• 10.668ms to transmit the 6 bits for the command

• 24.892ms to fully transmit the actual message frame.

The Toggle bit (T) is used by the receiver to distinguish weather the key has been pressed repeatedly, or weather it is being held depressed. As long as the key on the remote controller is kept depressed, the message frame will be repeated every 114ms. The Toggle bit will retain the same logic level during all of these repeated message frames. It is up to the receiver software to interpret this auto-repeat feature of the protocol.



PHILIPS STEREO RECEIVER V6820 CHASSIS K40 TDA2545A Quasi-split-sound circuit

GENERAL DESCRIPTION The TDA2545A is a monolithic integrated circuit for quasi-split-sound processing in television receivers. Features · 3-stage gain controlled i.f. amplifier · A.G.C. circuit · Reference amplifier and limiter amplifier for vision carrier (V.C.) processing · Linear multiplier for quadrature demodulation.
The invention relates to a multi-standard television receiver for receiving a television signal whose sound carrier is frequency-modulated (FM) or amplitude-modulated (AM), the receiver comprising an intercarrier sound channel incorporating a frequency demodulation circuit and an intermediate frequency portion having an output, a sound intermediate frequency channel of which is coupled to a filter circuit and to an amplitude demodulation circuit.
Funketechnik, 1977, No. 15, pages F & E 245-251 discloses a television receiver of the above-described type in which the intercarrier channel is connected to an output of a video detector which is connected to an output of the intermediate frequency portion.
Said circuit has the disadvantage that a suppression filter incorporated in the intermediate frequency portion produces a considerable attenuation of the sound carrier of the order of approximately 26 dB and whereby the picture carrier is attenuated by approximately 6 dB. Consequently, on receipt of a weak signal the signal-to-noise ratio becomes poor and an annoying interference occurs in the sound, even if the picture quality is still acceptable.
To obviate this disadvantage it is possible to add a separate intercarrier detector which however, would imply the use of an additional integrated circuit.

TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
television receivers using PNP or NPN tuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).

The invention relates to a TV-IF circuit comprising a balanced video signal path arranged between an IF-input and a video signal output, and a balanced sound signal path arranged between the IF-input and a sound signal output, these paths including a video mixing stage and a sound mixing stage, respectively.
Such a TV-IF circuit is known as a TV-IF circuit for quasi-parallel sound processing and is described in the publication "Aufbereitung des Fernsehtonsignals mit den integrierten Schaltungen TDA 2545 und TDA 2546 nach dem Quasi-Paralleltonverfahren" pulbished in the series "Valvo Entwicklungsmitteilungen", November 1980.
An IF-TV signal applied to the known TV-IF circuit is separated therein into a video and a sound signal. To that end the TV-IF circuit comprises two filter circuits, connected to the IF-input, one filter circuit suppressing the sound carrier of the TV-IF signal and being included in the video signal path and the other filter circuit suppressing the video information with the exception of the picture carrier and being included in the sound signal path. As a result thereof the video signal path contains virtually no sound signal components which may disturb the video signal after demodulation in the video mixing stage and the sound signal path contains virtually no video signal components which may disturb the sound signal after intercarrier mixing of the sound carrier and the picture carrier in the sound mixing stage. During this intercarrier mixing, the frequency of the sound signal modulated on the sound carrier is converted into a sound intermediate frequency which corresponds to the picture-sound carrier spacing in the TV-IF signal. The IF-sound signal thus obtained is not affected by unwanted frequency shifts of the tuning oscillator.
Because of the separated signal processing, the video and sound output signals of the known TV-IF cirucit are disturbed to a lesser extent than those of a TV-IF circuit in which signal processing is effected which is used in common for video and sound signals. In such a so-called TV-IF circuits for intercarrier sound processing, which are also described in the above-mentioned publication, the whole TV-IF signal, optionally after partial suppression of the sound carrier, is applied to the video mixing stage. Thereafter mixing of the TV-IF signal with the picture carrier is effected in the video mixing stage, as a result of which the demodulation of the video signal and, simultaneously, a conversion of the sound signal frequency into the said sound intermediate frequency is obtained in response to an intercarrier mixing of the sound carrier and the picture carrier. In contrast with TV-IF circuits for quasi-parallel sound processing, the demodulated video signal and the IF sound signal are both available here at the same output of the video detector for further signal processing and, because of the common mixing in the video mixing stage, each of the two signals comprises residual components of the other signal.
TV-IF circuits for quasi-parallel sound processing are mainly used in TV-receivers which must satisfy high quality requirements as regards picture display and sound reproduction. Partly due to the high quality requirements which also the other receiver circuits must satisfy, such high-quality TV-receivers are generally comparatively expensive and are only sold in a limited number. Consequently, the production of TV-IF circuits for quasi-parallel sound processing is limited. As a result thereof and also because of the fact that the circuit itself if rather complicated, such circuits are in the present state of the art much more expensive than TV-IF circuits for intercarrier sound processing.
In contrast therewith, the TV-IF circuits for intercarrier sound processing are less complicated and particularly suitable for use in TV-receivers on which lower quality requirements are imposed. The lower quality requirements make it possible to use for the entire TV-receiver simple and cheap receiver circuits so that TV-receivers of this type can be much cheaper than the first-mentioned high-quality TV-receivers. The demand for the cheap TV-receivers is comparatively high and consequently also the production of the last-mentioned TV-IF circuits.


PHILIPS STEREO RECEIVER V6820 CHASSIS K40 Video signal reproducing apparatus with electron beam scanning velocity modulation / "BEAMBOOSTER":In a video signal reproducing apparatus having a cathode ray tube in which at least one electron beam is made to scan a screen in line-scanning and vertical directions while the intensity of the beam is modulated to establish the brightness of a video picture to be displayed on the screen, and in which bright picture portions are represented by respective high level portions of a video signal; a waveshaping circuit receives the video signal and acts thereon to provide a compensated video signal in which the width of each high level portion between the respective rising and falling edges is increased, the compensated video signal is employed to control the intensity of the electron beam, and the rising and falling edges of each high level portion of the compensated video signal are detected, as by a differentiating circuit or a delay line circuit, to provide respective output signals by which the scanning velocity of the beam in the line-scanning direction is modulated. The waveshaping circuit for providing the compensated video signal may be constituted by a delay line and an OR circuit having inputs to which the original video signal and the delayed video signal are applied, or by a differentiator receiving the original video signal and having its output applied to a polarity equalizer.

1. A video signal reproducing apparatus comprising
a source of a video signal representing at least the brightness of a video picture and in which bright picture portions are represented by video signal portions of high level defined between respective rising and falling edges;
waveshaping means receiving said video signal from said source for providing a corresponding compensated video signal in which the width of each of said high level signal portions between said respective rising and falling edges is increased, said wave shaping means including delay means receiving said video signal from said source for providing a delayed video signal, and OR gate means having inputs receiving said video signal from said source and said delayed video signal, respectively, and an output at which said compensated video signal appears;
a cathode ray tube having a screen, an electron gun including beam producing means directing an electron beam generally along the axis of the tube toward said screen for impingement on the latter and being controlled in response to said compensated video signal from said waveshaping means so that the intensity of the beam is modulated in accordance with said compensated video signal, and deflection means for causing said beam to scan said screen in line-scanning and vertical directions, respectively;
detecting means also receiving said compensated video signal from said waveshaping means and detecting said rising and falling edges of the high level signal portions of said compensated video signal for providing output signals in correspondence to the detected rising and falling edges; and
beam velocity modulation means for modulating the scanning velocity of said electron beam in said line-scanning direction in accordance with said output signals from said detecting means.
2. A video signal reproducing apparatus according to claim 1; in which said OR gate means includes first and second transistors having respective collector-emitter paths connected in parallel between an operating voltage source and said output of the OR gate means, said first and second transistors further having respective base electrodes constituting said inputs receiving said video signal from said source thereof and said delayed video signal, respectively. 3. A video signal reproducing apparatus according to claim 1; in which said detecting means includes means differentiating said compensated video signal so as to provide said output signals in correspondence to said detected rising and falling edges. 4. A video signal reproducing apparatus comprising
a source of a video signal representing at least the brightness of a video picture and in which bright picture portions are represented by video signal portions of high level defined between respective rising and falling edges;
waveshaping means receiving said video signal from said source for providing a corresponding compensated video signal in which the width of each of said high level signal portions between said respective rising and falling edges is increased, said waveshaping means including differentiating means for differentiating the video signal from said source of the latter, polarity equalizing means acting on the differentiated signal from said differentiating means for providing a differentiated signal of one polarity, and adder means adding the video signal from said source thereof and said differentiated signal of one polarity to provide said compensated video signal;
a cathode ray tube having a screen, an electron gun including beam producing means directing an electron beam generally along the axis of the tube toward said screen for impingement on the latter and being controlled in response to said compensated video signal from said waveshaping means so that the intensity of the beam is modulated in accordance with said compensated video signal, and deflection means for causing said beam to scan said screen in line-scanning and vertical directions, respectively;
detecting means also receiving said compensated video signal from said waveshaping means and detecting said rising and falling edges of the high level signal portions of said compensated video signal for providing output signals in correspondence to the detected rising and falling edges; and
beam velocity modulation means for modulating the scanning velocity of said electron beam in said line-scanning direction in accordance with said output signals from said detecting means.
5. A video signal reproducing apparatus according to claim 4; in which said polarity equalizer includes a first diode connected in parallel with a series connection of an inventer and a second diode. 6. A video signal reproducing apparatus according to claim 4; in which said detecting means includes means differentiating said compensated video signal so as to provide said output signals in correspondence to said detected rising and falling edges. 7. A video signal reproducing apparatus comprising
a source of a video signal representing at least the brightness of a video picture and in which bright picture portions are represented by video signal portions of high level defined between respective rising and falling edges;
waveshaping means receiving said video signal from said source for providing a corresponding compensated video signal in which the width of each of said high level signal portions between said respective rising and falling edges is increased;
a cathode ray tube having a screen, an electron gun including beam producing means directing an electron beam generally along the axis of the tube toward said screen for impingement on the latter and being controlled in response to said compensated video signal from said waveshaping means so that the intensity of the beam is modulated in accordance with said compensated video signal, and deflection means for causing said beam to scan said screen in line-scanning and vertical directions, respectively;
detecting means also receiving said compensated video signal from said waveshaping means and detecting said rising and falling edges of the high level signal portions of said compensated video signal for providing output signals in correspondence to the detected rising and falling edges, said detecting means including means differentiating said compensated video signal so as to provide said output signals in correspondence to said detected rising and falling edges; and
beam velocity modulation means for modulating the scanning velocity of said electron beam in said line-scanning direction in accordance with said output signals from said detecting means.
8. A video signal reproducing apparatus comprising
a source of a video signal representing at least the brightness of a video picture and in which bright picture portions are represented by video signal portions of high level defined between respective rising and falling edges;
waveshaping means receiving said video signal from said source for providing a corresponding compensated video signal in which the width of each of said high level signal portions between said respective rising and falling edges is increased;
a cathode ray tube having a screen, an electron gun including beam producing means directing an electron beam generally along the axis of the tube toward said screen for impingement on the latter and being controlled in response to said compensated video signal from said waveshaping means so that the intensity of the beam is modulated in accordance with said compensated video signal, and deflection means for causing said beam to scan said screen in line-scanning and vertical directions, respectively;
detecting means also receiving said compensated video signal from said waveshaping means and detecting said rising and falling edges of high level signal portions of said compensated video signal for providing output signals in correspondence to the detected rising and falling edges; and
beam velocity modulation means for modulating the scanning velocity of said electron beam in said line-scanning direction in accordance with said output signals from said detecting means, said beam velocity modulation means including a tubular electrode on said axis of the tube for the passage of said electron beam axially through said tubular electrode between said beam producing means and said screen, said tubular electrode being in two parts which are axially separated along a vertical plane that is inclined relative to said axis of the tube, and means for applying said output signals from the detecting means across said two parts of the tubular electrode.
9. A video signal reproducing apparatus according to claim 8; in which said tubular electrode is included in electron lens means for focusing said beam at said screen, and said electron lens means further includes at least another tubular electrode arranged coaxially in respect to the first mentioned tubular electrode, with a relatively low potential being applied to said first tubular electrode and a relatively high potential being applied to said other electrode for producing an electrical field which effects said focusing of the beam.

Description:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to video signal reproducing apparatus, such as, television receivers, and more particularly is directed to providing such apparatus with improved arrangements for effecting electron beam scanning velocity modulation so as to significantly enhance the sharpness of the reproduced picture or image.
2. Description of the Prior Art
When the phosphor screen of a video signal reproducing apparatus, such as, the screen of the cathode ray tube in a television receiver, is scanned by an electron beam or beams so as to form a picture or image on the screen, the beam current varies with the luminance or brightness level of the input video signal. Therefore, each electron beam forms on the phosphor screen a beam spot whose size is larger at high brightness levels than at low brightness levels of the image so that sharpness of the reproduced picture is deteriorated, particularly at the demarcation between bright and dark portions on areas of the picture. Further, when a beam scanning the screen in the line-scanning direction moves across the demarcation or edge between dark and bright areas of the picture, for example, black and white areas, respectively, the frequency response of the receiver does not permit the beam intensity to change instantly from the low level characteristic of the black area to the high level characteristic of the white area. Therefore, the sharpness of the reproduced image is degraded at portions of the image where sudden changes in brightness occur in response to transient changes in the luminance or brightness of the video signal being reproduced. The increase in the beam current and in the beam spot size for bright portions of the reproduced picture or image and the inadequate frequency response of the television receiver to sudden changes in the brightness or luminance level of the incoming video signal are additive in respect to the degradation of the horizontal sharpness of the reproduced image or picture.
It has been proposed to compensate for the described degradation of the horizontal sharpness of the picture or image by employing the so-called "aperture correction or compensation technique," for example, as described in "Aperture Compensation for Television Camera," R. C. Dennison, RCA Review, 14,569 (1953). In accordance with such aperture correction or compensation technique, the intensity of the electron beam is first decreased and then increased at those portions of the picture image at which the brightness changes from a low level to a high level. Such modification or compensation of the electron beam intensity can be achieved by twice differentiating the original video signal so as to obtain a compensation signal which is added to the original video signal for obtaining a compensated video signal applied to the cathode of the cathode ray tube and having high level portions with relatively more steeply inclined rising and falling edges. However, with the foregoing aperture compensation technique, the peak luminance or brightness levels of the compensated video signal are increased and, as applied to the cathode of the cathode ray tube, result in beam currents that are increased relative to the maximum beam currents resulting from the original video signal so that the beam spot size is actually increased. By reason of the foregoing, the aperture compensation technique or method is insufficient for achieving really sharp definitions between light and dark areas of the reproduced picture or image, particularly in the case of relatively large screen areas, even though the described technique creates a visual edge effect which, to some extent, and particularly in the case of relatively small screens, registers psychologically as improved edge sharpness.
In order to avoid the above-described disadvantage of the aperture correction or compensation technique, it has been proposed to employ the so-called "beam velocity modulation method or technique" in which transient changes in the brightness level of the video signal are detected, and the scanning velocity of the electron beam in the line-scanning direction is modulated in accordance with the thus detected transient changes, for example, as described in detail in U.S. Pat. Nos. 2,227,630, 2,678,964, 3,752,916, 3,830,958 and 3,936,872, with the last two enumerated patents having a common assignee herewith.
More particularly, in the known beam velocity modulation technique or method, the original video signal representing brightness or luminance of a video picture and which incorporates "dullness" at abrupt changes in the luminance level due to the inadequate frequency response of the television receiver circuits to such abrupt changes in luminance level, is applied directly to the cathode or beam producing means of the cathode ray tube for modulating the intensity of the electron beam or beams, and such original video signal is also differentiated to obtain a modulation signal which is employed for effecting a supplemental horizontal deflection of the beam or beams in addition to the main or usual horizontal deflection thereof. The modulation or compensation signal may be supplied to the main deflection coil or yoke or to a supplemental deflection coil which is in addition to the main deflection coil with the result that the overall magnetic field acting on the beam or beams for effecting horizontal deflection thereof is modulated and corresponding modulation of the beam scanning velocity in the line-scanning direction is achieved. As is well known, the effect of the foregoing is to improve the sharpness of the image or picture in the horizontal direction. Since the original video signal is applied directly to the cathode or beam producing means of the cathode ray tube without increasing the level thereof at sharp changes in the brigheness level of the video signal, as in the aperture correction or compensation technique, the beam velocity modulation technique does not cause changes in the beam spot size so that sharpness of the image or picture in the horizontal direction is conspicuously improved.
However, it is a characteristic or inherent disadvantage of existing beam velocity modulation arrangements that the improved horizontal sharpness of the reproduced image or picture is achieved at the expense of a reduction in the width of the bright or white areas of the reproduced image or picture so that such bright or white areas are slimmer or more slender than would be the case if the depicted scene were accurately or precisely reproduced.
OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, it is an object of this invention to provide a video signal reproducing apparatus with an improved arrangement for effecting beam scanning velocity modulation and thereby achieving enhanced sharpness of the reproduced image or picture, particularly at the demarcations between relatively dark and light picture areas, without reducing the widths of such light picture areas.
Another object is to provide an arrangement for effecting beam scanning velocity modulation, as aforesaid, which is relatively simple and is readily applicable to video signal reproducing apparatus, such as, television receivers.
In accordance with an aspect of this invention, in a video signal reproducing apparatus having a cathode ray tube in which at least one electron beam is made to scan a screen in line-scanning and vertical directions while the intensity of the beam is modulated to establish the brightness of a video picture to be displayed on the screen, and in which bright picture portions are represented by respective high level portions of an original video signal; a waveshaping circuit receives the original video signal and acts thereon to provide a compensated video signal in which the width of each high level portion between the respective rising and falling edges is increased, the compensated video signal is employed to control the intensity of the electron beam, and the rising and falling edges of each high level portion of the compensated video signal are detected to provide a respective output or modulation signal by which the scanning velocity of the beam in the line-scanning direction is modulated.
The above, and other objects, features and advantages of the invention, will be apparent in the following detailed description of illustrative embodiments thereof which is to be read in connection with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1A and 1B are diagrammatic views representing reproduced video pictures including bright and dark areas;
FIGS. 2A-2D are waveform or graphic views to which reference will be made in explaining the aperture correction or compensation technique of the prior art;
FIGS. 3A-3E are waveform or graphic views to which reference will be made in explaining the beam velocity modulation technique of the prior art and the disadvantage inherent therein;
FIG. 4 is a schematic view illustrating a circuit according to an embodiment of the present invention for effecting beam velocity modulation in a video signal reproducing apparatus;
FIG. 5 is an axial sectional view of an electron gun in a cathode ray tube which is particularly suited for use with a beam velocity modulation arrangement according to this invention;
FIGS. 6A-6F are waveforms or graphic views to which reference will be made in explaining the operation of the circuit according to this invention as shown on FIG. 4;
FIG. 7 is a schematic view illustrating another embodiment of a portion of the circuit shown on FIG. 4 for effecting beam velocity modulation according to this invention;
FIGS. 8A-8D are waveforms or graphic views to which reference will be made in explaining the operation of the embodiment of this invention illustrated by FIG. 7;
FIG. 9 is a diagrammatic view illustrating a circuit that may be used for one of the components shown on FIG. 7; and
FIG. 10 is a wiring diagram illustrating another embodiment of a portion of the circuit shown on FIG. 4 for effecting beam velocity modulation in accordance with this invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to the drawings in detail, and initially to FIG. 4 thereof, it will be seen that the present invention is related to a television receiver or other video signal reproducing apparatus 10 having a cathode ray tube 11 in which a beam producing means including a cathode 12 directs an electron beam B generally along the axis of the tube envelope toward a phosphor screen S on the faceplate of the tube. In the apparatus 10, the intensity of electron beam B, and hence the brightness of the beam spot produced at the location where the beam B impinges on screen S, is modulated in accordance with a video signal applied to cathode 12 and representing at least the brightness of a video picture to be reproduced on screen S. The cathode ray tube 11 is further shown to include the conventional deflection means or yoke 13 by which beam B is made to scan screen S in the line-scanning or horizontal and vertical directions, respectively. The simultaneous modulation of the beam intensity by the video signal applied to cathode 12 and the scanning of screen S by beam B in response to sweep signals applied to yoke 13 will result in the reproduction of an image or picture on screen S. The image or picture reproduced on screen S may be constituted by at least one white or bright picture portion, for example, in the form of a rectangle as shown at 14a on FIG. 1A, or in the form of a vertical line as indicated at 14b on FIG. 1B, and relatively darker picture portions. In any case, it will be understood that, in each line or horizontal interval of a video signal received by a television receiver and utilized in the cathode ray tube of the latter for reproducing a horizontal increment of an image or picture at a vertical position in the latter which is included in the bright or white area 14a or line 14b, the respective bright picture portion is represented by a corresponding high level video signal portion defined between rising and falling edges 15r and 15f, respectively (FIG. 2A). If the transmitted video signal S _T is to represent a white or bright shape or area surrounded by a black or very dark background with a sharp demarcation therebetween, the rising and falling edges 15r and 15f of the high level signal portion will be precipitous, that is, substantially vertical, as shown, so as to represent the desired high frequency change in luminance level. However, the usual television receiver circuit, for example, comprised of RF and IF amplifiers and a video detector, and by which the video signal to be used in the cathode ray tube is derived from the received television signal, has a frequency response that is inadequate to accommodate the mentioned high frequency components of the transmitted video signal S _T . Thus, the video signal S _O (FIG. 2B) which is available in the television receiver for controlling the intensity of the electron beam or beams in the cathode ray tube is relatively "dull" that is, it has decreased high frequency components, as represented by the illustrated sloping, rising and falling edges 16r and 16f of the high level signal portion. Such relatively dull video signal S _O is hereinafter referred to as the "original video signal," and such terminology is reasonable when considered from the point of view of the input side of the cathode ray tube. Further, the term "original video signal" has often been used in the prior art in the same sense that it is used herein.
The decrease in the high frequency

components of the original video signal S _o as compared with the transmitted video signal S _T causes a decrease in the horizontal sharpness of the reproduced image or picture, that is, the sloping, rising and falling edges 16r and 16f (FIG. 2B) result in a gradual change from dark to bright and from bright to dark, respectively, rather than in the sudden changes in brightness represented by the transmitted signal S _T (FIG. 2A). Horizontal sharpness of the reproduced image or picture is furthermore decreased by the fact that, in the cathode ray tube, the electron beam current varies with the luminance or brightness level of the video signal applied to the cathode ray tube and, when the luminance level is high, for example, to represent a bright or white area of the picture, the beam spot size caused by impingement of the electron beam on the phosphor screen is enlarged to further decrease or deteriorate the sharpness of the reproduced picture.
In seeking to compensate for the above-described lack of sharpness of the reproduced picture by the known aperture correction or compensation technique, the original video signal S _O (FIG. 2B) is differentiated twice so as to obtain a compensation signal S _B (FIG. 2C) which is added to the original video signal S _O for providing a compensated video signal S _C (FIG. 2D). As shown, the compensated video signal S _C has rising and falling edges 17r and 17f which are more steeply inclined than the corresponding rising and falling edges 16r and 16f of the original video signal S _O . However, when the compensated video signal S _C is applied to the cathode of a cathode ray tube for controlling the intensity or beam current of the electron beam or beams therein, the sharpness of the reproduced picture is not conspicuously improved. The foregoing results from the fact that, by adding the compensation signal S _B to the original video signal S _O for obtaining the compensated video signal S _C applied to the cathode of the cathode ray tube, the maximum beam current corresponding to the peak luminance level of signal S _C is increased, as compared with the maximum beam current corresponding to the peak luminance level of original video signal S _O , with the result that the beam spot size resulting from compensated video signal S _C is enlarged. Such enlargement of the beam spot size causes a decrease in sharpness of the reproduced picture, as previously noted, and thus substantially defeats any increase in sharpness that might result from the relatively more steeply inclined rising and falling edges 17r and 17f of the compensated video signal S _C .
In the known beam velocity modulation technique for improving horizontal sharpness of the reproduced image or picture, the dull original video signal S _O (FIG. 3A) is applied, without alteration, to the cathode or beam producing means of the cathode ray tube for determining the intensity or beam current of the electron beam or beams in the cathode ray tube. The original video signal S _O is also subjected to differentiation to obtain a compensation signal S _A (FIG. 3B). The compensation signal S _A is applied to a supplemental deflection means which is in addition to the main deflection coils or yoke so that the horizontal deflection field for effecting scanning movement of each beam in the line-scanning direction is modified or compensated, as shown on FIG. 3C. As a result of such modified or compensated horizontal deflection field, the beam scanning velocity in the line-scanning direction, is modulated as shown on FIG. 3D. It will be appreciated that, during each period T _a on FIG. 3D, the beam scanning velocity is increased so that a decreased amount of light is emitted from the phosphor dots or areas on the screen that are impinged upon during each period T _a . On the other hand, during each period T _b , the beam velocity is decreased so that an increased amount of light is emitted from the phosphor dots or areas impinged upon by the electron beam during each period T _b . Therefore, the variation, in the horizontal direction across the screen, in the amount of emitted light, is substantially as indicated on FIG. 3E, from which it will be apparent that the sharpness of the reproduced image or picture in the horizontal direction is improved. Since the original video signal S _O is still applied to the cathode of the cathode ray tube for controlling the beam intensity, the beam spot size is not changed or increased by reason of the beam velocity modulation and, therefore, the improvement in sharpness in the horizontal direction is not adversely affected by increasing beam spot size, as in the aperture correction or compensation technique. However, the conventional beam velocity modulation technique still has the disadvantage that the width of each white or bright portion of the picture or image reproduced on the screen is less than that which would result from the original video signal S _o in the absence of the beam velocity modulation, as is apparent from the comparison of FIG. 3E with FIG. 3A.
Generally, in order to avoid the foregoing disadvantage of the previously known beam velocity modulation technique, the present invention employs a waveshaping circuit receiving the original video signal and providing a corresponding compensated video signal in which the width of each high level signal portion is increased relative to the corresponding width of the original video signal. The compensated video signal from the mentioned waveshaping circuit is applied to the cathode or beam producing means of the cathode ray tube for modulating the intensity of the electron beam or beams therein in accordance with the compensated video signal, while the rising and falling edges of the high level signal portions of the compensated video signal are detected to provide a corresponding output or modulating signal applied to the beam velocity modulation means for modulating the scanning velocity of the electron beam or beams in accordance with such output signal.
Referring in detail to FIG. 4, it will be seen that, in the video signal reproducing apparatus 10 according to this invention, as there shown, an antenna 18 receives a television signal which includes the transmitted video signal S _T (FIG. 2A) and applies the same to conventional video circuits indicated schematically at 19 and which include the usual RF and IF amplifiers and video detector for deriving the original video signal S _O (FIG. 6A) from the received television signal. As noted, the video circuits 19 of television receiver 10 are conventional so that no detailed explanation thereof will be included herein. The video signal from circuit 19 is supplied through a video amplifier 20 to a waveshaping circuit 21 which, in accordance with this invention, is operative to increase the width of each high level portion of the original video signal S _O from video amplifier 20.
The waveshaping circuit 21 is shown to include a pair of transistors 22 and 23 having their collectors connected together to an operating voltage source +V _cc , while the emitters of transistors 22 and 23 are connected together to one end of a resistor 24 having its other end connected to ground. The original video signal S _O (FIG. 6A) is applied to the base of transistor 22 from video amplifier 20 through a resistor 25, and the base of transistor 22 is further connected to ground through a resistor 26. The original video signal S _O from video amplifier 20 is further applied through a resistor 27 and a delay line 28 to the base of transistor 23 which is further connected to ground through a resistor 29. The resistors 27 and 29 provide impedance matching for the delay line 28, while the resistors 25 and 26 are provided for level adjusting purposes, that is, to ensure that the level of the original video signal S _O applied to the base of transistor 22 from video amplifier 20 will be equal to the level of the delayed video signal S _D (FIG. 6B) applied to the base of transistor 23 and which is delayed by the time τ in respect to the original video signal. Finally, the output of waveshaping circuit 21 is derived from a connection point between the emitters of transistors 22 and 23 and resistor 24.
It will be apparent that, during the period T _A (FIG. 6C), the level of original video signal S _O applied to the base of transistor 22 is higher than the level of the delayed video signal S _D applied to the base of transistor 23, so that transistor 22 is turned ON and transistor 23 is turned OFF. During the next period T _B , at which time both original video signal S _O and delayed video signal S _D are at the same level, transistors 22 and 23 are both turned ON. Finally, during the concluding period T _C , the level of delayed video signal S _D is higher than the level of original video signal S _O , so that transistor 22 is turned OFF and transistor 23 is turned ON. Thus, as is apparent on FIG. 6C, the level of the compensated video signal S _K obtained across resistor 24, that is, at the output of waveshaping circuit 21, is equal to the level of the input video signal S _O during the period T _A , is equal to the level of either the original video signal S _O or the delayed video signal S _D during the period T _B , and is equal to the level of the delayed video signal S _D during the period T _C . In other words, transistors 22 and 23 of waveshaping circuit 21 operate as an OR gate circuit in respect to the original video signal S _O and the delayed video signal S _D applied to the two inputs of such OR circuit defined by the base electrodes of the two transistors. Further, by comparing the compensated video signal S _K (FIG. 6C) with the original video signal S _O (FIG. 6A), it will be appreciated that the effect of waveshaping circuit 21 is to increase the width of each high level portion of the original or incomming video signal.
Referring again to FIG. 4, it will be seen that the compensated video signal S _K is applied through a video amplifier 30 to the cathode electrode 12 of cathode ray tube 11 for modulating the intensity of electron beam B therein. Simultaneously, the rising and falling edges of the high level signal portions of compensated video signal S _K are detected to provide a corresponding output or modulating signal by which the scanning velocity of the electron beam B in the line-scanning direction is modulated. More particularly, in the television receiver 10 of FIG. 4, the compensated video signal S _K from waveshaping circuit 21 is applied to a differentiation circuit 31 which acts as a detector for detecting the rising and falling edges of the compensated video signal and which provides a corresponding output signal in the form of a differentiated signal S _V (FIG. 6D). Such differentiated signal S _V is applied to a beam velocity modulation means, for example, in the form of the supplemental deflection device 32 of FIG. 4, for modulating the scanning velocity of the electron beam B in the line-scanning direction in accordance with the differentiated signal S _V from differentiator 31. The supplemental deflection device 32 may be constituted, as shown, by two spaced apart plate-like electrodes 32a and 32b directed vertically in cathode ray tube 11 and arranged for the passage of electron beam B therebetween, with the differentiated signal S _V being applied across the plate-like electrodes 32a and 32b so as to produce a corresponding electrical field by which the scanning velocity of the beam, in the line-scanning direction, is modulated, for example, as shown on FIG. 6E.
Although the beam velocity modulation means is, in the embodiment of FIG. 4, constituted by a supplemental deflection device 32 in the form of a pair of plate-like electrodes 32a, 32b across which the output of differentiation circuit 31 is applied, the present invention is preferably employed in connection with a cathode ray tube of the type disclosed in detail by U.S. Pat. No. 3,936,872, and having an electron gun provided with a special focusing electrode to also function as the beam velocity modulating means, as shown on FIG. 5. More particularly, in the cathode ray tube 11A of FIG. 5, the neck portion 33 of the tube envelope is shown to contain an electron gun structure including a cathode 12a, a control electrode or grid 35, an acceleration electrode or grid 36, a first anode electrode 37, a focusing electrode 38 and a second electrode 39 all arranged successively in axial alignment along the central axis 40 of the cathode ray tube. The focusing electrode 38 is shown to be tubular and to be formed in two parts 38a and 38b which are axially separated along a vertical plane that is inclined relative to the axis 40 of the tube. For the operation of electron gun 34, appropriate static or bias voltages are applied to grids 35 and 36 and to electrodes 37, 38 and 39. Thus, for example, a voltage of zero to -400 V. may be applied to grid 35, a voltage of zero to 500 V may be applied to grid 36, a relatively high voltage or potential, for example, an anode voltage of 13 to 20 KV. may be applied to electrodes 37 and 39, and a relatively low voltage or potential of zero to only several KV. may be applied to parts 38a and 38b of electrode 38, with all of the foregoing voltages being upon the bias voltage applied to cathode 12a as a reference. With the foregoing voltage distribution, an electron lens field is established around the axis of electrode 38 by the electrodes 37, 38 and 39 to form a main focusing lens by which the electron beam is focused at the screen of the cathode ray tube. Furthermore, the differentiated or modulation signal S _V from differentiation circuit 31 of FIG. 4 is applied between parts 38a and 38b of electrode 38 in superposed relation to the static or bias voltage applied to electrode 38 for forming the focusing lens. It will be apparent that, by reason of the described diagonal separation between parts 38a and 38b of focusing lens electrode 38, the application of the differentiated signal or modulation signal S _V across electrode parts 38a and 38b results in a respective electric field which is operative to deflect the electron beam or beams in the horizontal or line-scanning direction. Thus, the beam velocity in the line-scanning direction is modulated accordingly.
Whether the velocity modulation signal S _V is applied to the plates 32a and 32b of supplemental deflection device 32, or across the parts 38a and 38b of focusing electrode 38, it will be seen that, in accordance with this invention, such velocity modulation signal S _V (FIG. 6D) for effecting beam velocity modulation in the line-scanning direction is derived from the compensated video signal S _K (FIG. 6C) in which the width of each bright or white signal portion is enlarged as compared with the width thereof in the original video signal S _O (FIG. 6A). Therefore, the intensity of light emission is changed or varied in the horizontal direction across the screen in the manner represented by FIG. 6F, from which it is apparent that the sharpness of the reproduced image or picture in the horizontal direction is substantially improved. Furthermore, from a comparison of FIG. 6F with FIG. 6A, it will be apparent that, by a proper selection of the delay time τ of delay line 28, the width of the white or bright portion of the reproduced image or picture is not substantially decreased and may be made to accurately correspond to the width of corresponding high level portion of the original video signal. Therefore, the previously described disadvantage of the known technique for effecting beam velocity modulation has been avoided by the present invention.
Referring now to FIG. 7, it will be seen that, in accordance with another embodiment of this invention, a waveshaping circuit 21' which can be substituted for the waveshaping circuit 21 in the apparatus 10 of FIG. 4, includes a differentiation circuit 41, a polarity equalizer 42 and an adding circuit 43. The original video signal S _O (FIG. 8A) from video amplifier 20 on FIG. 4 is applied directly to one input of adding circuit 43 and also to differentiation circuit 41 which provides a corresponding differentiated signal S _A (FIG. 8B). The differentiated signal S _A from circuit 41 is applied to polarity equalizer 42 in which the negative polarity portion of the differentiated signal S _A , which corresponds to the falling edge of the original video signal S _O , is inverted so as to have a positive polarity. The resulting polarity equalized signal S _E (FIG. 8C) is applied to another input of adder circuit 43 so as to be added in the latter to the original video signal S _O and thereby obtain the compensated video signal S _K (FIG. 8D). Such compensated video signal S _K shown on FIG. 8D corresponds generally to the compensated video signal S _K previously described with reference to FIG. 6C, and is similarly applicable to amplifier 30 and differentiation circuit 31 of FIG. 4. It will be apparent that the compensated video signal S _K (FIG. 8D) obtained from waveshaping circuit 21' also has the width of its high level signal portions enlarged relative to the widths of such signal portions in the original video signal S _O . Therefore, when the compensated video signal S _K from waveshaping circuit 21' is applied through amplifier 30 to cathode 12 of cathode ray tube 11 and also to differentiation circuit 31 to form therefrom the beam velocity modulation signal S _V applied to the supplemental deflection device 32, the resulting beam velocity modulation is performed in the same manner as described above with reference to FIG. 4 so as to obtain improved horizontal sharpness of the resulting reproduced picture or image without narrowing of the bright or white areas of such image or picture.
As shown on FIG. 9, the polarity equalizer 42 employed in the waveshaping circuit 21' of FIG. 7 may simply consist of a first diode 44 connected in parallel with a series connection of an inverter 45 and a second diode 46. The diodes 44 and 46 both have the same polarity so that the positive polarity portion of the differentiated signal S _A passes through diode 44, while the negative polarity portion of signal S _A , after being inverted by inverter 45, passes through diode 46.
In the embodiment of the invention described above with reference to FIG. 4, the differentiation circuit 31 is employed for detecting the rising and falling edges of the high level signal portions of the compensated video signal S _K and for providing output signals or beam velocity modulation signals in correspondence to the detected rising and falling edges. However, reference to FIG. 10 will show that a circuit 31' of a type disclosed in detail in U.S. Pat. No. 3,936,872, may be employed in place of differentiation circuit 31 for providing the desired beam velocity modulating signal. More particularly, circuit 31' is known to contain a single delay line 47 having input and output ends 47a and 47b, with the compensated video signal S _K being applied to input end 47a by way of a transistor 48 of collector-common configuration which acts to amplify the signal without altering the phase thereof. More specifically, as shown, the compensated video signal S _K is applied to the base electrode of transistor 48 which has its collector connected to ground, while the emitter of transistor 48 is connected through a resistor 49 to an operating voltage source +V _cc , and through a resistor 50 to the input end 47a of delay line 47. Further, as shown, the output end 47b of delay line 47 is connected through a bleeder resistor 51 to ground, and is also connected to a transistor 52 of base-common configuration which acts as an impedance converter. More specifically, transistor 52 is shown to have its emitter connected to the output end 47b of delay line 47 while its base electrode is connected to ground through a capacitor 53 and also connected between biasing resistors 54 and 55 which are connected in series between operating voltage source +V _cc and ground. Finally, a resistor 56 is connected between the operating voltage source and the collector of transistor 52, and output terminals 57 and 58 are respectively connected to the input end 47a of delay line 47 and to the collector of transistor 52.
In circuit 31', bleeder resistor 51 is dimensioned to provide a relatively small current flow therethrough, while the input impedance, that is, the base-emitter impedance of transistor 52 is very small in respect to the impedance of resistor 51. Therefore, in response to a transient or sharp change in the compensated video signal transmitted along delay line 47, the output end 47b of the latter is shorted to ground so as to cause a negative reflected wave to travel back along delay line 47 to its input end 47a. As a result of the foregoing, the resistor 56 detects the short circuit current at the output end of delay line 47, and more precisely at the collector of transistor 52, so as to provide a corresponding voltage or signal S _K1 at output terminal 58 which corresponds to the compensated video signal S _K once delayed by the delay line 47. Further, the reflected wave returning to the input end of delay line 47 in response to a transient change in the compensated video signal S _K results in a signal S _K2 that corresponds to the signal S _K twice delayed by the delay line 47. Therefore, in response to a transient change in the signal S _K , there is obtained at output terminal 57 a signal S _V1 equal to the difference between compensated video signal S _K and the twice delayed signal S _K2 . When using the circuit 31 of FIG. 10 in place of the differentiation circuit 31 in the apparatus of FIG. 4, the output signal S _K1 is applied to the cathode 12 of the cathode ray tube 11 for controlling the intensity of the electron beam, while the output signal S _V1 is applied from circuit 31' to supplemental deflecting device 32 for effecting the beam scanning velocity modulation.
In the above described embodiments of the invention, the signal S _V or S _V1 for controlling the beam scanning velocity modulation has been applied across the plates 32a and 32b of the supplemental deflection device 32 or across the parts 38a and 38b of the focusing lens electrode 38. However, it will be understood that, in all of the described embodiments of the invention, the signal S _V or S _V1 from circuits 31 or 31', respectively, can be superimposed on the horizontal sweep or deflection signal and applied with the latter to the horizontal deflection coil of the main deflection yoke 13 so as to again modulate the beam scanning velocity in the line scanning direction.
Further, in FIGS. 4 and 5 of the drawings, the invention has been illustrated as applied to a monochrome television receiver for modulating the beam scanning velocity of a single electron beam in the cathode ray tube 11 or 11A. However, it will be understood that the invention is similarly applicable to a color television receiver in which the luminance component of the color television signal is the video signal tha

t is compensated in circuit 21 or 21' and then detected in circuit 31 or 31'.
In any event, it will be apparent that, in a television receiver or other video signal reproducing apparatus according to this invention, the sharpness of the reproduced image or picture is improved without a decrease in the width of the relatively bright or white areas of the reproduced picture.
Although illustrative embodiments of the invention have been described in detail herein with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope of the invention, as defined in the appended claims.

PHILIPS STEREO RECEIVER V6820 CHASSIS K40 / PHILIPS Display device using scan velocity modulation / BEAMBOOSTER FOR 30AX CRT TUBE SYSTEM:To improve pictures to be displayed on a display screen of a display device, it is known to use scan velocity modulation. In scan velocity modulation the (horizontal) deflection rate of the electron beam(s) is modulated with the luminance component of the video signal. As a result of scan velocity modulation, the information of the video signal will no longer be displayed at the correct position on the display screen. By using the modulation signal applied to the scan velocity modulator also for modulating the (read) clock rate of the video signal from the memory, it can be ensured that the video signal and the (modulated) deflection signal are always in synchronism with each other.


1. A display device for displaying a video signal on a display screen of a display tube comprising at least one control electrode and deflection coils for deflecting at least one electron beam current, said display device further having an input for receiving the video signal, means for determining a derivative of a luminance component of the video signal, a scan velocity modulator for modulating the deflection rate of the electron beam current in the display tube in dependence upon the determined derivative, a position error correction circuit for correcting the video signal in dependence upon the derivative of the luminance component of the video signal, and means for applying the corrected video signal to the control electrode of the display tube, characterized in that the position error correction circuit comprises a frequency-modulatable clock (16) which is coupled to the means for determining the derivative of the luminance component of the video signal, said frequency-modulatable clock thereby generating a read clock signal; and a memory into which said video signal is written, said memory having a read clock signal input to which said read clock signal is applied, whereby the video signal stored in said memory is read at a frequency-modulated clock rate in dependence on said derivative of the luminance component. 2. A display device as claimed in claim 1, characterized in that the means for determining the derivative of the luminance component of the video signal comprise a clock signal generator, a further memory and a differentiator, the luminance Component of the video signal being written into said further memory under the control of said clock signal generator, and the luminance component stored in said further memory being applied to the differentiator. 3. A display device as claimed in claim 2, characterized in that the output of the differentiator is coupled to the scan velocity modulator for supplying a modulation signal. 4. A display device as claimed in claim 2, characterized in that the memory includes a write clock signal input coupled to the output of said clock signal generator so that the video signal is written into said memory at a fixed write clock rate under control of the clock generator. 5. A display device as claimed in claim 1, characterized in that the means for applying the corrected video signal comprises a display tube control circuit for receiving the modulated video signal read from the memory and for applying the video signal suitable for display to the control electrode(s) of the display tube. 6. A display device as claimed in claim 1, characterized in that the display device further comprises a beam current modulator coupled to an output of said means for determining a derivative for modulating the electron beam current in dependence upon the determined derivative of the luminance component in the video signal. 7. A display device as claimed in claim 6, characterized in that the beam current modulator has an output coupled to the means for applying the corrected video signal to the control electrode of the display tube for adapting the video signal in the applying means in dependence upon the output signal of the beam current modulator. 8. A display device as claimed in claim 1, characterized in that the display device also comprises an aperture correction circuit for correcting the luminance component of the video signal in dependence upon the derivative of the luminance component, the display device comprising a comparator for comparing the luminance component with a reference value and for aperture-correcting said component in dependence upon the output signal of the comparator.

Description:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a display device for displaying a video signal on a display screen of a display tube comprising at least one control electrode and deflection coils for deflecting at least one electron beam current, said display device further having an input for receiving the video signal, means for determining a derivative of a luminance component of the video signal, a scan velocity modulator for modulating the deflection rate of the electron beam current in the display tube in dependence upon the determined derivative, a position error correction circuit for correcting the video signal in dependence upon the derivative of the luminance component of the video signal, and means for applying the corrected video signal to the control electrode of the display tube.
2. Description of the Related Art
A display device of this type is known from U.S. Pat. No. 4,183,064. In this known display device, the position error is corrected by enlarging the portion of a display line having a higher luminance with respect to a portion having a smaller luminance and by subsequently applying scan velocity modulation (so as to obtain an improved definition) at which the dark/light transition is delayed and the light/dark transition is brought forward. As a result, the picture to be displayed is displayed with the original picture contents (the same quantity of light and dark portions as in the original video signal). In this solution, a second error (enlarging the light portions) is deliberately introduced to correct the first error (reducing the light portions as a result of scan velocity modulation). This is not an ideal solution because the two errors must compensate each other in this case. Correcting a non-linear error by means of a linear system is not very well possible. The drawback is that the position error cannot be satisfactorily corrected in this way. At a less sharp transition from light to dark (or conversely), the second error will be too large so that it will overcompensate the first error, whereas with a very sharp transition, the second error is too small so that the first error is not fully compensated. A further drawback is that it is not easy to enlarge the portions of the video signal having a higher luminance/brightness. Moreover, by enlarging the light portion, the beam current is increased so that the definition is adversely influenced due to spot growth.
To give pictures a better (impression of) sharpness, manufacturers focus on improvements of the display tube, inter alia by providing an improved phosphor layer and by improving the electron gun/guns. Moreover, scan velocity modulation of the electron beam deflection is used in a display tube (as is described, for example in the above-mentioned U.S. Patent). In this method the scan velocity (deflection rate) is adapted to the picture contents, notably to brightness variations. In scan velocity modulation, the derivative of the luminance component of the video signal is determined. Generally, the second derivative of the luminance component

is used, which second derivative is applied to a voltage amplifier, an output of which applies a voltage to, for example, a scan velocity modulation coil. If a voltage-controlled current source is used instead of the voltage amplifier, the first derivative of the luminance component is taken. Actually, the scan velocity modulation coil is then the second differentiator. The scan velocity modulation is proportional to the second derivative of the voltage across the coil. By using scan velocity modulation, a position error is produced on the display screen (the video information rate is no longer synchronous with the scan velocity) at which a dark/light transition of the video signal is shifted to the right and a light/dark transition of the video signal is shifted to the left on the display screen. Consequently, portions of the video signal having a higher brightness/luminance are reduced with respect to portions of the video signal having a smaller light intensity. For example, when a plurality of successive squares (for example, a chessboard) is displayed, this effect can be clearly observed: larger (darker) and smaller (lighter) squares instead of squares all having the same size.
SUMMARY OF THE INVENTION
It is, inter alia an object of the invention to eliminate the above-mentioned drawbacks. To this end, the display device according to the invention is characterized in that the position error correction circuit comprises a frequency-modulatable clock which is coupled to the means for determining the derivative of the luminance component of the video signal for frequency-modulating the read clock rate of the video signal stored in a memory.
By modulating (varying) the clock rate at which the video information is written or read, the position error caused by scan velocity modulation can be corrected. The video signal is applied to the display tube at the same information rate as the scan velocity. Here, a (position) error which would arise due to scan velocity modulation is thus corrected instead of making two errors which hopefully counteract each other and are equally large as described in said U.S. patent.
Literature describes all kinds of examples in which higher derivatives or combinations of different derivatives for correcting the position error are used instead of the first and second derivatives of the video signal for use in scan velocity modulation. However, this results in a full correction of the position error at most for given slopes of transitions from light to dark and vice versa, whereas the picture will only degrade in the case of other slopes. Moreover, this renders the scan velocity modulation circuit much more complicated and hence more expensive. The display device according to the invention provides a solution which is completely different. This solution is that it is not attempted to correct the position error by means of the scan velocity modulation method (or by introducing a second error) but by modulating the clock with which the video information and the deflection is maintained synchronous at all times, thus principally precluding a position error.
The clock modulator is controlled by the same signal or by a corresponding signal with which the scan velocity modulator is controlled.
An embodiment of a display device according to the invention is characterized in that the display device further comprises a beam current modulator for modulating the electron beam current in dependence upon the determined derivative of the video signal. By using beam current modulation, brightness modulations occurring as undershoots and overshoots which may be produced by scan velocity modulation can be prevented or in any case reduced. This provides the possibility of using scan velocity modulation at a larger amplitude without this being a hindrance to the user of the display device, while a better picture sharpness is obtained. A larger amplitude of the scan velocity modulation results in a larger position error, which position error can be simply corrected again by means of the clock modulation.
A further embodiment of a display device according to the invention is characterized in that the display device also comprises an aperture correction circuit for correcting the luminance component of the video signal. By combining the scan velocity modulation with an aperture correction, a picture which is even sharper is obtained. At small or less steep jumps in the beam currents, the scan velocity modulation does not yield considerable improvements of the picture sharpness, whereas the opposite is true for aperture correction. By combining scan velocity modulation with an aperture correction, the sharpness of the picture can also be improved at these beam currents.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings:
FIG. 1 shows a first embodiment of a display device according to the invention;
FIG. 2 shows an example of luminance variation of a video signal after scan velocity modulation;
FIG. 3 shows a second embodiment of a display device according to the invention;
FIG. 4 shows an example of beam current variation in the case of aperture correction; and
FIG. 5 shows an example of a display device according to the invention in which scan velocity modulation is combined with aperture correction.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 shows an embodiment of a display device W having inputs 1, 2 and 3 which receive a luminance component Y and chrominance components U and V, respectively, of a video signal. An input 4 of the display device receives a synchronizing signal sync. The luminance component Y of the video signal is applied to a memory 6 in which the luminance component is stored under the control of a clock signal generated in a clock generator 8. The memory is also used for an adapted delay until the relevant signals are satisfactorily timed. The clock generator 8 will generally be controlled by the synchronizing signal sync. The second derivative of the luminance component stored in the memory 6 is determined by a differentiator 10. Instead of a differentiator, one or two delay elements (for example, combined with the memory) may alternatively be used for determining the second derivative. As is known, the second derivative of the luminance component Y is necessary for generating scan velocity modulation. This second derivative is applied to a scan velocity modulator 12 which controls (for example) a modulation coil Lsvm for generating the scan velocity modulation of electron beam currents deflected in a display tube 14 for displaying the video signal on a display screen 15. As is common practice, the display tube is further provided with a line deflection coil Lx and a field deflection coil Ly. These coils are controlled in known manner by line and field deflection circuits (not shown).
The second derivative is also applied to a modulatable clock 16. The clock 16 may be coupled to, for example the clock generator 8. The luminance component Y of the video signal is also applied to a second memory 18. The chrominance components (U, V) of the video signal are applied to a third memory 20 and a fourth memory 22, respectively. All the memories 18, 20 and 22 are controlled by the clock generator 8 for writing the components Y, U and V of the video signal into the memories (for example, under the control of the synchro

nizing signal) and for reading the components of the video signal from the memories under the control of the modulatable clock 16. The respective components of the video signals are therefore read in a modulated form from the respective memories. By modulating the modulatable clock 16 with the second derivative of the luminance component of the video signal, the clock signal undergoes the same variation as the electron beam in the display tube 14. The information rate can be modulated by modulating the clock. The video signal undergoes the same variation as the deflection of the electron beam current/currents in the display tube by reading the components Y, U and V of the video signal from the memories 18, 20 and 22 under the control of this modulated clock signal. Consequently, the deflection signals (which determine the position on the display screen) and the video signal are always synchronous so that, in principle, there will be no position error. The modulatable clock 16 and the memories 18, 20 and 22 form part of a position error correction circuit 34 which corrects the position error on the screen (at transitions between portions having a lower and a higher luminance), which error is caused by scan velocity modulation. Subsequently, the three components of the video signal are applied to a display tube control circuit 24. YUV signals are converted into RGB signals in the display tube control circuit, which RGB signals are applied to the (three respective) control electrode(s) (C), for example, three electron guns of the display tube 14. If desired, a transition in luminance may be further intensified in the display tube control circuit by rendering, for example, a less sharp transition even sharper (at a constant beam current the luminance is inversely proportional to the scan velocity).
As is known, a dark/light transition results in undershoots and overshoots in the displayed video signal when applying scan velocity modulation. This is understood to mean that at a dark/light transition, the luminance is decreased during a first part of the transition (lower than before the transition) and is increased during a last part of the transition (higher than after the transition). FIG. 2 shows this effect, with the position on the display screen being plotted on the horizontal axis and the luminance of the video signal being plotted on the vertical axis. FIG. 2 also shows, in broken lines, the luminance transition without scan velocity modulation. Due to this undershoot and overshoot, the impression of sharpness of the displayed video signal is intensified. However, a too large undershoot and/or overshoot is observed by the user as troublesome reflections and thereby detracts from the improved sharpness. The undershoots and overshoots are eliminated or at least reduced in luminance by using beam current modulation at a luminance transition of the video signal at which the beam current is increased during the first part of the transition and is decreased during the second part of the transition. This provides the possibility of using scan velocity modulation at a larger amplitude without producing effects which are troublesome to the user. This results in an even sharper display of the picture and also in a larger position error (which can, however, be simply corrected by means of clock modulation). An additional advantage of beam current modulation is that the beam current on the display screen is reduced during the second half of a rising edge (dark/light transition). This reduces the spot on the display screen so that the sharpness will further increase.
The embodiment of FIG. 1 shows a beam current modulator 26 in broken lines, which beam current modulator, similarly as the scan velocity modulator 12 and the modulatable clock 16, modulates the beam current under the control of the second derivative of the luminance component of the video signal. The beam current modulator applies a modulation signal to the display tube control circuit 24, which circuit corrects the R, G and B signals (or the Y component) with reference to this modulation signal and applies the corrected signals to the control electrodes C of the display tube 14. As described above, the amplitude of the scan velocity modulation can be increased without negative effects by using the beam current modulator. However, this results in a larger position error, but since the (read) clocks of the Y, U and V components of the video signal are modulated, this larger error is also corrected.
FIG. 3 shows a second embodiment of a display device. Elements denoted by the same reference numerals as in FIG. 1 have the same function. In this embodiment inputs 1, 2 and 3 of the display device receive R, G and B signals (from, for example a scart input). For the scan velocity modulation, it is necessary to determine the variation (derivative) of the luminance component of the video signal. In contrast to the embodiment shown in FIG. 1, the luminance component is now not directly available. To obtain the luminance component, the R, G and B signals are applied to a converter circuit 28 for determining the luminance component Y. The converter circuit is controlled by the clock generator 8. This luminance component is subsequently applied to the memory 6 whereafter the second derivative is determined in the differentiator 10. The R, G and B signals are also applied to the memories 18, 20 and 22, respectively (similarly as in FIG. 1). Now again these signals are written under the control of the clock generator 8 and read under the control of the modulatable clock 16 which, similarly as in FIG. 1, again receives a signal which is a measure of the second derivative. The display tube control circuit 24' need not perform the conversion YUV➝RGB in this case, because the R, G and B signals are applied thereto. This display device W may also be provided with a beam current modulator 26 which applies a modulation signal for the beam current to the display tube control circuit.
As described with reference to FIGS. 1, 2 and 3, the sharpness of a picture to be displayed can be improved by combining scan velocity modulation and clock modulation, and possibly beam current modulation. However, scan velocity modulation has a poor result at low mean beam currents and at small luminance transitions. Anoth

er way of improving the sharpness at small transitions in the luminance of the video signal of a picture to be displayed is the aperture correction (or spot size correction). At a large beam current the spot size is also (too) large. Edges (having a low intensity) of the aperture (spot) cannot be prevented from being incident on adjacent pixels. The blur which is then produced can be corrected in the video signal. If, due to the size of the spot, the number of phosphors luminescing on the display screen is larger than was intended, these adjacent phosphors are not excited by the correct beam current. This means that a given part of the information will land on adjacent phosphors. One manner of correcting this is to reduce the video signal for a given pixel by a suitably chosen fraction of the video signal which is associated with the adjacent pixels. These video signals can be obtained from the continuous video signal by means of delay lines. It is also possible to perform this operation on a digitized video signal. A correction signal Icor is derived from the original beam current I by means of, for example, a single or a double delay. This correction signal is then subtracted from the original beam current, which yields the aperture-corrected beam current Iapc. This is shown in FIG. 4 for a dark/light transition. As is apparent from this Figure, the beam current has an undershoot and an overshoot upon aperture correction. This is the reason why aperture correction does not yield any improvement at a high mean beam current and/or large transients, whereas a larger beam current (overshoot) produces such a spot growth that the improvement of the aperture (spot) is completely eliminated. However, there is an essential improvement at a low mean beam current.
FIG. 5 shows an embodiment of a display device W according to the invention in which scan velocity modulation is combined with aperture correction in such a way that the aperture correction prevails at a low mean beam current and the scan velocity modulation prevails at a high mean beam current. Elements having the same function as in FIG. 1 and/or 3 have the same reference numerals. The display device may also be provided with a beam current modulator 26. In this embodiment the luminance component Y of the video signal is not only applied to the memories 6 and 18 but also to a comparison circuit 28. In this comparison circuit, the luminance component Y is compared with a reference value Yref. If the luminance component Y is smaller than the reference value, the comparison circuit will supply a control signal under whose control switches S 1, $2, $3 and $4 are put from the position shown in FIG. 5 to the position not shown. In the shown position of the switches, the display device operates in conformity with the embodiment as shown in FIG. 1. In the position not shown the output of the differentiator 10 is coupled to an aperture correction circuit 30 via the switch S1. A second input of the aperture correction circuit receives, via the switch S3, the luminance component Y as stored in and read from the memory 18 (under the control of the clock generator 8, switch S2 in the position not shown). The aperture correction circuit computes a corrected luminance component, which corrected component is applied to the display tube control circuit 24 via the switch S4. The display tube control circuit 24 converts, inter alia, the incoming (corrected) luminance component Y and the chrominance components U and V into the R, G, B signals to be applied to the display tube 14. The aperture correction circuit 30 may subtract, for example, the second derivative of the luminance component from the luminance component so as to obtain a corrected luminance component. It is alternatively possible for the aperture correction circuit 30 to compute a corrected luminance component in a more complex manner. When the switches S1, S2, S3 and S4 are in the position shown in FIG. 5, the output of the differentiator 10 is connected to the input of the scan velocity modulator 12. In dependence upon the second derivative of the luminance component, this scan velocity modulator applies a control signal to the modulation coil Lsvm for generating the scan velocity modulation. The output of the differentiator 10 is also connected to the modulatable clock 16 which, as described with reference to FIGS. 1 and 3, supplies a modulated clock signal. This modulated clock signal is applied via the switch S2 to the memories 18, 20 and 22 for reading the components Y, U and V of the video signal in a modulated form. The output of the memory 18 is connected to one of the inputs of the display tube control circuit 24 via the switch S3. In this state, the aperture correction circuit 30 cannot apply an output signal to the display tube control circuit because the switch S4 is open. It will be evident that the corrections of the luminance component of the video signal by means of the aperture correction circuit 30 and the scan velocity modulator 12 may even better blend with each other, for example, by superimposing the two corrections. This can be realized, for example, by superimposing the two circuits with a weighting factor dependent on the video signal instead of by switching between the two circuits, so that the two areas will easily blend with each other.
The embodiments of a display device according to the invention are described with reference to color display tubes. It will be evident that the invention may also be used in a display device having a monochrome display screen or in (computer) monitors. In embodiments of digital television, the delay elements required for computing the derivatives can be easily realized by means of modulatable clock signals, etc.

PHILIPS STEREO RECEIVER V6820 CHASSIS K40 CIRCUIT ARRANGEMENT IN A PICTURE DISPLAY DEVICE UTILIZING A STABILIZED SUPPLY VOLTAGE CIRCUIT:
TDA2581 CONTROL CIRCUIT FOR SMPS

The TDA2581 is a monolithic integrated circuit for controlling switched-mode power supplies (SMPS) which are provided with the drive for the horizontal deflection stage.
The circuit features the following:
— Voltage controlled horizontal oscillator.
— Phase detector.
— Duty factor control for the positive-going transient of the output signal.
— Duty factor increases from zero to its normal operation value.
— Adjustable maximum duty factor.
- Over-voltage and over-current protection with automatic re-start after switch-off.
— Counting circuit for permanent switch-off when n~times over~current or over-voltage is sensed

-Protection for open-reference voltage.
- Protection for too low supply voltage.
Protection against loop faults.
Positive tracking of duty factor and feedback voltage when the feedback voltage is smaller than the
reference voltage minus 1,5 V.
A stabilized supply voltage circuit for a picture display device comprising a chopper wherein the switching signal has the line frequency and is duration-modulated. The coil of the chopper constitutes the primary winding of a transformer a secondary winding of which drives the line output transistor so

that the switching transistor of the chopper also functions as a driver for the line output stage. The oscillator generating the switching signal may be the line oscillator. In a special embodiment the driver and line output transistor conduct simultaneously and in order to limit the base current of the line output transistor a coil shunted by a diode is incorporated in the drive line of the line output transistor. Other secondary windings of the transformer drive diodes which conduct simultaneously with the efficiency diode of the chopper so as to generate further stabilized supply voltages.

1. An electrical circuit arrangement for a picture display device operating at a given line scanning frequency, comprising a source of unidirectional voltage, an inductor, first switching transistor means for periodically energizing said inductor at said scanning frequency with current from said source, an electrical load circuit coupled to said inductor and having applied thereto a voltage as determined by the ratio of the ON and OFF periods of said transistor, means for maintaining the voltage across said load circuit at a given value comprising means for comparing the voltage of said load circuit with a reference voltage, means responsive to departures of the value of the load circuit voltage from the value of said reference voltage for varying the conduction ratio of the ON and OFF periods of said transistor thereby to stabilize said load circuit voltage at the given value, a line deflection coil system for said picture display device, means for energizing said line deflection coil system from said load voltage circuit means, means for periodically interrupting the energization of said line deflection coil comprising second switching means and means coupled to said inductor for deriving therefrom a switching current in synchronism with the energization periods of said transistor and applying said switching current to said switching means thereby to actuate the same, and means coupled to said switching means and to said load voltage circuit for producing a voltage for energizing said 2. A circuit as claimed in claim 1 wherein the duty cycle of said switching 3. A circuit as claimed in claim 1 further comprising an efficiency first 4.

A circuit as claimed in claim 3 further comprising at least a second diode coupled to said deriving means and to ground, and being poled to 5. A circuit as claimed in claim 1 wherein said second switching means comprises a second transistor coupled to said deriving means to conduct simultaneously with said first transistor, and further comprising a coil coupled between said driving means and said second transistor and a third diode shunt coupled to said coil and being poled to conduct when said 6. A circuit as claimed in claim 1 further comprising a horizontal oscillator coupled to said first transistor, said oscillator being the 7. A circuit as claimed in claim 1 further comprising means coupled to said inductor for deriving filament voltage for said display device.

Description:

The invention relates to a circuit arrangement in a picture display device wherein the input direct voltage between two input terminals, which is obtained be rectifying the mains alternating voltage, is converted into a stabilized output direct voltage by means of a switching transistor and a coil and wherein the transistor is connected to a first input terminal and an efficiency diode is connected to the junction of the transistor and the coil. The switching transistor is driven by a pulsatory voltage of line frequency which pulses are duration-modulated in order to saturate the switching transistor during part of the period dependent on the direct voltage to be stabilized and to cut off this transistor during the remaining part of the period. The pulse duration modulation is effected by means of a comparison circuit which compares the direct voltage to be stabilized with a substantially constant voltage, the coil constituting the primary winding of a transformer.

Such a circuit arrangement is known from German "Auslegeschrift" 1.293.304. wherein a circuit arrangement is described which has for its object to convert an input direct voltage which is generated between two terminals into a different direct voltage. The circuit employs a switch connected to the first terminal of the input voltage and periodically opens and closes so that the input voltage is converted into a pulsatory voltage. This pulsatory voltage is then applied to a coil. A diode is arranged between the junction of the switch and the coil and the second terminal of the input voltage whilst a load and a charge capacitor in parallel thereto are arranged between the other end of the coil and the second terminal of the input voltage. The assembly operates in accordance with the known efficiency principle i.e., the current supplied to the load flows alternately through the switch and through the diode. The function of the switch is performed by a switching transistor which is driven by a periodical pulsatory voltage which saturates this transistor for a given part of the period. Such a configuration is known under different names in the literature; it will be referred to herein as a "chopper." A known advantage thereof, is that the switching transistor must be able to stand a high voltage or provide a great current but it need not dissipate a great power. The output voltage of the chopper is compared with a constant reference voltage. If the output voltage attempts to vary because the input voltage and/or the load varies, a voltage causing a duration modulation of the pulses is produced at the output of the comparison arrangement. As a result the quantity of the energy stored in the coil varies and the output voltage is maintained constant. In the German "Auslegeschrift" referred to it is therefore an object to provide a stabilized supply voltage device.

In the circuit arrangement according to the mentioned German "Auslegeschrift" the frequency of the load variations or a harmonic thereof is chosen as the frequency for the switching voltage. Particularly when the load fed by the chopper is the line deflection circuit of a picture display device, wherein thus the impedance of the load varies in the rhythm of the line frequency, the frequency of the switching voltage is equal to or is a multiple of the line frequency.

It is to be noted that the chopper need not necessarily be formed as that in the mentioned German "Auslegeschrift." In fact, it is known from literature that the efficiency diode and the coil may be exchanged. It is alternatively possible for the coil to be provided at the first terminal of the input voltage whilst the switching transistor is arranged between the other end and the second terminal of the input voltage. The efficiency diode is then provided between the junction of said end and the switching transistor and the load. It may be recognized that for all these modifications a voltage is present across the connections of the coil which voltage has the same frequency and the same shape as the pulsatory switching voltage. The control voltage of a line deflection circuit is a pulsatory voltage which causes the line output transistor to be saturates and cut off alternately. The invention is based on the recognition that the voltage present across the connections of the coil is suitable to function as such a control voltage and that the coil constitutes the primary of a transformer. To this end the circuit arrangement according to the invention is characterized in that a secondary winding of the transformer drives the switching element which applies a line deflection current to line deflection coils and by which the voltage for the final anode of a picture display tube which forms part of the picture display device is generated, and that the ratio between the period during which the switching transistor is saturated and the entire period, i.e., the switching transistor duty cycle is between 0.3 and 0.7 during normal operation.

The invention is also based on the recognition that the duration modulation which is necessary to stabilize the supply voltage with the switching transistor does not exert influence on the driving of the line output transistor. This resides in the fact that in case of a longer or shorter cut-off period of the line output transistor the current flowing through the line deflection coils thereof is not influenced because of the efficiency diode current and transistor current are taken over or, in case of a special kind of transistor, the collector-emitter current is taken over by the base collector current and conversely. However, in that case the above-mentioned ratios of 0.3 : 0.7 should be taken into account since otherwise this take-over principle is jeopardized.

As will be further explained the use of the switching transistor as a driver for the line output transistor in an embodiment to be especially described hereinafter has the further advantage that the line output transistor automatically becomes non-conductive when this switching transistor is short circuited so that the deflection and the EHT for the display tube drop out and thus avoid damage thereof.

Due to the step according to the invention the switching transistor in the stabilized supply functions as a driver for the line deflection circuit. The circuit arrangement according to the invention may in addition be equipped with a very efficient safety circuit so that the reliability is considerably enhanced, which is described in the U.S. Pat. No. 3,629,686. The invention is furthermore based on the recognition of the fact that the pulsatory voltage present across the connections of the coil is furthermore used and to this end the circuit arrangement according to the invention is characterized in that secondary windings of the transformer drive diodes which conduct simultaneously with the efficiency diode so as to generate further stabilized direct voltages, one end of said diodes being connected to ground.

In order that the invention may be readily carried into effect, a few embodiments thereof will now be described in detail by way of example with reference to the accompanying diagrammatic drawings in which:

FIG. 1 shows a principle circuit diagram wherein the chopper and the line deflection circuit are further shown but other circuits are not further shown.

FIGS. 2a, 2b and 2c show the variation as a function of time of two currents and of a voltage occurring in the circuit arrangement according to FIG. 1.

FIGS. 3a 3b, 3c and 3d show other embodiments of the chopper.

FIGS. 4a and 4b show modifications of part of the circuit arrangement of FIG. 1.

In FIG. 1 the reference numeral 1 denotes a rectifier circuit which converts the mains voltage supplied thereto into a non-stabilized direct voltage. The collector of a switching transistor 2 is connected to one of the two terminals between which this direct voltage is obtained, said transistor being of the npn-type in this embodiment and the base of which receives a pulsatory voltage which originates through a control stage 4 from a modulator 5 and causes transistor 2 to be saturated and cut off alternately. The voltage waveform 3 is produced at the emitter of transistor 2. In order to maintain the output voltage of the circuit arrangement constant, the duration of the pulses provided is varied in modulator 5. A pulse oscillator 6 supplies the pulsatory voltage to modulator 5 and is synchronized by a signal of line frequency which originates from the line oscillator 6' present in the picture display device. This line oscillator 6' is in turn directly synchronized in known manner by pulses 7' of line frequency which are present in the device and originate for example from a received television signal if the picture display device is a television receiver. Pulse oscillator 6 thus generates a pulsatory voltage the repetition frequency of which is the line frequency.

The emitter of switching transistor 2 is connected at one end to the cathode of an efficiency diode 7 whose other end is connected to the second input voltage terminal and at the other end to primary winding 8 of a transformer 9. Pulsatory voltage 3 which is produced at the cathode of efficiency diode 7 is clamped against the potential of said second terminal during the intervals when this diode conducts. During the other intervals the pulsatory voltage 3 assumes the value V _i . A charge capacitor 10 and a load 11 are arranged between the other end of winding 8 and the second input voltage terminal. The elements 2,7,8,10 and 11 constitute a so-called chopper producing a direct voltage across charge capacitor 10, provided that capacitor 10 has a sufficiently great value for the line frequency and the current applied to load 11 flowing alternately through switching transistor 2 or through efficiency diode 7.

The output voltage V _o which is the direct voltage produced across charge capacitor 10 is applied to a comparison circuit 12 which compares the voltage V _o with a reference voltage. Comparison circuit 12 generates a direct voltage which is applied to modulator 5 so that the duration of the effective period δ T of switching transistor 2 relative to the period T of pulses 3 varies as a function of the variations of output voltage V ₀ . In fact, it is readily evident that output voltage V _o is proportional to the ratio δ :

V _o = V _i ^. δ

Load 11 of the chopper consists in the consumption of parts of the picture display device which are fed by output voltage V ₀ . In a practical embodiment of the circuit arrangement according to FIG. 1 wherein the mains alternating voltage has a nominal effective value of 220 V and the rectified voltage V i is approximately 270 V, output voltage V _o for δ = 0.5 is approximately 135 V. This makes it also possible, for example, to feed a line deflection circuit as is shown in FIG. 1 wherein load 11 then represents different parts which are fed by the chopper. Since voltage V _o is maintained constant due to pulse duration modulation, the supply voltage of this line deflection circuit remains constant with the favorable result that the line amplitude(= the width of the picture displayed on the screen of the picture display tube) likewise remains constant as well as the EHT required for the final anode of the picture display tube in the same circuit arrangement independent of the variations in the mains voltage and the load on the EHT generator (= variations in brightness).

However, variations in the line amplitude and the EHT may occur as a result of an insufficiently small internal impedance of the EHT generator. Compensation means are known for this purpose. A possibility within the scope of the present invention is to use comparison circuit 12 for this purpose. In fact, if the beam current passes through an element having a substantially quadratic characteristic, for example, a voltage-dependent resistor, then a variation for voltage V _o may be obtained through comparison circuit 12 which variation is proportional to the root of the variation in the EHT which is a known condition for the line amplitude to remain constant.

In addition this facilitates smoothing of voltage V _o since the repetition frequency of pulsatory voltage 3 is many times higher than that of the mains and a comparatively small value may be sufficient for charge capacitor 10. If charge capacitor 10 has a sufficiently high value for the line frequency, voltage V _o is indeed a direct voltage so that a voltage having the same form as pulsatory voltage 3 is produced across the terminals of primary winding 8. Thus voltages which have the same shape as pulsatory voltage 3 but have a greater or smaller amplitude are produced across secondary windings 13, 14 of transformer 9 (FIG. 1 shows only 2 secondary windings but there may be more). The invention is based on the recognition that one end of each secondary winding is connected to earth while the other end thereof drives a diode, the winding sense of each winding and the direction of conductance of each diode being chosen to be such that these diodes conduct during the same period as does efficiency diode 7.

After smoothing, stabilized supply voltages, for example, at terminal 15 are generated in this manner at the amplitudes and polarities required for the circuit arrangements present in the picture display device. In FIG. 1 the voltage generated at terminal 15 is, for example, positive relative to earth. It is to be noted that the load currents of the supply voltages obtained in this manner cause a reduction of the switching power which is economized by efficiency diode 7. The sum of all diode currents including that of diode 7 is in fact equal to the current which would flow through diode 7 if no secondary winding were wound on transformer 9 and if no simultaneous diode were used. This reduction may be considered an additional advantage of the circuit arrangement according to the invention, for a diode suitable for smaller powers may then be used. However, it will be evident that the overall secondary load must not exceed the primary load since otherwise there is the risk of efficiency diode 7 being blocked so that stabilization of the secondary supply voltages would be out of the question.

It is to be noted that a parabola voltage of line frequency as shown at 28 is produced across the charge capacitor 10 if this capacitor is given a smaller capacitance so that consequently the so-called S-correction is established.

In FIG. 1 charge capacitors are arranged between terminals 15 etc. and earth so as to ensure that the voltages on these points are stabilized direct voltages. If in addition the mean value of the voltage on one of these terminals has been made equal to the effective value of the alternating voltage which is required for heating the filament of the picture display tube present in the picture display device, this voltage is suitable for this heating. This is a further advantage of the invention since the cheap generation of a stabilized filament voltage for the picture display tube has always been a difficult problem in transistorized arrangements.

A further advantage of the picture display device according to the invention is that transformer 9 can function as a separation transformer so that the different secondary windings can be separated from the mains and their lower ends can be connected to ground of the picture display device. The latter step makes it possible to connect a different apparatus such as, for example, a magnetic recording and/or playback apparatus to the picture display device without earth connection problems occurring.

In

FIG. 1 the reference numeral 14 denotes a secondary winding of transformer 9 which in accordance with the previously mentioned recognition of the invention can drive line output transistor 16 of the line deflection circuit 17. Line deflection circuit 17 which is shown in a simplified form in FIG. 1 includes inter alia line deflection coils 18 and an EHT transformer 19 a secondary winding 20 of which serves for generating the EHT required for the acceleration anode of the picture display tube. Line deflection circuit 17 is fed by the output voltage V _o of the chopper which voltage is stabilized due to the pulse duration modulation with all previously mentioned advantages. Line deflection circuit 17 corresponds, for example, to similar arrangements which have been described in U.S. Pat. No. 3,504,224 issued Mar. 31, 1970 to J.J. Reichgelt et al., U.S. patent application Ser. No. 737,009 filed June 14, 1968 by W. H. Hetterscheid and U.S. application Ser. No. 26,497 filed April 8, 1970 by W. Hetterscheid et al. It will be evident that differently formed lined deflection circuits are alternatively possible.

It will now be shown that secondary winding 14 can indeed drive a line deflection circuit so that switching transistor 2 can function as a driver for the line deflection. FIGS. 2a and b show the variation as a function of time of the current i _C which flows in the collector of transistor 16 and of the drive voltage v ₁₄ across the terminals of secondary winding 14. During the flyback period (0, t ₁ ) transistor 16 must be fully cut off because a high voltage peak is then produced at its collector; voltage v ₁₄ must then be absolutely negative. During the scan period (t ₁ , t ₄ ) a sawtooth current i _C flows through the collector electrode of transistor 16 which current is first negative and then changes its direction. As the circuit arrangement is not free from loss, the instant t ₃ when current i _C becomes zero lies, as is known, before the middle of the scan period. At the end t ₄ of the scan period transistor 16 must be switched off again. However, since transistor 16 is saturated during the scan period and since this transistor must be suitable for high voltages and great powers so that its collector layer is thick, this transistor has a very great excess of charge carriers in both its base and collector layers. The removal of these charge carriers takes a period t _s which is not negligible whereafter the transistor is indeed switched off. Thus the fraction δ T of the line period T at which v ₁₄ is positive must end at the latest at the instant (t ₄ - t _s ) located after the commencement (t = 0) of the previous flyback.

The time δ T may be initiated at any instant t ₂ which is located between the end t ₁ of the flyback period and the instant t ₃ when collector current i _C reverses its direction. It is true that emitter current flows through transistor 16 at the instant t ₂ , but collector current i _C is not influenced thereby, at least not when the supply voltage (= V _o ) for line deflection circuit 17 is high enough. All this has been described in the U.S. Pat. No. 3,504,224. The same applies to line deflection circuits wherein the collector base diode does not function as an efficiency diode as is the case in the described circuit 17, but wherein an efficiency diode is arranged between collector and emitter of the line output transistor. In such a case the negative part of the current i _C of FIG. 2a represents the current flowing through the said efficiency diode.

After the instant t ₃ voltage v ₁₄ must be positive. In other words, the minimum duration of the period T when voltage v ₁₄ must be positive is (t ₄ - t _s ) - t ₃ whilst the maximum duration thereof is (t ₄ - t _s ) - t ₁ . In a television system employing 625 lines per raster the line period t ₄ is approximately 64 μus and the flyback period is approximately 12 μus. Without losses in the circuit arrangement instant t ₃ would be located approximately 26 μus after the instant t ₁ , and with losses a reasonable value is 22 μus which is 34 μus after the commencement of the period. If for safety's sake it is assumed that t _s lasts approximately 10 μus, the extreme values of δ T are approximately 20 and 42 μus and consequently the values for δ are approximately 0.31 and 0.66 at a mean value which is equal to approximately 0.49. It was previously stated that a mean value of δ = 0.5 was suitable. Line deflection circuit 17 can therefore indeed be used in combination with the chopper in the manner described, and the relative variation of δ may be (0.66 - 0.31) : 0.49 = 71.5 percent. This is more than necessary to obviate the variations in the mains voltage or in the various loads and to establish the East-West modulation and ripple compensation to be described hereinafter. In fact, if it is assumed that the mains voltage varies between -15 and +10 percent of the nominal value of 220 V, while the 50 Hz ripple voltage which is superimposed on the input voltage V _i has a peak-to-peak value of 40 V and V _i is nominally 270 V, then the lowest occurring V _i is:

0.85 × 270 V - 20 V = 210 V and the highest occurring V _i is

1.1 × 270 V + 20 V = 320 V. For an output voltage V _o of 135 V the ratio must thus vary between

δ = 135 : 210 = 0.64 and δ = 135 : 320 = 0.42.

A considerable problem presenting itself is that of the simultaneous or non-simultaneous drive of line output transistor 16 with switching transistor 2, it being understood that in case of simultaneous drive both transistors are simultaneously bottomed, that is during the period δ T. This depends on the winding sense of secondary winding 14 relative to that of primary winding 8. In FIG. 1 it has been assumed that the drive takes place simultaneously so that the voltage present across winding 14 has the shape shown in FIG. 2b. This voltage assumes the value n(V _i - V _o ) in the period δ T and the value -nVo in the period (1 - δ )T, wherein n is the ratio of the number of turns on windings 14 and 8 and wherein V _o is maintained constant at nominal mains voltage V _o = δ V _inom . However, if as a result of an increase or a decrease of the mains voltage V _i increases or decreases proportionally therewith, i.e., V _i = V _i nom + Δ V, the positive portion of V ₁₄ becomes equal to n(V _i nom - V _o +Δ V) = n [(1 -δ)V _i nom +ΔV] = n(0.5 V _inom +ΔV) if δ = 0.5 for V _i = V _i nom. Relatively, this is a variation which is twice as great. For example, if V _i nom = 270 V and V _o = 135 V, a variation in the mains voltage of from -15 to +10 percent causes a variation of V _i of from -40.5 V to +27 V which ranges from -30 to +20 percent of 135 V which is present across winding 8 during the period δ T. The result is that transistor 16 can always be bottomed over a large range of variation. If the signal of FIG. 2b would be applied through a resistor to the base of transistor 16, the base current thereof would have to undergo the same variation while the transistor would already be saturated in case of too low a voltage. In this case it is assumed that transformer 9 is ideal (without loss) and that coil 21 has a small inductance as is explained in the U.S. patent application Ser. No. 737,009 above mentioned. It is therefore found to be desirable to limit the base current of transistor 16.

This may be effected by providing a coil 22 having a large value inductance, approximately 100 μH, between winding 14 and the small coil 21. The variation of said base current i _b is shown in FIG. 2c but not to the same scale as the collector current of FIG. 2a. During the conducting interval δ T current i _b varies as a linear function of time having a final value of wherein L represents the inductance of coil 22. This not only provides the advantage that this final value is not immediately reached, but it can be shown that variation of this final value as a function of the mains voltage has been reduced, for there applies at nominal mains voltage that: If the mains voltage V _i = V _i nom +Δ V, then ##SPC1## because V _i nom = 2 V _o . Thus this variation is equal to that of the mains voltage and is not twice as great.

During switching off, t ₂ , of transistor 16 coil 22 must exert no influence and coil 21 must exert influence which is achieved by arranging a diode 23 parallel to coil 22. Furthermore the control circuit of transistor 16 in this example comprises the two diodes 24 and 25 as described in U.S. application Ser. No. 26,497 above referred to, wherein one of these diodes, diode 25 in FIG. 1, must be shunted by a resistor.

The control circuit of transistor 16 may alternatively be formed as is shown in FIG. 4. In fact, it is known that coil 21 may be replaced by the parallel arrangement of a diode 21' and a resistor 21" by which the inverse current can be limited. To separate the path of the inverse current from that of the forward current the parallel arrangement of a the diode 29' and a resistor 29" must then be present. This leads to the circuit arrangement shown in the upper part of FIG. 4. This circuit arrangement may now be simplified if it is noted that diodes 25 and 21' on the one hand and diodes 23 and 29' on the other hand are series-arranged. The result is shown in the lower part of FIG. 4 which, as compared with the circuit arrangement of FIG. 1, employs one coil less and an additional resistor.

FIG. 3 shows possible modifications of the chopper. FIG. 3a shown in a simplified form the circuit arrangement according to FIG. 1 wherein the pulsatory voltage present across the connections of windings 8 has a peak-to-peak amplitude of V _i - V _o = 0.5 V _i for δ = 0.5, As has been stated, the provision of coil 22 gives a relative variation for the base current of transistor 16 which is equal to that of the mains voltage. In the cases according to FIG. 3b, 3c and 3d the peak-to-peak amplitude of the voltage across winding 8 is equal to V _i so that the provision of coil 22 results in a relative variation which is equal to half that of the mains voltage which is still more favorable than in the first case.

Transistors of the npn type are used in FIG. 3. If transistors of the pnp type are used, the relevant efficiency diodes must of course be reversed.

In this connection it is to be noted that it is possible to obtain an output voltage V _o with the aid of the modifications according to FIGS. 3b, c and d, which voltage is higher than input voltage V _i . These modifications may be used in countries such as, for example, the United of America or France where the nominal mains voltage is 117 or 110 V without having to modify the rest of the circuit arrangement.

The above-mentioned remark regarding the sum of the diode currents only applies, however, for the modifications shown in FIGS. 3a and d.

If line output transistor 16 is not simultaneously driven with switching transistor 2, efficiency diodes 7 conducts simultaneously with transistor 16 i.e., during the period which is denoted by δ T in FIGS. 1 and 2b. During that period the output voltage V _o of the chopper is stabilized so that the base current of transistor 16 is stabilized without further difficulty. However, a considerable drawback occurs. In FIG. 1 the reference numeral 26 denotes a safety circuit the purpose of which is to safeguard switching transistor 2 when the current supplied to load 11 and/or line deflection circuit 17 becomes to high, which happens because the chopper stops. After a given period output voltage V _o is built up again, but gradually which means that the ratio δ is initially small in the order of 0.1. All this is described in U.S. patent No. 3,629,686.

The same phenomenon occurs when the display device is switched on. Since δ = 0.1 corresponds to approximately 6 μs when T = 64 μs, efficiency diode 7 conducts in that case for 64 - 6 = 58 μus so that transistor 16 is already switched on at the end of the scan or at a slightly greater ratio δ during the flyback. This would cause an inadmissibly high dissipation. For this reason the simultaneous drive is therefore to be preferred.

The line deflection circuit itself is also safeguarded: in fact, if something goes wrong in the supply, the driver voltage of the line deflection circuit drops out because the switching voltage across the terminals of primary winding 8 is no longer present so that the deflection stops. This particularly happens when switching transistor 2 starts to constitute a short-circuit between emitter and collector with the result that the supply voltage V _o for the line deflection circuit in the case of FIG. 1 becomes higher, namely equal to V _i . However, the line output transformer is now cut off and is therefore also safe as well as the picture display tube and other parts of the display device which are fed by terminal 15 or the like. However, this only applies to the circuit arrangement according to FIG. 1 or 3a.

Pulse oscillator 6 applies pulses of line frequency to modulator 5. It may be advantageous to have two line frequency generators as already described, to wit pulse oscillator 6 and line oscillator 6' which is present in the picture display device and which is directly synchronized in known manner by line synchronizing pulses 7'. In fact, in this case line oscillator 6' applies a signal of great amplitude and free from interference to pulse oscillator 6. However, it is alternatively possible to combine pulse oscillator 6 and line oscillator 6' in one single oscillator 6" (see FIG. 1) which results in an economy of components. It will be evident that line oscillator 6' and oscillator 6" may alternatively be synchronized indirectly, for example, by means of a phase discriminator. It is to be noted neither pulse oscillator 6, line oscillator 6' and oscillator 6" nor modulator 5 can be fed by the supply described since output voltage V _o is still not present when the mains voltage is switched on. Said circuit arrangements must therefore be fed directly from the input terminals. If as described above these circuit arrangements are to be separated from the mains, a small separation transformer can be used whose primary winding is connected between the mains voltage terminals and whose secondary winding is connected to ground at one end and controls a rectifier at the other end.

Capacitor 27 is arranged parallel to efficiency diode 7 so as to reduce the dissipation in switching transistor 2. In fact, if transistor 2 is switched off by the pulsatory control voltage, its collector current decreases and its collector-emitter voltage increases simultaneously so that the dissipated power is not negligible before the collector current has becomes zero. If efficiency diode 7 is shunted by capacitor 27 the increase of the collector-emitter voltage is delayed i.e., this voltage does not assume high values until the collector current has already been reduced. It is true that in that case the dissipation in transistor 2 slightly increases when it is switched on by the pulsatory control voltage but on the other hand since the current flowing through diode 7 has decreased due to the presence of the secondary windings, its inverse current is also reduced when transistor 2 is switched on and hence its dissipation has become smaller. In addition it is advantageous to delay these switching-on and switching-off periods to a slight extent because the switching pulses then contain fewer

Fourier components of high frequency which may cause interferences in the picture display device and which may give rise to visible interferences on the screen of the display tube. These interferences occupy a fixed position on the displayed image because the switching frequency is the line frequency which is less disturbing to the viewer.

In a practical circuit wherein the line frequency is 15,625 Hz and wherein switching transistor 2 is an experimental type suitable for a maximum of 350 V collector-emitter voltage or 1 A collector current and wherein efficiency diode 7 is of the Philips type BA 148 the capacitance of capacitor 27 is approximately 680 pF whilst the load is 70 W on the primary and 20 W on the secondary side of transformer 9. The collector dissipation upon switching off is 0.3 W (2.5 times smaller than without capacitor 27) and 0.7 W upon switching on.

As is known the so-called pincushion distortion is produced in the picture display tubes having a substantially flat screen and large deflection angles which are currently used. This distortion is especially a problem in color television wherein a raster correction cannot be brought about by magnetic means. The correction of the so-called East-West pincushion distortion i.e., in the horizontal direction on the screen of the picture display tube can be established in an elegant manner with the aid of the circuit arrangement according to the invention. In fact, if the voltage generated by comparison circuit 12 and being applied to modulator 5 for duration-modulating pulsatory voltage 3 is modulated by a parabola voltage 28 of field frequency, pulsatory voltage 3 is also modulated thereby. If the power consumption of the line deflection circuit forms part of the load on the output voltage of the chopper, the signal applied to the line deflection coils is likewise modulated in the same manner. Conditions therefore are that the parabola voltage 28 of field frequency has a polarity such that the envelope of the sawtooth current of line frequency flowing through the line deflection coils has a maximum in the middle of the scan of the field period and that charge capacitor 10 has not too small an impedance for the field frequency. On the other hand the other supply voltages which are generated by the circuit arrangement according to the invention and which might be hampered by this component of field frequency must be smoothed satisfactorily.

A practical embodiment of the described example with the reference numerals given provides an output for the supply of approximately 85 percent at a total load of 90 W, the internal resistance for direct current loads being 1.5 ohms and for pulsatory currents being approximately 10 ohms. In case of a variation of ± 10 percent of the mains voltage, output voltage V _o is stable within 0.4 V. Under the nominal circumstances the collector dissipation of switching transistor 2 is approximately 2.5 W.

Since the internal resistance of the supply is so small, it can be used advantageously, for example, at terminal 15 for supplying a class-B audio amplifier which forms part of the display device. Such an amplifier has the known advantages that its dissipation is directly proportional to the amplitude of the sound to be reproduced and that its output is higher than that of a class-A amplifier. On the other hand a class-A amplifier consumes a substantially constant power so that the internal resistance of the supply voltage source is of little importance. However, if this source is highly resistive, the supply voltage is modulated in the case of a class-B amplifier by the audio information when the sound intensity is great which may detrimentally influence other parts of the display device. This drawback is prevented by means of the supply according to the invention.

The 50 Hz ripple voltage which is superimposed on the rectified input voltage V _i is compensated by comparison circuit 12 and modulator 5 since this ripple voltage may be considered to be a variation of input voltage V _i . A further compensation is obtained by applying a portion of this ripple voltage with suitable polarity to comparison circuit 12. It is then sufficient to have a lower value for the smoothing capacitor which forms part of rectifier circuit 1 (see FIG. 3). The parabola voltage 28 of field frequency originating from the field time base is applied to the same circuit 12 so as to correct the East-West pincushion distortion.

Other References:


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PHILIPS STEREO RECEIVER V6820 CHASSIS K40 Chrominance + Luminance with TDA3561A,
GENERAL DESCRIPTION

The invention relates to a video signal processing circuit for a color television receiver having inputs for a luminance signal, for color difference signals, and for external color signals, comprising a matrix circuit for combining a color difference signal with the luminance signal to form a color signal, a first clamping circuit for clamping an external color signal onto the corresponding color signal, a combining circuit for combining a clamped external color signal with the corresponding color signal, a second clamping circuit acting on an output signal of the combining circuit and a brightness setting circuit.
A video signal processing circuit of the type defined above is described in Philip Data Handbook for Integrated Circuits, Part 2, May, 1980 as IC TDA3560. The brightness setting, which is common for internal and external video signals, is obtained by means of a common direct current level setting of the second clamping circuits. The settings of the three electron guns of a picture display tube coupled to the outputs of the video signal processing circuit are changed to an equal extent by this direct current level setting as a result whereof, due to the mutual differences in the efficiency of the phosphors of the picture display tube, a color shift may occur at a brightness adjustment. It is an object of the invention to prevent this.

The TDA3561A is a decoder for the PAL colour television standard. It combines all functions required for the identification
and demodulation of PAL signals. Furthermore it contains a luminance amplifier, an RGB-matrix and amplifier. These
amplifiers supply output signals up to 5 V peak-to-peak (picture information) enabling direct drive of the discrete output
stages. The circuit also contains separate inputs for data insertion, analogue as well as digital, which can be used for
text display systems (e.g. (Teletext/broadcast antiope), channel number display, etc. Additional to the TDA3560, the
circuit includes the following features:
· The peak white limiter is only active during the time that the 9,3 V level at the output is exceeded. The start of the limiting function is delayed by one line period. This avoids peak white limiting by test patterns which have abrupt
transitions from colour to white signals.
· The brightness control is obtained by inserting a variable pulse in the luminance channel. Therefore the ratio of
brightness variation and signal amplitude at the three outputs will be identical and independent of the difference in gain
of the three channels. Thus discolouring due to adjustment of contrast and brightness is avoided.
· Improved suppression of the internal RGB signals when the device is switched to external signals, and vice versa.
· Non-synchronized external RGB signals do not disturb the black level of the internal signals.
· Improved suppression of the residual 4,4 MHz signal in the RGB output stages.
· Cascoded stages in the demodulators and burst phase detector minimize the radiation of the colour demodulator
inputs.
· High current capability of the RGB outputs and the chrominance output.


The function is described against the corresponding pin
number.
1. + 12 V power supply
The circuit gives good operation in a supply voltage range
between 8 and 13,2 V provided that the supply voltage for
the controls is equal to the supply voltage for the
TDA3561A. All signal and control levels have a linear
dependency on the supply voltage. The current taken by
the device at 12 V is typically 85 mA. It is linearly
dependent on the supply voltage.
2. Control voltage for identification

This pin requires a detection capacitor of about 330 nF for
correct operation. The voltages available under various
signal conditions are given in the specification.
3. Chrominance input
The chroma signal must be a.c.-coupled to the input.
Its amplitude must be between 55 mV and 1100 mV
peak-to-peak (25 mV to 500 mV peak-to-peak burst
signal). All figures for the chroma signals are based on a
colour bar signal with 75% saturation, that is the
burst-to-chroma ratio of the input signal is 1 : 2,25.
4. Reference voltage A.C.C. detector
This pin must be decoupled by a capacitor of about 330
nF. The voltage at this pin is 4,9 V.
5. Control voltage A.C.C.
The A.C.C. is obtained by synchronous detection of the
burst signal followed by a peak detector. A good noise
immunity is obtained in this way and an increase of the
colour for weak input signals is prevented. The
recommended capacitor value at this pin is 2,2 mF.
6. Saturation control
The saturation control range is in excess of 50 dB.
The control voltage range is 2 to 4 V. Saturation control is
a linear function of the control voltage.
When the colour killer is active, the saturation control
voltage is reduced to a low level if the resistance of the
external saturation control network is sufficiently high.
Then the chroma amplifier supplies no signal to the
demodulator. Colour switch-on can be delayed by proper
choice of the time constant for the saturation control
setting circuit.
When the saturation control pin is connected to the power
supply the colour killer circuit is overruled so that the colour
signal is visible on the screen. In this way it is possible to
adjust the oscillator frequency without using a frequency
counter (see also pins 25 and 26).
7. Contrast control
The contrast control range is 20 dB for a control voltage
change from + 2 to + 4 V. Contrast control is a linear
function of the control voltage. The output signal is
suppressed when the control voltage is 1 V or less. If one
or more output signals surpasses the level of 9 V the peak
white limiter circuit becomes active and reduces the output
signals via the contrast control by discharging C2 via an
internal current sink.
8. Sandcastle and field blanking input
The output signals are blanked if the amplitude of the input
pulse is between 2 and 6,5 V. The burst gate and clamping
circuits are activated if the input pulse exceeds a level of
7,5 V.
The higher part of the sandcastle pulse should start just
after the sync pulse to prevent clamping of video signal on
the sync pulse. The width should be about 4 ms for proper
A.C.C. operation.
9. Video-data switching

The insertion circuit is activated by means of this input by
an input pulse between 1 V and 2 V. In that condition, the
internal RGB signals are switched off and the inserted
signals are supplied to the output amplifiers. If only normal
operation is wanted this pin should be connected to the
negative supply. The switching times are very short
(< 20 ns) to avoid coloured edges of the inserted signals
on the screen.
10. Luminance signal input
The input signal should have a peak-to-peak amplitude of
0,45 V (peak white to sync) to obtain a black-white output
signal to 5 V at nominal contrast. It must be a.c.-coupled to
the input by a capacitor of about 22 nF. The signal is
clamped at the input to an internal reference voltage.
A 1 kW luminance delay line can be applied because the
luminance input impedance is made very high.
Consequently the charging and discharging currents of the
coupling capacitor are very small and do not influence the
signal level at the input noticeably. Additionally the
coupling capacitor value may be small.

11. Brightness control
The black level of the RGB outputs can be set by the
voltage on this pin (see Fig.5). The black level can be set
higher than 4 V however the available output signal
amplitude is reduced (see pin 7). Brightness control also
operates on the black level of the inserted signals.
12, 14, 16. RGB outputs
The output circuits for red, green and blue are identical.
Output signals are 5,25 V (R, G and B) at nominal input
signals and control settings. The black levels of the three
outputs have the same value. The blanking level at the
outputs is 2,1 V. The peak white level is limited to 9,3 V.
When this level exceeded the output signal amplitude is
reduced via the contrast control (see pin 7).
13, 15, 17. Inputs for external RGB signals
The external signals must be a.c.-coupled to the inputs via
a coupling capacitor of about 100 nF. Source impedance
should not exceed 150 W. The input signal required for
a 5 V peak-to-peak output signal is 1 V peak-to-peak.
At the RGB outputs the black level of the inserted signal is
identical to that of normal RGB signals. When these inputs
are not used the coupling capacitors have to be connected
to the negative supply.
18, 19, 20. Black level clamp capacitors
The black level clamp capacitors for the three channels are
connected to these pins. The value of each capacitor
should be about 100 nF.
21, 22. Inputs (B-Y) and (R-Y) demodulators
The input signal is automatically fixed to the required level
by means of the burst phase detector and A.C.C.
generator which are connected to pin 21 and pin 22. As the
burst (applied differentially to those pins) is kept constant
by the A.C.C., the colour difference signals automatically
have the correct value.
23, 24. Burst phase detect

or outputs
At these pins the output of the burst phase detector is
filtered and controls the reference oscillator. An adequate
catching range is obtained with the time constants given in
the application circuit (see Fig.6).
25, 26. Reference oscillator
The frequency of the oscillator is adjusted by the variable
capacitor C1. For frequency adjustment interconnect pin
21 and pin 22. The frequency can be measured by
connecting a suitable frequency counter to pin 25.
28. Output of the chroma amplifier
Both burst and chroma signals are available at the output.
The burst-to-chroma ratio at the output is identical to that
at the input for nominal control settings. The burst signal is
not affected by the controls. The amplitude of the input
signal to the demodulator is kept constant by the A.C.C.
Therefore the output signal at pin 28 will depend on the
signal loss in the delay line.


Synchronization With TDA3576B.12V 70mA sync combination with transmitter identification and vertical 625 divider system

- Audio amplifier Unit.

- Power supply on the bottom of the cabinet (SOPS Supply).


PHILIPS STEREO RECEIVER V6820 CHASSIS K40 SAB3035 COMPUTER INTERFACE FOR TUNING AND CONTROL (CITAC)

GENERAL DESCRIPTION
The SAB3035 provides closed-loop digital tuning of TV receivers, with or without a.f.c., as required. lt
also controls up to 8 analogue functions, 4 general purpose I/O ports and 4 high-current outputs for
tuner band selection.
The IC is used in conjunction with a microcomputer from the MAB84OO family and is controlled via a two-wire, bidirectional I2 C bus.
Featu res
Combined analogue and digital circuitry minimizes the number of additional interfacing components
required
Frequency measurement with resolution of 50 KHz
Selectable prescaler divisor of 64 or 256
32 V tuning voltage amplifier
4 high-current outputs for direct band selection
8 static digital to analogue converters (DACSI for control of analogue functions
Four general purpose input/output (l/O) ports
Tuning with control of speed and direction
Tuning with or without a.f.c.
Single-pin, 4 MHZ on-chip oscillator
I2 C bus slave transceiver

FUNCTIONAL DESCRIPTION
The SAB3035 is a monolithic computer interface which provides tuning and control functions and
operates in conjunction with a microcomputer via an I2 C bus.
Tuning
This is performed using frequency-locked loop digital control. Data corresponding to the required tuner
frequency is stored in a 15-bit frequency buffer. The actual tuner frequency, divided by a factor of 256
(or by 64) by a prescaler, is applied via a gate to a 15-bit frequency counter. This input (FDIV) is
measured over a period controlled by a time reference counter and is compared with the contents of the frequency buffer. The result of the comparison is used to control the tuning voltage so that the tuner frequency equals the contents of the frequency buffer multiplied by 50 kHz within a programmable tuning window (TUW).

The system cycles over a period of 6,4 ms (or 2,56 ms), controlled by the time reference counter which is clocked by an on-chip 4 lVlHz reference oscillator. Regulation of the tuning voltage is performed by a charge pump frequency-locked loop system. The charge IT flowing into the tuning voltage amplifier is controlled by the tuning counter, 3-bit DAC and the charge pump circuit. The charge IT is linear with the frequency deviation Af in steps of 50 l

TDA2545A Quasi-split-sound circuitGENERAL DESCRIPTION The TDA2545A is a monolithic integrated circuit for quasi-split-sound processing in television receivers. Features · 3-stage gain controlled i.f. amplifier · A.G.C. circuit · Reference amplifier and limiter amplifier for vision carrier (V.C.) processing · Linear multiplier for quadrature demodulation.TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
television receivers using PNP or NPN tuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).
PHILIPS STEREO RECEIVER V6820 CHASSIS K40 Television receiver including a teletext Videotext decoder circuit :

In a teletext decoder circuit the character generator supplies picture elements at a rate of nominally approximately 6 MHz under the control of display pulses occurring at the same rate. These display pulses are derived from reference clock pulses which occur at a rate which is not a rational multiple of 6 MHz. The character generator comprises a generator circuit which receives the reference clock pulses and selects, from each series of N reference clock pulses, as many pulses as correspond to the number of horizontal picture elements constituting a character, while the time interval of N reference clock pulses corresponds to the desired width of the characters to be displayed. The character generator supplies picture elements of distinct length, while the length of a picture element is dependent on the ordinal number of this picture element in the character.

1. A receiver for television signal s including a teletext decoder circuit for decoding teletext signals constituted by character codes which are transmitted in the television signal, and comprising:
a video input circuit receiving the television signal and converting it into a serial data flow;
an acquisition circuit for receiving the serial data flow supplied by the video input circuit and selecting that part therefrom which corresponds to the teletext page described by the viewer;
a character generator comprising:
a memory medium addressed by the character codes which together represent the teletext page desired by the user and which in response to each character code successively supply m₂ series of m₁ simultaneously occurring character picture element codes each indicating wether a corresponding picture element of the character must be displayed in the foreground colour or in the background colour;
a generator circuit receiving a series of reference clock pulses and deriving display clock pulses therefrom;
a converter circuit receiving each series of m₁ simultaneously occurring character picture element codes as well as the display clock pulses for supplying the m₁ character picture element codes of a series one after the other and at the display clock pulse rate;
a display control circuit receiving the serial character picture element codes and converting each into an R, a G and a B signal for the relevant picture element of the character to be displayed;
characterized in that
the generator circuit is adapted to partition the series of reference clock pulses applied thereto into groups of N reference clock pulses each, in which N reference clock pulse periods correspond to the desired width of a character to be displayed, and to select from each such group m₁ clock pulse to function as display clock pulses;
the converter circuit is adapted to supply each character picture element code during a period which is dependent on the ordinal number of the character picture element code in the series of m₁ character picture element codes.
2. A character generator for use in a receiver teletext claim 1, comprising:
a memory medium which is addressable by character codes and successively applies m₂ series of m₁ simultaneously occurring character picture element codes in response to a character code applied as an address thereto, each character picture element code indicating whether a corresponding picture element of the character must be displayed in the foreground colour or in the background colour;
a generator circuit receiving a series of reference clock pulses and deriving display clock pulses therefrom;

a converter circuit receiving each series of m₁ simultaneously occurring character picture element codes and the display clock pulses for supplying the m₁ character picture element codes of the series one after the other at the display clock pulse rate;
a display control circuit receiving the serial character picture element codes and converting each into an R, a G and a B signal for the relevant picture element of the character to be displayed; characterized in that
the generator circuit is adapted to partition the series of reference clock pulses applied thereto into groups of N reference clock pulses each, in which N reference clock pulse periods correspond to the desired width of a character to be displayed, and to select from each such group m₁ clock pulses to function as display clock pulses;
the converter circuit is adapted to supply each character picture element code during a period which is dependent on the ordinal number of the character picture element code in the series of m₁ character picture element codes.

Description:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention generally relates to receivers for television signals and more particularly to receivers including teletext decoders for use in a teletext transmission system.
2. Description of the Prior Art
As is generally known, in a teletext transmission system, a number of pages is transmitted from a transmitter to the receiver in a predetermined cyclic sequence. Such a page comprises a plurality of lines and each line comprises a plurality of alphanumerical characters. A character code is assigned to each of these characters and all character codes are transmitted in those (or a number of those) television lines which are not used for the transmission of video signals. These television lines are usually referred to as data lines.
Nowadays the teletext transmission system is based on the standard known as "World System Teletext", abbreviates WST. According to this standard each page has 24 lines and each line comprises 40 characters. Furthermore each data line comprises, inter alia, a line number (in a binary form) and the 40 character codes of the 40 characters of that line.
A receiver which is suitable for use in such a teletext transmission system includes a teletext decoder enabling a user to select a predetermined page for display on a screen. As is indicated in, for example, Reference 1, a teletext decoder comprises, inter alia, a video input circuit (VIP) which receives the received television signal and converts it into a serial data flow. This flow is subsequently applied to an acquisition circuit which selects those data which are required for building up the page desired by the user. The 40 character codes of each teletext line are stored in a page memory which at a given moment thus comprises all character codes of the desired page. These character codes are subsequently applied one after the other and line by line to a character generator which supplies such output signals that the said characters become visible when signals are applied to a display.

For the purpose of display each character is considered as a matrix of m ₁ ×m ₂ picture elements which are displayed row by row on the screen. Each picture element corresponds to a line section having a predetermined length (measured with respect to time); for example, qμsec. Since each line of a page comprises 40 characters and each character has a width of m ₁ qμsec, each line has a length of 40 m ₁ μsec. In practice a length of approximately 36 to 44 μsec appears to be a good choice. In the teletext decoder described in Reference 1 line length of 40 μsec and a character width of 1 μsec at m ₁ =6 have been chosen.
The central part of the character generator is constituted by a memory which is sub-divided into a number of submemories, for example, one for each character. Each sub-memory then comprises m ₁ ×m ₂ memory locations each corresponding to a picture element and the contents of each memory location define whether the relevant picture element must be displayed in the so-called foreground colour or in the so-called background colour. The contents of such a code memory location will be referred to as character picture element code. This memory is each time addressed by a character code and a row code. The character code selects the sub-memory and the row code selects the row of m ₁ memory elements whose contents are desired. The memory thus supplies groups of m simultaneously occurring character picture element codes which are applied to a converter circuit. This converter circuit usually includes a buffer circuit for temporarily storing the m ₁ substantially presented character picture element codes. It is controlled by display clock pulses occurring at a given rate and being supplied by a generator circuit. It also supplies the m ₁ character picture element codes, which are stored in the buffer circuit, one after the other and at a rate of the display clock pulses. The serial character picture element codes thus obtained are applied to a display control circuit converting each character picture element code into an R, a G and a B signal value for the relevant picture element, which signal values are applied to the display device (for example, display tube).

The frequency f _d at which the display clock pulses occur directly determines the length of a picture element and hence the character width. In the above-mentioned case in which m ₁ =6 and in which a character width of 1 μsec is chosen, this means that f _d =6 MHz. A change in the rate of the display clock pulses involves a change in the length of a line of the page to be displayed (now 40 μsec). In practice a small deviation of, for example, not more than 5% appears to be acceptable. For generating the display clock pulses the generator circuit receives reference clock pulses. In the decoder circuit described in Reference 1 these reference clock pulses are also supplied at a rate of 6 MHz, more specifically by an oscillator specially provided for this purpose.
OBJECT AND SUMMARY OF THE INVENTION
A particular object of the invention is to provide a teletext decoder circuit which does not include a separate 6 MHz oscillator but in which for other reasons clock pulses, which are already present in the television receiver, can be used as reference clock pulses, which reference clock pulses generally do not occur at a rate which is a rational multiple of the rate at which the display clock pulses must occur.
According to the invention,
the generator circuit is adapted to partition the series of reference clock pulses applied thereto into groups of N reference clock pulses each, in which N clock pulse periods correspond to the desired width of a character to be displayed, and to select of each such group m ₁ clockpulses to function as display clock pulses;
the converter circuit is adapted to supply each character picture element code during a period which is dependent on the ordinal number of the character picture element code in the series of m ₁ character picture element codes.
The invention has resulted from research into teletext decoder circuits for use in the field of digital video signal processing in which a 13.5 MHz clock generator is provided for sampling the video signal. The 13.5 MHz clock pulses supplied by this clock generator are now used as reference clock pulses. The generator circuit partitions these reference clock pulses into groups of N clock pulses periods each. The width of such a group is equal to the desired character width. Since a character comprises rows of m ₁ picture elements, m ₁ reference clock pulses are selected from such a group which clock pulses are distributed over this group as regularly as possible. Since the mutual distance between the display clock pulses thus obtained is not constantly the same, further measures will have to be taken to prevent undesired gaps from occurring between successive picture elements when a character is displayed. Since the length of a picture element is determined by the period during which the converter circuit supplies a given character picture element code, this period has been rendered dependent on the ordinal number of the character picture element code in the series of m ₁ character picture element codes.
REFERENCES
1. Computer-controlled teletext, J. R. Kinghorn; Electronic Components and Applications, Vol. 6, No. 1, 1984, pages 15-29.
2. Video and associated systems, Bipolar, MOS; Types MAB 8031 AH to TDA 1521: Philips' Data Handbook, Integrated circuits, Book ICO2a 1986, pages 374,375.
3. Bipolar IC's for video equipment; Philips' Data Handbook, Integrated Circuits Part 2, January 1983.
4. IC' for digital systems in radio, audio and video equipment, Philips' Data Handbook, Integrated Circuits Part 3, September 1982.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows the general structure of a television receiver including a teletext decoder circuit;
FIG. 2 shows different matrices of picture elements constituting a character;
FIG. 3 shows diagrammatically the general structure of a character generator;
FIG. 4 shows an embodiment of a converter circuit and a generator circuit for use in the character generator shown in FIG. 3, and
FIG. 5 shows some time diagrams to explain its operation;
FIG. 6 shows another embodiment of a converter circuit and a generator circuit for use in the character generator shown in FIG. 3, and
FIG. 7 shows some time diagrams to explain its operation;
FIG. 8 shows a modification of the converter circuit shown in FIG. 6, adapted to round the characters.
EXPLANATION OF THE INVENTION
General structure of a TV receiver
FIG. 1 shows diagrammatically the general structure of a colour television receiver. It has an antenna input 1 connected to an antenna 2 receiving a television signal modulated on a high-frequency carrier, which signal is processed in a plurality of processing circuits. More particularly, it is applied to a tuning circuit 23 (tuner or channel selector). This circuit receives a band selection voltage V _B in order to enable the receiver to be tuned to a frequency within one of the frequency bands VHF1, VHF2, UHF, etc. The tuning circuit also receives a tuning voltage V _T with which the receiver is tuned to the desired frequency within the selected frequency band.
This tuning circuit 3 supplies an oscillator signal having a frequency of f _OSC on the one hand and an intermediate frequency video signal IF on the other hand. The latter signal is applied to an intermediate frequency amplification and demodulation circuit 4 supplying a baseband composite video signal CVBS. The Philips IC TDA 2540 described in Reference 3 can be used for this circuit 4.
The signal CVBS thus obtained is also applied to a colour decoder circuit 5. this circuit supplies the three primary colour signals R', G' and B' which in their turn are applied via an amplifier circuit 6 to a display device 7 in the form of a display tube for the display of broadcasts on a display screen 8. In the colour decoder circuit 5 colour saturation, contrast and brightness are influenced by means of control signals ANL. The circuit also receives an additional set of primary colour signals R, G and B and a switching signal BLK (blanking) with which the primary colour signals R', G' and B' can be replaced by the signals R, G and B of the additional set of primary colour signals. A Philips IC of the TDA 356X family described in Reference 3 can be used for this circuit 5.

The video signal CVBS is also applied to a teletext decoder circuit 9. This circuit comprises a video input circuit 91 which receives the video signal CVBS and converts it into a serial data flow. This flow is applied to a circuit 92 which will be referred to as teletext acquisition and control circuit (abbreviated TAC circuit). This circuit selects that part of the data applied thereto which corresponds to the teletext page desired by the viewer. The character codes defined by these data are stored in a memory 93 which is generally referred to as page memory and are applied from this memory to a character generator 94 supplying an R, a G and a B signal for each picture element of the screen 8. It is to be noted that this character generator 94 also supplies the switching signal BLK in this embodiment. As is shown in the Figure, the teletext acquisition and control circuit 92, the page memory 93 and the character generator 94 are controlled by a control circuit 95 which receives reference clock pulses with a frequency f _o from a reference clock oscillator 10. The control circuit 95 has such a structure that it supplies the same reference clock pulses from its output 951 with a phase which may be slightly shifted with respect to the reference clock pulses supplied by the clock pulse oscillator 10 itself. The reference clock pulses occurring at this output 951 will be denoted by TR.
The Philips IC SAA 5030 may be used as video input circuits 91, the Philips IC SAA 5040 may be used as teletext acquisition and control circuit, a 1K8 RAM may be used as page memory, a modified version of the Philips IC SAA 5050 may be used as character generator 94 and a modified version of the Philips IC SAA 5020 may be used as control circuit 95, the obvious modification being a result of the fact that this IC is originally intended to receive reference clock pulses at a rate of 6 MHz for which 13.5 MHz has now been taken.

The acquisition and control circuit 92 is also connected to a bus system 11. A control circuit 12 in the form of a microcomputer, an interface circuit 13 and a non-volatile memory medium 14 are also connected to this system. The interface circuit 13 supplies the said band selection voltage V _B , the tuning voltage V _T and the control signals ANL for controlling the analog functions of contrast, brightness and colour saturation. It receives an oscillator signal at the frequency f' _OSC which is derived by means of a frequency divider 15, a dividing factor of which is 256, from the oscillator signal at the frequency f _OSC which is supplied by the tuning circuit 3. Tuning circuit 3, frequency divider 15 and interface circuit 13 combined constitute a frequency synthesis circuit. The Philips IC SAB 3035 known under the name of CITAC (Computer Interface for Tuning and Analog Control) and described in Reference 4 can be used as interface circuit 13. A specimen from the MAB 84XX family, manufactured by Philips, can be used as a microcomputer.

The memory medium 14 is used, for example, for storing tuning data of a plurality of preselected transmitter stations (or programs). When such tuning data are applied to the interface circuit 13 under the control of the microcomputer 12, this circuit supplies a given band selection voltage V _B and a given tuning voltage V _T so that the receiver is tuned to the desired transmitter.
For operating this television receiver an operating system is provided in the form of a remote control system comprising a hand-held apparatus 16 and a local receiver 17. This receiver 17 has an output which is connected to an input (usually the "interrupt" input) of the microcomputer 12. It may be constituted by the Philips IC TDB 2033 described in Reference 4 and is then intended for receiving infrared signals which are transmitted by the hand-held apparatus 16.
The hand-held apparatus 16 comprises an operating panel 161 with a plurality of figure keys denoted by the FIGS. 0 to 9 inclusive, a colour saturation key SAT, a brightness key BRI, a volume key VOL, and a teletext key TXT. These keys are coupled to a transmitter circuit 162 for which, for example, the Philips IC SAA 3004, which has extensively been described in Reference 4, can be used. When a key is depressed, a code which is specific of that key is generated by the transmitter circuit 162, which code is transferred via an infrared carrier to the local receiver 17, demodulated in this receiver and subsequently presented to the microcomputer 12. This microcomputer thus receives operating instructions and activates, via the bus system 11, one of the circuits connected thereto. It is to be noted that an operating instruction may be a single instruction, that is to say, it is complete after depressing only one key. It may also be multiple, that is to say, it is not complete until two or more keys have been depressed. This situation occurs, for example, when the receiver is operating in the teletext mode. Operation of figure keys then only yields a complete operating instruction when, for example, three figure keys have been depressed. As is known, such a combination results in the page number of the desired teletext page.
The character generator
As already stated, a character is a matrix comprising m ₂ rows of m ₁ picture elements each. Each picture element corresponds to a line section of a predetermined length (measured with respect to time); for example, q/μsec. Such a matrix is indicated at A in FIG. 2 for m ₁ =6 and m ₂ =10. More particularly this is the matrix of a dummy character. The character for the letter A is indicated at B in the same FIG. 2. It is to be noted that the forty characters constituting a line of teletext page are contiguous to one another without any interspace. The sixth column of the matrix then ensures the required spacing between the successive letters and figures.
FIG. 3 shows diagrammatically the general structure of the character generator described in Reference 2 and adapted to supply a set of R, G and B signals for each picture element of the character. This character generator comprises a buffer 940 which receives the character codes from memory 93 (see FIG. 1). These character codes address a sub-memory in a memory medium 941, which sub-memory consists of m ₁ ×m ₂ memory elements each comprising a character picture element code. Each m ₁ ×m ₂ character picture element code corresponds to a picture element of the character and defines, as already stated, whether the relevation picture element must be displayed in the so-called foreground colour or in the so-called background colour. Such a character picture element code has the logic value "0" or "1". A "0" means that the corresponding picture element must be displayed in the background colour (for example, white). The "1" means that the corresponding picture element must be displayed in the foreground colour (for example, black or blue). At C in FIG. 2 there is indicated, the contents of the sub-memory for the character shown at B in FIG. 2.
The addressed sub-memory is read now by row under the control of a character row signal LOSE. More particularly, all first rows are read of the sub-memories of the forty characters of a teletext line, subsequently all second rows are read, then all third rows are read and so forth until finally all tenth rows are read.
The six character element codes of a row will hereinafter be referred to as CH(1), CH(2), . . . CH(6). They are made available in parallel by the memory medium 941 and are applied to a converter circuit 942 operating as a parallel-series converter. In addition to the six character picture element codes it receives display clock pulses DCL and applies these six character picture element codes one by one at the rate of the display clock pulses to a display control circuit 943 which converts each character picture element code into a set of R, G, B signals.
The display clock pulses DCL and the character row signal LOSE are supplied in known manner (see

Reference 2, page 391) by a generator circuit 944 which receives the reference clock pulses TR from the control circuit 95 (see FIG. 1), which reference clock pulses have a rate f ₀ . In the character generator described in Reference 2, page 391, f ₀ is 6 MHz and the display clock pulses DCL occur at the same rate. The converter circuit thus supplies the separate character picture element codes at a rate of 6 MHz. The picture elements shown at A and B therefore have a length of 1/6 μsec each and a character thus has a width of 1 μsec.
When the rate of the reference clock pulses increases, the rate of the display clock pulses also increases and the character width decreases. Without changing the character width the above-described character generator can also be used without any essential changes if the rate of the reference clock pulses is an integral multiple of 6 MHz. In that case the desired display clock pulses can e derived from the reference clock pulses by means of a divider circuit with an integral dividing number. However, there is a complication if f ₀ is not a rational multiple of 6 MHz, for example, if f ₀ =13.5 MHz and each character nevertheless must have a width of substantially 1 μsec. Two generator circuits and a plurality of converter circuits suitable for use in the character generator shown in FIG. 3 and withstanding the above-mentioned complication will be described hereinafter.
FIG. 4 shows an embodiment of the generator circuit 944 and the converter circuit 942. The reference clock pulses TR are assumed to occur at a rate of 13.5 MHz. To derive the desired display clock pulses from these reference clock pulses, the generator circuit 944 comprises a modulo-N-counter circuit 9441 which receives the 13.5 MHz reference clock pulses TR indicated at A in FIG. 5. The quantity N is chosen to be such that N clock pulse periods of the reference clock pulses substantially correspond to the desired character width of, for example, 1 μsec. This is the case for N=14, which yields a character width of 1.04 μsec.
An encoding network 9442 comprising two output lines 9443 and 9444 is connected to this modulo-N-counter circuit 9441. This encoding network 9442 each time supplies a display clock pulse in response to the first, the third, the sixth, the eighth, the eleventh and the thirteenth reference clock pulse in a group of fourteen reference clock pulses. More particularly the display clock pulse, which is obtained each time in response to the first reference clock pulse of a group, is applied to the output line 9443, whilst the other display clock pulses are applied to the output line 9444. Thus, the pulse series shown at B and C in FIG. 5 occur at these output lines 9443 and 9444, respectively.
The converter circuit 942 is constituted by a shift register circuit 9420 comprising six shift register elements each being suitable for storing a character picture element code CH(.) which is supplied by the memory medium 941 (see FIG. 3). This shift register circuit 9420 has a load pulse input 9421 and a shift pulse input 9422. The load pulse input 9421 is connected to the output line 9443 of the encoding network 9442 and thus receives the display clock pulses indicated at B in FIG. 5. The shift pulse input 9422 is connected to the output line 9444 of the encoding network 9442 and thus receives the display clock pulses indicated at C in FIG. 5.
This converter circuit operates as follows. Whenever a display clock pulse occurs at the load pulse input 9421, the six character picture element codes CH(.) are loaded into the shift register circuit 9420. The first character picture element code CH(1) thereby becomes immediately available at the output. The contents of the shift register elements are shifted one position in the direction of the output by each display clock pulse at the shift pulse input 9422.
Since the display clock pulses occur at mutually unequal distances, the time interval during which a character picture element code is available at the output of the shift register circuit is longer for the one character picture element code than for the other. This is shown in the time diagrams D of FIG. 5. More particularly the diagrams show for each character picture element code CH(.) during which reference clock pulse periods the code is available at the output of the shift register circuit. The result is that the picture elements from which the character is built up upon display also have unequal lengths as is indicated at D and E in FIG. 2.
The same character display is obtained by implementing the converter circuit 942 and the generator circuit 944 in the way shown in FIG. 6. The generator circuit 944 again comprises the modulo-N-counter circuit 9441 with N=14 which receives the 13.5 MHz reference clock pulses TR shown at A in FIG. 7. An encoding network 9445 is also connected to this counter circuit, which network now comprises six output lines 9446(.). This encoding network 9445 again supplies a display clock pulse in response to the first, the third, the sixth, the eighth, the eleventh and the thirteenth reference clock pulse of a group of fourteen reference clock pulses, which display clock pulses are applied to the respective output lines 9446(1), . . . , 9446(6). Thus, the pulse series indicated at B, C, D, E, F and G in FIG. 7 occur at these outputs.
The converter circuit 942 has six latches 9423(.) each adapted to store a character picture element code CH(.). The outputs of these latches are connected to inputs of respective AND gate circuits 9424(.). Their outputs are connected to inputs of an OR gate circuit 9425. The AND gate circuit is 9424(.) are controlled by the control signals S(1) to S(6), respectively, which are derived by means of a pulse widening circuit 9426 from the display clock pulses occurring at the output lines 9446(.) of the encoding network 9445 and which are also shown in FIG. 7. Such a control signal S(i) determines how long the character picture element code CH(i) is presented to the output of the OR gate circuit 9425 and hence determines the length of the different picture elements of the character on the display screen.

As is shown in FIG. 6, the pulse widening circuit 9426 may be constituted by a plurality of JK flip-flops 9426(.) which are connected to the output lines of the encoding network 944, in the manner shown in the Figure. It is to be noted that the function of the pulse widening circuit 9426 may also be included in the encoding network 9445. In that case this function may be realized in a different manner.
In the above-described embodiments of the converter circuit 942 and the generator circuit 944 the character generator supplies exactly contiguous picture elements on the display screen. This means that the one picture elements begins immediately after the previous picture element has ended. The result is that round and diagonal shapes become vague. It is therefore common practice to realize a rounding for such shapes. This rounding can be realized with the converter circuit shown in FIGS. 4 and 6 by ensuring that two consecutive picture elements partly overlap each other. This is realized in the converter circuit shown in FIG. 4 by means of a rounding circuit 9427 which receives the character picture element codes occurring at the output of the shift register circuit 9420. This rounding circuit 9427 comprises an OR gate 9427(1) and a D flip-flop 9427(2). The T input of this flip-flop receives the clock pulses shown at E in FIG. 5, which pulses are derived from the reference clock pulses TR by means of a delay circuit 9427(3). This circuit has a delay time t ₀ for which a value in the time diagram indicated at E in FIG. 5 is chosen which corresponds to half a clock pulse period of the reference cock pulses. The character picture element codes supplied by the shift register circuit 9420 are now applied directly and via the D flip-flop 9427(2) to the OR gate which thereby supplies the six character picture element codes CH(.) in the time intervals as indicated at F in FIG. 5. The result of this measure for the display of the character with the letter A is shown at F in FIG. 2.
The same rounding effect can be realized by means of the converter circuit shown in FIG. 6, namely by providing it with a rounding circuit as well. This is shown in FIG. 8. In this FIG. 8 the elements corresponding to those in FIG. 6 have the same reference numerals. The converter circuit 942 shown in FIG. 8 differs from the circuit shown in FIG. 6 in that the said rounding circuit denoted by the reference numeral 9428 is incorporated between the pulse widening circuit 9426 and the AND gate circuits 9424(.). More particularly this rounding circuit is a pluriform version of the rounding circuit 9427 shown in FIG. 4 and is constituted by six D flip-flops 9428(.) and six OR gates 9429(.). These OR gates receive the respective control signals S(1) to S(6) directly and via the D flip-flops. The T inputs of these D flip-flops again receive the version of the reference clock pulses delayed over half a reference clock pulse period by means of the delay circuit 94210. This rounding circuit thus supplies the control signals S'(.) shown in FIG. 7.

 Other References:

Philips Data Handbook, Electronic Components and Materials "Integrated Circuits: Part 3, Sep. 1982: ICs for Digital Systems in Radio, Audio, and Video Equipment: SAA5030 Series", pp. 1-10.
Philips Data Handbook, Electronic Components and Materials "Integrated Circuits: Part 3, Sep. 1982: ICs for Digital Systems in Radio, Audio, and Video Equipment: SAA5020 Series", pp. 1-10.
Philips Data Handbook, Electronic Components and Materials "Integrated Circuits: Book IC02a, 1986: Video and Associated Systems: Bipolar, MOS: Types MAB8031AH to TDA1521", pp. 374-375.
F. J. R. Kinghorn, "Computer Controlled Teletext"; Electronic Components and Applications; vol. 6, No. 1, 1984, pp. 15-29.
"World System Teletext Technical Specification", Revised Mar. 1985, pp. 1-10 and 38-41.
Philips Data Handbook, Electronic Components and Materials; "Integrated Circuits, Part 2: Jan. 1983: Bipolar ICs for Video Equipment: TDA2540, TDA2540Q"; pp. 1-8.
Philips Data Handbook, Electronic Components and Materials; "Integrated Circuits: Part 2: Jan. 1983: Bipolar ICs for Video Equipment: TDA 3562A"; pp. 1-16.
Philips Data Handbook, Electronic Components and Materials "Integrated Circuits: Part 3, Sep. 1982: IC's for Digital Systems in Radio, Audio, and Video Equipment: SAA3004"; pp. 1-10.
Philips Data Handbook, Electronic Components and Materials, "Integrated Circuits: Part 3, Sep. 1982: Ics for Digital Systems in Radio, Audio, and Video Equipment: SAB3035", pp. 1-4.
Philips Data Handbook, Electronic Components and Materials "Integrated Circuits: Part 3, Sep. 1982: ICs for Digital Systems in Radio, Audio and Video Equipment: TDB2033", pp. 1-9.



PHILIPS STEREO RECEIVER V6820 CHASSIS K40 Teletext / Videotext Error correction circuit using character probability :

An error correction circuit in a television receiver for receiving, for example, Teletext information, Viewdata information or information of comparable systems. The codes representing symbol information received by the receiver are classified into one out of two or more classes in dependence on the frequency of their occurrence, this classification being an indication of the extent to which it is probable that a received code is correctly received.
In FIG. 1, a picture text television receiver has a receiving section, audio and video amplifiers 4 and 9 and a picture tube 10, 11. A text decoder 21 receives symbol information which is stored in a store 25 for display. An error detector circuit 40 including a comparison circuit 43 and two parity circuits 41 and 42, and checks for parity between newly received and already stored symbol information. A reliability circuit 60 is also included.

1. An error correction circuit for a receiving device for receiving digitally transmitted symbol information, the transmission of this information being repeated one or more times, the receiving device having a decoding circuit for decoding the received information, an information store coupled to said decoding circuit for storing the information, a circuit for generating synchronizing signals and a video converter circuit coupled to said information store and said generating circuit for converting information and synchronizing signals into a composite video signal for application to a standard television receiver, a symbol address in the information store corresponding with a symbol location on a television picture screen, a symbol location being a portion of a text line which is displayed with a number of video lines greater than one, the error correction circuit being coupled to said decoding circuit and said information store and including means coupled between said decoding circuit and said information store for checking newly received symbol information against symbol information stored in the information store for the corresponding symbol location, a write-switch having one input coupled to said decoding circuit and an output coupled to said information store, and a write-setting circuit, coupled to another input of said write-switch, which determines whether the newly received information is written or not written into the information store, said write-setting circit having an input coupled to said checking means whereby the results of said checking are a factor in the setting of said write-switch by said write-setting circuit, characterized in that the error correction circuit further comprises a classification circuit coupled to the output of said decoding circuit for classifying a newly received and decoded symbol in one of at least two classes on the basis of the probability of occurrence of the newly received symbol, the input of the classification circuit being coupled to another input of the write-setting circuit. 2. An error correction circuit for a receiving device as claimed in claim 1, characterized in that the write-setting circuit includes a reliability circuit and the information store comprises an additional storage element for each symbol address in the information store for storing a reliability bit associated with that symbol address, inputs of the reliability circuit being coupled to the classification circuit and to the information store for accessing the additional storage elements, for determining, from the additional storage element corresponding with the symbol address position of newly received symbol information, a new reliability bit, an output of the reliability circuit being coupled back to the information store for writing this new reliability bit into the corresponding additional storage element when the reliability bit for this symbol address changes its value. 3. An error correction circuit for a receiving device as claimed in claim 2, characterized in that the checking means comprises a comparison circuit for bit-wise comparing a newly received and decoded symbol with a symbol read from an address of the information store, this address corresponding with the symbol location, a comparison output of the comparison circuit being coupled to a further input of the reliability circuit. 4. An error correction circuit for a receiving device as claimed in any one of the preceding claims, characterized in that the classification circuit comprises a parity circuit for classifying newly received symbols for respective particular symbol locations into one of two classes which correspond to an even and an odd parity respectively, of the newly received information, and for classifying symbol information already stored in the corresponding symbol addresses in the information store. 5. An error correction circuit for a receiving device as claimed in claim 2, characterized in that the reliability circuit comprises a reliability flipflop and a reliability read circuit for this flipflop, an output of which also constitutes the output of the reliability circuit. 6. An error correction circuit for a receiving device as claimed in claim 1, characterized in that the error correction circuit comprises a second classification circuit, coupled between said other classification circuit and said write-setting circuit and having inputs coupled to said information store, for classifying a symbol read from the information store. 7. An error correction circuit for a receiving device as claimed in claim 1 characterized in that the information store comprises, for each symbol address in the information store, at least one further storage element for storing the classification associated with the symbol for that symbol address.

Description:

BACKGROUND OF THE INVENTION

The invention relates to an error correction circuit of a type suitable for a receiving device for receiving digitally transmitted symbol information (picture and/or text), the transmission of this information being repeated one or more times, the receiving device comprising a deconding circuit for decoding the received information, an information store for storing the information, a circuit for generating synchronizing signals and a video converter circuit for converting information and synchronizing signals for applying a composite video signal to a standard television receiver, a symbol address in the information store corresponding with a symbol location on a television picture screen, a symbol location being a portion of a text line which is displayed with a number of videolines greater than one, the error correction circuit comprising means for checking newly received symbol information against symbol information stored in the information store for the corresponding symbol location, together with a write-switch having a write-setting circuit which determines whether the newly received information is written or not written into the information store, the position of the switch being determined on the basis of the result of said checking.

Error correction circuits of the above type are used in auxiliary apparatus for the reception of Teletext transmissions or comparable transmissions, these auxiliary apparatus being connected to a standard television receiver either by applying video signals to a so-called video input, or by applying these video signals, modulated on a carrier, to an aerial input of the television set. There are already television receivers with a built-in Teletext receiver already including an error correction circuit of the above-mentioned type.
The present Teletext system as it is already used rather widely in the UK, is based on an 8-bit symbol teletext code having 7 information bits and 1 parity bit; this parity bit is chosen so that each 8-bit symbol in the code has a so-called "odd" parity, that is to say there is an odd number of ones in a symbol, and, consequently, also an odd number of zeros. A display on the television picture screen comprises a "page" consisting of a number of rows (e.g. 24) of symbols.
Only symbols with the "odd" parity are stored in the information store. Each symbol represents either an alpha-numeric or a graphics character for display on the picture screen, or a control symbol.
If, in a subsequent transmission cycle for the same symbol location of the same page, a faulty symbol is detected, then, assuming that only a single error occurs within a symbol, this faulty symbol will have an even parity, that is to say a "one" changed into a "zero", or vice versa, as the result of the error. In this case the information store is not written into and the old information is retained in the relevant symbol address.

As the probability is very great that this old information is correct, the parity check does not only furnish an error detection, but also an error correction, partly because of the fact that some knowledge has already been gained from the previous history. Of course, this does not hold for the first transmission cycle. Should an "even" parity be found in a 8-bit symbol in the first transmission cycle, a space ("blank") is generally recorded in the relevant symbol address and, consequently, displayed as a space. The easiest way to do this is by filling the entire information store with space symbols when a new Teletext page is requested, so that also in the first cycle no information need be written into the information store on receipt of a symbol having an "even" parity.
For a poor transmission condition an error probability of 0.01 is assumed, that is to say one symbol out of a hundred symbols is received incorrectly. In a complete page having 960 Teletext symbol locations, (i.e. up to 24 rows of up to 40 symbols per row) the displayed page then shows, after the first cycle, 9 to 10 erroneous spaces on average. In the present system substantially all these erroneous spaces are likely to have been corrected in the second cycle.
When the receiving conditions are better, this situation is already correspondingly more favourable in the first cycle. Even in the poorest receiving conditions, it appears that the number of double errors is so small that they may be neglected. Double errors therefore are hardly ever taken into consideration hereafter. It will be apparent that in this system each symbol has a certain degree of redundancy in the form of the parity bit, but this is off-set by the drawback that the 8-bit code, which has 256 (=2 ⁸ ) combinations, is utilized for only 50% of this capacity, i.e. only for the 128 symbols having "odd" parity.
Although, for the U.K. itself, such a code has a sufficient capacity to contain all desired symbols for control, graphics elements, letters, figures, punctuation marks, etc. as required for Teletext and also, for example, for Viewdata, it is not possible to allot a specific symbol to all of the special characters occurring in various other languages.
Several European languages, in so far they are written in latin characters, have all sorts of "extra" characters, for example Umlaut letters, accent letters, etc. When all these extra characters are totalled, including Icelandic, Maltese and Turkish, then it appears that a total of approximately 220 symbols is required, namely the 128 known symbols plus further symbols for these "extra" characters.
Several solutions have been proposed to solve this, but so far none of these have been satisfactory as they are either very cumbersome or allow only one language within one page, so that it is impossible or very difficult e.g. to quote foreign names in a page of text.
Alternatively it has been proposed--and this is of course very obvious--to use the entire 8-bit code for symbols. As the redundancy in the code has now been reduced to zero, no correction can be effected in the second cycle. If two codes for one symbol location differ from one another in different transmission cycles, it is theoretically impossible to decide with certainty which one of the two codes is correct. An additional information store is required to enable a comparison between a newly received symbol in the third cycle and a symbol from the second and the first cycles, and to take the frequently used majority decision thereafter. This is possible, but three reading cycles are necessary before the number of errors is reduced to an acceptable level. As each transmission cycle of a completely full magazine (i.e. a plurality of pages) takes approximately 25 seconds, the correct text is not known until after approximately 75 seconds.
As the present system displays the text correctly after approximately 50 seconds already, such a solution would mean an increase in the so-called access time.
If a new parity bit were added to the 8-bit code, each symbol would require 8+1=9 bits so that it is no longer possible, as is done in the present system, to accommodate the symbols for one text line of 40 characters in one video line, whereas on the other hand the average transmission rate decreases if more video lines are needed for the information transmission. This solution is generally considered to be unacceptable, also because the compatibility with existing receivers would be fully lost.
Although any language to be displayed can be considered to contain redundancy both as regards text and graphics, so that a viewer may "overlook" many errors, in the sense that there is still an intelligible display, this does not offer a satisfactory solution.
SUMMARY OF THE INVENTION
It is the object of the invention to provide an error correction circuit of the type referred to for a receiving device for Teletext and comparable systems, which offers such a solution for the problem outlined above that also for an 8-bit code without a parity bit substantially all errors, if any, can be corrected in the second transmission cycle which is received.
According to the invention an error correction circuit of the type referred to is characterized in that it comprises at least one classification circuit for classifying a newly received and decoded symbol in one of at least two classes on the basis of the probability of occurrence of the newly received symbol, an output of the classification circuit being coupled to an input of the write-setting circuit.
The classification circuit utilizes the hitherto unrecognized fact that the "language" used for the Teletext system and for associated systems comprises a third form of redundancy, namely the frequency with which the different symbols occur in any random text.
From counts performed on longer texts in several languages, including texts that quote words or names from other languages, it is found that, on average, these texts did not contain more than approximately 5% "extra" symbols, in spite of the fact that the extra symbols constitute approximately 50% of the different code combinations. The remaining 95% are symbols from the original 50% of the different code combinations, that is to say control, graphics and text symbols which were already used in the existing system. For simplicity, these latter symbols are hereinafter denoted A-symbols, and the "extra" symbols are denoted B-symbols.
If now an A-symbol is received in the first cycle and a B-symbol in the second cycle, or vice versa, it is already possible to decide with a high degree of certainty which of the two is correct.
Let us assume that an identified A-symbol is transmitted from the transmitter end for the same symbol location in those first and second cycles, whereas the receiver receives an A-symbol in the first cycle and a B-symbol in the second cycle.
It can be seen that some form of A-symbol is obtained in the receiver when either a real A-symbol is properly received or a real B-symbol is erroneously received. Assuming there is an error probability of 0.01, the probability that the first-mentioned situation occurs is 0.95×0.99=0.9405 and the probability that the second situation occurs is 0.05×0.01=0.0005 so that the probability that an A-symbol is received totals 0.941. A B-symbol results from a real B-symbol (0.05×0.99=0.0495) or a faulty A-symbol (0.95×0.01=0.0095), adding up to a total probability of 0.059. Of course 0.941+0.059=1.000, based on the assumption that double errors do not occur, so that any A-symbol A _x will never be received as another A-symbol A _y from the same class. The probability that a received A-symbol is correct is 0.9405/0.941=0.9995. The probability that a received B-symbol is correct is 0.0495/0.059=0.839.
For the above mentioned case, it is correctly assumed that the A-symbol in the first cycle is correct, and that the B-symbol in the second cycle is incorrect.
Consequently, there is an A-symbol in the information store in both cycles. In the second cycle the B-symbol must not be stored, and the A-symbol obtained from the first cycle must be retained.
Should a B-symbol be received first, then a B-symbol is written into the information store, (the probability that this B-symbol is correct is still 84%) but it is not retained in the second cycle, and the A-symbol received in the second cycle must now be recorded in the information store.

At the end of the second cycle it is seen that in this manner the then remaining error is less than one in approximately 5 full pages, as applied to the Teletext system. Such a number of errors is so small that apparently they are not noticed by a viewer.
When an A-symbol is received in the first cycle and in the second cycle or a B-symbol is received in both cycles then there is no doubt, after symbol sequences A, B or B, A there is little doubt, but the symbol stored in the information store must be considered to be somewhat suspect. This also applies to each B-symbol recorded in the first cycle, which may lead to a further improvement when a decision is taken.
Another advantageous embodiment of an error correction circuit according to the invention is characterized in that the error correction circuit comprises a reliability circuit and the information store comprises an additional storage element for each symbol address in the information store for storing a reliability bit associated with that symbol address, inputs of the reliability circuit being coupled to the classification circuit and to a read circuit for the additional storage elements, for determining from the additional storage element corresponding with the symbol address of newly received symbol information a new reliability bit, this new reliability bit being written at least into the corresponding additional storage element when the reliability bit for this symbol address changes its value.
When the transmitter successively transmits an A-symbol for a certain symbol and location and symbols ABA are successively received, then the A-symbol may be recorded as being "non-suspect" after the first cycle, indicated by an R (reliable) hereinafter. An R' after the second (A), the brackets indicating that the information is retained (not written into the information store) indicates the assumed non-reliability of this retained (A)-symbol, and an A and an R in the third cycle indicates the reliability of the correctly received A-symbol. The A-symbol in the information store is now again assumed to be reliable for this symbol sequence.
In like manner, when the transmitter transmits a B for a certain symbol location, and the symbols B, A, B, B are successively received, symbols and reliability states B. R', A.R', B. R' and B.R are recorded.
All this depends on the decision logic opted for.
It is assumed here that the possibility of an error for the same symbol location in two consecutive cycles is also extremely small; when the transmitter transmits symbols A, A, A, A in successive cycles, the probability that the receiver would receive, for example, symbols A, B, B, A is assumed to be zero. From practical experiments it was seen that this form of a double error can be fully neglected.
This improvement makes it of course necessary for

reliabilit

y state R or R' to be retained together with the related symbol in the information store and that it must be revised every cycle, if necessary. Each symbol address now has 9 bits instead of 8 in the Teletext receiver memory. This has hardly any consequences for the price as a standard RAM having a capacity of 1kx9 can be used.
As is apparent from the foregoing examples, it can be advantageous to make different decisions in the case a symbol sequence B-A is formed after the first cycle or after a further cycle.
A further advantageous embodiment of an error correction circuit is characterized in that the error correction circuit comprises a counting circuit for counting information transmission cycles following a new request for (always) a full picture of the requested symbol information, a counting output of this counting circuit being coupled at least to another input of the reliability circuit, this counting output being, for example, also coupled to a further input of the write-setting circuit.
As seen earlier in the history of data transmission and information processing equipment, the need was felt also for Teletext and comparable systems, to realise the extension with new symbols by doubling the number of symbols identified by an n-bit code, in such a way that the original symbols retain as far as possible their existing bit combustion.
This results inter alia in that transmission in a new, extended, code are also displayed reasonably well by existing receivers. A receiver for the original symbols only allots the correct symbol to approximately 95% or more of the symbol locations in the display. A limited compatability is therefore still possible, and even a full compatibility if a normal "English" text is transmitted.
In the example considered herein all the original symbols remain the same, and all the "extra" symbols have even parity.
This symbol set is now under discussion as an international standardization proposal.
It will be apparent that in the last-mentioned case no intricate classification circuit is required to decide for each symbol whether this symbol must be allocated to the A or to the B group.
A further advantageous embodiment of an error correction circuit according to the invention is therefore characterized in that the classification circuit comprises a parity circuit for classifying newly received symbols for respective particular symbol locations into one of two classes which correspond to an even and an odd parity, respectively, of the newly received information, and for classifying symbol information already stored in the corresponding symbol addresses in the information store.
This results, at first sight, in very strange circuit, as now a parity check is performed on a code which contains no parity bit at all.

It is, of course, alternatively possible to record the relevant classification of a symbol in the information store, but this requires at least a tenth bit for each symbol address and, for a classification in more than two groups, it requires even more. It is, however, more advantageous, when a newly received symbol for a particular symbol location is compared with the symbol already stored in the corresponding symbol address of the information store, to determine the classification of the symbol again when it is read from the address, as this requires less material and the advantage that a standard 1 Kx9 RAM can be used is retained.
A further advantageous embodiment is characterized in that the error correction circuit comprises a second classification circuit for classifying a symbol read from the information store.
In the most advantageous case, wherein all extra symbols are even parity codes, this means a second parity check circuit.
In the case that classification in two classes coincides with an even and an odd parity, respectively, of the symbols, it furthermore appears to be possible to enter the classification in the information store in such a way that the notation of the classification does not require an additional storage bit.
An embodiment of an error correction circuit according to the invention, which is advantageous for this case, is characterized in that the error correction circuit comprises a modification circuit which after having determined the "0" or "1" parity value of a newly received symbol means of the parity circuit replaces the content of a fixed bit position of the newly received symbol by this parity value.
Any random bit can be selected as the fixed bit position in the symbol, for example, the eight bit in the case of an 8-bit symbol, whereas a ninth bit is used as, for example, the reliability bit.
There are four distruct possibilities:

TABLE I

______________________________________

Modified Class Symbol (n+1) Parity symbol (n+1) Parity

______________________________________

A xxxxxxx 1 1 xxxxxxx 1 1 A xxxxxxx 0 1 xxxxxxx 1 0 B xxxxxxx 1 0 xxxxxxx 0 1 B xxxxxxx 0 0 xxxxxxx 0 0

______________________________________

In this case only one 8-bit parity circuit is needed.
It is of course alternatively possible to realize the second classification circuit virtually by using the first classification circuit twice on a time-sharing basis, first as the first and then as the second classification circuit. This requires some additional control logic and some additional time, so that the provision of a second classification circuit will be preferred, especially in the case where a simple parity check is performed.
The above-mentioned solution with its possible extensions will furnish the best result if all these extensions are provided. This is at the same time the most expensive solution. Error correction circuits which do not have all the above-described extensions are cheaper and hardly less good.
DESCRIPTION OF THE DRAWINGS
One specific combination will now be discussed in greater detail by way of example with reference to the drawings. On the basis thereof, any other combination can be easily implemented by one skilled in the art.
In the drawings:
FIG. 1 shows a simplified block diagram of a television receiver comprising a Teletext receiving section including an error correction circuit according to the invention.
FIG. 2 shows a simplified time diagram in which a number of different error combinations is shown in an exaggerated burst of errors.
DESCRIPTION OF THE PREFERRED EMBODIMENT
The embodiment chosen for FIG. 1 is suitable for reception in accordance with the proposed new code and comprises two clasification circuits consisting of two parity circuits, a comparison circuit for the bit-wise comparison of two symbols, a reliability circuit comprising a reliability flipflop and, in addition, the elements already known for a television plus Teletext receiver.
FIG. 1 shows a television receiver by means of a simplified block diagram.
A receiving section 1 having an aerial input 2 comprises the high-frequency receiving section, the intermediate-frequency amplifier section, the detection and the synchronizing circuits of the receiver. An audio output 3 is coupled to one or more loudspeakers 5 via an audio amplifier 4. Via control switches 7 and 8 a video output 6 is coupled for normal television reception to a video amplifier 9 for a picture tube 10 comprising the picture screen 11. Via a control switch 13 a synchronizing output 12 is coupled during normal television reception to a time-base circuit 14 which supplies the deflection voltages for the picture tube 10 via an output 15.
However, the control switches 7, 8 and 13 are shown in the position for Teletext reception and display.
Via the switch 7 the video signal is applied to an input 20 of a Teletext decoder 21, a synchronizing input 22 of which is coupled to the synchronizing output 12 of the receiving section 1.
In the Teletext decoder 21, serially received Teletext symbols are successively entered in parallel into a buffer register 23 thereof. Depending on the action decided upon, the contents of the buffer register 23 can be transferred to a storage register 24 of an information store 25, and from the storage register 24, the consecutive symbol addresses each corresponding to a symbol location on the picture screen 11 are filled, until the entire information store 25 is filled with the symbol information which corresponds to the desired Teletext page.

This and also the further processing operations are fully in agreement with the existing Teletext system. Addressing, reading of the information store, etc. are therefore not further described.
An output 26 of the information store 25 is coupled to a video (Teletext) generator 27, an output 28 of which is connected to the video amplifier 9 via the switch 8. In addition, there is provided in known manner a signal generator 29 and a generator 30 for generating several timing signals required in the receiver, which are applied to several other elements via outputs 31 to 35, inclusive. Synchronizing signals which can be applied to the time-base circuit 14 via the switch 13 are produced at the output 32.
The decision whether the content of the buffer register 23 must be transferred or not transferred to the storage register 24 is taken by an error correction circuit, which would, in the known Teletext system, consist of a parity check circuit.
The error correction circuit according to the invention consists of an error detection circuit 40 and, in the specific embodiment being described, a reliability circuit 60. The error detection circuit 40 comprises a parity circuit 41 for the buffer register 23, a parity circuit 42 for the storage register 24, a comparison circuit 43 for comparing the contents of buffer and storage registers 23, 24 with one another, and a number of write switches 44-0 to 44-7 inclusive. In this example these write switches are represented as respective AND-gates each having two inputs and an output. An input 45-i of each of the write switches is always connected to a corresponding output 46-i of the buffer register 23, these outputs also being connected respectively to inputs 47-1 to 47-8 inclusive, of the parity circuit 41 and to inputs 48-0 to 48-7 inclusive, of the comparison circuit 43.
The other input 49-i of each of the write switches is connected to a common write command input 50 of the error detection circuit 40.
In addition, output 51-i of the storage register 24 are connected to respective inputs 52-1 to 52-8 inclusive, of the parity circuit 42 and to corresponding further inputs 53-i of the comparison circuit 43 and to outputs 54-i of the write switches 44-0 to 44-7.
An odd parity-output 55 ("1" for odd-parity) of the parity circuit 41, is connected to an input 52-9 of the additional parity circuit 42, which has an output 56 for even or odd parity at the inputs 52-1 to 52-9, inclusive.
A Signetics IC No. 54180 or No. 8262 may, for example, be used for the parity circuit 41. If the parity of the symbol in the buffer register 23 is odd or even, a "1" and "0", respectively, appears at the output 55.

A Signetics IC No. 8262 may also be used for the parity circuit 42. If the parity of the symbol in the storage register 24 is odd and a "1" has appeared at the output 55, then a "1" appears at the output 56 for the even parity of the parity circuit 42, that is to say both symbols had an odd parity. If both symbols have an even parity the input 52-9 receives a zero, so that the total number of ones is even again and the output 56 shows an "1" again. Should the parities of the buffer register 23 and the storge register 24 be unequal, then the output 56 shows "0".
Thus the output 56 (Even Parity) may be considered to be an output which indicates by means of the "1", that the investigated symbols have an equal parity (Equal Parity, EP).
The comparison circuit 43 has an output 57 which becomes a "1" as soon as all the bits of the compared symbols are mutually equal. The signal thus obtained will be denoted EB (Equal Bytes).
The reliability circuit 60 comprises a flipflop 61 having number of writing gates 62. A JK flipflop is chosen for the described example but this is not essential to the inventive idea. One half of a Signetics 54112 may, for example, be used as a JK flipflop. Descriptions, truth tables and time diagrams of the above-mentioned Signetics circuits are known from the Philips Signetics Data Handbook.
The reliability circit 60 satisfies the following equations:
CK _R =CLK, obtained from the clock signal generator 29. J _R =R/WR _G +(R/W)'EP (I) K _R =R/WR _G +(R/W)'EB (II)
in which R _G is the reliability status as stored in the memory 25,
The operation of the JK-flipflop can be explained as follows, reference also being made to the time diagram of FIG. 2.
Within successive periods of approximately 25 seconds the symbols for 960 symbol locations (i.e. a page of text) are repeatedly received. The solid line sections 100 represent the symbol processing of the symbol S _x in consecutive cycles 0 to 7, inclusive, indicated as S _x ,0 to S _x ,7 inclusive. The broken line sections represent in a very concise manner the processing of S ₀ to S _x -1, inclusive, and S _x +1 to S ₉₅₉ , inclusive, one processing period comprising, for example, two cycles of the clock signal 101 of the clock signal generator 29 and one read/write cycle consisting of the portions R/W and (R/W)', read and write respectively, controlled by the signal 102, obtained from the output 31 of time signal generator 30. During the read portion 103 of cycle 102 the contents of a symbol address which correspond with the signal combination entered in the buffer register 23 for a given symbol location, is entered into the storage register 24. As each symbol address has a ninth bit for a reliability bit, a status value R _G appears simultaneously at an output 63 of the information store 25. On the first rising clock edge 104 only the first terms of the equations I and II are operative, as R/W="1" and consequently (R/W)'="0". This means that at the instant 104 the flipflop 61, R assumes the value "1" when R G ="1" and the value "0" when R _G ="0", as shown in the line sections 105. At the next clock edge 106 only the second terms are operative, and the flipflop 61 can now retain the previously adjusted value or assume the other value. This final value at the output 64 of the flipflop 61 is applied to an input 65 of the information store for writing a next R _G in the ninth bit of the corresponding storage address.
The output 66 (R') of the flipflop 61, which is connected to thewrite command signal input 50 of the error detection circuit 50, further determines whether the contents of the buffer register 23 can be transferred to the storage register 24 during the write cycle 107 (see FIG. 2).
Finally, the lines 108, 109 of FIG. 2 represent two bit contents of the storage register and 110, 111 represent two bit contents of the buffer register. For clarity's sake the remaining bits have been omitted.
The signal EP is denoted by 112, and the signal EB by 113.
In this example the following set of decision rules has been realised in the circuit.

TABLE II

______________________________________

Decision Read Write SR EP EB R G 23➝24 Written S R K R

______________________________________

1 0 0 0 1 0 0 x 2 1 0 0 1 1 1 x 3 1 1 0 1 1 1 x 5 1 1 1 0 1 x 1 6 1 0 1 0 0 x 0 7 0 0 1 0 0 x 0 (4) 1 0 0 1 0 0 x

______________________________________

The states, indicated by an x, of J _R and K _R are irrelevant for the position of the flipflop. The equations I and II have been chosen thus that the required values "0" and "1" for J _R and K _R are produced.
FIG. 2 shows the states and EP, EB and R in the line sections 112, 113 and 105, respectively, by means of an example which shows an unprobable burst of received errors, such that each one of the decisions occurs at least once.
When the first cycle starts, the entire information store 25 is filled with space symbols. The space symbol is an A-symbol, denoted in FIG. 2 by A. It is assumed that the transmitter transmits a B-symbol and continues to do so. A faulty B-symbol has the same parity as A and is denoted by B'. On the basis of decision 1, EP=0, EB=0 and R _G ="0" in the second half of the cycle a B' (erroneously received B with an even number of errors) is written into the storage register 24. The new R _G remains "0" because J _R =0, K _R =x.
In the next cycle the buffer register 23 contains a correctly received B, which is transferred to the storage register 24 in accordance with decision 2.
The further cycles need no explanation. (B) indicates when there is no transfer to the store. The B already present in the relevant symbol address is not changed.
Throughout the example of the transmitter
transmitted: B B B B B B B B
received: B' B B' B B A B B
dislayed: B' B (B) B B (B) B B
The displayed error B' in the first cycle can of course not be avoided in this example, all following results are correct.
Any other possible received sequence can be followed in a similar manner.
Two of the decisions need some further explanation.
Decision 2 with EP="1" and EB="0", seems to indicate a multiple and, consequently, very rare error. As the information store 25 is initially filled with A's and the probability that an A will be received is high, this "error" will occur very frequently, especially in the first cycle.
Any double error occurring at a later instant will be treated likewise, in that very rare event.
Decision 6 deals with an equally rare event, but with R _G ="1". It shortens the elimination of a multiple error, but will be rarely necessary. However, this decision 6 can be combined cheaply with decision 7.
In the embodiment explained on the basis of Table I the processing of EP in particular is simplified.
The following simple process can now, for example, be applied.
A newly received symbol is applied to the input of the parity circuit 41.
If the newly received symbol (n+1) is a symbol from the A group, then the parity circuit 41 indicates an odd parity that is to say a "1" at the output "odd parity".
This "1" is transferred to the eight bit of the buffer register 23.

By comparing a corresponding symbol (n) from the information store 25 with a modified symbol (n+1), EP can now be found by comparing the two eights bits of the buffer register 23 and the storage register 24. EB can be determined as previously to detect whether there is or there is not a difference between the two (modified) symbols.
In dependence on EP, EB and R, it is decided in a conventional manner whether the modified symbol will be written or not written into the information store 25. Thus the information store 25 comprises modified symbols only, so that in checking with the comparator 43, this check must be made against the also modified, newly received symbol.
During the display of the page, the parity circuit 41 is available for remodification, it only being necessary to invert the eighth bit if the eighth bit of the symbol to be displayed differs from the parity of this symbol, that is to say it is sufficient to replace the eighth bit of the storge register 24 by the parity now found..
A slight improvement can still be obtained by means of the additional decision (see at the bottom of the Table II). However, to enable the use of this additional decision, instead of decision 2 which can then only hold for the first cycle, a cycle counter must now be incorporated which forms with New Request="1" an additional condition for decision 2 and which, in all subsequent cycles with NR="0" results in decision 4 when EP=1, EB=0 and R _G =0.
In view of what was described herefore such an extension can be easily realized by one normally skilled in the art of logic design.
In extremely rare cases this embodiment results in a further small improvement.
A simplified embodiment produces for all normal single errors an equally satisfactory result but it deals with the multiple errors in a less satisfactory way. However, the total result remains very satisfactory for the user.
The entire comparison circuit is omitted from this simplified embodiment. The decision table is now reduced to:

TABLE III

______________________________________

Read Write Written Decision EP R G 23-24 R G

______________________________________

1A 1 0 1 1 2A 1 1 1 1 3A 0 0 1 0 4A 0 1 0 0

______________________________________

Again this embodiment can be easily realized by one normally skilled in the art, using what has been described herein.
The same applies if smll changes are desired in the decisions, and also when, for example, the circuit must be implemented in the form of one or more Large Scale Integrated circuits (LSI), or when it is realized wholly or partly by means of a micro-processor.

You can see the complexity of the tellye even only from the wiring around it.


A flyback transformer (FBT), also called a line output transformer (LOPT), is a special transformer, which is used for conversion of energy (current and voltage) in electronic circuits. It was initially designed to generate high current sawtooth signals at a relatively high frequency. In modern applications is used extensively in switched-mode power supplies for both low (3V) and high voltage (over 10 kV) supplies.
Flyback Transformer

It was invented as a means to control the horizontal movement of the electron beam in a cathode ray tube (CRT). Unlike conventional transformers, a flyback transformer is not fed with a signal of the same waveshape as the intended output current. A convenient side effect of such a transformer is the considerable energy that is available in its magnetic circuit. This can be exploited using extra windings that can be used to provide power to operate other parts of the equipment. In particular, very high voltages are easily obtained using relatively few turns of winding which, once rectified, can provide the very high accelerating voltage for a CRT. Many more recent applications of such a transformer dispense with the need to produce high currents and just use the device as a relatively efficient means of producing a wide range of lower voltages using a transformer much smaller than a conventional mains transformer would be.

Testing Flyback Transformer

Nowadays, more and more monitor comes in with flyback transformers problems.
Testing flyback transformer are not difficult if you carefully follow the
instruction. In many cases, the flyback transformer can become short
circuit after using not more than 2 years. This is partly due to bad design
and low quality materials used during manufactures flyback transformer.
The question is what kind of problems can be found in a flyback transformer
and how to test and when to replace it. Here is an explanation that will help
you to identify many flyback transformer problems.
There are nine common problems can be found in a flyback transformer.
a) A shorted turned in the primary winding.
b) An open or shorted internal capacitor in secondary section.
c) Flyback Transformer becomes bulged or cracked.
d) External arcing to ground.
e) Internal arcing between windings.
f) Shorted internal high voltage diode in secondary winding.
g) Breakdown in focus / screen voltage divider causing blur display.
h) Flyback Transformer breakdown at full operating voltage (breakdown when under load).
i) Short circuit between primary and secondary winding.

Testing flyback transformer will be base on (a) and (b) since problem
(c) is visible while problem (d) and (e) can be detected by hearing the arcing
sound generated by the flyback transformer. Problem (f) can be checked with multimeter
set to the highest range measured from anode to ABL pin while (g) can be solved by
adding a new monitor blur buster (For 14' & 15' monitor only.) Problem (h) can only be
tested by substituting a known good similar Flyback Transformer. Different monitor have
different type of flyback transformer design. Problem (i) can be checked using an
ohm meter measuring between primary and secondary winding. A shorted turned or open
in secondary winding is very uncommon.

What type of symptoms will appear if there is a shorted turned in primary winding?
a) No display (No high voltage).
b) Power blink.
c) B+ voltage drop.
d) Horizontal output transistor will get very hot and later become shorted.
e) Along B+ line components will spoilt. Example:- secondary diode UF5404 and B+ FET IRF630.
f) Sometimes it will cause the power section to blow.

What type of symptoms will appear if a capacitor is open or shorted in a flyback transformer?

Capacitor shorted

a. No display (No high voltage).
b. B+ voltage drop.
c. Secondary diode (UF5404) will burned or shorted.
d. Horizontal output transistor will get shorted.
e. Power blink.
f. Sometimes power section will blow, for example: Raffles 15 inch monitor.
g. Power section shut down for example: Compaq V55, Samtron 4bi monitor.
h. Sometimes the automatic brightness limiter (ABL) circuitry components will get burned.
This circuit is usually located beside the flyback transformer. For example: LG520si

Capacitor open

a. High voltage shut down.
b. Monitor will have ‘tic - tic’ sound. Sometimes the capacitor may measure O.K. but
break down when under full operating voltage.
c. Horizontal output transistor will blow in a few hours or days after you have replaced it.
d. Sometimes it will cause intermittent "no display".
e. Distorted display i.e., the display will go in and out.
f. It will cause horizontal output transistor to become shorted and blow the power section.

How to check if a primary winding is good or bad in a Flyback Transformer?
a) By using a flyback/LOPT tester, this instrument identifies faults in primary winding by
doing a ‘ring’ test.
b) It can test the winding even with only one shorted turned.
c) This meter is handy and easy to use.
d) Just simply connect the probe to primary winding.
e) The readout is a clear ‘bar graph’ display which show you if the flyback transformer
primary winding is good or shorted.
f) The LOPT Tester also can be used to check the CRT YOKE coil, B+ coil and switch mode power transformer winding.

NOTE: Measuring the resistance winding of a flyback transformer, yoke coil, B+ coil and
SMPS winding using a multimeter can MISLEAD a technician into believing that a shorted
winding is good. This can waste his precious time and time is money.

How to diagnose if the internal capacitor is open or shorted?
By using a normal analog multimeter and a digital capacitance meter. A good capacitor have the range from 1.5 nanofarad to 3 nanofarad.*
1) First set your multimeter to X10K range.
2) Place your probe to anode and cold ground.
3) You must remove the anode cap in order to get a precise reading.
4) Cold ground means the monitor chassis ground.
5) If the needle of the multimeter shows a low ohms reading, this mean the internal capacitor
is shorted.
6) If the needle does not move at all, this doesn’t mean that the capacitor is O.K.
7) You have to confirm this by using a digital capacitance meter which you can easily get one
from local distributor.
8) If the reading from the digital capacitance meter shows 2.7nf, this mean the capacitor is
within range (O.K.).
9) And if the reading showed 0.3nf, this mean the capacitor is open.
10) You have three options if the capacitor is open or shorted.
- Install a new flyback transformer or
- Send the flyback transformer for refurbishing or
- Send the monitor back to customers after spending many hours and much effort on it.

* However certain monitors may have the value of 4.5nf, 6nf and 7.2nf.
Note: Sometimes the internal capacitor pin is connected to circuits (feedback) instead of ground.
Tv rca flyback transformer circuits usually do not have a internal capacitor in it.
If you have a flyback diagram and circuits which you can get it from the net, that would be an advantage to easily understand how to check them.

HR DIEMEN TV FLYBACK TRAFO HR6040 FOR MODELS BELOW WITH PHILIPS CHASSIS K40:
Analogue replacement FBT:KN-381804, F3818, 140.10246, 003390003, 031562, 10810246, 13836070, 13836072, 14010246, 14010269, 16CT4218, 17701MH, 20C051, 22C051, 22C052, 22CS3740, 22CS4360, 22CS4363, 22CS4460, 22CS4560, 22CS4850, 22CS4860, 22CS4861, 22CS5240, 22CS5242, 22CS5250, 22CS5350, 22CS5351, 22CS5355, 22CS5445, 22CS5447, 22CS5735, 22CS5739, 22CS5744, 22CS5745, 22CS5748, 22CS5750, 22CS5751, 22CS5755, 22CS5758, 26CD4895, 26CS4376, 26CS4377, 26CS4378, 26CS4379, 26CS4385, 26CS4386, 26CS4387, 26CS4390, 26CS4391, 26CS4392, 26CS4393, 26CS4396, 26CS4490, 26CS4590, 26CS4880, 26CS4895, 26CS5270, 26CS5272, 26CS5275, 26CS5280, 26CS5380, 26CS5382, 26CS5383, 26CS5385, 26CS5387, 26CS5390, 26CS5395, 26CS5475, 26CS5573, 26CS5577, 26CS5578, 26CS5770, 26CS5774, 26CS5775, 26CS5777, 26CS5780, 26CS5781, 26CS5785, 26CS5787, 26CS5790, 26CS5793, 26CS5795, 26CS5799, 26CS6573, 27CS657302, 27CS6590, 27CS6895, 36070, 36071, 36072, 36073, 36074, 36075, 36076, 36077, 36078, 36079, 37CS5600, 40001M, 4398, 4612080, 56KS4508, 56KS4509, 56KS5402, 56KS5418, 56KS5447, 56KS5457, 56KS5487, 66KS4808, 66KS5617, 66KS5702, 66KS5787, 66KS5917, BACH, BEETHOVEN, BELLINI, BREGENZSTEREO, CHASISK40, CHOPIN, DONATELLO, DONIZETTI, EXPERT, F3818, GIOTTO, GOJA, GOYA, GUARDI, INTERFUNK8349, INTERFUNK8399, INTERFUNK8499, INTERFUNK8599, K40, KN35018N, KN3818, KREFELD, LIPPI, LOT111, LT279P, MAGNASCO, MATCHLINEMONIT, MATCHLINERECEI, ME/540300, ME540300, MICHELANGELO, MORANDI, PHILETTAROYAL, PICASSO, PIRANESI, PUCCINI, REMBRANDT, RO146, ROSSINI, RUBENS, STRAUSS, SUPERSCREEN, TIEPOLO, TIZIANO, TR146, TRR246, TTR246, TURNER, V6720, V6721, V6820, V6821, V6830, V6850, V6851, VANGOGH, VERONESE, VIVALDI

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Videoprogrammsystem Der 2. Generation, Von Gunther Stacker, net 40 (1986), Heft 7/8 (“Second-Generation Video Programming Systems,” Von Gunther Stacker, net vol. 7/8 No. 40 (1986), pp. 311-315).
Videotext Programmiert Videoheimgerate (VPV), Gerhard Eitz, Karl-Ulrich Oberlies, Fundfunktechnische Mitteilungen, Jahrg. 30 (1986), H. 5 (“VCR Programming Via Teletext”).
Videotext Programmiert Videorecorder, Von Gunther Hofmann, Andreas Neuman, Karl-Ulrich Oberlies and Eckhard Schadwinkel, Rundfunktech Mitteilunger, Jahrg. 26 (1982) H. 6 (“Videotext Programs Video Recorder”).
Videotext Und Bildschirmtext Mit Den LSI-Schaltungden SAA 5020, SAA 5030, SAA 5041 Und SAA 5051, Valvo, Technische Information fur die Industrie, Apr. 1980 (Videotext and Interactive Videotex With the LSI-Circuits SAA 5020, SAA 5030, SAA 5041 and SAA 5051).
Viewdata: A Public Information Utility, Second Edition, 1980, Dr. Adrian V. Stokes.
Wunschprogramm Aus Der Fernsehzeitschrift, Funkschau Dec. 1981, pp. 6070 (“Recording Programs From the Program Guide,” Funkschau Dec. 1982, pp. 60-70).
“Advanced Minicomputer-based Systems for Banking and Financial Institutions,” Money Management Systems, Incorporated, brochure, 1980, 9 pages.
“Advanced Transmission Techniques,” SMPTE Journal, Report on the 121st Technical Conference, Jan. 1980, vol. 89, pp. 31-32.
“American National Standard” “dimensions of video, audio and tracking control records on 2-in video magnetic tape quadruplex recorded at 15 and 7.5 in/s,” SMPTE Journal, Oct. 1981, pp. 988-989.
“American National Standard” “time and control code for video and audio tape for 525-line/60-field television systems,” SMPTE Journal, Aug. 1981, pp. 716-717.
“Anderson: Progress Committee Report for 1979—Television,” SMPTE Journal, May 1980, vol. 89, pp. 324-328.
“Application of Direct Broadcast Satellite Corporation for a Direct Broadcast Satellite System,” Before the Federal Communications Commission, Washington, D.C., Jul. 16, 1981.
“Cable TV Advertising,” Paul Kogan Associates, Inc., No. 22, Feb. 18, 1981, 6 pages.
“CAMP,” Arbitron Cable, The Arbitron Company, product brochure, May 1980, 8 pages.
“Contraband code,” Closed Circuit, Broadcasting, Sep. 28, 1970, 1 page.
“Did the ad run?”, Media Decisions, Jul. 1969, pp. 44 et seq.
“Digisonics pushes its coding method,” Broadcasting, Dec. 7, 1970, p. 37.
“Digisonics TV Monitor System Finds Defenders,” Advertising Age, Dec. 8, 1969, 1 page.
“Digisonics violated standards, says BAR,” Broadcasting, Oct. 5, 1970, pp. 21-23.
“Digisonics' Aim Is Info Bank, Not Just Proof of Performance,” Advertising Age, Nov. 9, 1970, 4 pages.
“Digisonics' dilemma,” Media Decisions, Jun. 1971, 6 pages.
“Everything you've always wanted to know about TV Ratings,” A.C. Nielsen Company, brochure, 1978.
“How to increase training productivity through Videodisc and Microcomputer systems,” seminar brochure, 1981.
“IDC begins monitoring,” At Deadline, Broadcasting, Sep. 14, 1970, p. 9.
“IDC encoding system still alive at FCC,” Broadcasting, Sep. 27, 1971, p. 31.
“In this corner, Digisonics!”, Media Decisions, Jun. 1968, 5 pages.
“Index to SMPTE-Sponsored American National Standards, Society Recommended Practices, and Engineering Committee Recommendations,” 1980 Index to SMPTE Journal, SMPTE Journal, pp. I-15 to I-20.
“Index to Subjects—Jan.-Dec. 1976 • vol. 85,” 1976 Index to SMPTE Journal, SMPTE Journal, vol. 85, pp. I-5 to I-13, I-15.
“Index to Subjects—Jan.-Dec. 1977 • vol. 86,” 1977 Index to SMPTE Journal, SMPTE Journal, vol. 86, pp. I-5 to I-14.
“Index to Subjects—Jan.-Dec. 1979 • vol. 88,” 1979 Index to SMPTE Journal, SMPTE Journal, vol. 88, pp. I-4 to I-10.
“Index to Subjects—Jan.-Dec. 1980 • vol. 89,” 1980 Index to SMPTE Journal, SMPTE Journal, pp. I-5 to I-11.
“Index to vol. 87 Jan.-Dec. 1978,” SMPTE Journal, Part II to Jan. 1979 SMPTE Journal, pp. I-1, I-4 to I-14.
“Listeners,” Closed Circuit, Broadcasting, 1 p.
“Management With the Nielsen Retail Index System,” A.C. Nielsen Company, 1980.
“Measuring the Cable Audience,” Ogilvy & Mather, Advertising, 1980, pp. H1-H8.
“No Digisonics friends show in comments,” Broadcasting, May 24, 1971, p. 62.
“Preliminary List of Papers,” SMPTE Journal, Sep. 1980, vol. 89, p. 677.
“Proposed SMPTE Recommended Practice” “Vertical Interval Time and Control Code for Video Tape for 525-Line/60-Field Television Systems,” SMPTE Journal, Sep. 1981, pp. 800-801.
“SMPTE Journal Five-Year Index 1971-1975,” SMPTE Journal.
“SMPTE Journal Five-Year Index 1976-1980,” SMPTE Journal.
“Talent pay code put off,” At Deadline, Broadcasting, Nov. 9, 1970, p. 9.
“Television,” SMPTE Journal, May 1981, pp. 375-379.
“The TCR-119 Reader,” Gray Engineering Laboratories, SMPTE Journal, May 1980, vol. 89, p. 438, (advertisement).
“Vidbits,” Advertising Age, Sep. 21, 1981, p. 70.
“Video Tape Recording Glossary,” SMPTE Journal, Oct. 1980, vol. 89, p. 733.
“Window on the World” “The Home Information Revolution,” Business Week, Jun. 29, 1981, pp. 74-83.
A System of Data Transmission in the Field Blanking Period of the Television Signal, Iba Technical Review, Digital Television, pp. 37-44.
Addressable Cable Television Control System with Vertical Interval Data Transmission, Campbell et al. abandoned app. No. 348,937, pp. 1-28, abstract, claims 1-42, Figs. 1-13 (Mar. 1980).
Addressable control—A big first step toward the marriage of computer, cable, & consumer, Larry C. Brown, (Pioneer Communications of America), Cable.
Ancillary Signals for Television, U.S. Dept. Of Commerce, Sep. 1975.
Anderson, The Vertical Interval: A General-Purpose Transmission Path, Sep. 1971.
Appx. B of Petition to FCC, p. 72, filed Jul. 29, 1980.
Barlow, Automatic Switching in the CBC—An Update, Sep. 1, 1976.
Beakhurst, D.J., et al., “Teletext and Viewdata—A Comprehensive Component Solution,” Illustrations, Proceedings, IEE, vol. 126, Dec. 1979, pp. 1382-1385.
BS-14, Broadcast Specification, Television Broadcast Videotext, Telecommunication Regulatory Service, Jun. 19, 1981.
DeGoulet, et al., “Automatic Program Recording System” Radio diff. Et TV Nov. 1975.
Diederich, Electronic Image and Tone Return Equipment With Switching System and Remote Control Receiver for Television Decoder, May 22, 1975.
Enhanced graphics for Teletext, R.H. Vivian, Aug. 1981, IEEE pp. 541-550.
Etkin, Vertical Interval Signal Applications, Broadcast Engineering, pp. 30-35, Apr. 1970.
Federal Register/vol. 64, No. 146/Friday, Jul. 30, 1999.
Ferre, “Goodbye, TV Snow”, Electronic Servicing, May 1977, pp. 14-22.
Gaucher, et al., Automatic Program Recording System, Nov. 1, 1975.
Howell, “A Primer on Digital Television” Journal of the SMPTE, Jul. 1975, 538-541.
Hutt, “A System of Data Transmission in the Field Blanking Period of the Television Signal”, SLICE pp. 37-44, Jun. 1973.
John Hedger, Oracle ((TCA), U.K. (1980).
Kamishima, et al., A Monitor Device of a Switcher System, May 8, 1981.
Money, “CEEFAX/ORACLE: reception techniques (part 1)” Television, Jul. 1975, vol. 25, No. 9, pp. 396-398.
O'Donnell, John et al., “Videodisc Program Production Manual,” SONY, 1981.
O'Connor, Ad Hoc Committee on Television Broadcast Ancillary Signals, Journal of the SMPTE, vol. 82, Dec. 1973.
Petition for Rulemaking filed with the FCC by CBS Inc. on Jul. 29, 1980, p. 72 of Appendix B.
Present Status Of Still.Picture Television, Research & Development, Nhk.
Schubin, The First Nationwide Live Stereo Simulcast Network, SMPTE Journal, vol. 86, Jan. 1977.
SMPTE Journal, May 1980, vol. 89, p. 391, no title.
Stagg, “An integrated Teletext and Viewdata Receiver” The SERT Journal vol. 11, Oct. 1977, pp. 210-213.
Stern, et al., An Automated Programming Control System for Cable TV.
Systems of VSA-Videographic (KC026867).
Taylor, John P., “Comsat bid to FCC for DBS authorization: Is direct broadcasting the wave of the future?”, Television/Radio Age, Mar. 23, 1981, pp. A-22-24 and A-26 and A-28-31.
Taylor, John P., “Comsat bid to FCC for DBS authorization: Questions of finances, ‘localism,’ monopoly,” Television/Radio Age, May 4, 1981, pp. 42-44 and 80-81.
Taylor, John P., “Fourteen DBS authorization applications to FCC differ greatly in both structure and operations,” Television/Radio Age, Oct. 5, 1981, pp. 40-42 and 116-119.
Teletext Receiver LSI Data Acquisition and Copntrol, G.O. Growther, et al., Jan. 1976 pp. 9/1-9/5.
The Specification of the Parent Application of Campbell et al., filed Mar. 1980 (WO 81/02961 PCT).
Viewdata, First World Conference on Viewdata, Videotext and Teletext, Mar. 26, 1980, pp. 431-445.
VSA's Teletext Products, Videographic Systems of America.
Zettl, Television Production Handbook, Jan. 1, 1969.
Hanas et al.,“An Addressable Satellite Encryption System for Preventing Signal Piracy”, Nov. 1981, pp. 631-635.
National Cable Television Association Executive Seminar Series, Videotex Services, Oct. 1980, pp. 1-155.
Kokado et al.,“A Programmable TV Receiver”, Feb. 1976, pp. 69-82.
J. Hedger et al., “Telesoftware-Value Added Teletext”,Aug. 1980, pp. 555-567.
Marti , B.,“The Concept of a Universal Teletext” Jun. 1979, pp. 1-11.
Article re: America's Talk-Back Television Experiment: Qube.
Article re: “Teletext-Applications in Electronic Publishing”.
Article re: A Description of the Broadcast Telidon System.
Article re: EPEOS—Automatic Program Recording System by G. Degoulet.
Article re: Teletext signals transmitted in UK . . . .
Article re: New services offered by a packet data broadcasting system.
Article re: Philips TV set indicates station tunign and color settings on screen.
Vincent,A.et al., “Telidon Teletest System Field Triasl” (Abstract).
Rzeszeewski, T.,“A New Telletex Channel”.
Numaguchi, Y. et al., “Compatibility and Transmision Characteristics of Digital Signals Inserted in the Field-Blanking Interval of the Television Signal” (Abstract).
Zimmerman, R. et al., Bildschirmtextesysteme (Abstract).
Pilz, F., “Digital Codierte Uebertragungen von Text and Graphik in den Vertikal-anstastintervallen des Fernsehsignas” (Abstract).
Pilz, F., “Uebertragung Insaitryliches Informationen, Insbesondere von Texten, in Ungenutryten Zeilen der Vertikal-Anstastlueke des Fernsehsignals” (Abstract).
Numaguchi, Y., Wie man Stillstehende Bilder Uebertraegt. Ueberlick Ueber Teletext-, Fernseheinzelbild-Und Faksimile-Uebertrragunsverfahren (Abstract).
Transcript, Videotex, Viewdata, and Teletext: Viewdata '801 Online Conference on Videotex, Viewdata and Teletext, London. Mar. 26-28, 1980 (Abstract).
Graf, P.H., “Antiope-Uebertragung fuer Breitbandige Videotex-Verteildienste”, 1981.
Poubread, J.J., “Cryptage' du Son Pour la Televiser a Peague” 1981 (Abstract).
Graf, P.H., “Das Videotex-System Antiope” 1980 (Abstract).
Vardo, J.C., “Les Emetteurs de Television et la Diffusion de Donnees” 1980 (Abstract).
Noirel, Y., “Constructin D'un Reseau de Diffusion de Donnees Par Paquets” 1979 (Abstract).
Vardo, J.C., “Effet de Distorsions en Diffusion de Donnes. II. Resultats Theoriques” 1979 (Abstract).
Baerfuss, C., “Experiences de Diffusion de Donnees dans un Canal de Television” 1979 (Abstract).
Blineau, J., “Liasons Telex a Support Video Sur Des Circuits de Television Internationaux” 1979 (Abstract).
Dublet, G., “Methodes Utilisees et Principaux Resultats Obtenus Lors D'Une Campagne de esure ‘Didon’ Dans la Refion Centre-est” 1978 (Abstract).
Guinet, Y., “Etude Comparative des Systems de Teletexte en Radio-Diffusion. Quelques Avantages de la Diffusion des Donnees Par Paques Applique an Teletexte” 1977 (Abstract).
Goff, R., “A Review of Teletext” 1978 (Abstract).
Haplinsky, C.H., “The D**(2)B A One Logical Wire Bus for Consumer Applications” 1981.
Cazals, A., “cts Techniques du Teletexte Diffuse” 1981 (Abstract).
Sechet, C. et al., “Epees et la Viideomessagerie” 1981 (Abstract).
Cayet, A. “La Peritelevison Face a Son Public” 1981 (Abstract).
“La Telematique au Service Des Entreprises et des Particliers: Les Reseaux—Les Produits Noveaux—Les Aplication” 1980 (Abstract).
Sechet, C., “Antiope Teletext Captioning” 1980.
Lambert, O. et al., “Antiope and D.R.C.S.” 1980.
Broggini, P., “Antiope: La Bonne Information Au Bon Moment” 1980 (Abstract).
Strauch, D., “(Texte Sur Ecran An Nivenn International. Viewdata 80. Premeire Confirence Mendiale Sur Viewdata, Video text at Teletext, a Londres)” 1980.
Strauch, D., (Las Media De Telecommunication Devant la Rapture. Les Nonvellas Methodes Presentees a L'Exposition International 1979 de Radio (Et Television)) 1979.
Eymery, G., “Le Teletexte Antiope System D'Information a La Demande” 1979-1980 (Abstract).
Brasq , R., “Micro 8 Bits Dans Linite Gestion da Terminal de Videotex Antiope”.
Hughes, JW,“Videotex and Teletext Systems” 1979.
Marti, B., “Terminolegie Des Services de Communication De Texte” 1979 (Abstract).
Schreber, H., “Antiope et Tietae, La Tele-Informatique Sur L'ecran De Votre Televiscur” 1978 (Abstract).
Kulpok, A., “Videotext, Teletext, Bilschimzeiting” 1979 (Abstract).
Cochard, J.P. et al., “Antiope Prototype da Teletexte De Demain” 1979 (Abstract).
Messerschmid, U., “Videotext: Ein Nueur Informations dienst in Fernschrund funk” 1978 (Abstract).
D'Argoevves, T. et al, “La Chaine Vieo: Magnetoscopes, Videodisqhes, Andiodisques” 1979 (Abstract).
Klingler, R., “Les Systemes de Teletexte Unidirectionals” 1978 (Abstract).
Guillermin, J., “Dix Annees D'Antomatisation Au Service De la Radiodiffusion” 1977 (Abstract).
Brusq, R., “Le Terminal de Teletexte Antiope” 1977 (Abstract).
Guinet, Y., “Les Systemes des Teletextes Antiope” 1977 (Abstract).
Schwartz, C. et al., “Specification Preliminarie du Systeme Teletexte Antope” 1977 (Abstract).
United States International Trade Commission notice of decision not to review Admin. law judges initial dismissal of complaint (case involves certain recombinantly Produced Human Growth Hormones).
U.S. I.T.C.'s order granting Complainants Motion to Desqualify the Law Firm of Finnegan, Henderson et al. (Case involves Certain Cardiac Pacemakers and Components therof).
Decision in Ford Motor Company v. Jerome H. Lemelson.
General Counsel's recommendation to U.S.I.T.C. to refuse a patent-based section 337 investigation based on a complaint filed not by the owner of the patents in issue, but by nonexclusive licensees.
Portion of ITC's Industry and Trade Summary serial publication.
ITC Admin. Judges Order #9: Initial Determination Terminating Investigation (Investigation #337-TA-373).
“LSI Circuits for Teletext and Viewdata—The Lucy Generation” published by Mullard Limited, Mullard House (1981).
2 page article by Nicholas Negroponte in SID 80 Digest titled, “17.4/10:25 a.m.: Soft Fonts”, pp. 184-185.
IEEE Consumer Electronics Jul. 1979 issue from Spring Conference titled, “Consumer Text Display Systems”, pp. 235-429.
Videotext '81 published by Online Conferences Ltd., for the May 20-22, 1981 Confernece, pp. 1-470.
“Teletext and Viewdata Costs as Applied to the U.S. Market” Published by Mullard House (1979), pp. 1-8.
CCETT publication titled, “Didon Diffusion de donnees parpaquets”.
Dalton,C.J., “International Broadcasting Convention” (1968), Sponsors: E.E.A., I.E.E., I.E.E.E., I.E.R.E., etc.
Shorter, D.E.L., “The Distribution of Television Sound by Pulse-Code Modulation Signals Incorporated in the Video Waveform”.
Chorky, J.M., Shorter, D.E.L., “International Broadcasting Convention” (1970), pp. 166-169.
The Implementation of the Sound-in-Sync project for Eurovision (Feb. 1975), pp. 18-22.
Maegele, Manfred, “Digital Transmissions of Two Television Sound Channels in Horizontal Banking”, pp. 68-70.
Weston, J.D., “Digital TV Transmission for the European Communications Satellite” (1974), pp. 318-325.
Golding, L., “A 15 to 25 Mhz Digital Television System for Transmission of Commercial Color Television” (1967), pp. 1-26.
Huth, Gaylord K., Digital Television System Design Study: Final Report (Nov. 28, 1976), prepared for NASA Lyndon B. Johnson Space Center.
Weston, J.D., “Transmission of Television by Pulse Code modulation”, Electrical Communication (1967), pp. 165-172.
Golding, L., “F1-Ditec-A-Digital Television Communications System for Satellite Links,” Telecommunications Numeriques Par Satellite.
Haberle, H. et al.,“Digital TV Transmission via Satellite”, Electrical Communications (1974).
Dirks, H. et al., TV-PCM6 Integrated Sound and Vision Transmission System, Electrical Communication (1977), pp. 61-67.
Talygin, N.V. et al., The “Orbita” Ground Station for Receiving Television Programs Relayed by Satellites, Elecktrovinz, pp. 3-5.
1973 NAB Convention Program, Mar. 25-28, 1973.
Portions of Electonic Engineer's Reference Book (1989)—Multichannel sound systems, Teletext transmission, cable television, ISDN applications, etc.
Yoshido, Junko, teletext back in focus: VBI service revived as alternative delivery system, Electronic Engineering Times (1994) (Abstract).
Blankenhorn, Dana, “Int'l Teletext expands market (International Teletext Communication Inc.),” NewsBytes (1993) (Abstract).
Collin, Simon, PC Text II (Hardware Review (Shortlist), PC User (1990).
Alfonzetti, Salvatore, “Interworking between teletext and OSI systems,” Computer Communications (1989).
Gabriel, Michael R., Videotex and teletex: Waiting for the 21st century?, Education Technology (1988).
Voorman, J.O. et al., A one-chip Automatic Equalizer for Echo Reduction in Teletext , IIEE Transactions on Consumer Electronics, pp. 512-529.
National Online Meeting: Proceedings—1982 sponsored by: Online Review, pp. 547-551.
MacKenzie, G.A., A Model for the UK Teletext Level 2 Specification (Ref: GTV2 242 Annex 6″ based on the ISO Layer model.
Chambers, J.P., A Domestic Television Program Delivery Services, British Broadcasting Corporation, pp. 1-5.
McKenzie, G.A., UK Teletext—The Engineering Choices, Independent Broadcasting Authority, pp. 1-8.
Adding a new dimension to British television, Electronic Engineering (1974).
Jones, Keith, The Development of Teletext, pp. 1-6.
Marti, B. et al., Discrete, service de television cryptee, Revue de radiodiffusion—television (1975), pp. 24-30.
Ando, Heiichero et al., Still-Picture Broadcasting—A new Informational and Instructional Broadcasting System, IEEE Transactions on Broadcasting (1973), pp. 68-76.
Sauter, Dietrich, “Intelligente Komponenten Fur Das Afra-Bus-Fernsteuersystem”, Rundfunk technischen Mittelungen, pp. 54-57.
Hogel, T. et al., “Afra-Bus-ein digitales Fersteuersysten fur Fernsehstudion Komplexe”, Fernseh-Und Kino-Technik (1974), pp. 13-14.
Hogel, G., “Das Afra-Bus System: 2. Technische Struktur des AFRA-Bus-Systems”, Femseh-Und Kino-Technik (1975), pp. 395-400.
Krauss, G., “Das AFRA-Bus-System: 4. Wirtschaftlich Keits-betrachtungen und Rationalisierung seifekte beim Einsatz des AFRA-Bus-Systems”, Fernseh-Und Kino-Technik (1976), pp. 40-49.
Wellhausen, H. “Das AFRA-Bus-System: 1. Grundsatzliche-Betrachtungen und Rationlisierung und Automatisierun in den Fernschbetreben”, Fernseh-Und Kino-Technik (1975), pp. 353-356.
Sauter, D., “Das AFRA-Bus-System: 3. Einsatz-moglich Keiten des Afra-Bus Systems in Fernsehbetrieben”, Fernseh-Und Kino-Technik (1976), pp. 9-13.
B.B.C.I.B.A., Specification of Standards for information transmission by digitally coded signals in the field—blanking interval of 625-line systems (1974), pp. 5-40.
Centre Commun Des De Television et Telecommunications, Specification du Systeme Di Teletext, Antiope.
Heller, Arthur, VPS—Ein Neues System Zuragsgesteurten Programmanfzeichnung, Rundfunk technisde Mitteilungen, pp. 162-169.
Institut fur Rundfunktechnik, ARD/SDF/ZXEI—Richlinie “Video Programm-System”, pp. 1-30.
Buro der Technischen Kommission, “Niederschrift uber die Besprechung zwischen Rundfunkanstalten (Techik, Sendeleiter) und ZVEI zur Einfuhrung des Video-Programm-Systems”, pp. 1-4.
Buro der Technischen Kommission, “Ergebnisse und Festlegungen anda Blich einer Besprechung zwishen Rundfunanstalten.. ”, pp. 1-4.
Koch, H. et al., “Bericht der ad hoc—Arbeitsgruppe ‘Videotext programmiert Videorecorder’ der TEKO”, pp. 1-40.
European Broadcasting Union, “Specification of the Domestic Video Programme Delivery Control System”, pp. 1-72.
ARD/ZDF/ZVEI-Richtlinie “Video Programme System”.
Reports on Developments in USA, Teletext, EIA Meeting.
Videotex '81: A Special Report.
Tarrant, D.R., “Teletext for the World”.
Clifford, Colin et al., “Microprocessor Based, Software Defined Television Controller”, IEEE Transaction on Consumer Electronics (1978), pp. 436-441.
Hughes, William L. et al., “Some Design Considerations for Home Interactive Terminals”, IEEE Transactions on Broadcasting (1971).
Mothersdale, Peter L. , “Teletext and viewdata: new information systems using the domestic television receiver”, Electronics Record (1979), pp. 1349-1354.
Betts, W.R., “Viewdata: the evolution of home and business terminals”, PROC.IEE (1979), pp. 1362-1366.
Hutt, P.R., “Thical and practical ruggedness of UK teletext transmission”, PROC.IEE (1979), pp. 1397-1403.
Rogers, B.J., “Methods of measurement on teletext receivers and decoders”, PROC.IEE (1979), pp. 1404-1407.
Green, N., “Subtitling using teletext service—technical and editorial aspects”, PROC.IEE (1979), pp. 1408-1416.
Chambers, M.A., “Teletext—enhancing the basic system”, PROC.IEE (1979), pp. 1425-1428.
Crowther, G.O., “Adaptation of UK Teletex System for 525/60 Operation”, IEEE Transactions on Consumer Electronics (1980), pp. 587-596.
Marti, B. et al., Discrete, service de television cryptee , Revue de radiodiffusion—television (1975), pp. 24-30.
Lopinto, John, “The Application of DRCS within the North American Broad cast Teletext Specification”, IEEE Transactions on Consumer Electronics (1982), pp. 612-617.
BBC, BBC Microcomputer: BBC Microcomputer with Added Processor and Teletex Adaptor (Manual).
Green, N.W., “Picture Oracle,” On Independent Television Companies Association Limited Letterhead.
National Captioning Institute, Comments on the Matter of Amendment of Part 73, Subpart E. of the Federal Communications Rules Government Television Stations to Authorize Teletext (before F.C.C.).
Balchin, C., “Videotext and the U.S.A.”, I.C. Product Marketing Memo.
Koteen and Burt, “British Teletext/Videotex”.
EIA Teletext SubCommittee Meetings, Report on USA Visit.
Brighton's Experience with Software for Broadcast (Draft).
The institution of Electronic and Radio Engineers, Conference on Electronic Delivery of Data and Software.
AT&T, “Videotex Standard Presentation Level Protocol”.
Various Commissioner statements on Authorization of Teletext Transmissions by TV Stations.
Report and Order of FCC on the Matter of Amendment of Parts 2,73, and 76 of the Commission's Rules to Authorize the Transmission of Teletext by TV Stations, pp. 1-37.
IBA Technical Review of Digital Television, pp. 1-64.
National Cable Television Association report, “Videotex Services” given at Executive Seminar.
LEXIS Research results for Patent No. 4,145,717.
Web page—Company Overview of Norepack Corporation.
Coversheet titled, “Zing”.
Lemelson v. Apple Computer, Inc. patent case in the Bureau of National Affairs, 1996.
A computer printout from Library Search.
Electronic Industries Association—Teletext Subcommittee Rask Group A—Systems Minutes of Meeting Mar. 30, 1981 at Zenith plus attachments.
Electronic Industries Association—Teletext Subcommittee Task Group A Systems Interim Report, Mar. 30, 1981 by Stuart Lipoff, Arthur D. Little Inc.
Minutes of Eletronic Industries Association Teletext Subcommittee Task Force B—Laboratory & Field Tests Mar. 30, 1981.
National Captioning Institute Report, “The 1980 Closed-Captioned Television Audience”.
Electronic Industries Assoc.—Teletext Subcommittee—Steering Committee Minutes of Meeting on Mar. 31, 1981.
Aug. 6, 1990 letter from Herb Zucker to Walter Ciciora with attachment.
Articles, information sheets under cover sheet “QVP—Pay Per View” Nov. 29, 1982.
National Cable Television Association report, “Videotex Services”.
Scala Info Channel Advertisement, “The Art of Conveying a Message”.
Zenith Corporation's Z-Tac Systems information includes Z-tac specifications, access list, etc.
Report by Cablesystems Engineering Ltd. on, “Zenith Addressable System and Operating Procedures” and Advertising documents.
Memo from W. Thomas to G. Kelly on Jan. 21, 1982 Re: Modified ZTAC/Multi Channel.
Notations by Walt Ciciora dated Aug. 19, 1981 referring to Virtext figures.
Stamped Zenith Confidential, “Preliminay Specification for Basic Text”.
Report titled “The Necams Business Plan,” dated Mar. 18, 1994.
The Personalized Mass Media Corp. reported titled, “Portfolio of Programming Examples” by Harvey, Keil, & Parker 1991.
Petition to FCC dated Mar. 26, 1981 titled, “Petition for Rulemaking of Unighted Kingdom Teletext Industry Goup,” also 1 page of handwritten notes from Walter Ciciora.
“Enhanced Computer Controlled Teletext for 525 Line Systems (Usecct) SAA 5245 User Manual” report by J.R. Kinghorn.
“Questions and Answers about Pay TV” by Ira Kamen.
Oak Industries 1981 Annual Report.
Article, “50 Different Uses for At Home 2-Way Cable TV Systems” by Morton Dubin.
Derwent Into Ltd. search. Integrated broadcasting & Computer Processing system. Inventor J. Harvey/J. Cuddihy.
Telefax from Arjen Hooiveld to Jones, Day, Reavis & Pogue Re: European Patent Appl. No. 88908836.5 and abstract plus related correspondence and Derwent search.
Advertisement in royal TV Society Journal (1972) for PYE TVT.
Letter to Dean Russell listing “reference papers”, pp. 1-4.
Letter from George McKenzie to Dean Russell Re: PMM Corp., v. TWC Inc.
Reisebericht (German memo).
Blanpunk (German memo).
“Relevant papers for Weather Channel V PMMC”.
Letter to Peter Hatt Re: BVT: Advisory UK Industry Contact Group.
Incomplete report on Antiope.
Memo FCC: Next Moves.
Memo—Re: British Teletext—ABC.
Memo with FCC Report and Order Authorizing Teletext Transmission.
Manual.
Notes to Section 22.4: Simple Block Encipherment Algorithm.
Memos on Zenith and Teletext.
Memo to Bernie Kotten about National Cable TV Association meeting and efforst to encourage Sony to integrate teletext chip sets into its TV.
Memo's from Koteen & Naftalin.
Description of patents from Official Gazette.
Explanation of Collateral Estoppel.
BNA's Intellectual Property Library on CD's summary of Jamesbury Corporation v. United States.
BNA's Intellectual Property printouts of Lemelson v. Apple Computer, Inc.
ITC Judge Order denying Motion for Summary Judgment in the Matter of Certain Memory Devices with Increased Capacitance and Products Containing Same, Investigation #337-TA-371.
Decision in court case Corbett v. Chisolm and Schrenk invovling patent #3,557,265.
Matthew Beaden Printouts regarding interference practice and the Board Interference.
BNA's Intellectual Property Library on CD printouts about Corbett v. Chisolm.
Numerous Group W business cards including James Cuddihy.
The Broadcast Teloetext Specification, published by the BBC, The IBA and the British Radio Equipment Manufacturers' Association (1976).
Kahn, et al., “Advances in Packet Radio Technology,”. . . Proceedings of the IEEE, vol. 66, No. 11, Nov. 1978 pp. 1468-1495.
Clifford, C., “A Universal Controller for Text Display Systems,” IEEE Transactions on Consumer Electronics, (1979) pp. 424-429.
Harden, B., “Teletext/Viewdata LSI,” IEEE Transactions on Consumer Electronics, (1979), pp. 353-358.
Bown, H. et al., “Comparative Terminal Realizatins with Alpha-Geometric Coding,” IEEE Transaction on Consumer Electronics, (1980), pp. 605-614.
Crowther, “Dynamically Redefinable Character Sets—D.R.C.S.,” IEEE Transaction on Consumer Electronics, (1980), pp. 707-716.
Chambers, John et al., “The Development of a Coding Hierarchy for Enhanced UK Teletext,” IEEE Transaction on Consumer Electronics, (1981), pp. 536-540.
Reexamination of U.S. Patent No. 4,706,121.
U.S. Patent Application by T. Diepholz (Serial. No. 266900).
List of relevant or searched patents.
88908836.5 and Amendments to John C. Harvey,. European Patent Office.
88908836.5 International Application to John C. Harvey.
Kruger, H.E., “Memory Television, the ZPS Digital Identification System,” pp. 1-9.
Baran, Paul (Packetcable Inc.), “Packetcable: A New Interactive Cable System Technology,” CABLE '82—Technical Papers, National Cable Television Association 31st Annual Convention, Las Vegas, NV, May 3-5, 1982 (CABLE '82), pp. 1-6.
Tunmann, Ernest O. (Tele-Engineering Corporation), “Two-Way Cable TV Technologies,” CABLE '82, pp. 7-15.
Dickinson, Robert V.C. (E-COM Corporation), “Carriage of Multiple One-Way and Interactive Service on CATV Networks,” CABLE '82, pp. 16-21.
McNamara, R.P. et al. (Sytek, Incorporated), “MetroNet: An Overview of a CATV Regional Data Network,” CABLE '82, pp. 22-31.
Eissler, Charles (Oak Communications Systems), “Addressable Control for the Small System,” CABLE '82, pp. 32-36.
Mesiya, M.F. et al. (Times Fiber Communications, Inc.), “Mini-Hub Addressable Distribution System for Hi-Rise Application,” CABLE '82, pp. 37-42.
Thomas, William L. (Zenith Radio Corporation), “Full Field Tiered Addressable Teletext,” CABLE '82, pp. 44-46.
Langley, Don et al. (University of Cincinnati and Rice-Richter Associates), “Interactive Split Screen Teleconferencing,” CABLE '82, pp. 47-50.
Klare, Stephen W. (Scientific—Atlanta), “Bandwidth-Efficient, High-Speed Modems for Cable Systems,” CABLE '82, pp. 72-78.
Jubert, Jay (Wang Laboratories, Inc.), “Wangnet, A Cable-Based Localnet,” CABLE '82, pp. 79-81.
Switzer, I. (Cable America, Inc.), “Cable TV Advances and TV Receiver Compatibility Problems,” CABLE '82, pp. 114-118.
Skrobko, John (Scientific-Atlanta Incorporated), “Improving CATV System Reliability with Automatic Status Monitoring and Bridger Switching,” CABLE '82, pp. 133-137.
Dahlquist, John (Jerrold Division, General Instrument Corporation), “Techniques for Improving Continuity of Service in a CATV Distribution System,” ABSTRACT, CABLE '82, p. 138.
Polishuk, Paul Dr. (Information Gatekeepers, Inc.) “Present Status of Fiber Optics Technology and its Impact on the CATV Industry,” CABLE '82, pp. 142-147.
Dufresne, Michel (Videotron Communications LTEE), “New Services: An Integrated Cable Networks's Approach,” CABLE '82, pp. 156-160.
Stanton, Gary W. (Southern Satellite Systems), “Downloading and Addressing via Teletext,” CABLE '82, pp. 161-165.
Goldberg, Efrem I. (GTE Laboratories Incorporated), “Videotex on Two-Way Cable Television Systems—Some Technical Considerations,” CABLE '82, pp. 166-174.
Noirel, Yves (CCETT/Rennes, France), “Abstract of paper entitled Data Broadcasting: “DIDON” and “DIODE” Protocols,” CABLE '82, pp. 175-179.
von Meister, William F. (Digital Music Company), “The Home Music Store,” CABLE '82, pp. 180-182.
Brown, Jr., Robert R. (Cima Telephone and Television), “Inter Bridger Trunking for Information Services,” CABLE '82, pp. 183-189.
Alvord, Charles, Dr. (Communications Technology Management, Inc.), “Creating Standards for Interconnect Systems,” CABLE '82, pp. 190-196.
Schrock, Clifford B. (Cable Bus Systems Corporation), “Can Noise and Ingress Coexist with Two-Way Services?,” CABLE '82, pp. 205-209.
The Weather Channel, “The Weather STAR Satellite Transponder Addressable Receiver,” Operation/Installation Manual, Rev. 01.5/82.
Lafayette, Jon, “TV ad monitor system starts tests here Mon.,” New York Post, Oct. 18, 1985, p. 63.
Jones, Stacy V., “Patents/Monitoring Display of TV Ads,” The New York Times, Oct. 19, 1985, p. 34.
Remley, F.M., “Television Technology,” SMPTE Journal, May 1982, pp. 458-462.
Proposed American National Standard, “Electrical and Mechanical Characteristics for Digital Control Interface,” SMPTE Journal, Sep. 1982, pp. 888-897.
Zaludek, Jerry P., “Videotape—Past, Present, and Future,” SMPTE Journal, Apr. 1982, pp. 356-360.
Kary, Michael Loran, “Video-Assisted Film Editing System,” SMPTE Journal, Jun. 1982, pp. 547-551.
Glover, S. “Automatic Switching at the Edmonton Television Studios,” SMPTE Journal, Nov. 1966, vol. 75, pp. 1089-1092.
Barlow, M.W.S., “The Remote Control of Multiplexed Telecine Chains,” SMPTE Journal, Apr. 1971, vol. 80, pp. 270-275.
Campbell, Keith D., “An Automated Video-Tape Editing System,” Journal of the SMPTE, Mar. 1970, vol. 79, pp. 191-194.
Bonney, R.B. et al., “A Proposed Standard Time and Control Code for Video-Tape Editing,” Journal of the SMPTE, Mar. 1970, vol. 79, pp. 186-190.
Barlow, M., Letter to the Editor, “Re: Coding and Packaging Film for Broadcasting,” Journal of the SMPTE, Oct. 1969, vol. 78, p. 889.
Barlow, M., Letter to the Editor, “Re: Automation of Telecine Equipment,” Journal of the SMPTE, Apr. 1970, vol. 79, pp. 345-346.
Matley, J. Brian, “A Digital Framestore Synchronizer,” SMPTE Journal, Jun. 1976, vol. 85, pp. 385-388.
Connolly, W.G. et al., “The Electronic Still Store: A Digital System for the Storage and Display of Still Pictures,” SMPTE Journal, Aug. 1976, vol. 85, pp. 609-613.
Sadashige, K., “Overview of Time-Base Correction Techniques and Their Applications,” SMPTE Journal, Oct. 1976, vol. 85, pp. 787-791.
Siocos, C.A., “Satellite Technical and Operational Committee—Television (STOC-TV) Guidelines for Waveform Graticules,” SMPTE Journal, Nov. 1976, vol. 85, pp. 878-879.
Rodgers, Richard W., “Design Considerations for a Transmission and Distribution System for SMPTE Time-Code Signals,” SMPTE Journal, Feb. 1977, vol. 86, pp. 69-70.
Allan, J.J., III, et al., “A Computer-Controlled Super-8 Projector,” SMPTE Journal, Jul. 1977, vol. 86, pp. 488-489.
Hamalainen, K.J., “Videotape Editing Systems Using Microprocessors,” SMPTE Journal, Jun. 1978, vol. 87, pp. 379-382.
McCoy, Reginald F.H., “A New Digital Video Special-Effects Equipment,” SMPTE Journal, Jan. 1978, vol. 87, pp. 20-23.
Leonard, Eugene, “Considerations Regarding the Use of Digital Data to Generate Video Backgrounds,” SMPTE Journal, Aug. 1978, vol. 87, pp. 499-504.
Swetland, George R., “Applying the SMPTE Time and Control Code to Television Audio Post Production,” SMPTE Journal, Aug. 1978, vol. 87, pp. 508-512.
Moore, J.K., et al., “A Recent Innovation in Digital Special Effects, The CBS ‘Action Track’ System,” SMPTE Journal, Oct. 1978, vol. 87, pp. 673-676.
Connolly, William G., “Videotape Program Production at CBS Studio Center,” SMPTE Journal, Nov. 1978, vol. 87, pp. 761-763.
Nicholls, William C., “A New Edit Room Using One-Inch Continuous-Field Helical VTRs,” SMPTE Journal, Nov. 1978, vol. 87, pp. 764-766.
“Index to vol. 87 Jan.-Dec. 1978,” SMPTE Journal, Part II to Jan. 1979 SMPTE Journal, pp. I-1, I-4 to I-14.
Wetmore, R. Evans, “System Performance Objectives and Acceptance Testing of the Public Television Satellite Interconnection System,” SMPTE Journal, Feb. 1979, vol. 88, pp. 101-111.
Bates, George W., “Cut/Lap: A New Method for Programmable Fades and Soft Edit Transitions Using a Single Source VTR,” SMPTE Journal, Mar. 1979, vol. 88, pp. 160-161.
Douglas, W. Gordon, “PBS Satellite Interconnection Technical Operations and Maintenance,” SMPTE Journal, Mar. 1979, vol. 88, pp. 162-163.
Oliphant, Andrew et al., “A Digital Telecine Processing Channel,” SMPTE Journal, Jul. 1979, vol. 88, pp. 474-483.
Bates, George W. et al., “Time Code Error Correction Utilizing a Microprocessor,” SMPTE Journal, Oct. 1979, vol. 88, pp. 712-715.
Geise, Heinz-Dieter, “The Use of Microcomputers and Microprocessors in Modern VTR Control,” SMPTE Journal, Dec. 1979, vol. 88, pp. 831-834.
“Advanced Transmission Techniques,” SMPTE Journal, Report on the 121st Technical Conference, Jan. 1980, vol. 89, pp. 31-32.
“Anderson: Progress Committee Report for 1979—Television,” SMPTE Journal, May 1980, vol. 89, pp. 324-328.
SMPTE Journal, May 1980, vol. 89, p. 391, no title.
“The TCR-119 Reader,” Gray Engineering Laboratories, SMPTE Journal, May 1980, vol. 89, p. 438, (advertisement).
Hopkins, Robert S., Jr., “Report of the Committee on New Technology,” SMPTE Journal, Jun. 1980, vol. 89, pp. 449-450.
Limb, J.O. et al., “An Interframe Coding Technique for Broadcast Television,” SMPTE Journal, Jun. 1980, vol. 89, p. 451.
“Preliminary List of Papers,” SMPTE Journal, Sep. 1980, vol. 89, p. 677.
Davis, John T., “Automation of a Production Switching System,” SMPTE Journal, Oct. 1980, vol. 89, pp. 725-727.
“Video Tape Recording Glossary,” SMPTE Journal, Oct. 1980, vol. 89, p. 733.
Advertisement, “CTVM 3 series of Barco master control color monitors”, “Barco TV Modulator, Model VSBM 1/S”, “VICMACS Type 1724 Vertical Interval Machine Control System”, “Videotape Editing Controllers by US JVC Corp., RM-70U, RM-82U, RM-88U”, SMPTE Journal, Oct. 1980, vol. 89, p. 820 et seq.
Ciciora, Walter, “Teletext Systems: Considering the Prospective User,” SMPTE Journal, Nov. 1980, vol. 89, pp. 846-849.
Hathaway, R.A. et al., “Development and Design of the Ampex Auto Scan Tracking (AST) System,” SMPTE Journal, Dec. 1980, vol. 89, p. 931.
Connor, Denis J., “Network Distribution of Digital Television Signals,” SMPTE Journal, Dec. 1980, vol. 89, pp. 935-938.
Table of Contents, SMPTE Journal, Feb. 1981, vol. 90, No. 2, 1 page.
Table of Contents, SMPTE Journal, Mar. 1981, vol. 90, No. 3, 1 page.
Table of Contents, SMPTE Journal, Apr. 1981, vol. 90, No. 4, 1 page.
Table of Contents, SMPTE Journal, May 1981, vol. 90, No. 5, 1 page.
“Television,” SMPTE Journal, May 1981, pp. 375-379.
Table of Contents, SMPTE Journal, Jan. 1981, vol. 90, No. 1, 1 page.
Table of Contents, SMPTE Journal, Jun. 1981, vol. 90, No. 6, 1 page.
Table of Contents, SMPTE Journal, Jul. 1981, vol. 90, No. 7, 1 page.
Table of Contents, SMPTE Journal, Aug. 1981, vol. 90, No. 8, 1 page.
Table of Contents, SMPTE Journal, Sep. 1981, vol. 90, No. 9, 1 page.
Table of Contents, SMPTE Journal, Oct. 1981, vol. 90, No. 10, 1 page.
Kaufman, Paul A. et al., “The Du Art Frame Count Cueing System,” SMPTE Journal, Oct. 1981, pp. 979-981.
Table of Contents, SMPTE Journal, Nov. 1981, vol. 90, No. 11, 1 page.
Table of Contents, SMPTE Journal, Dec. 1981, vol. 90, No. 12, 1 page.
Powers, Kerns H., “A Hierarchy of Digital Standards for Teleproduction in the Year 2001,” SMPTE Journal, Dec. 1981, pp. 1150-1151.
Rice, Michael, “Toward Enhancing the Social Benefits of Electronic Publishing,” Report of an Aspen Institute Planning Meeting, Communications and Society Forum Report, Feb. 25-26, 1987.
Rice, Michael, “Toward Improved Computer Software for Education and Entertainment in the Home,” Report of an Aspen Institute Planning Meeting, Communications and Society Forum Report, Jun. 3-4, 1987.
Gano, Steve, “Teaching ‘real world’ systems,” 1 page, 1987.
Pollack, Andrew, “Putting 25,000 Pages On a CD,” New York Times, 1 page, Mar. 4, 1987.
Gano, Steve, “A Draft of a Request for Proposals Concerning the Adoption of Computer Technology in the Home,” Jan. 1988, DRAFT © 1987 Steve Gano.
COMSAT, “Communications Satellite Corporation Magazine,” No. 7, 1982.
COMSAT, “Satellite to Home Pay Television,” no date.
COMSAT, “Annual Report 1981.”
“Comsat's STC: Poised for blastoff into TV's space frontier,” Broadcasting, Feb. 22, 1982, pp. 38-45.
“At Sequent Computer, One Size Fits All,” Business Week, Sep. 17, 1984, 1 page.
Hayashi, Alden, M., “Can Logic Automation model its way to success?”, Electronic Business, Aug. 1, 1986, 1 page.
“Imager monitors the bloodstream,” High Technology, Mar. 1987, 1 page.
Merritt, Christopher R.B., M.D., “Doppler blood flow imaging: integrating flow with tissue data,” Diagnostic Imaging, Nov. 1986, pp. 146-155.
Eisenhammer, John, “Will Europe's Satellite TV Achieve Lift-Off?”, Business, Aug. 1986, pp. 56-60.
Hayes, Thomas C., “New M.C.C. Chief's Strategy: To Speed Payoff on Research,” The New York Times, Jun. 24, 1987, 2 pages.
Collins, Glenn, “For Many, a Vast Wasteland Has Become a Brave New World,” New York Times, no date, 2 pages.
Gleick, James, “U.S. Is Lagging on Forecasting World Weather,” The New York Times, Feb. 15, 1987, 2 pages.
Browning, E.S., “Sony's Perseverance Helped It Win Market for Mini-CD Players,” Wall Street Journal, Feb. 27, 1986, 2 pages.
Dragutsky, Paula, “Data in the bank is booming biz,” New York Post, Apr. 29, 1985, 1 page.
Wayne, Leslie, “Dismantling the Innovative D.R.I.,” The New York Times, Dec. 16, 1984, 2 pages.
Sanger, David E., “A Computer Full of Surprises,” The New York Times, May 8, 1987, 2 pages.
Hoffman, Paul, “The Next Leap in Computers,” The New York Times Magazine, Dec. 7, 1986, 6 pages.
Taylor, Thayer C., “Laptops and the Sales Force: New Stars in the Sky,” pp. 81-84.
Parker, Edwin B., “Satellite micro earth stations—a small investment with big returns,” Data Communications, Jan. 1983, 5 pages.
“Micro Key System,” Video Associates Labs, product description.
“SMPTE Journal Five-Year Index 1971-1975,” SMPTE Journal.
“SMPTE Journal Five-Year Index 1976-1980,” SMPTE Journal.
“SMPTE Journal Five-Year Index 1981-1985,” SMPTE Journal, vol. 95, No. 1, Jan. 1986.
“SMPTE Journal Five-Year Index 1986-1990,” SMPTE Journal, vol. 100, No. 1, Jan. 1991.
“Annual Index 1982,” SMPTE Journal, vol. 91, Jan.-Dec. 1982, pp. 1253-1263.
“Highlights, SMPTE, The 124th SMPTE Conference,” SMPTE Journal, Jan. 1983, p. 3.
SMPTE Journal, Jan. 1983, pp. 64, 69-70, 87-90, 92-98.
“Highlights, SMPTE,” SMPTE Journal, Feb. 1983, p. 163.
“Highlights, SMPTE,” SMPTE Journal, Mar. 1983, p. 267.
“Highlights, SMPTE,” SMPTE Journal, Apr. 1983, p. 355.
Thomas, L. Merle, “Television,” SMPTE Journal, Apr. 1983, pp. 407-410.
“Highlights, SMPTE,” SMPTE Journal, May 1983, p. 547.
“Highlights, SMPTE,” SMPTE Journal, Jun. 1983, p. 627.
“Highlights, SMPTE,” SMPTE Journal, Jul. 1983, p. 715.
“Highlights, SMPTE,” SMPTE Journal, Aug. 1983, p. 803.
Tooms, Michael S. et al., “The Evolution of a Comprehensive Computer Support System for the Television Operation,” SMPTE Journal, Aug. 1983, pp. 824-833.
“Highlights, SMPTE,” SMPTE Journal, Sep. 1983, p. 907.
“Highlights, SMPTE,” SMPTE Journal, Oct. 1983, p. 1027.
“Highlights, SMPTE,” SMPTE Journal, Nov. 1983, p. 1173.
“Highlights, SMPTE,” SMPTE Journal, Dec. 1983, p. 1269.
“Index to Subjects—Jan.-Dec. 1983 • vol. 92,” Annual Index 1983, SMPTE Journal, pp. 1385-1391.
“Highlights, SMPTE,” SMPTE Journal, Jan. 1984, p. 3.
“Index to Subjects—Jan.-Dec. 1984 • vol. 93,” Annual Index 1984, SMPTE Journal, pp. 1211-1217.
“Highlights, SMPTE,” SMPTE Journal, Jan. 1985, p. 3.
Barlow, Michael W.S., “Application of Personal Computers in Engineering,” SMPTE Journal, Jan. 1985, pp. 27-30.
“Television Systems and Broadcast Technology,” SMPTE Journal, Jan. 1985, pp. 172-175.
“Highlights, SMPTE,” SMPTE Journal, Feb. 1985, p. 181.
Day, Alexander G., “From Studio to Home—How Good is the Electronic Highway?”, SMPTE Journal, Feb. 1985, pp. 216-217.
“Highlights, SMPTE,” SMPTE Journal, Mar. 1985, p. 265.
“Proposed SMPTE Recommended Practice, Storage of Edit Decision Lists on 8-in. Flexible Diskette Media,” SMPTE Journal, Mar. 1985, pp. 353-354.
McCroskey, Donald C., “Television,” SMPTE Journal, Apr. 1985, pp. 382-395.
“Highlights, SMPTE,” SMPTE Journal, Apr. 1985, p. 361.
SMPTE Journal, Apr. 1985, pp. 366-368, 473-478.
“Highlights, SMPTE,” SMPTE Journal, May 1985, p. 545.
Morii, Yutaka, et al., “A New Master Control System for NHK's Local Stations,” SMPTE Journal, May 1985, pp. 559-564.
Kuca, Jay, et al., “A Fifth-Generation Routing Switcher Control System,” SMPTE Journal, May 1985, pp. 566-571.
“Highlights, SMPTE,” SMPTE Journal, Jun. 1985, p. 641.
“Highlights, SMPTE,” SMPTE Journal, Jul. 1985, p. 721.
Busby, E.S., “Digital Component Television Made Simple,” SMPTE Journal, Jul. 1985, pp. 759-762.
“Highlights, SMPTE,” SMPTE Journal, Aug. 1985, p. 801.
Rayner, Bruce, “High-Level Switcher Interface Improves Editing Techniques,” SMPTE Journal, Aug. 1985, pp. 810-813.
Hayes, Donald R., “Vertical-Interval Encoding for the Recordable Laser Videodisc,” SMPTE Journal, Aug. 1985, pp. 814-820.
“SMPTE Recommended Practice, Video Record Parameters for 1-in Type C Helical-Scan Video Tape Recording,” SMPTE Journal, Aug. 1985, pp. 872-873.
“Proposed SMPTE Recommended Practice, Time and Control Codes for 24, 25, or 30 Frame-Per-Second Motion-Picture Systems,” SMPTE Journal, Aug. 1985, pp. 874-876.
“Proposed SMPTE Recommended Practice, Data Tracks on Low-Dispersion Magnetic Coatings on 35-mm Motion-Picture Film,” SMPTE Journal, Aug. 1985, pp. 877-878.
“Highlights,” SMPTE Journal, Sep. 1985, p. 881.
“Proposed SMPTE Recommended Practice, Control Message Architecture,” SMPTE Journal, Sep. 1985, pp. 990-991.
“Proposed SMPTE Recommended Practice, Tributary Interconnection,” SMPTE Journal, Sep. 1985, pp. 992-995.
“Highlights,” SMPTE Journal, Oct. 1985, p. 1001.
Zimmerman, Frank, “Hybrid Circuit Construction for Routing Switchers,” SMPTE Journal, Oct. 1985, pp. 1015-1019.
“Highlights,” SMPTE Journal, Nov. 1985, p. 1155.
Sabatier, J., et al., “The D2-MAC-Packet System for All Transmission Channels,” SMPTE Journal, Nov. 1985, pp. 1173-1179.
“Highlights,” SMPTE Journal, Dec. 1985, p. 1243.
Shiraishi, Yuma, “History of Home Videotape Recorder Development,” SMPTE Journal, Dec. 1985, pp. 1257-1263.
“Index to Subjects—Jan.-Dec. 1985 • vol. 94,” Annual Index 1985, SMPTE Journal, pp. 1351-1357.
“Highlights,” SMPTE Journal, Jan. 1986, p. 3.
“Proposed American National Standard for component digital video recording—19-mm type D-1 cassette—tape cassette,” SMPTE Journal, Mar. 1986, pp. 362-363.
“Index to SMPTE-Sponsored American National Standards and Society Recommended Practices and Engineering Guidelines,” SMPTE Journal, Annual Index 1987, pp. 1258, 1260-1262.
Rice, Philip, et al., “Development of the First Optical Videodisc,” SMPTE Journal, Mar. 1982, pp. 277-284.
Kubota, Yasuo, “The Videomelter,” SMPTE Journal, vol. 87, Nov. 1978, pp. 753-754.
“USTV Direct Satellite to Home Television Service,” General Instrument News Release, Aug. 1982.
“Second Senior Executive Conference on Productivity Improvement,” SALT, Society for Applied Learning Technology, Dec. 4-6, 1986.
“New Publications for 1987 from The Videodisc Monitor,” advertisement, 2 pages.
“The Videodisc Monitor,” vol. IV: No. 10, Oct. 1986.
“The Videodisc Monitor,” vol. IV: No. 12, Dec. 1986.
Smith, Charles C., “Computer Update” “Program Notes,” TWA Ambassador, Sep. 1982, pp. 74-90.
Harrar, George, “Opening Information Floodgates,” American Way, Oct. 1982, pp. 53-56.
“Publishers Go Electronic,” Business Week, Jun. 11, 1984, pp. 84-97.
“Serious Software Helps the Home Computer Grow Up,” Business Week, Jun. 11, 1984, pp. 114-118.
“Videoconferencing: No Longer Just a Sideshow,” Business Week, Nov. 12, 1984, pp. 116-120.
“Ratings War,” Forbes, Aug. 1, 1983, 1 page.
Kindel, Stephen, “Pictures at an exhibition,” Forbes, Aug. 1, 1983, pp. 137-139.
“Merrill Lynch and IBM Form Joint Venture to Market Financial Data Systems and Services,” News Release, Mar. 1984, 2 pages.
Branch, Charles, “Text Over Video,” PC World, Dec. 1983, pp. 202-210.
“Window on the World” “The Home Information Revolution,” Business Week, Jun. 29, 1981, pp. 74-83.
“Correspondence School Via Computer Is Planned,” The New York Times, Sep. 13, 1983, 1 page.
“‘SMART’ Digital TV Sets May Replace the Boob Tube,” Business Week, Sep. 26, 1983, p. 160, 2 pages.
“Round Two for Home Computer Makers,” Business Week, Sep. 19, 1983, pp. 93-95.
“High Technology,” Business Week, Jan. 11, 1982, pp. 74-79.
Kneale, Dennis, “Stations That Show Only Ads Attract a Lot of TV Watchers,” The Wall Street Journal, Sep. 23, 1982, 1 page.
“Video Kitchen” “Commercial Prospects for Food Data-Base Management,” Prospectus for a Multiclient Study from American Information Exchange, 1982.
I/NET Corporation, Company Brochure.
Diamond, David, “Why Television's Business Programs Haven't Turned a Profit,” The New York Times, Jun. 16, 1985, pp. F10-F11.
Tagliabue, John, “ITT's Key West German Unit,” The New York Times, Apr. 29, 1985, p. D8.
Tagliaferro, John, “Tag Lines,” 1982, 1 page.
“PBS Project With Merrill,” newsarticle, Apr. 4, 1983.
“Merrill Lynch sinks $4M into FNN's Data Cast service,” Cable Vision, Mar. 11, 1985, p. 23.
“Merrill Lynch bullish on new data service,” Electronic Media, Feb. 28, 1985, p. 4.
“Merrill Lynch Plans Stock-Quote Service Linked to IBM's PC,” The Wall Street Journal, Mar. 21, 1984, p. 60.
Sanger, David E., “Public TV Joins Venture to Send Financé Data to Computer Users,” The New York Times, Feb. 21, 1985, pp. 1 and D8.
Dolnick, Edward, “Inventing the Future,” The New York Times Magazine, Aug. 23, 1987.
Pollack, Andrew, “Computer Programs as University Teachers,” The New York Times, 4 pages.
“Business Television” “Changing the Way America Does Business,” PSN, 1986.
Merrell, Richard G., “TAC-TIMER,” 1986 NCTA Technical Papers, 1986, pp. 203-206.
“Universal Remote Control,” Radio Shack, Owner's Manual, 4 pages.
Long, Michael, E., “The VCR Interface,” 1986 NCTA Technical Papers, 1986, pp. 197-202.
“Flexible programmieren mit VPS,” Funkschau, (German publication), 1985. (translation provided).
Chase, Scott, “Corporate Satellite Networks No Longer a Luxury But Rather a Necessity,” Via Satellite, Jul. 1987, pp. 18-21.
Diamond, Sam, “Turning Television Into a Business Tool,” High Technology, Apr. 1987, 2 pages.
“The Portable PLUS Personal Computer,” Hewlett-Packard, advertisement, Mar. 1986.
“The Portable PLUS for Professionals in Motion,” Hewlett-Packard, advertisement, Jul. 1985.
“KBTV Kodak Business TeleVision,” Kodak, brochure, Sep. 1987.
“Broadway Video,” Brochure, Feb. 1987.
“Digital TV set to burst on U.S. mart,” New York Post, 2 pages.
Prospectus, VIKONICS, Inc., Jul. 14, 1987.
Prospectus, DIGITEXT, Inc., Feb. 27, 1986.
Prospectus, Color Systems Technology, Inc., Aug. 13, 1986.
Prospectus, Cheyenne Software, Inc., Oct. 3, 1985.
1986 Annual Report, The Allen Group Inc.
Wilson, Donald H., “A Process for Creating a National Legal Computer Research Service in the United States,” remarks at the conference on World Peace Through World Law and World Assembly of Judges, Belgrade, Yugoslavia, Jul. 23, 1971.
Pollack, Andrew, “Teletext is Ready for Debut,” The New York Times, Feb. 18, 1983, 2 pages.
“Sunny Outlook for Landmark's John Wynne; Landmark Communications Inc.,” Broadcasting, Lexis-Nexis, Jul. 27, 1987.
“Applications Information VCR-3001A Universal Videocassette Control Module,” Channelmatic, Inc., product description, 5 pages, Mar. 1984.
Killion, Bill, “Advertising,” SAT Guide, Jul. 1982.
“PL-5A Price List Typical Systems,” Channelmatic, Inc., Nov. 1984.
“Channelmatic SPOTMATIC Random Access Commercial Insert System,” Channelmatic, Inc., product description, Jul. 1983.
Killion, Bill, “Automatic Commercial Insertion Equipment for the Unattended Insertion of Local Advertising,” paper presented at 33rd Annual National Cable Television Association Convention, Jun. 1984.
“Channelmatic SDA-1A Sync Stripping Pulse Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Broadcast Quality Random Access Commercial Insert System Featuring the Channelmatic SPOTMATIC Z,” Channelmatic, Inc., product description, 1 page.
“Audio Level Detector ALD-3000A,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“CVS-3000A Commercial Verification System,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Four-Channel Commercial Insert System Featuring the Channelmatic CIS-1A SPOTMATIC JR,” Channelmatic, Inc., product description, 1 page.
“Local Program Playback System Featuring the Channelmatic VCR-3005A-5 Videocassette Sequencer,” Channelmatic, Inc., product description, 1 page.
“Channelmatic BBX-1A Billibox Bypass and Test Switcher,” Channelmatic, Inc., product description, 2 pages.
“Channelmatic's Handimod I,” Channelmatic, Inc., product description, 2 pages.
“Spotmatic Jr. Single VCR Commercial Insert System,” Channelmatic, Inc., product description, 4 pages.
“PL-1A Price List, 3000 Series Equipment,” Channelmatic, Inc., Feb. 1985, 2 pages.
“PL-2B 1000 Series Price List, 1.75 x 19 Inch Rack Mounting,” Channelmatic, Inc., Jul. 1985.
“VPD-3001A Signal Presence Detector,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Channelmatic CMG-3008A 8-Page Color Message Generator Module,” Channelmatic, Inc., product description, 1 page.
“Tone Switching System Model TSS-3000A-1,” Channelmatic, Inc., product description, 1 page.
“Series 3000 Satellite Receiver Controllers,” Channelmatic, Inc., product description, 2 pages.
“Channelmatic UAA-6A Universal Audio Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic ADA-3006A Audio Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic ADA-1A, ADA-2A, ADA-3A Audio Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic VDA-3006A Video Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic VDA-1A, VDA-2A, VDA-3A Video Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic AVS-10A Patchmaster,” Channelmatic, Inc., product description, 2 pages.
“Broadcast Break Sequencer Model BBS-3006A,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Audio-Video Emergency Alert System,” Channelmatic, Inc., product description, Mar. 1984, 2 pages.
“VCR Automation System LPS-3000A,” Channelmatic, Inc., product description, Mar. 1984, 2 pages.
“Clock Switching System Model CCS-3000A-1,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Channelmatic PCM-3000A Superclock Programmable Controller Module,” Channelmatic, Inc., product description, 2 pages.
“PL-3A Price List Videocassette Changers,” Channelmatic, Inc., Nov. 1984, 1 page.
Channelmatic, Inc., advertisement, “Looking at Local Ad Sales?”, 1 page.
“Channelmatic Television Switching and Control Equipment 3000 Series,” Channelmatic, Inc., product descriptions, 1984.
“CIS-1A Spotmatic Jr. & CIS-2A Li'l Moneymaker,” Channelmatic, Inc., Installation and Operations Guide, 950-0066-00, V1.0.
“1986 Annual Report to Shareowners, Customers and Employees,” The Dun & Bradstreet Corporation.
Landro, Laura, “CBS, AT&T May Start Videotex Business in '83 if 7-Month Home Test Is Successful,” The Wall Street Journal, Sep. 28, 1982, p. 8.
“Video Visionaries,” Review, Sep. 1982, pp. 95-103.
“Video-Game Boom Continues Despite Computer Price War,” Technology, The Wall Street Journal, Oct. 1, 1982, p. 33.
Dunn, Donald H., editor, “How to Pick Your Stocks by Computer,” Personal Business, Business Week, Sep. 12, 1983, pp. 121-122.
Sandberg-Diment, Erik, “Instruction Without Inspiration,” Personal Computers, The New York Times, Sep. 6, 1983, p. C4.
Pace, Eric, “Videotex: Luring Advertisers,” The New York Times, Oct. 14, 1982.
“Will Knight-Ridder Make News With Videotex?”, Media, Business Week, Aug. 8, 1983, pp. 59-60.
Kneale, Dennis, et al., “Merrill Lynch and IBM Unveil Venture to Deliver Stock-Quote Data to IBM PCs,” The Wall Street Journal, Mar. 22, 1984, p. 8.
“Merrill Lynch Joins I.B.M. in Venture, ” The New York Times, Mar. 22, 1984, 1 page.
Kneale, Dennis, “Merrill Lynch Plans Stock-Quote Service Linked to I.B.M.'s PC,” The Wall Street Journal, Mar. 21, 1984, 1 page.
“A Videotex Pioneer Pushes Into the U.S. Market,” Business Week, Apr. 16, 1984, p. 63.
Gregg, Gail, “The Boom in On-Line Information,” New Businesses, Venture, Mar. 1984, pp. 98-102.
Sanger, David E., “Trading Stock by Computer,” Technology, The New York Times, Mar. 29, 1984, 1 page.
Saddler, Jeanne et al., “COMSAT, Citing Risks, Ends Negotiations With Prudential on Satellite—TV Venture,” The Wall Street Journal, Dec. 3, 1984, p. 51.
Pollack, Andrew, “Electronic Almanacs Are There for the Asking,” The New York Times, Mar. 18, 1984, 1 page.
Connelly, Mike, “Knight-Ridder's Cutbacks at Viewtron Show Videotex Revolution Is Faltering,” The Wall Street Journal, Nov. 2, 1984, p. 42.
“Time Inc. May Drop Teletext,” newspaper article, 1 page.
Pollack, Andrew, “Time Inc. Drops Teletext Experiment,” newspaper article, 1 page.
Arenson, Karen W., “CBS, I.B.M., Sears Join in Videotex Venture,” newspaper article, 1 page.
“E.F. Hutton to Start a Videotex Service,” newspaper article, 1 page.
Dunn, Donald H., editor, “Devices That Let You Track Stocks Like a Floor Trader,” Personal Business, Business Week, Jul. 25, 1983, pp. 83-84.
“United Satellite Racing Competitors,” newspaper article, 1 page.
Fantel, Hans, “Videotex to Expand What a TV Can Do,” article, 1 page.
“Zenith and Taft Co. In Teletext Venture,” The New York Times, p. D3.
Pollack, Andrew, “Videodisk's Data Future,” The New York Times, Oct. 7, 1982, p. D2.
Pace, Eric, “Videotex in Years to Come,” Advertising, The New York Times, Sep. 1, 1982, p. D15.
Middleton, Teresa, “The Education Utility,” American Educator, Winter 1986, pp. 18-25.
Perlez, Jane, “Teachers Act to Increase Decision-Making Power,” The New York Times, Jul. 8, 1986, 1 page.
Couzens, Michael, “Invasion of the People Meters,” CHANNELS, Jun. 1986, pp. 40-45.
Behrens, Steve, “People Meters vs. The Gold Standard,” CHANNELS, p. 72, Sep. 1987.
Diamond, Edwin, “Attack of the People Meters,” New York, pp. 38-41, Aug. 24, 1987.
“Ratings Brawl (Is Nielsen losing its grip?)” Time, p. 57, Jul. 20, 1987.
Sheets, Kenneth R., “No go. TV networks nix new high-tech rating system,” U.S. News & World Report, p. 39, Jul. 20, 1987.
Lieberman, David, “The Networks' Big Headache,” Business Week, pp. 26-28, Jul. 6, 1987.
Barbieri, Rich, “Perfecting the Body Count,” Channels, p. 15, Jun. 1987.
Dumaine, Brian, “Who's Gypping Whom in TV Ads?”, Fortune, pp. 78-79, Jul. 6, 1987.
Behrens, Steve, “People Meters' Upside,” Channels, p. 19, May 1987.
“People Meters,” The New Yorker, pp. 24-25, Mar. 2, 1987.
Zoglin, Richard, “Peering Back at the Viewer,” Time, p. 84, Jun. 30, 1986.
Kanner, Bernice, “Now, People Meters,” New York, 3 pages, May 19, 1986.
Trachtenberg, Jeffrey A., “Anybody home out there?”, Forbes, pp. 169-170, May 19, 1986.
Waters, Harry F. et al., “Tuning in on the Viewer,” Newsweek, p. 68, Mar. 4, 1985.
Berss, Marcia, “Tune in,” Forbes, p. 227, Sep. 24, 1984.
“Financial News Network Eyeing Teletext Service Tied to Home Computers,” International Videotex Teletext News, Dec. 1983, 1 page.
Prospectus, Financial News Network, Inc., Jul. 13, 1982.
“ELRA Group Cablemark Reports vol. I,” SAT Guide, Feb. 1982, 1 page.
“DOWALERT,” Brochure, 1983, 6 pages.
New York Stock Exchange, Inc., Computer Input Services, Schedule of Monthly Charges, Aug. 1, 1981, 1 page.
New York Stock Exchange, Inc., Market Data Services, Schedule of Monthly Charges, Jan. 1, 1982, 1 page.
“Introducing DowAlert,” brochure, 1982, 8 pages.
“Dow Jones Cable Information Services,” Company Brochure, 1982.
“Personal Portfolio Button,” brochure, JS&A, 1982.
“Business news breakthrough from Dow Jones,” advertisement, The Wall Street Journal, Jun. 10, 1982, p. 47.
“Charting a More Profitable Course for Your Portfolio?”, advertisement, Dow Jones News/Retrieval, The Wall Street Journal, Jun. 24, 1982, p. 40.
“Now you can get the precise business and financial news you want . . . throughout the business day.” “Dow Alert,” brochure, 1982.
Promotional letter, “Dow Jones Cable News,” Dow Jones & Company, Inc., Jan. 1, 1982, 2 pages.
“1981 Annual Report,” Quotron Systems, Inc.
Prospectus, Quotron Systems, Inc., Nov. 1982.
“Threat to Quotron Discounted,” The New York Times, 1984, 2 pages.
“Quotron's Central Position in Statistics Service Is Facing Competition From Several Challengers,” The Wall Street Journal, Feb. 2, 1984, p. 59.
“European Security Prices Are Now Available As New Service From Quotron Systems,” News Release, Sep. 21, 1984, 1 page.
“1983 Annual Report,” Quotron Systems, Inc.
“The Revolution Continues . . . ”, Regency Systems, Inc., company brochure, 1984, 6 pages.
“How personal computers can backfire,” Business Week, Jul. 12, 1982, pp. 56-59.
“Taking control of computer spending,” Business Week, Jul. 12, 1982, pp. 59-60.
Meserve, Everett T., “A History of Rabbits,” DATAMATION, pp. 188-192.
Meserve, Everett T. (BILL), “The Future of Rabbits,” DATAMATION, Jan. 1982, pp. 130-136.
PC Ideas International Corp., product catalog, 7 pages, 1985.
UltiTech, Inc., “The Portable Interactive Videodisc System 3,” brochure, 1985.
Sony Video Communications, “LDP-1000A Laser Videodisc Player,” product description, 1983, 2 pages.
TMS Inc., Digital Laser Technology, product information, 1984, 16 pages.
Sony Video Communications, “Videodisc, Premastering and Formatting,” brochure, 1982.
Pioneer Video, Inc., “LD-V4000 Industrial Laserdisc Player,” product description, Feb. 1984, 2 pages.
Pioneer Video, Inc., “LD-V6000 Industrial Laserdisc Player,” product description, May 1985, 2 pages.
Pioneer Video, Inc., “LD-V6000 Industrial Laserdisc Player,” products price list, Apr. 1984, 1 page.
Pioneer Video, Inc., “Customer Support Publications,” 2 pages.
Pioneer Video, Inc., “Pioneer LD-V1000 Laserdisc Player,” price list, Feb. 1984, 1 page.
Pioneer Video, Inc., “LD-V1000 Laserdisc Player,” product description, Feb. 1985, 2 pages.
Pioneer Video, Inc., “LD-V4000 Laserdisc Player,” products price list, Dec. 1983, 1 page.
“Space-Age Navigation for the Family Car,” reprinted from Business Week, Jun. 18, 1984, 2 pages.
Held, Thomas et al., “Videodisc to Lure and to Learn,” reprinted from The Journal of the International Television Association, International Television, May 1984, 4 pages.
Sony, “Sony View System, The Intelligent Video System,” product description, 1985, 2 pages.
Sony, “LDP-2000 Series, VideoDisc Players,” brochure, 1985, 12 pages.
DIGITAL, “Vax Producer, A System for Creating Interactive Applications,” product bulletin, May 1984, 8 pages.
“Laserdata Announces Trio Encoder at the SALT Show,” News release, Aug. 21, 1985, 3 pages.
“Laserdata Still Frame Audio Premastering Guide,” advertisement, 3 pages.
“Laserdata Trio Encoder Product Description,” product description, 4 pages.
“PC TRIO,” Laserdata, product description, 2 pages.
Laserdata, price list, Aug. 1, 1985, 4 pages.
News Release, Industrial Training Corporation, Merger of IIAT with and into ITC, Jun. 11, 1985, 1 page.
“A Touch-Screen Disc (Devlin Interviews the Producer),” reprinted from E&ITV magazine, vol. 16, No. 5, May 1984, 4 pages.
“Interactive Videodisc in Education and Training,” Seventh Annual Conference, Society for Applied Learning Technology, conference agenda, Aug. 1985.
“Inter Active Video from . . . ,” BCD Associates, brochure, 1985.
The Videodisc Monitor, vol. II: No. 8, Aug. 1984, 16 pages.
“Products From the VideoDisc Monitor,” order form, 2 pages.
“Interactive Video Served on a disc,” Scotch Laser Videodisc, 3M, brochure, 8 pages.
Scotch Laser Videodisc, Price List, May 1, 1984, 2 pages.
“How to find the pot of gold at the end of this rainbow,” Scotch Videodisc, 3M, brochure.
Scotch Laser Videodisc, Prices for Special Services, Feb. 15, 1984, 2 pages.
Scotch Laser Videodisc, Master Tape Specifications, May 1984, 2 pages.
“IEV Graphics and Interactive Video Products,” IEV Corporation, product information, 1 page.
“IEV-20 High-Resolution Color Graphics for the IBM-PC,” IEV Corporation, product description, 1 page.
“IEV-40 Graphics Overlay and Video Disc and Tape Control for the IBM-PC,” IEV Corporation, product description, 1 page.
“IEV-10 A Direct Replacement for the IBM Color/Graphics Adapter Card with Video Overlay Capability,” IEV Corporation, product description, 1 page.
“Model 60 Graphics Overlay and Disc or Tape Controller,” IEV Corporation, product description, 1 page.
“The IRIS System,” Silicon Graphics, Inc., product brochure, 1983.
“IRIS 1400, High Performance Geometry Computer,” Silicon Graphics, Inc., product specification, 2 pages.
“IRIS 1000/1200, High Performance Geometry Terminals,” Silicon Graphics, Inc., product specification, 2 pages.
“IRIS 1500, High Performance Geometry Computer,” Silicon Graphics, Inc., product specification, 2 pages.
“The IRIS Graphics System,” Silicon Graphics, Inc., system description, 1983, 6 pages.
“UNIX, Operating System for the IRIS Geometry Computer,” Silicon Graphics, Inc., product specification, 1 page.
“IRIS Graphics Library, Programming Support for IRIS Systems,” Silicon Graphics, Inc., product specification, 1 page.
“Ethernet, 10mbit per second Local Area Network,” Silicon Graphics, Inc., product specification, 2 pages.
Sony, Sony Video Communications, “PVM-1910/PVM-1911 19” Trinitron Color Video Monitors, product brochure, 1984, 8 pages.
“Computer Controls for Video Production,” EECO EECODER Still-Frame Decoder VAC-300, product brochure, 1984, 4 pages.
“Still Frame Audio Encoder,” Laserdata, product description, 2 pages.
“TRIO 110,” Laserdata, product description, 2 pages.
“LD-V6000, Industrial Laserdisc Player,” A Technical Perspective, Pioneer Video, Inc., May 1984.
“SWSD System,” Stills With Sound and Data, Pioneer Video, Inc., product description, Aug. 1984, 2 pages.
Pioneer Video, Inc., Price List, Industrial Disc Replication and Program Development Services, May 1984, 4 pages.
“V: Link 1000,” Visage, Inc., product description, 1984, 2 pages.
“The University of Delaware Videodisc Music Series presents Interactive Videodisc Instruction in Music,” advertisement, 8 pages.
“Interactive Videodisc in Education and Training,” Sixth Annual Conference, Society for Applied Learning Technology, conference agenda, Aug. 1984, 2 pages.
“Sony engineering introduces to industry the new Sony Laser VideoDisc,” Sony Video Communications, product brochure, 12 pages.
“GraphOver 9500,” Hi-Res Graphics Overlays for NTSC Video, New Media Graphics, product description, 1983, 4 pages.
“New Horizons in Interactive Video,” Puffin product advertisement, IEV Corporation, 2 pages.
IEV Feb. 1985 Price List, 1 page.
“Fast Forth” “No Other Forth Comes Close,” IEV Corporation, product brochure.
“Pro 68 Advanced Technology 16/32 Bit Co-Processor for IBM PC, PC/XT, PC/AT and Capatibles,” Hallock Systems Company, Inc., product description, 7 pages.
“Pro 68 Software Facts,” Hallock Systems Company, Inc., product description, 6 pages.
“Pro CAD A Pro 68 Software Product,” Hallock Systems Company, Inc., product description, 4 pages.
“V: Station 2000 System,” Visage, Inc., product description, 2 pages.
“Upgrade Packages,” Visage, Inc., product description, 1 page.
“Development Software,” Visage, Inc., product description, 4 pages.
“V: Link Modules,” Visage, Inc., product description, 4 pages.
Visage, Price List, Visage, Inc., Apr. 1985, 4 pages.
Kalowski, Nathan, “Player, Monitor, Interface,” reprinted from Jan. 1985 issue of Data Training, 4 pages.
“Five Authoring Languages Now Available for Use With Visage Interactive Video Systems,” Visage News Release, Visage, Inc., Mar. 18, 1985, 5 pages.
“GraphOver 9500,” Hi-Res Hi-Speed Graphics Overlays for Videodisc, New Media Graphics, product description, 1985, 4 pages.
“PC-VideoGraph,” Hi-Res PC Graphics for Videotaping or Display, New Media Graphics, product description, 1985, 4 pages.
“PC-GraphOver,” Interactive Video With Graphics Overlays, New Media Graphics, product description, 1985, 4 pages.
“Off-the-shelf raster scan display generator creates composite video image,” reprinted by Defense Systems Review and Military Communications, Jan. 1985, p. 55.
“The NTN Entertainment Network,” NTN Entertainment Network, programming information sheet, 2 pages.
Dickey, Glenn, “A Game That's Better Than the Real Thing,” San Francisco Chronicle, Dec. 17, 1985, p. 63.
Connell, Steve, “Arm-Chair Quarterbacking (Computer football game makes fans the play-callers),” The Sacramento Union, Jan. 23, 1986, 3 pages.
Gunn, William, “Get Ready for Monday Night Football,” Night Club and Bar, Jul. 1986, pp. 20-22.
Brack, Fred, “QB1 Anyone?”, Alaska Airlines, Aug. 1986, 2 pages.
Dickey, Glenn, “QB1: Bringing the Game Into the Bar,” Sport Magazine, Oct. 1986, 1 page.
“The Most Exciting Customer and Revenue Building Program Since Sports were First Shown on T.V.”, NTN Communications, Inc., QB1 product brochure, 1986, 4 pages.
“NTN—The Company,” NTN Communications, Inc., company description, 1 page.
NTN Communications, Inc., “Trivia Countdown,” and “Trivia Showdown,” product descriptions, 1 page.
Pottle, Jack T. et al., “The Impact of Competitive Distribution Technologies on Cable Television,” Report, prepared for the National Cable Television Association, Mar. 1982.
“Consumer Electronics: A $40-Billion American Industry,” a report prepared by Arthur D. Little, Inc. For the Electronic Industries Association/Consumer Electronics Group, Apr. 1985.
“Times Mirror Videotex/Infomart Joint Venture,” Times Mirror, Background, Jan. 8, 1982, 3 pages.
Cable Advertising Conference Feb. 9, 1982, conference agenda, Cabletelevision Advertising Bureau, Inc., 6 pages.
True Stereo Television, Series 1600 Warner-Amex Stereo Processers, Wegener Communications, Inc., product description, 1982, 3 pages.
“EUROM—a single-chip c.r.t. controller for videotex,” Mullard, Technical publication, 1984, 12 pages.
“EUROM” “A display IC for CEPT Videotex,” Mullard, product information, Feb. 1984, 6 pages.
“Satellite-Delivered Text Service Signs 4 Carriers,” Multichannel News, Jun. 18, 1984, p. 18.
Aarsteinsen, Barbara, “How the Chip Spurs TV Growth,” “The promise of digital television has stirred the U.S. Industry,” The New York Times, May 20, 1984, 1 page.
Pollack, Andrew, “As Usual, Here Come the Japanese,” The New York Times, May 20, 1984, 1 page.
“Unleashing IBM Could Help a Satellite Venture Blast Off,” Business Week, May 28, 1984, 1 page.
Mayer, Martin, “Here comes Ku-band,” Forbes, May 21, 1984, pp. 65-72.
“The UCSD p-System Version IV,” SOFTECH Microsystems, product description, 2 pages.
“UCSD p-System Languages, Version IV UCSD Pascal, FORTRAN-77, BASIC and Assembler,” SOFTECH Microsystems, product description, 2 pages.
“Add-On Features, UCSD p-System Version IV,” SOFTECH Microsystems, product description, 2 pages.
“USCD p-System, Version IV.1,” SOFTECH Microsystems, product description, 4 pages.
SOFTECH Microsystems, Product Order Form, Oct. 1982, 2 pages.
“HOMECAST, A Consumer Market Service from ICM Services,” Chase Econometrics, product brochure, 2 pages.
“Consumer Systems Industry Service,” research notes, Gartner Group, Inc., Jun. 22, 1983, 13 pages.
Download, Monthly Newsletter, vol. 1, No. 1, May 1984.
Nocera, Joseph, “Death of a Computer,” Texas Monthly, Apr. 1984.
Special Report, Business Week, Jul. 16, 1984, pp. 84-111.
Zenith, Video Hi-Tech Component TV, product brochure, Aug. 1982, 8 pages.
Ferretti, Fred, “For Major-League Addicts, A Way to Win a Pennant,” The New York Times, Jul. 8, 1980, 1 page.
Friedman, Jack, “The Most Peppery Game Since the Hot Stove League? It's Rotisserie Baseball,” People weekly, Apr. 23, 1984, 2 pages.
“Information Package for MDS Applicants,” Department of Communications Radio Frequency Management Division, Oct. 1986.
Department of Transport and Communications Radio Frequency Management Division, Licensing Procedures for Ancillary Communications Services (ACS).
Minister for Communications Guidelines for Provision of Video and Audio Entertainment and Information Services, Oct. 13, 1986.
Christopher, Maurine, “BAR cable service set,” Advertising Age, Sep. 21, 1981, pp. 68 & 72.
“In this corner, Digisonics!”, Media Decisions, Jun. 1968, 5 pages.
“Did the ad run?”, Media Decisions, Jul. 1969, pp. 44 et seq.
“Digisonics TV Monitor System Finds Defenders,” Advertising Age, Dec. 8, 1969, 1 page.
“Merrill Lynch Advanced Applications Systems,” Advanced Automation Systems Department, system description, publication date unknown.
Dougherty, Philip, “Gathering Intelligence for Profit,” newspaper article, 1981, p. D7.
“Vidbits,” Advertising Age, Sep. 21, 1981, p. 70.
Cooney, John E., “Counting Cable's Gold Coins,” View, Sep. 1981, 4 pages.
“IDC begins monitoring,” At Deadline, Broadcasting, Sep. 14, 1970, p. 9.
“Contraband code,” Closed Circuit, Broadcasting, Sep. 28, 1970, 1 page.
“Listeners,” Closed Circuit, Broadcasting, 1 page.
“Digisonics violated standards, says BAR,” Broadcasting, Oct. 5, 1970, pp. 21-23.
“Talent pay code put off,” At Deadline, Broadcasting, Nov. 9, 1970, p. 9.
“Digisonics pushes its coding method,” Broadcasting, Dec. 7, 1970, p. 37.
“No Digisonics friends show in comments,” Broadcasting, May 24, 1971, p. 62.
“Digisonics' dilemma,” Media Decisions, Jun. 1971, 6 pages.
“IDC encoding system still alive at FCC,” Broadcasting, Sep. 27, 1971, p. 31.
Howard, Niles A., “IDC drops tv monitoring; mulls revival,” reprint from Advertising Age, Feb. 3, 1975, 1 page.
“TELEPROOF I” “An Exciting New Development of International Digisonics Corporation,” product brochure, 13 pages.
“TELEPROOF 2,” IDC Services, Inc., product description, 6 pages.
“The Best Reason to Buy Odetics On-Air Automation Systems Today?” Advertisement, Odetics Broadcast, 1 page.
“Advertising on Cable” “Automatic Commercial Insertion-Plus-Automatic Print-Out Verification With the New Ad Machine and Ad Log,” Advertisement, Tele-Engineering Corporation, 4 pages.
“NTN Communications, Inc. Entertainment Network Program Schedule,” Advertisement, NTN Communications, Inc., 2 pages.
“Interactive Football for the Home,” Advertisement, U.S. Videotel, 2 pages.
“NTN Programming,” Advertisement, NTN Communications, Inc., 2 pages.
“Electronic Surveys, Inc. Signs NTN Contract,” News Release, NTN Communications, Inc. Carlsbad, CA, 2 pages.
Andrews, Edmund L., “AT&T Sees the Future in Games,” The New York Times, Business Day, 2 pages.
“Total Teleconferencing Solutions for Your Communication and Training Needs,” brochure, Parker Communications Corporation, Parker Associates.
“PSN Signs Fourth High Technology Customer As Amdahl Corporation Implements Business Television,” PSN News, News Release, Private Satellite Network, Inc., 2 pages.
PSN, Private Satellite Network, Inc., product information for MISTS, Mass Interactive Simultaneous Telecommunications System, 6 pages.
“Broadcasting Services,” brochure, PSN, Private Satellite Network, Inc., 6 pages.
Martin, Vivian B., “Companies use TV talk shows to inform workers,” The Hartford Journal, Business Weekly, 1 page.
Fisher, Lawrence M., “TV: Growing Corporate Tool,” The New York Times, 2 pages.
Vaughan, Kimithy, “Evolution of Corporate Television Networks,” Teleconference, The Business Communication Magazine, pp. 38-40.
“New in Teleconferencing Resources,” advertisement, Parker Associates, 4 pages.
“Business Television Services,” Irwin Communications, Inc., brochure, 1 page.
“Corporate Capabilities,” Irwin Communications, Inc., brochure, 1 page.
“Introducing RSVP: The latest breakthrough for cable!”, advertisement, ARBITRON, 1 page.
“Viacom Unit Will Tap Into Pay Networks,” newspaper article, 1 page.
“SHOW or TELL?”, Advertising material, The Weather Star 4000, The Weather Channel, 8 pages.
“Video Hi-Tech Component TV, CV 1950, CV 510, CV 540, CV 520, CV 150,” advertisement, Zenith Radio Corporation, 4 pages.
“Point-To-Multipoint Data Communication Network Services,” product description, Equatorial Communications Company, 5 pages.
“C-100 Series Micro Earth Stations for Satellite Data Distribution,” product description, Equatorial Communications Company, 4 pages.
“C-200 Micro Earth Station for Satellite Data Communications,” product description, Equatorial Communications Company, 3 pages.
“Interactive Data Communication Network Services,” product description, Equatorial Communications Company, 3 pages.
“Data Communications Network Description,” product description, Equatorial Communications Company, 5 pages.
Landro, Laura, “Satellite Company Signs Merrill Lynch for Its Video Service,” The Wall Street Journal,1 page.
“ELITE 2000 Creation System,” IBM Compatible Information Display System, advertisement, Display Systems International, Inc., 1 page.
“Video Database Management . . . When Words Are Not Enough,” advertisement, U.S. Video, 2 pages.
“U.S. Video presents . . . True Computer-Video Overlays,” The Raster Master RM-110, product description, U.S. Video, 2 pages.
“Now You Can Find Just the Right Image Every Time Quickly and Easily with Image Search and the IBM PC/XT,” advertisement, ONLINE Computer Systems, Inc., 1 page.
“Touch the Future Today,” advertisement, MetaMedia Systems, Inc., 1 page.
“Training solutions for the 80's and beyond,” advertisement, ONLINE Computer Systems, Inc., 2 pages.
“Experienced Educator/Trainers,” “Use the new PILOT plus Training System to develop highly interactive courseware on your IBM PC that will run on most microcomputers,” advertisement, ONLINE Computer Systems, Inc., 2 pages.
“Technical Specifications for Hardware and Software Products,” Online Products Corporation, 9 pages.
“Museum Image Series,” product information, ONLINE Products Corporation, 2 pages.
“OMEGA Vision,” product description, Omega Management Group Corp., 2 pages.
“VISAGE Visual Information Systems,” Interactive Video Products, brochure, Visage, Inc.
“Now the Future is Clear,” Visage Visual Information Systems, brochure, Visage, Inc., 4 pages.
“Speak Through the Power of Today's Technology,” QUEST, product description, Allen Communication, 4 pages.
“Universal Video Controller,” product description, Allen Communication, 2 pages.
“Video-Microcomputer Interface,” product description, Allen Communication, 2 pages.
“The Leader in Interactive Video,” advertisement, Allen Communication, 2 pages.
“Allen Communication Price List,” Allen Communication, 1 page.
“TOUCHÉ Interactive videodisc training by IIAT,” advertisement, IIAT, International Institute of Applied Technology, Inc., 1 page.
“TOUCHÉ Interactive Videodisc System,” product description, IIAT, International Institute of Applied Technology, Inc., 2 pages.
“IIAT ST-1000A IIAT Training Station,” product description, IIAT, International Institute of Applied Technology, Inc., 2 pages.
“IIAT ST-1000B IIAT Training Station,” product description, IIAT, International Institute of Applied Technology, Inc., 2 pages.
“IIAT International Institute of Applied Technology, Inc.,” company description, 4 pages.
“PILOT plus Course Authoring Interpreter,” IIAT Products, product description, 1 page.
“Touch Monitor/Videodisc Player Interface Card and Video Switch Box,” IIAT Products, product description, 1 page.
“Touch Sensitive Monitor Interface Card for Apple II,” IIAT Products, product description, 1 page.
“Touchpoint, A Total Eclipse of Existing Technology,” product description, Allen Communication, 2 pages.
“Totally Integrated Interactive System—TII-PC,” product description, Allen Communication, 2 pages.
“Most Valuable Peripheral,” product description, Allen Communication, 2 pages.
“Allen Communication Introduces Integrated Interactive Video Systems,” brochure, 2 pages.
“Automation, Control and Monitoring Systems,” brochure, Jasmin Electronics Limited.
“jasmin,” company brochure, Jasmin Electronics Limited, 4 pages.
“jasmin Teletext Systems,” advertisement, Jasmin Electronics Limited, 4 pages.
“jasmin Process Control Systems,” advertisement, Jasmin Electronics Limited, 4 pages.
“Teleprompter of Denver Channel Line Up,” 2 pages.
“City of Seal Beach Channel Utilization Guide,” 3 pages.
“V: Link 1910: The Single-Slot VGA Interactive Video Solution,” product description, Visage, Inc., 4 pages.
“The OASYS Authoring System,” advertisement, ONLINE Computer Systems, Inc., 1 page.
“Advertisers Guide to Cable TV Terms,” brochure, Cable Ad Associates, Inc.
“Cable Audience Measurement Study,” A Prospectus based upon recommendations of the Ad Hoc Cable Measurement Committee, pamphlet.
Kane, Sharyn et al., “Technology in the First Person,” reprint from Delta Air Lines' SKY magazine, 4 pages.
“Training Systems,” brochure, WICAT systems, Training Systems Division, 4 pages.
“The Consultant,” advertisement, Co-Opportunities Sales Development Information Systems, a division of Jefferson-Pilot Communications Company.
“Introducing SPOT Data,” “Cable Ad Sales Just Got Better,” advertisement, TV Data Technologies, 4 pages.
“Do You Want to be Making $5-$10 a Subscriber—Right Now?” “Join Us in Our Success!”, advertisement, Multi-Image Systems, 1 page.
“Mediastar,” “the message is clear,” brochure, Multi-Image Systems, 6 pages.
“Art to Go” “The Business Builder in a Box,” advertisement, Multi-Image Systems, 1 page.
“Few Things in Life Work As Well As TAPSCAN,” advertisement, TAPSCAN Incorporated, 6 pages.
“Dow Jones Cable News Service Daily Features Financial Markets,” product summary, 1 page.
“Financial News Network the Business Connection,” brochure, Financial News Network, 8 pages.
“The Financial News Network Means Business,” advertisement, The Financial News Network, 1 page.
“The Dawn of a New Era in Financial News Broadcasting,” advertisement, Financial News Network, 1 page.
“FNN Financial News Network,” advertisement, brief review of research from the Stanford Research Institute's VALS study, and research from ELRA Group Cablemark Reports vol. I, 4 pages.
“Industrial Skills Training With the Touch of a Finger . . . Introducing . . . Activ,” Advanced Concepts in Touch-Interactive Video, advertisement, Industrial Training Corporation, 4 pages.
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