NORDMENDE SPECTRA COLOR T9732 CHASSIS F6TT INTERNAL VIEW.

This NORDMENDE Model was featuring a different SEARCH TUNING - CONTROL board based around TMS3748 (TEXAS INSTRUMENTS) which was eliminating the RAM BATTERY.


NORDMENDE Chassis F6TT
Detail viewing:

- Line deflection output + EHT + Tripler
- Line deflection output Transistor BU208 (Telefunken)

- Frame deflection output Unit in place + N/S Raster correction components circuitry.

- Signal processing section - IF + Sound + Synch + Luminance + Chrominance + RGB Amplifiers

BU208(A)

Silicon NPN
npn transistors,pnp transistors,transistors
Category: NPN Transistor, Transistor
MHz: <1 MHz
Amps: 5A
Volts: 1500V
HIGH VOLTAGE CAPABILITY
JEDEC TO-3 METAL CASE.

DESCRIPTION
The BU208A, BU508A and BU508AFI are
manufactured using Multiepitaxial Mesa
technology for cost-effective high performance
and use a Hollow Emitter structure to enhance
switching speeds.

APPLICATIONS:
* HORIZONTAL DEFLECTION FOR COLOUR TV With 110° or even 90° degree of deflection angle.

ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCES Collector-Emit ter Voltage (VBE = 0) 1500 V
VCEO Collector-Emit ter Voltage (IB = 0) 700 V
VEBO Emitter-Base Voltage (IC = 0) 10 V
IC Collector Current 8 A
ICM Collector Peak Current (tp < 5 ms) 15 A
TO - 3 TO - 218 ISOWATT218
Ptot Total Dissipation at Tc = 25 oC 150 125 50 W
Tstg Storage Temperature -65 to 175 -65 to 150 -65 to 150 oC
Tj Max. Operating Junction Temperature 175 150 150 °C

CRT Line Output Stage Operation Principle:

I'll examine the operation of the line output stage, whose basic job is to generate a sawtooth current in the line scan coils so that the beams are deflected horizontally across the picture tube's screen. The beams are deflected from the left-hand side to the right-hand side to give the forward line scan: this is followed by a rapid, blanked flyback to the left-hand side ready to trace out the next viewed line. Because of the way in which the flyback is achieved, the line output transformer generates various pulse voltages which are rectified to produce the e.h.t. required by the tube and other supplies. The line output stage is not just any sort of amplifier. The active device, almost always a transistor though valves, thyristors and gate -controlled switches have been used in the past, operates as a switch, the inductive components in the stage being mainly responsible for generating the sawtooth current waveform. Tuning is used to generate and control the flyback. The line drive waveform controls the output transistor's on/off switching and thus determines the timing of the cycle of operations, keeping them phase synchronised with the transmitted picture signal.
Basic Operation

Fig. 1 shows in most basic form the main elements in the line output stage, the active device (transistor) being shown as a switch. When the switch is closed, capacitor C and diode D are shorted out and the 150V supply is connected across coil L. Now it's a basic law of inductance that when a d.c. voltage is connected across a coil the current flowing through the coil builds up linearly from zero. Fig. 2(a) shows this as a positive -going ramp that starts at time t 1 , when the switch is closed. After about 26psec (t2), roughly the time required to deflect the beams from screen centre flows via the large -value capacitor CR, charging the tuning capacitor C with the result that the voltage at its 'upper' plate (the one connected to the coil) rises to a relatively high positive value. When all the energy in coil L has been transferred to capacitor C (time t3) the latter begins to discharge, passing the energy back the other way to L via CR which, as far as the circuit's a.c. operation is concerned, can be regarded as a short-circuit. At time t4 the capacitor has discharged, having transferred the energy back to the coil. This to-and-fro interchange of energy between L and C, which from the a.c. point of view are in parallel (CR representing a short-circuit), is the normal action of a tuned/resonant/oscillatory circuit. The resonant frequency is determined by the values of L and C. These are selected so that when time t4 is reached, i.e. after a half cycle of oscillation, the sawtooth current has passed through zero to a negative point on the ramp and the beams have been deflected to the left-hand side of the screen ready for the next active line scan. To complete the oscillatory cycle (the normal resonant circuit action) the voltage at the upper plate of capacitor C would have to move negatively with respect to chassis. It can't do so because of the presence of diode D, which is called the efficiency diode - we'll explain that in a minute. When the voltage at the cathode of D tries to swing negatively it conducts, i.e. switches on, providing a discharge path for the coil. Once again because of the inductance in the circuit there's a gradual, linear current discharge, the enegery being returned to the supply's reservoir capacitor CR. During this discharge, the beams are deflected back towards the centre of the screen (times t4 to t5). At this point the magnetic flux (energy) in L has been dissipated. C is still in its discharged state, being shorted out by diode D. So at time t5, with the beams at screen centre (zero deflection), the switch has to be closed so that the cycle of operation can be repeated. The action of diode D has, with the inductance in the circuit, provided half the scan power while in the process returning the energy (minus inevitable circuit losses) to the reservoir capacitor. No wonder it's called the efficiency diode. It's important to note that the beam flyback period t2 to t4 is governed by the time -constant of L and C, consisting of one half cycle of oscillation. To achieve a flyback time of 12μsec the duration of one cycle needs to be 24μsec: so the resonant frequency of L and C works out at 41.67kHz. Fig. 3 illustrates the four phases in the operation of the line output stage. Now the voltage developed across an inductor is propor- tional to the rate of change of the current flowing through it. Thus the voltage across L is relatively low during the forward scan period but correspondingly high during the flyback, when the current flow is faster because of the circuit resonance. The voltage developed at the positive plate of capacitor C is shown in Fig. 2(b), typically peaking at 1,200V. Both the line output transistor and the efficiency diode must be capable of withstanding this high reverse voltage. As we've seen, the circuit action is highly efficient as the energy stored in L is returned to the supply during the first half of the forward scan: indeed with 'perfect' components there would be no net demand on the power supply at all! In practice because of the resistance of the inductor and the losses in the diode, switch and capacitor the circuit takes out a little more than it puts back, while the practice of loading the transformer with rectifier circuits to provide power for other sections of the set increases the stage's current demand. To make up for these losses, the line output transistor is switched on slightly before instead of at the centre of the forward scan. In a practical circuit L is the primary winding of the line output transformer and the deflection coils are connected across it via a d.c. blocking capacitor, CB, as shown in Fig. 4. This coupling capacitor also provides scan -correction (often referred to as S -correction). Why is this required? If a linear deflection current was used to control the scanning with a relatively flat -faced picture tube the sides of the picture would be stretched out in comparison with the centre section. Hence S -correction: the value of the coupling capacitor is chosen so that it resonantes with the inductance of the scan coils at about 5kHz. This has the effect of adding a sinewave component to the sawtooth current, as shown in Fig. 5. Thus the deflection power is tailored to suit the length of the beam paths as the screen is scanned, correcting the horizontal linearity of the display. At the line scanning frequency the scan coils behave as an almost perfect inductor, but their small d.c. resistance is in series with the fixed voltage that should be present across the coil. It has the effect of introducing an asymmetric sensitivity loss during the forward scan. To counteract it a further component is added in series with the scan coils - an inductor with a saturable magnetic core, biased by a permanent magnet so that its inductance falls as the scan current increases. The voltage drop across this inductor, which is known as the linearity coil, varies in the opposite sense to that produced by the resistance of the coils, thus providing an equal -but -opposite cancellation effect. In some TV sets the permanent magnet can be adjusted to trim the linearity correction, though many modern sets use components with such tight tolerances that a sealed linearity -correction coil can be used. With some very small -screen sets the horizontal non -linearity effect is small enough to be ignored.

Practical Line Output Stage
Fig. 6 shows a relatively simple line output stage circuit used with a 90° -deflection tube. Tr5 is the line output transistor, which incorporates the efficiency diode in the same package. The primary winding of the line output trans- former T4 is the section between pins 2 and 10, C95 being the flyback tuning capacitor. Scan coil coupling and S - correction are provided by C94, the line linearity coil L14 being connected in series on the chassis side of the scan current path. L14 is damped by R110 to prevent it ringing when the line flyback pulse occurs - the effect of an undamped linearity coil is velocity modulation of the beams at the beginning of their sweeps, showing up as black -and - white vertical striations at the left-hand side of the screen. C92 is the reservoir capacitor, the h.t. feed being via 8105. 8106 and R109 feed pulses to the second phase -locked loop (APC2) in the sync chip - we dealt with this in last month's instalment. A second pulse feed from the same point goes to the colour decoder chip to provide line blanking, burst gating and PAL switch drive - this particular set doesn't use the sandcastle pulse approach.

Secondary Supplies

So much for the generation and control of the sawtooth scanning current. The rest of the components in this circuit are used to harness the energy in the transformer to provide power supplies for other sections of the receiver. The winding between pins 4 and 8 pulse energises the picture tube's heaters at 6.3V r.m.s. The other supplies make use of the transformer as the heart of a d.c.-to-d.c. converter system, by means of secondary windings that provide pulse feeds to diode/capacitor rectifier circuits. Small -value (0.680) resistors in the 25V and 200V supplies provide surge limiting and protection (by going open -circuit) in the event of a short-circuit in one of these supplies. The most significant supply is obtained from the diode - split winding that starts at pin 9. Although not shown in full detail it consists of several 'cells', each of which consists of an electrically isolated secondary winding, a built-in high - voltage rectifier diode and, as the reservoir capacitor, the carefully contrived capacitance that's present between adjacent, highly -insulated winding layers. These cells are connected in series to form a voltage -multiplier system capable of providing an e.h.t. supply for the tube's final anode of typically 24kV - it may be as high as 30kV in some designs. There's a built-in surge limiter resistor at the output end of the chain of cells. An important part of the e.h.t. multiplier system is the final reservoir capacitor that split chain provides about 8kV to a built-in potential -divider chain that contains two presets: the one at the top provides the supply for the tube's focus electrode while the one near the bottom provides its first anode supply of about 800V. The bottom of the diode -split chain (pin 9) is returned to chassis via a diode/capacitor/resistor network (not shown here). The voltage developed across this network is proportional to the total beam current, since this flows from the tube's cathodes via the e.h.t. connector and the diode -split chain to chassis. Above a certain threshold the voltage at pin 9 reduces the picture brightness and/or contrast via the colour decoder/matrixing chip, limiting the beam current and hence the dissipation in the tube's shadowmask to safe levels. The winding between pins 10 and 7 of the transformer produces 50-70V pulses that sit on the h.t. voltage present at pin 10. When rectified by D23 and C100 a 200V supply is provided for the RGB output stages that drive the tube's cathodes. Secondary winding 4-6 feeds D24 and C99 which provide a 25V supply for the field timebase. In some designs supplies for the audio output stage and the signal sections of the receiver are also obtained from the line output transformer: in this particular chassis they are obtained from the chopper transformer in the power supply instead. Incidentally there have been one or two designs, the Ferguson/philco TX10 chassis being a well-known example, where the e.h.t. is also obtained from the chopper transformer, the line output transformer then acting mainly as a load for the line output transistor. In earlier designs a separate diode - capacitor multiplier unit (tripler) was fed from a single line output transformer overwiding to provide the e.h.t.

Scan Rectification

The e.h.t., focus and 200V supplies derived from the transformer are relatively lightly loaded, i.e. no great current demand is placed on them. They can therefore be obtained by rectifying the pulses present during the flyback period (time t2 -t4 in Fig. 2), which is about twenty per cent of the scan cycle. Where the current demand is greater, e.g. in a supply for the field timebase or an audio output stage, the phasing of the relevant transformer winding is often arranged so that the rectifier diode conducts during the scan rather than the flyback period. Although the voltage available is much lower, it's present for a longer period (about eighty per cent of the scan/duty cycle). As a result the output regulation is much better. The relatively high peak reverse voltage has to be taken into account in the rectifier diode's specification.

EHT Regulation

The internal impedance of a diode -split e.h.t. supply is typically about 1MOhm. Thus with a total beam current of lmA, present when a bright picture is being displayed on a 22in. picture tube, the e.h.t. voltage will drop by about 1kV or five per cent. The result of this is some ballooning, i.e. increase in picture size. Compensation can be provided by reducing the line scanning power. Careful choice of the value of the resistor that feeds the line output transformer - R105 in Fig. 6 - gives automatic compensation in the horizontal direction, while deriving the supply for the field output stage from the line output transformer tends to cancel out the ballooning in the vertical plane. Various 'anti -breathing' arrangements are used in TV receiver design. Most operate via the diode -modulator circuit we'll come to shortly. With any line output stage circuit the picture width and e.h.t. voltage depend on the stage's h.t. supply, so this must be well regulated and set up correctly. In the circuit shown in Fig. 6 the h.t. voltage has to be 119V with a 20in. tube and 145V with a 22in. tube.


Pincushion Distortion

The raster produced on an almost -flat faced picture tube by constant -amplitude scan currents has pincushion distortion at all four sides. This is because of the disparity between the image plane and the screen's profile -  . As a general rule the deflection yokes used with modern 90° tubes have built-in correction for both NS (vertical) and EW (horizontal) pincushion distortion while 110° tubes (generally above 22in. screen size) have in -yoke correction for NS distortion but cannot fully compensate for the pincushion effect at the sides of the screen. Thus with these the line scan current has to be amplitude -modulated by a parabolic waveform at field frequency as shown in Fig. 7. With present-day tube designs a modulation depth of about seven per cent is required. the peak -to -peak scan current being typically 4.1A at the top and bottom of the screen and 4.4A towards the centre of the screen, where the deflection power is greatest. Amplitude modulation of the line scan current can be achieved by including a saturable -reactance transformer in series with the scan coils, but this is expensive. You could put a suitably -shaped ripple on the supply to the line output stage, but the parabola would be superimposed on any secondary supplies derived from the line output transformer. The most widely used solution is to employ a diode -modu- lator circuit, since this gives full control of the raster shape and scan amplitude while providing a constant load current and flyback time.

The Diode Modulator
Fig. 8 shows the essence of a diode -modulator arrange- ment. The efficiency diode is split in two, DI and D2, which perform the same clamping action as before. The flyback tuning capacitor is also split in two, Cl and C2: the upper one tunes the transformer and scan coils (L1) as before while the lower one tunes a bridge coil, L2, via C4 to the same flyback frequency of about 42kHz. C3 is the scan coupling capacitor, which corresponds with CB in Fig. 4. Modulation is achieved by using transistor Tr2, whose conduction governs the scan width, to vary the load across C4. When Tr2 is off, the scan energy is shared between the the two series LC combinations C3/L1 and L2/C4. The charge on C3 and C4 is in the ratio of about 7:1, the scan current being reduced in proportion. When Tr2 is fully conductive, C4 is effectively shorted out and acquires no charge. Thus a greater proportion of the energy is present in C3/L1 and the scan current and picture width are increased. By varying the conduction of Tr2 during the forward scan in a parabolic manner, EW pincushion correction is achieved. The basic picture width can be controlled by varying Tr2's standing bias. Choke L3 and the large -value capacitor C5 filter the line -frequency energy so that it doesn't reach Tr2. And because both sections of the load (L 1/C1 and L2/C2) are individually tuned to the flyback frequency the flyback time, and hence the e.h.t. and the other line output transformer -derived supplies, remain constant over the field period despite the line scan current variation. There are several different versions of the diode -modu- lator arrangement. Some tube/yoke combinations have a scan -geometry characteristic such that when the line scan current is modulated by a simple parabolic waveform as described above the raster has inner pincushion distortion as shown in Fig. 9.

 Because of this. the EW-correction system also has to modulate the S -correction. Fig. 10 shows, in skeleton circuit form. how this can be done. There are two coupling/S-correction capacitors. C3 and C3A. C3 is the usual S -correction capacitor, but C3A has an increasing influence as the diode modulator begins to have maximum effect towards the centre of the screen. Critical choice of the value of C3A ensures that the inner curved verticals shown in Fig. 9 are straightened out to give a raster completely free from geometric distortion. Although all diode modulators work on the same basic principle, in some designs a transformer is used in place of the bridge coil to give better impedance matching and balance. Fig. 11 shows such an arrangement, used by Bang and Olufsen. The EW correction waveform is applied to transformer T6. whose winding 1-2 takes the place of L2 in Figs. 8 and 10. This circuit also provides inner -pincushion distortion correction as just described, the supplementary S - correction capacitor being C36.

Diode Modulator Drive

The parabolic EW drive waveform required is easily obtained by feeding the field -scan sawtooth waveform to a double integrator. By adding a sawtooth component the shape of the parabolic waveform can be tilted in either direction to give keystone -distortion correction if required - this is not generally necessary with modern tube/yoke designs. These EW correction characteristics are adjustable by preset resistors or, in the case of bus -programmable sets, remote control commands to the deflection processor. Very often the EW modulator is used to correct the previously mentioned picture breathing effect: this is done by feeding to the EW modulator's control circuit a voltage that's proportional to beam current.






































































































Chassis F6TT UNITS view.

- Luminance + Chrominance unit 492.045 G8 with TDA2500/3 + TDA2522 (all PHILIPS)
(Note the long luminance delay line)

- Synchronization Unit with TDA2593 (PHILIPS) 492.174 G10

- Sound - Audio Unit with TBA120U (Telefunken) + L130V (Fairchild Semiconductors) 492.044/E3


- RGB Amplifiers with TBA530 (PHILIPS) 943/K7

- Frame deflection unit 492.225/C1

- E/W Correction Unit 492.213/C

TDA2522 PAL TV CHROMA DEMODULATOR COMBINATION
FAIRCHILD LINEAR INTEGRATED CIRCUIT
GENERAL DESCRIPTION- The TDA2522 is a monolithic integrated circuit designed as
a synchronous demodulator for PAL color television receivers. It includes an 8,8 MHz
oscillator and divider to generate two 4.4 MHz reference signals and provides color difference outputs.
PACKAGE OUTLINE 9B

The TDA2522 is Intended to Interface directly with the TDA2560 with a minimum oF external components. The TDA2530 may be added if RGB drive is required. The TDA2522
is constructed using the Fairchild Planar* process.





TDA2520 COLOUR DEMODULATOR COMBINATION
The TDA2520 is an integrated synchronous demodulator combination for colour television
receivers incorporating the following functions :
~ 8, 8 MHZ oscillator followed by a divider giving two 4, 4 MHZ signals used as reference
signals
- keyed burst phase detector for optimum noise behaviour
- a stage to obtain chrominance signal control (a. c. c.) and an a. c. c. reference level
- a colour killer and identification signal detector
- two synchronous demodulators for the (B-Y) and (R-Y) signals
- temperature compensated emitter follower outputs
- PAL switch
- PAL flip-flop
- integrated capacitors in the symmetrical demodulators reduce unwanted carrier-
signals at the outputs.




TDA2593 SYNCHRO AND HORIZONTAL DEFLECTION CONTROL FOR COLOR TV SETDESCRIPTION
The TDA2593 isa circuit intended for the horizontal
deflectionof color TVsets, suppliedwith transistors
or SCR’S.

.LINE OSCILLATOR(two levels switching)
.PHASE COMPARISON BETWEEN SYNCHRO-
PULSE AND OSCILLATOR VOLTAGE
Ø 1, ENABLED BY AN INTERNAL PULSE,
(better parasitic immunity)
.PHASE COMPARISON BETWEEN THE FLYBACK
PULSES AND THE OSCILLATORVOLTAGE
Ø2
.COINCIDENCE DETECTOR PROVIDING A
LARGE HOLD-IN-RANGE .FILTER CHARACTERISTICS AND GATE
SWITCHING FOR VIDEO RECORDER APPLICATION
.NOISE GATED SYNCHRO SEPARATOR
.FRAME PULSE SEPARATOR
.BLANKING AND SAND CASTLE OUTPUT
PULSES
.HORIZONTAL POWER STAGE PHASE LAGGING
CIRCUIT
.SWITCHING OF CONTROL OUTPUT PULSE
WIDTH
.SEPARATED SUPPLY VOLTAGE OUTPUT
STAGE ALLOWING DIRECT DRIVE OF
SCR’S CIRCUIT .SECURITY CIRCUIT MAKES THE OUTPUT
PULSE SUPPRESSED WHEN LOW SUPPLY
VOLTAGE.

NORDMENDE SPECTRA COLOR T9732 Chassis F6TT Power Supply view.
SMPS supply with S2530A (TOSHIBA) Chassis F6TT Power Supply view.


- PROGRAM MEMORY + A/D VST SYNTH 492.205/C
- ULTRASONIC AQUIRING / DETECTOR / AMPL 592.155



NORDMENDE SPECTRA COLOR T9732 CHASSIS F6TT Controlled power supply for a television receiver equipped with remote control:BLAUPUNKT SWITCH MODE POWER SUPPLY.Blaupunkt-Werke GmbH (Hildesheim, DT)

A single isolation transformer supplies both the remote control receiver and the television receiver. A pulse generator such as a blocking oscillator which energizes the primary winding of the isolation transformer has its pulse width controlled in response to the loading of the circuit of the secondary winding of the isolation transformer, as measured by the voltage across a resistor in the circuit of a primary winding. This measuring resistor is interposed between the emitter of the switching transistor of the blocking oscillator and the receiver chassis. A transistor switching circuit for cutting off the low voltage supply to the scanning circuit oscillators of the television receiver is responsive to the output of the remote control receiver, to a signal from an operating control of the television receiver, and to an indication of overcurrent in the picture tube, independently.

1. A power supply circuit for a television receiver equipped for remote control comprising, in combination:
an on-off switch for connecting and disconnecting the television receiver and its power supply circuit respectively to and from the electricity supply mains;
pulse generating means arranged for energization through said on-off switch;
an isolation transformer having its primary winding supplied with the output of said pulse generating means;
a power conversion circuit connected to the secondary winding of said isolation transformer for energization thereby, for supplying an operating voltage for the scanning circuits of the television receiver and for supplying a plurality of other voltages to said receiver, at least one of which other voltages is also supplied to said scanning circuits;

a remote control signal receiver for remote control of said television receiver and controlled switching means responsive to said remote control receiver for switching said television receiver between a stand-by condition and an operating condition, both said remote control receiver and said controlled switching means being connected to a secondary winding of said isolation transformer for energization thereby, said controlled switching means having a switching path for connecting and disconnecting said scanning circuits of said television receiver respectively to and from a source of said operating voltage in said power conversion circuit and
means for reducing energy transfer through said pulse generating means to said isolation transformer when said television receiver is in the stand-by condition.
2. A power supply circuit as defined in claim 1, in which said pulse generating means includes rectifying means energized through said on-off switch for supplying direct current for energization of said pulse generating means. 3. A power supply circuit as defined in claim 2, in which said energy transfer reducing means includes means for varying the width (duration) of pulses generated by said pulse generating means in response to the extent of loading of the secondary circuit of said isolating transformer as measured in the primary circuit of said transformer. 4. A power supply circuit as defined in claim 2, in which said pulse generating means includes a blocking oscillator and said energy transfer reducing means includes means for reducing the width (duration) of the pulses generated by said blocking oscillator. 5. A power supply circuit as defined in claim 4, in which said blocking oscillator includes a switching transistor (5) and a load measuring resistor (7) interposed in a connection between the emitter of said switching transistor and the receiver chassis, and in which said pulse width reducing means is responsive to the voltage drop across said load measuring resistor. 6. A power supply circuit as defined in claim 5, in which said pulse width reducing means includes a controllable resistance (10) in the circuit of said blocking oscillator controlled in response to the voltage drop across said load measuring resistor. 7. A power supply circuit as defined in claim 1, in which said operating voltage connected and disconnected to said scanning circuits by said controlled switching means is the low voltage supply voltage (U 3') of the line scan and picture scan oscillators of the television receiver and in which said controlled switching means is controlled so as to switch off said low voltage supply voltage to put the television receiver in the stand-by condition. 8. A power supply circuit as defined in claim 7, in which said controlled switching means includes a first switching transistor (15) at the collector of which there is applied a direct current supply voltage (U 3) energized through said isolating transformer and a second switching transistor (24) for controllably short-circuiting the base bias of said first switching transistor, whereby a stabilized low voltage (U 3') exists at the emitter of said first switching transistor (15) when a positive signal is supplied from an operating control of the television receiver or from said remote control receiver to the base of said second switching transistor (24). 9. A power supply circuit as defined in claim 7, in which said controlled switching means is responsive independently to an overcurrent condition in the picture tube for switching off said low voltage supply voltage (U 3') in response to said overcurrent condition.

Description:

The present invention relates to a power supply unit including a blocking oscillator for utilization with a television receiver provided with ultrasonic remote control, and more particularly to a television receiver the operating conditions of which are normal operation, a stand-by operation, and the turned-off condition, and a power supply unit therefor that includes an isolating transformer.
In recent times television receivers have frequently been provided with ultrasonic remote control devices for the purpose of offering easier control. As more and more television receivers are utilized in combination with additional equipment, it becomes increasingly necessary to connect the receivers only indirectly to the electric power mains (house wiring). In a known advantageous solution of this problem, a power supply unit includes an isolating transformer which is wired up with a blocking oscillator in the primary circuit. The blocking oscillator is supplied with a d-c voltage which is obtained by rectification of the supply voltage. Compared to the isolating transformers which are directly mains-operated, these so-called switch-mode power supply units have the advantage that they can be made in considerably smaller size, as they are operated at a significantly higher frequency, and the further advantage that they require less expensive means for rectification.
It is necessary to supply television receivers equipped with ultrasonic remote control with the possibility for a stand-by operation in which only the ultransonic receiver is supplied with power and, in some cases, also the heating current for the picture tube. Usually a separate power supply unit is provided for the ultrasonic receiver and the heating of the picture tube, a unit that includes an isolating transformer of its own, the primary winding of which is directly mains-fed. Upon transition from normal operation to stand-by operation, the power supply unit of the blocking osciallator is switched off, so that the television receiver receives only the relatively small quantity of energy required for the ultrasonic receiver and, in some cases, also for the heating of the picture tube.
Because of the required second isolating transformer, this known circuit has the disadvantages that it requires both greater space and greater expenditure.
It is the object of the present invention to develop a simplified power supply unit which does not have the above-mentioned disadvantages.
SUMMARY OF THE INVENTION
Briefly, the television receiver and the ultrasonic receiver are connected to the same isolating transformer; means for the switching from normal operation to stand-by operation and vice versa are placed in the secondary circuit of the isolating transformer, and means are arranged in the primary circuits of the isolating transformer for reducing the amount of energy made available for stand-by operation purposes.
The main advantages of the present invention are that no separate isolating transformer is required for supplying the current during the stand-by operation, and that, during the stand-by operation, it is nevertheless only the power required for this operation which is consumed.
An advantageous embodiment of the present invention obtains reduction of the energy quantum transmitted through the power supply during stand-by by reduction of the pulse width of the pulses generated by the blocking oscillator.
Another advantageous embodiment of the present invention utilizes measurement in the primary circuit of the isolating transformer of variation in load occurring in the secondary circuit as a control variable for determining the pulse width.
A further advantageous embodiment of the present invention obtains the control variable for the pulse width across a measuring resistor interposed in the connection of the emitter of the switching transistor of the blocking oscillator to the chassis.
Still another advantageous embodiment of the present invention provides that the voltage drop across the measuring resistor controls a controllable resistor.
The advantageous embodiments described above offer highly simple and advantageous possibilities for measuring the variation in load upon switching between normal and stand-by operation, as well as for the consequent control of the energy transmitted via the isolating transformer.
The possibility of a simple and inexpensive switching between normal and stand-by operation is achieved by effecting the switching between normal and stand-by operation by means of switching on or switching off, respectively, the low voltage supply of the line scan oscillator, and, especially, by a first switching transistor which short-circuits the base bias of a second switching transistor at the collector of which a direct current supply voltage is present and at the emitter of which a stabilized low voltage exists, when a positive signal is supplied from the operating control of the television receiver or from the remote control receiver to the base of the first switching transistor.
The circuit arrangements just mentioned offer the advantage that they may simultaneously be utilized as a protective circuit. This is achieved by a switching-off device for the low voltage which can also be triggered at any time by a signal built up by overcurrent in the picture tube.

BRIEF DESCRIPTION OF THE DRAWINGS
The invention is further described by way of illustrative example by reference to the annexed drawings in which:
FIG. 1 is a circuit diagram, partly in block form, of an embodiment of the invention;
FIG. 2 is a circuit diagram of one form of means for interrupting the power to the picture circuits in the stand-by condition in connection with the circuit of FIG. 1, and
FIG. 3 is a circuit diagram of one way of controlling the pulse width of the blocking oscillator 4 in response to the switching circuit 8 in the circuit of FIG. 1.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An on-off power switch 2 of the television receiver is connected to the supply terminals 1, providing a primary operating control for the receiver. Consquently, the supply voltage is also present at the output of the operating control 2 when the television receiver is turned on thereby, and arrives at a rectifying stage 3 comprising means for rectifying and smoothing the supply current as well as for suppressing interference. A d-c voltage, feeding a blocking oscillator stage 4, is present at the output of the recifying stage 3. The main part of the blocking oscillator 4, symbolically represented in FIG. 1 by a fragmentary circuit diagram, is a switching transistor 5, in the load circuit of which the primary winding of an isolating tranformer 6 is placed. A measuring resistor 7 is connected between the emitter of the switching transistor 5 and the chassis, across which measuring resistor a voltage is taken and applied to a load-dependent control circuit 8. The voltage taken at the measuring resistor 7 is fed via a resistor 9 to the base of a transistor 10 which serves as a controllable load for the blocking oscillator 4. A resistor 11 and a capacitor 12, each of which is connected to chassis with its other terminal, are also connected to the base of the transistor 10. The emitter of transistor 10 is connected to chassis, while the collector of the transistor 10 is connected back to the blocking oscillator stage 4.

In the secondary circuit of the isolating transformer 6, a d-c voltage supply stage or power conversion circuit 13 is placed, substantially consisting of a rectifying circuit 14, which, in the example shown, is provided with six outputs at which the voltages U 1 to U 5 can be taken off with respect to the sixth output connected to the chassis. At the terminal U 3, there is, in addition, a branch feeding both the collector-to-emitter path of the transistor 15 and also, through a resistor 16, the collector-to-emitter path of the transistor 15a. The emitter of the transistor 15a is directly connected to the base of transistor 15. The emitter of the transistor 15 is connected to chassis via a series connection of a resistor 17, a potentiometer 18, and a further resistor 19. The tap of the potentiometer 18 is connected to the base of a further transistor 20. The transistor 20 is connected to chassis by means of its emitter via a Zener diode 21, the collector of the transistor 20 controlling the base of the transistor 15a. The emitter of the transistor 20 is connected to the emitter of the transistor 15 via a resistor 22. A terminal for tapping off the voltage U 3' is connected to the emitter of the transistor 15.
The base of the transistor 15a is connected to a switching stage 23 responsive to a remote control ultrasonic receiver by a conductor leading to the collector of a switching transistor 24 which is connected to chassis via its emitter. The base of the switching transistor 24 is connected to an input terminal 28 leading into the television receiver via two resistors 25, 26 and a capacitor 27 connected in series, that input terminal 28 passing on switching signals from the receiver to the switching transistor 24, as will be explained in more detail below.
The cathode of a diode 29, which is connected to chassis via its anode, is connected to the junction point of the resistor 26 and the capacitor 27. The junction point of the two resistors 25, 26 is connected to chassis via a capacitor 30. The base of the switching transistor 24 is connected to chassis via a resistor 31. Furthermore, that base electrode is also connected to a terminal 32 to which an electrical switching signal is applied which is either built up in response to an ultrasonic signal received by the remote control receiver 32' or is supplied from an operating control of the television receiver. At the terminal 32, the switching transistor 24 receives the signal containing the information whether the television receiver is to work in the normal operating condition, i.e. to receive and process the sound and video signals, or in the stand-by condition in which it is substantially only the ultrasonic receiver that is supplied with current.
When a positive signal arrives at the base of the switching transistor 24, the latter becomes conductive, and causes chassis potential to be present at the base of transistor 15a. The transistor 15 is thereby blocked, and there is no longer any voltage at the terminal U 3'. Since the voltage U 3' serves as an operating voltage for the line and picture scan oscillator, the deflecting stages of the receiver cannot work and no high voltage and other related supply voltages are generated at the line circuit transformer. In consequence, by means illustrated diagrammatically in FIG. 2, the electric circuits connected to the terminals U 1 to U 3 are interrupted. The voltages U 4 and U 5 serve for supplying the ultrasonic receiver, i.e. they are required for the stand-by operation.
In case no counteracting means should be provided for, the variation in load would cause a voltage rise in the secondary circuit of the isolating transformer 6, which effect is, of course, not desired. Therefore, a measuring resistor is connected in the primary circuit in the emitter line of the switching transistor 5 of the blocking oscillator 6, the variation in load in the secondary circuit appearing at the measuring resistor 7 as a current variation. The current change thus produced, causes a variation in the base bias of the transistor 10, the capacitor 12 having an integrating effect to avoid undesired effects due to interference pulses and abrupt load fluctuations.
The change of the working point of the transistor 10 causes a change in the pulse width in the blocking oscillator stage 4, as more fully shown in FIG. 3, so that the energy quantum transmitted via the isolating transformer 6 is such that the required voltages are present in the secondary circuit. It should also be mentioned that the load-dependent switch 8 and the circuit of FIG. 3 are represented only by way of illustration and that many circuit arrangements may be devised by straight-forward application of known principles for controlling the pulse width.

The circuit connected between the terminal 28 and the base of the switching transistor 24 serves as a part of a protective circuit for the picture tube. Any overcurrent is measured at the low-end resistor 31 of the high-voltage cascade in conventional techinque. The voltage thus produced is fed to the base of the switching transistor 24, and causes the television receiver to be switched over to stand-by operation, so that no damage can be done to the picture tube. Thus, the device performing the switching between normal operation and stand-by operation is advantageously and simultaneously utilized as a protective circuit. The circuit 23, as shown, provides for stabilizing the potential at the base of transistor 24 and for integrating such possibly occurring overload peaks as are not intended to triggering the protective circuit.
Using the circuit diagram according to FIG. 3 it is possible in a simple manner to control the pulse width of the blocking oscillator 4 in response to the switching circuit 8.
According to the circuit diagram of FIG. 2 the terminal U1 is connected to a line scan oscillator circuit 40, the terminal U2 to a picture scan oscillator circuit 41 and the terminal U3 to a circuit 42 for a sound output stage. The circuits 40, 41, 42 get their operating voltage from the terminal U3'. If the operating voltage U3' is zero, the circuits 40, 41, 42 are interrupted. In this case the voltages at the terminals U1, U2, U3 remain.

The described circuit of this invention for controlling the voltage in the secondary circuit of the isolating transformer 6 offers the advantage that it is exclusively arranged in the primary circuit, and, therefore, permits an uncomplicated design which is easy to realize. To control the pulse width by measuring the load fluctuations at the low-end resistor of the switching transistor 5, represents a very useful means for control since, thereby the transmitted energy can effectively and easily be controlled.
The blocking oscillator stage 4 shown in detail in FIG. 3 incorporates an externally triggered blocking oscillator arranged to be triggered through an oscillator operating preferably at the line scanning frequency, which is to say its wave form is not particularly critical and it should be provided with means to keep it in step with the line scanning frequency, as is known to be desirable. The transistors 51 and 52 of the triggered output stage of the blocking oscillator circuit could be regarded as constituting a differential amplifier the inputs of which are defined by the base connections of the respective transistors 51 and 52. The input voltage applied to the base connection of transistor 52 is the Zener voltage of the Zener diode 53, thus a constant reference voltage. The operating voltage for the transistors 51 and 52 and for the Zener diode 53 is obtained from the supply voltage U_B, which is to say from the rectifier 3. The diode 67 protects the transistor 52, for example at the time of the apparatus being switched on, against damage from an excessively high emitter-base blocking voltage. The capacitor 65 prevents undesired oscillation of the circuit of transistors 51 and 52, which could give rise to undesired disturbances.
At the base of the transistor 51, there is present as input voltage for the circuit a composite voltage that is the sum of three voltages. These are, first, the line scan frequency trigger voltage coupled through the capacitor 63; second, a bias voltage dependent upon the loading of the blocking oscillator stage resulting from the load on the secondary of the transformer 6, but detected by the voltage across the resistor 7 and actually controlled by the load-sensitive control circuit 8, and, third, a regulating voltage applied at the terminal 71 of the resistor 70, which regulating voltage is proportional to the voltage of the secondary winding of the transformer 6 and can accordingly be provided by one or another of the output circuits of the rectifier 14 of FIG. 1 or by a separate winding of the transformer 6 and a separate rectifier element connected in circuit therewith. This regulating voltage and the control voltage provided by the control circuit 8 are applied to the resistor 61 which completes the circuit for both of these bias voltages and their combined effect constitutes the bias voltage for the transistor 51 which determines its working point.
The circuit of the transistors 51 and 52 operates as an overdriven differential amplifier. When the trigger voltage exceeds the threshold determined by the base voltage of the transistor 51, the circuit produces an approximately rectangular output voltage pulse of constant amplitude. Since the trigger voltage is recurrent, the result is a periodic succession of rectangular output voltage pulses, but the duration or pulse width of these pulses depends upon the loading and the output voltage of the stage. The output voltage of the circuit constituted by the transistors 51 and 52 comes from the emitter connection of the transistor 52 and is furnished to the switching transistor 5, preferably through a driver stage 54, such as a transformer or another transistor stage for better matching of the circuit impedances. Of course, the collector circuit of the transistor 5 includes the primary winding of the transformer 6 of FIG. 1.

The described power supply unit thus represents a well functioning component subject to but a small number of potential sources of error, due to the simple design, and permits considerable reduction of costs in comparison with circuits and equipment heretofore known.












TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC

.SUPPLYVOLTAGE : 12V TYP .SUPPLYCURRENT : 50mATYP .I.F. INPUT VOLTAGE SENSITIVITY AT
F = 38.9MHz : 85mVRMS TYP .VIDEO OUTPUT VOLTAGE (white at 10% of
top synchro) : 2.7VPP TYP .I.F. VOLTAGE GAIN CONTROL RANGE :
64dB TYP .SIGNAL TO NOISE RATIO AT VI = 10mV :
58dB TYP .A.F.C. OUTPUT VOLTAGE SWING FOR
Df = 100kHz : 10V TYP
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
television receiversusing PNP or NPNtuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back)


TDA2590 horizontal oscillator combination

GENERAL DESCRIPTION
— The TDA2590 is a monolithic integrated circuit designed
as a horizontal oscillator combination for TV receivers and monitors.

It is constructed using the Fairchild Planar* process.
LINE OSCILLATOR USING THE THRESHOLD SWITCHING PRINCIPLE
PHASE COMPARISON BETWEEN SYNC PULSE AND OSCILLATOR VOLTAGE (d>1)
PHASE COMPARISON BETWEEN LINE FLYBACK PULSE AND OSCILLATOR VOLTAGE
(<62) Y
SWITCH FOR CHANGING THE FILTER CHARACTERISTIC AND THE GATE CIRCUIT
{WHEN USED FOR VCR)
COINCIDENCE DETECTOR (¢3)
SYNC SEPARATOR
NOISE SEPARATOR
VERTICAL SYNC SEPARATOR AND OUTPUT STAGE
COLOR BURST KEYING AND LINE FLYBACK BLANKING PULSE GENERATOR
PHASE SHIFTER FOR THE OUTPUT PULSE
OUTPUT PULSE DURATION SWITCHING
OUTPUT STAGE FOR DIRECT DRIVE OF THYRISTOR DEFLECTION CIRCUITS
SYNC GATING PULSE GENERATOR
LOW SUPPLY VOLTAGE PROTECTION.


ULTRASONIC REMOTE CONTROL RECEIVER NORDMENDE SPECTRA COLOR T9732 CHASSIS F6TT

An ultrasonic remote control receiver wherein an incoming ultrasonic signal is converted to square wave pulses of the same frequency by a Schmitt trigger circuit; digital circuits are thereafter used to count pulses resulting from the incoming signal over a predetermined period of time; a decoder activates one of a plurality of outputs in dependance to the number of pulses counted, provision is made to prevent interference signals from producing undesired control outputs.

1. An ultrasonic remote control receiver for applying a control signal to a selected one of a plurality of control channels in response to and dependent on the frequency of a received ultrasonic signal comprising:

2. An ultrasonic remote control receiver comprising:

3. An ultrasonic remote control receiver comprising:

4. The ultrasonic remote control receiver as defined in claim 3, wherein said means producing square pulses is a Schmitt trigger circuit and said means providing a signal input to said sequence controller is a retriggerable monostable multivibrator.

5. An ultrasonic remote control receiver comprising:

6. An ultrasonic remote control receiver comprising:

7. An ultrasonic remote control receiver as defined in claim 6 further comprising a monostable multivibrator between the output of said Schmitt trigger circuit and the remaining elements of said receiver.

8. An ultrasonic remote control receiver as defined in claim 6 further comprising a bistable multivibrator between the output of said Schmitt trigger circuit and the remaing elements of said receiver.

9. The ultrasonic remote control receiver as defined in claim 7 wherein the hold period of said monostable multivibrator is slightly less than one half the period of said square wave pulses from said Schmitt trigger circuit.

Description:

The invention relates to an ultrasonic remote control receiver for receiving signals having different useful frequencies each associated with a channel, comprising a plurality of outputs which are each associated with one of the channels and from which a control signal is emitted on receipt of a signal having the corresponding useful frequency.

To obtain the simplest possible transmitter construction in ultrasonic remote control, modulation of the emitted ultrasonic frequencies is not employed; to control different operations different frequencies are emitted which must be recognized in the receiver and evaluated for carrying out the different functions associated therewith. Presently, to recognize the different frequencies, use is made of resonant circuits, each of which contains one or more coils tuned in each case together with a capacitor to one of the useful frequencies.

These hitherto known receivers have numerous disadvantages. Thus, for example, before starting operation of the receiver a time-consuming alignment procedure must be carried out with which the resonant frequencies of the individual resonant circuits are set. Since it is inevitable that with time the resonant circuits become detuned, it may be necessary to repeat the alignment procedure.

A further disadvantage is that the known receivers cannot be made by integrated techniques because the coils used therein are not suitable for such techniques.

The problem underlying the invention is thus to provide an ultrasonic remote control receiver of the type mentioned at above which is extremely simple to set and in addition can be made by integrated techniques.

To solve this problem, according to the invention an ultrasonic remote control receiver of the type mentioned above contains a counter for counting the useful frequency oscillations received during a fixed measuring time, a sequence control device which determines the measuring time and which is started on receipt of a useful frequency, and a decoder comprising several outputs which is connected to the outputs of the counter, said decoder emitting a control signal at the output associated with the count reached at the end of the measuring time.

In the receiver constructed according to the invention the frequency emitted by the transmitter is identified by counting the oscillations received during a measuring time. The evaluation of the count reached at the end of the measuring time takes place in a decoder which emits a control signal at a certain output according to the count. The measuring time is fixed by a sequence control device which is set in operation on receipt of useful frequency signals.

In such a receiver the only quantity which has to be exactly fixed is the measuring time; it is therefore no longer necessary to align components to certain frequencies. Since no coils are required, the novel receiver can also be made up of integrated circuits.

A further development of the invention resides in that an interference identifying device is provided which on receipt of interference frequencies differing from the useful frequencies interrupts the operation of the sequence control device.

Hitherto known ultrasonic remote control receivers respond to any oscillation received if the frequency thereof has a value which excites a resonant circuit in the receiver. There is no way of distinguishing between oscillations received from the remote control transmitter and from interference sources.

Interfering ultrasonic oscillations may be due to many different causes. For example, noises such as hand clapping, rattling of short keys such as safety keys, operating cigarette lighters, rattling of crockery and the like cover a frequency spectrum reaching from the audio frequency range far into the ultrasonic region. The ultrasonic components may have the effect of simulating a useful frequency and cause an erroneous function in the receiver.

The interference identifying device according to the further development is constructed in such a manner that it recognizes oscillations having frequencies deviating from the useful frequencies and as a result of this recognition switches off the sequence control device. This switching off prevents the counter state reached from being passed to the decoder and consequently the latter cannot emit an erroneous control signal.

With this further development of the ultrasonic remote control receiver the operation of equipment such as radio and television sets is made extremely reliable and interference-free. During the operation of such a set it is no longer possible for the remote control to become operative, triggered by interference noises, eliminating for example the possibility of unintentional program or volume changes.

Examples of embodiment of the invention are illustrated in the drawings, wherein:

FIG. 1 shows a block circuit diagram of a remote control receiver according to the invention;

FIG. 2 is a diagram explaining the mode of operation of the circuit according to FIG. 1;

FIG. 3 shows another embodiment of the invention;

FIG. 4 is a diagram explaining the mode of operation of the circuit according to FIG. 3;

FIG. 5 is a diagram illustrating interference frequency identification in the circuit according to FIG. 3;

FIG. 6 shows a block circuit diagram of another embodiment of part of the circuit according to FIG. 3;

FIG. 7 is a diagram explaining the mode of operation of the embodiment according to FIG. 6;

FIG. 8 is a block circuit diagram of a further embodiment of a part of the circuit according to FIG. and, an

FIG. 9 is a diagram explaining the mode of operation of the embodiment according to FIG. 8.

The ultrasonic remote control receiver shown in FIG. 1 comprises an input 1 which is connected to an ultrasonic microphone intended to receive ultrasonic signals coming from a remote control transmitter. For each function to be performed by the receiver the remote control transmitter emits one of several unmodulated different useful frequencies which are spaced from each other a constant channel spacing Δ f and which all lie within a useful frequency band.

To obtain a signal which is as free as possible from noise at the input 1, a band filter and a limiting amplifier are preferably incorporated between the ultrasonic microphone and the input 1. The band filter may be made up of two active filters whose resonant frequencies are offset with respect to each other so that a pass band curve in the useful frequency band is obtained which is as flat as possible.

The input 1 leads to a Schmitt trigger 2 which converts the electrical signal applied thereto with the frequency of the ultrasonic signal to a sequence of rectangular pulses. The output 3 of the Schmitt trigger 2 is connected to the input 6 of a frequency divider 7 which is in operation for the duration of a control pulse applied to its control input 8 and divides the recurrence frequency of the pulses supplied thereto at the input 6 thereof in a constant division ratio. The output 9 of the frequency divider 7 is connected to the input 10 of a counter 11 which counts the pulses coming from the frequency divider 7. The counter 11 is a four-stage binary counter whose stage outputs are connected to the inputs of a store (register) 12 which is so constructed that on application of a control pulse to the input 12 thereof it takes on the counter state in the counter 11 and stores said counter state until the next pulse at the input 13. The stage outputs of the store 12 are fed to the inputs of a decoder 14 which decodes the counter state contained in the store 12 in such a manner that a control signal is emitted at that one of its outputs D0 to D9 which is associated with the decoded counter state.

The output 3 of the Schmitt trigger 2 is also connected to the input 4 of a monoflop 5 which is brought into its operating state by each pulse at the output 3 of the Schmitt trigger. It returns from this operating state to its quiescent state after expiration of a hold time depending on its intrinsic time constant if it does not receive a new pulse prior to expiration of this hold time. It is held in the operating state by each pulse received during the hold time until it finally flops back into the quiescent state when the interval between two successive pulses is greater than its hold time.

The output 15 of the monoflop circuit 5 is connected to the input 16 of a sequence control device 17 which is set in operation by the signal emitted in the operating state of the monoflop 5. Supplied to the sequence control device by 17 via a Schmitt trigger 18 at a control input 19 are pulses having a recurrence frequency derived from oscillations of the same frequency, for example, twice the mains frequency of 100 c/s, applied to the input 20. The sequence control device 17 is so constructed that in a cyclically recurring sequence in time with the pulses supplied to it at the input 19 it emits pulses at the outputs 21, 22 and 23 whose duration is equal to the period of the oscillation applied to the input 20. The output 21 of the sequence control device 17 is connected to the control input 8 of the frequency divider 7, the output 22 is connected to the control input 13 of the store 12 and the output 23 thereof is connected to the reset input 24 of the counter 11.

The mode of operation of the circuit of FIG. 1 will now be explained with the aid of the diagram of FIG. 2 which shows the variation with time of the signals at the output 3 of the Schmitt trigger 2 and at the inputs 16 and 19 as well as the outputs 21, 22 and 23 of the sequence control device 17.

It will be assumed that a useful frequency oscillation is being received at the input 1. The Schmitt trigger 2 then emits at the output 3 rectangular pulses whose recurrence frequency is equal to the frequency of said useful frequency oscillation. The first pulse emitted by the Schmitt trigger 2 puts the monoflop 5 into its operating state. The hold time of the monoflop 5 is so dimensioned that for all useful frequencies occurring it is longer than the recurrence period of the rectangular pulses emitted at the output 3. The monoflop 5 therefore remains in its operating state for as long as the useful frequency oscillation is applied to the input 1 and supplies to the control input 16 of the sequence control device 17 a control signal throughout this time.

Due to the control signal applied to the input 16 the sequence control device 17 emits at its outputs 21, 22 and 23 in time with the pulses supplied to it via the Schmitt trigger 18 at the input 19 mutually offset control pulse sequences, the duration of the control pulses being equal to the time interval of the leading edges of the pulses supplied at the input 19 and thus equal to the period of the oscillation applied to the input 20 and the pulse sequences being offset with respect to each other by one pulse duration. The control pulses emitted by the sequence control device 17 perform the following functions:

a. The first control pulse appearing at the output 21 sets in operation for its duration via the input 8 the frequency divider 7 so that the latter divides the recurrence frequency of the pulses supplied thereto from the Schmitt trigger 2 and thus the frequency of the useful frequency oscillations received in a constant ratio and passes counting pulses to the input 10 of the counter 11 with a correspondingly reduced recurrence frequency.

b. Via the input 13 the second pulse occurring at the output 22 causes the store 12 to take on and to store the count of the counter 11 reached at the end of the first control pulse.

c. The third control pulse appearing at the output 23 resets the counter 11 via the reset input 24.

COntrol pulse sequences continue to be emitted for as long as the monoflop 5 remains in its operating state.

Since the stage outputs of the store 12 are permanently connected to the inputs of the decoder 14, the store content is continuously being decoded. The decoder 14 therefore emits a control signal at the output which is associated with the count contained in the store.

During each group of three offset control pulses of the three control pulse sequences emitted by the sequence control device 17, the counter 11 receives counting pulses from the frequency divider 8 only for the duration of the control pulse of the first control pulse sequence emitted at the output 21. The duration of this control pulse thus determines the measuring time during which the oscillations of the useful frequency signal received are counted. Since the duration of the control pulses emitted by the sequence control device 17 is however equal to the period of the oscillation applied to the input 20, the measuring time is fixed by the period of said oscillation.

The frequency divider 7 is connected in front of the counter 11 so that a small capacity of the counter 11 is sufficient to obtain a clear indication of the received frequency even when the measuring time is so long that a large number of periods of the useful frequency oscillation is received during the measuring time. This is for example, the case when the oscillation supplied to the input 20 has twice the mains frequency. Since the frequency divider 7 divides the frequency of the useful frequency oscillations received in the constant ratio k, the counter 11 need count only the oscillations having a correspondingly reduced frequency. If the division ratio k of the divider 7 is so set that it is equal to the product of the measuring time t and channel spacing Δ f, only a frequency which differs by at least the channel spacing Δ f from a previously received frequency will change the count of the counter 11.

The purpose of the monoflop 5 is to prevent interference frequencies supplied to the input 1 from producing at one of the outputs D0 to D9 of the decoder 14 a control signal which could lead to an erroneous function of the equipment being controlled. The interference sources usually encountered emit a frequency spectrum whose components lie predominantly in the audio region, i.e., below the ultrasonic region. If the hold time of the monoflop 5 is set to a value slightly greater than the period of the smallest useful frequency but smaller than the period of the highest interference frequency occurring, the monoflop 5 returns to its quiescent state before the end of the period of an interference frequency. Since in this state no signal is supplied to the control input 16 of the sequence control device 17, the latter is put out of operation and consequently the received signal cannot be evaluated because the count of the counter 11 is not transferred to the store 12 and thus no decoding takes place.

To facilitate understanding of the invention, the function of the circuit of FIG. 1 will now be explained numerically by way of example. The channel spacing Δ f will be taken as 1,200 c/s so that for a frequen

cy of 100 c/s of the oscillation applied to the input 20 and thus a measuring time of 10 ms a division ratio of the frequency divider 7 of k = t ^. Δf = 12 results. It will further be assumed that ten different channel frequencies are to be evaluated; the counter 11 is therefore so connected that it has a capacity of 10. With these values, during the measuring time the counter 11 runs through several count cycles. This means that for the received frequency during the measuring time the counter 11 reaches its maximum count several times and then starts counting again from the beginning. The count reached at the end of the measuring time is however still a clear indication of the received useful frequency provided the number of useful frequencies having a channel spacing Δf is at the most equal to the counter capacity Z. The relationship between the useful frequency f received and the count reached at the end of each measuring time t while this useful frequency is being received is expressed by the following equation:

f = (k/t) ^. (n ^. Z + m + 0.5)

wherein

f = useful frequency received in c/s

t = measuring time in seconds

k = division ratio of the frequency divider 7

Z = capacity of the counter 11

n = number of count cycles passed through (integral)

m = count

The term 0.5 in brackets is a correction factor which ensures that a new count is reached whenever the received frequency differs at least by half the channel spacing Δf from the channel center frequency of the neighboring channel. With a channel spacing Δ of 1,200 c/s, a measuring time t of 10 ms, a division ratio k of the frequency divider 7 of 12, a capacity Z of the counter 11 of 10 and an input frequency f of 33 k c/s, the count 7 is for example reached after two complete count cycles. This is because the input frequency of 33 k c/s is first divided by 12 by the frequency divider 7 so that pulses having a recurrence frequency of 2.750 k c/s reach the input 10 of the counter 11. Since the frequency divider 7 emits counting pulses only during the measuring time of 10 ms, during said time only 27.5 pulses reach the input 10 of the counter 11. For this number of pulses the counter thus runs through two complete cycles and finally stops at the count 7. Similarly, for an input frequency of 39 k c/s the counter stops at the count 2 after passing through three complete counter cycles. With the numerical values given up to 10 different frequencies may be received without any ambiguity occurring in the evaluation.

FIG. 3 illustrates a further embodiment of an ultrasonic remote control receiver which differs from the embodiment described above primarily in that to fix the measuring time it is not necessary to supply a reference frequency. In the illustration of FIG. 3 the same reference numerals as in FIG. 1 are used for identical circuit components. The part of the circuit enclosed in the dashed line represents the sequence control device 17' which emits at its outputs 21', 22', 23' control signals which have substantially the same functions as the control signals emitted at the outputs 21, 22 and 23 of the sequence control device 17 of FIG. 1.

The useful frequency signal received is again supplied to the input 1. The input 1 is connected to the input of the Schmitt trigger 2 which again converts the input useful frequency oscillations into a sequence of pulses whose recurrence frequency is equal to the input useful frequency. The output 3 of the Schmitt trigger 2 is connected to the input B1 of a monoflop 25 which is contained in the sequence control device 17' and which is so constructed that it is switched to its operating state by a pulse received at the input B1 but during its hold time cannot be tripped again by any further pulse. The output 3 of the Schmitt trigger 2 is also connected to the input 26 of an AND gate 27 whose other input 28 is connected to that output 21' of the sequence control device 17' which is directly connected to the output Q1 of the monoflop 25. The output Q1 of the monoflop 25 which emits the signal complementary to the signal at the output Q1 is connected to the input B2 of a further monoflop 29 whose output Q2 is connected to the input A1 of the monoflop 25. The input 10 of the counter 11 is connected to the output of the AND gate 27. The stage outputs of the counter 11 are connected to the inputs of a gate circuit 30 which on receipt of a control pulse at its input 31 transfers the count contained in the counter 11 to the decoder 14 connected to its outputs. In the decoder 14 the count is then decoded in the manner already explained in conjunction with FIG. 1 so that a control signal is emitted at the output corresponding to the transferred count.

The output 3 of the Schmitt trigger 2 is further connected to the input 32 of an AND gate 33 which is contained in the sequence control circuit 17' and the other input 34 of which is connected to the output of a NOR gate 35. The output Q1 of the monoflop 25 is directly connected to one input 36 of the NOR gate 35 and is connected to the other input 37 via a delay member 38 and an inverter 39.

The output of the AND gate 33 represents the output 22' of the sequence control circuit 17' which is directly connected to the control input 31 of the gate circuit 30. In addition, the output of the AND gate 33 is directly connected to one input 40 of a NOR gate 41 and to the other input 42 thereof via a delay member 43 and an inverter 44. The output of the NOR gate 41 represents the output 23' of the sequence control circuit 17', to which output the reset input 24 of the counter 11 is connected.

The mode of operation of the circuit of FIG. 3 is explained in FIG. 4. Since the measuring time in the arrangement of FIG. 3 is substantially shorter than in the arrangement of FIG. 1, the time scale in FIG. 4 has been enlarged compared with FIG. 2 in order to clarify the illustration. When useful frequency oscillations are supplied to the input 1 of the receiver, pulses whose recurrence frequency is equal to the useful frequency appear at the output 3 of the Schmitt trigger 2. It will be assumed that the presence of a pulse corresponds to the logical signal value 1 whereas a pulse space represents the logical signal value 0. The leading edge of the first pulse at the output 3 puts the monoflop 25 into its operating state in which it emits the signal value 1 for the duration of its hold time at its output Q1, resulting in the control pulse at the output 21', which passes to the input 28 of the AND gate 27. Since the other input 26 of the AND gate 27 is directly connected to the output 3 of the Schmitt trigger 2, for the duration of each pulse at the output 3 the signal value 1 is also applied to the input 26 of the AND gate 27. Thus, the pulses occurring at the output 3 of the Schmitt trigger 2 are transferred for the duration of the control pulse at the output 21', i.e. during the hold time of the monoflop 25, as count pulses to the counter 11 and counted by the latter. The hold time of the monoflop 25 thus determines the measuring time; the capacity of the counter 11 must be greater than the number of pulses received during the measuring time for the greatest useful frequency. The count of the counter 11 reached at the end of the measuring time is then a clear indication of the received useful frequency.

When the monoflop 25 flops back into the quiescent state at the end of its hold time, it applies the signal value 0 via its output Q1 to the input 28 of the AND gate 27 so that no further count pulses can enter the counter 11. At the same time there appears at the output Q1 of the monoflop 25 the signal value 1 which at the input B2 puts the monoflop 29 into the operating state. In this state the monoflop 29 emits at its output Q2 the signal value 1 which blocks the monoflop 25 via the input A1 for the duration of the hold time of the monoflop 29 in such a manner that it cannot be switched into the operating state by pulses at the input B1. This is necessary to enable the sequence control device 17' to have sufficient time to generate the control pulses appearing at the outputs 22' and 23' for the transfer of the count or resetting of the counter.

With the return of the monoflop 25 to its quiescent state, the signal value 0 passes to the input 26 of the NOR gate 35 directly connected to the output Q1. During the operating state of the monoflop 25 the signal value 0 is applied with a delay determined by the delay member 38 via the inverter 39 to the input 37 of the NOR gate 35, said signal value 0 being replaced by the signal value 1 only after the delay time of the delay member 38 and not simultaneously with the flop back of the monoflop 25. Thus, for the duration of this delay time the signal value 0 is applied to both inputs 36 and 37 of the NOR gate 35 and consequently for this period of time the signal value 1 appears at the output of the NOR gate 35. The circuits 35, 38, 39 thus effect the generation of a short pulse which immediately follows the return of the monoflop 25 and the duration of which is determined by the delay of the delay member 38. This pulse is applied to the input 34 of the AND gate 33 (FIG. 4). The same effect could obviously alternatively be obtained with a monoflop which is tripped by the signal at the output Q1 changing from the value 1 to the value 0.

Now, if during this time a pulse is emitted at the output 3 of the Schmitt trigger 2, i.e., a signal value 1 is at the input 32 of the AND gate 33, said gate supplies to the control input 31 of the gate circuit 30 a control pulse for the duration of the delay of the delay member 38. This control pulse opens the gate circuit so that it allows the count reached at the end of the hold time of the monoflop 25 to pass to the decoder 14. The latter then emits a control signal at the output associated with this count. The signal value 1 present at the output of the AND gate 33 during the delay of the delay member 38 also passes directly to the input 40 of the NOR gate 41, at the other input 42 of which the signal value 0 is applied for the duration of the same pulse but with a delay determined by the delay member 43. Thus, in a manner similar to the circuits 35, 38, 39 the circuits 41, 43, 44 produce a short pulse which immediately follows the end of the output pulse of the AND gate 33 and appears at the output 23' of the sequence control circuit and is applied to the reset input 24 of the counter 11 (FIG. 4). This pulse resets the counter 11.

The hold time of the monoflop 29 is so set that it flops back into its quiescent state again only when the transfer process from the counter to the decoder via the gate circuit and the resetting of the counter has been effected. When the monoflop 29 returns to its quiescent state, it emits at its output Q2 the signal value 0 which brings the monoflop 25 via the input A1 thereof into such a condition that it can again be brought into its operating state by a pulse at the output 3 of the Schmitt trigger 2. In this manner the measuring and evaluating periods can be repeated for as long as useful frequency oscillations are supplied to the input 1.

In the circuit according to FIG. 3, interference frequencies are suppressed by setting a certain hold time of the monoflop 25. It is apparent from the above description of the function that the transfer of the count of the counter 11 to the decoder 14 takes place immediately following the end of the hold time of the monoflop 25, i.e., immediately following the end of the measuring time. However, a control signal initiating the transfer can be applied by the AND gate 33 to the control input 31 of the gate circuit 30 only when simultaneously with the end of the measuring time a pulse, i.e., the signal value 1, is present at the output 3 of the Schmitt trigger 2. Now, if the hold time of the monoflop 25 is made equal to the reciprocal of the channel spacing Δf, this coincidence at the AND gate 33 at the end of the measuring time occurs only when quite definite frequencies are applied to the input 1; these frequencies lie only within frequency bands which in the example described here, in which the output pulses of the Schmitt trigger 2 have a pulse duty factor of 1:2, have the width of half a channel spacing. These frequency bands each contain one of the useful frequencies. Between these frequency bands there are gaps having the width of half the channel frequency and frequencies falling in these gaps do not produce coincidence at the AND gate 33 and consequently cannot be evaluated by transfer of the count of the counter 11 to the decoder 14. Thus, frequency windows are formed over the entire frequency range which can occur at the input 1 and only frequencies lying within these windows are treated by the circuit according to FIG. 3 as useful frequencies. All intermediate frequencies are recognized as interference frequencies and excluded from evaluation.

If the measuring time is made exactly equal to the reciprocal of the channel spacing the frequency bands in which evaluation takes place are such that the rated frequencies of the signals transmitted by the transmitter are disposed at the lower end of the frequency bands. Thus, in this case only frequencies starting from a rated frequency in each case and extending up to the frequency in the center between two channels would be evaluated as useful frequencies. Since the frequency of the signals emitted by the transmitter can however also fluctuate below the rated frequency, it is desirable to place the frequency bands in which evaluation takes place so that the rated frequencies lie substantially in the center of the bands. To achieve this, the hold time of the m

onoflop 25 and thus the measuring time is lengthened by a quarter of the reciprocal of the maximum rated frequency. Although with this setting only the maximum rated frequency lies exactly in the center of the corresponding frequency band, the other rated frequencies still lie within the corresponding frequency bands and consequently the frequencies of the useful signals can also deviate from the rated frequency downwardly without preventing evaluation. The frequency gaps including the frequencies treated as interference frequencies then lie in each case substantially in the center between two rated frequencies.

To facilitate understanding of the type of interference identification just outlined attention is drawn to FIG. 5; the latter shows at Q1 the output signal of the monoflop 25 determining the measuring time, at 3-F1, 3-F2, 3-F3 the pulse sequences appearing at the output 3 of the Schmitt trigger 2 for three different useful frequencies F1, F2, F3 and at 3-FS the pulse sequence which appears at the output 3 when an interference frequency FS is received which lies between the useful frequencies F2 and F3. It is apparent from this diagram that at the end of the measuring time a pulse is present at the output 3 of the Schmitt trigger only when useful frequencies are being received and that when an interference frequency is applied there is a pulse space at the end of the measuring time. Thus, at the AND gate 33 the presence of a pulse at the end of the measuring time is employed as criterion for the receipt of a useful frequency. It is also apparent from FIG. 5 that with the useful frequency F1 the counter 11 counts 4 pulses, with the useful frequency F2 up to 5 pulses and with the useful frequency F3 6 pulses.

Isolated short interference pulses which could reach the input 1 of the circuit of FIG. 3 between two useful pulses and undesirably increase the count may be made ineffective by inserting a flip-flop circuit 45 between the output 3 of the Schmitt trigger 2 and the rest of the circuit as illustrated in FIG. 6. The mode of operation of this flip-flop circuit 45 will be explained with the aid of FIG. 7, which shows the signals at the output 3 of the Schmitt trigger 2 and at the output 3a of the flip-flop circuit 45 firstly without interference and secondly with interference. The flip-flop circuit 45 is tripped by the leading edge of each output pulse of the Schmitt trigger 2. If a short interference pulse is received, the flip-flop circuit 45 supplies at its output 3a the signal value 0 for example on receipt of the useful pulse preceding the interference pulse, the signal value 1 on receipt of the interference pulse and the signal value 0 on receipt of the next useful pulse. If no interference pulse had occurred, the flip-flop circuit would not have been switched to the signal value 1 at the output until receipt of the next useful pulse. The flip-flop circuit thus effects on receipt of an interference pulse (and in general on receipt of an odd number of interference pulses) between two useful pulses a reversal of the signal values so that at the end of the measuring time coincidence is not reached at the gate 33 although a useful frequency was received. Without the flip-flop circuit 45 the count would be transferred, although because of the interference pulse received it would not correspond to the useful frequency received.

The embodiment of FIG. 3 differs from the embodiment of FIG. 1 also in that instead of the store (register) 12 the gate circuit 30 is used that allow the count to be evaluated to pass briefly only once in a measuring and evaluating time. Thus, at the output of the decoder 14, instead of a uniform signal as in the case of the embodiment of FIG. 1, a series of pulses appears with the spacing of the control signals at the input 31 of the gate circuit 30. The use of a gate circuit instead of a store is suitable in applications where the equipment to be controlled must be actuated with control pulses and not with a uniform signal.

The immunity to interference may be further increased if in accordance with FIG. 8 a further monoflop 46 which cannot be triggered again during its hold time is inserted between the output 3 of the Schmitt trigger 2 (or the output 3a of the flip-flop circuit 45 of FIG. 6) and the remainder of the circuit. This hold time is set to half the period of the highest useful frequency. This modification is effective against a particular type of interferences, i.e., cases where an amplitude break occurs within an oscillation at the input 1 of the Schmitt trigger 2; this break would lead at the output 3 of the Schmitt trigger to the emission of two pulses instead of the single pulse per oscillation emitted in the normal case. These two pulses give the same effect as the receipt of a frequency which is twice as high and consequently without the additional monoflop 46 erroneous evaluations could arise. However, the monoflop 46 prevents the two pulses from becoming separately effective because it always emits pulses having the duration of its hold time; short double pulses which can arise due to amplitude breaks in the received signal thus cannot have any effect. FIG. 9 shows the action of the monoflop 46 when an amplitude break occurs at the input 1 of the Schmitt trigger 2 which produces a double pulse at the output 3 of the Schmitt trigger. As is apparent, the pulses at the output 3b of the monoflop 46 are not affected by this double pulse.

One embodiment of the remote control receiver may also reside in that a sequence control counter fed by the pulses at the output of the Schmitt trigger 18 is used for the sequence control device 17 of FIG. 1; the stage outputs of said counter are connected to a decoder which is so designed that it activates one after the other one of its outputs for each count. Thus, for example, this decoder may have 10 outputs which are activated successively in each counting period of the sequence control counter. Since in accordance with the description of the example of embodiment of FIG. 1 a total of three control signals are required for the evaluation of the frequency received, the output signals at the fourth, fifth and seventh outputs may be used respectively for activating the frequency divider 7, opening the store 12 and resetting the counter 11. Since in this case the evaluation of the received frequency by the control pulses emitted from the output of the decoder of the sequence control device does not begin until the decoder emits a signal at its fourth output, there is an evaluation delay which has the advantage that short interference pulses produce no response in the receiver.

The advantageous formation of frequency band windows are used in the embodiment of FIG. 3 can also be applied in the embodiment of FIG. 1 if instead of the retriggerable monoflop 5 a monoflop is used which has no dead time and which is not retriggerable again during its hold time which as in the monoflop 35 of FIG. 3 is made equal to the reciprocal of the channel spacing Δ f. This monoflop thus always flops back into its quiescent state when there is a pulse pause at its input at the end of its hold time whereas it is returned to its operating state practically without dead time by a pulse applied to its input at the end of the hold time. Since a pulse at the input of the monoflop at the end of its hold time however occurs only for frequencies lying within the frequency bands mentioned in connection with the description of FIG. 3, only frequencies which lie within the frequency bands can be treated as useful frequencies. For all intermediate frequencies, the monoflop returns to its quiescent state in which it interrupts the sequence control device and thus prevents evaluation of said frequencies. For the same reasons as in the circuit of FIG. 3, in this case as well the hold time of the monoflop should be lengthened by a quarter of the reciprocal of the highest useful frequency.

The ultrasonic remote control receiver described above can be used not only to control television sets, radio sets and the like but is particularly suitable also for industrial use in which high immunity to interference is very important. It may, for example, be used for remote control of cranes on large building sites, where there are a great number of different interference sources. The ultrasonic remote control receiver according to the above description is so immune to interference that it operates satisfactorily even under the difficult conditions encountered in the aforementioned use.

The following table provides examples of integrated circuits from Texas Instruments Incorporated which may be used in the foregoing invention.

______________________________________ Schmitt-triggers 2 and 18 SNX 49713 Monoflops 25, 29 and 46 SN 74121 Monoflop 5 SN 74122 Frequency divider 7 SN 7492 Counter 11 SN 7490 Store 12 SN 7475 Control 17 SN 7476 Gate 30 SN 7432 Decoder 14 SN 7442 ______________________________________




NORDMENDE SPECTRA COLOR T9732 CHASSIS F6TT Receiver tuning circuit with automatic search and AFC using common capacitor:

Signal-seeking tuning systems are well known for their convenience and ease of operation, especially in the field of radio and television receivers. They are commonly used to provide automatic tuning to the next higher or lower frequency of interest in response to a user-operated initiating mechanism (typically a momentary-contact switch). The advent of solid-state, voltage-dependent variable-reactance devices has permitted substantial improvement in signal-seeking tuning systems because of the consequent elimination of electric motors and other moving parts, thereby increasing efficiency and decreasing the number of malfunctions resulting from mechanical wear, dirt accumulation, and contact corrosion.

The most common type of voltage-dependent variable-reactance device is a diode which has an interelectrode capacitance directly proportional to its reverse-bias voltage, commonly referred to as a "Varicap" or "varactor" diode. By placing one or more such diodes in the frequency-selecting portion of a tuner, station selection may be achieved by progressively increasing or decreasing the voltage applied to the diode(s) until the desired frequency is obtained. Moreover, by combining a varactor-diode tuner with a progressively variable DC control voltage generator, a signal detector, and a feedback control loop, a satisfactory solid-state signal-seeking system may be created.

In conventional signal-seeking systems employing varactor diodes, however, a temporary loss of signal resulting from "airplane flutter," transmitter failure, etc., or even receiver deenergization, varies (or eliminates) the control voltage and/or interrupts the recognition signal from the signal detector and therefore sends the system seeking for a new station. The addition of complex delay circuitry for temporarily maintaining the DC control voltage not only adds appreciable cost to the system but also does not compensate for the loss of control voltage due to receiver deenergization such as when the receiver is turned off for a while.

It is therefore an object of the invention to provide a new and improved signal-seeking system for a voltage-controlled tuner.

It is a more specific object of the invention to provide such a new and improved signal-seeking tuning system which is immune to undesired signal-seeking resulting from a temporary loss of signal or receiver deenergization.


A station finder which switches to automatic frequency control during automatic finding in case of reception of a transmitter and, if desired, continues to find a transmitter some time later with the frequency control switched off.
1. A receiver tuning circuit f

or a tuner comprising means for detecting the presence of a received signal having an input means for coupling to said tuner; a search tuning circuit having a capacitor means for a tuning voltage for said tuner, and an automatic frequency control circuit coupled to said capacitor, said tuning circuit and said automatic frequency control circuit charging said capacitor when activated; an operating device means coupled to said detecting means and said search tuning circuit for activation of said search tuning circuit and for subsequent deactivation of said search tuning circuit and activation of said automatic frequency control circuit upon detection of a received signal; and time constant circuit means coupled between said detecting means and said operating device means for repeatedly activating said search tuning circuit and deactivating said automatic frequency control circuit a selected time after said search tuning circuit has been deactivated.

2. A receiver tuning circuit as claimed in claim 1, wherein said operating device has a supply lead and the time constant circuit is coupled to the supply lead of the operating device.

3. A receiver tuning circuit as claimed in claim 1, wherein the detection circuit is coupled to an output of a frequency detector and includes a means for preventing pulling in on the same transmitter upon activation of said search tuning circuit.

Description:

The invention relates to a receiver tuning circuit including a search tuning circuit which can be activated by a control device in which the search tuning circuit is automatically switched off when a received station is detected by a detection circuit and an automatic frequency control circuit is switched on, and in which a time constant circuit changes the state of the receiver tuning circuit after a certain time.
A receiver tuning circuit of the kind described above is known from German Offenlegungsschrift 2,023,352 which after activation of the search tuning stops the search action when a transmitter transmitting a pilot signal is received and switches on an automatic frequency control circuit. The search tuning circuit must again be a

ctivated when the received transmitter is not desired. When a transmitter without a pilot signal is received, the search tuning circuit switches over to a slowed down searching action and the automatic frequency control remains switched off. The tuning circuit includes a time constant circuit which renders the detection circuit for the pilot signal inactive some time after the finder has been activated so that the circuit can then pull in on transmitters without a pilot signal.
This known tuning circuit is only suitable for special receivers. An object of the invention is to provide a tuning circuit which is more suitable for other receiver types.
To this end a receiver tuning circuit of the kind described in the preamble according to the invention is characterized in that the time constant circuit is incorporated in the tuning circuit in such a manner that again and again it switches on the search tuning circuit a certain time after having automatically switched it off and switches off the automatic frequency control as long as the search tuning circuit is maintained operative with the aid of the operating device.
By using the step according to the invention a receiver is obtained which upon activation of the search tuning circuit receives without distortion transmitter after transmitter each during a time determined by the time constant circuit. The search tuning can be rendered inactive with the aid of the operating device after the desired station has been found. The tuning circuit is very suitable for radio or television receivers for domestic use.



Method and system for increasing the number of instructions transmitted in digital systems, I.A. in systems for remote control of television receiver:ITT VOLTAGE SYNTHESIZER TUNING SEARCH SYSTEM NORDMENDE SPECTRA COLOR T9732 CHASSIS F6TT

Method of increasing the number of instructions according to the invention consists therein that withing the command signal (6) additional instructions are transmitted, which after being decoded in the instruction decoder (1) and processed in the strobbin signal generation circuit (4) strobes the operation of additional controlled units (5) and control the transmission of the signal through the register (2) to the controlled units (3).
In the system according to the invention, between one of the outputs od the instruction decoder (1) and the unit (3) to be controlled the register (2) is connected, provided with an additional input for the record inhibiting instruction (10), whereas to the second output of the instruction decoder (1) the strobbing signal generation circuit (4) is connected aimed at controlling the additional controlled units (5). The register (2) and the strobbing signal generation circuit (4), employed in the system according to the invention, can be built-in into each of the integrated circuits or made in form of a separate integrated circuit.

1. A method of increasing the number of instructions transmitted in remote control systems of television receivers and the like in which decoded signals directly control receiving units, comprising transmitting coded instructions in a command signal (6), decoding said instructions into a first part of an instruction signal (8), processing said first part of the instruction signal (8) in a strobing signal generation circuit (4) to provide a first signal (10) in a form for enabling the transmission of a control signal (7) through a register (2) in the form of a stored signal (11) to first receiving units (3) to be controlled while simultaneously providing a second signal (9) in a form for blocking the reception of one of said instruction signal (8) and said control signal (7) by additional receiving units (5) to be controlled, transmitting an additional coded instruction in said command signal, decoding said additional instruction into a second part of the instruction signal (8), processing said second part of the instruction signal (8) in said strobing signal generation circuit (4) to provide said first signal (10) in a form for blocking further storage of said control signal (7) in said register (2) while simultaneously providing said second signal (9) in a form for enabling the reception of said one of said instruction signal (8) and said control signal (7) by said additional receiving units (5) to be controlled, and transmitting a coded erasing instruction in said command signal for restarting the method. 2. A method according to claim 1, wherein the controlling of said additional receiving units (5) by one of said instruction signal (8) and said control signal (7) is performed while controlling said first receiving units (3) by said stored signal (11). 3. A system for increasing the number of instructions transmitted in remote control systems of television receivers and the like, comprising an instruction decoder (1), a first unit (3) to be controlled, a main register (2) connected between a first output of said instruction decoder and said first unit, an additional unit (5) to be controlled, and a strobing generation circuit (4) connected to a second output of said instruction decoder for controlling said additional unit, said additional unit having respective inputs connected to a strobing signal output of said strobing generation circuit and one of said first and second outputs of said instruction decoder. 4. A system according to claim 3, wherein said strobing generation circuit (4) has an inhibiting signal output (10) connected to an input of said main register (2) for inhibiting the storage in said main register of signals received from said first output of said instruction decoder. 5. A system according to claim 3, wherein said strobing generation circuit (4) includes an internal decoder (12), an internal register (14) and an adding gate (25), said internal decoder having outputs (13,15,16,17,18) connected to said internal register, said internal register having outputs (19-22) connected to said additional unit (5) and to said adding gate, said adding gate providing said inhibiting signal output (10) both to said main register (2) and to an inhibit input of said internal register.

Description:

This invention relates to a method and a system making it possible to increase the number of instructions transmitted in systems of remote control of television or radio receivers, and the like.
One of

the known remote control systems is a system based on integrated circuits of the firm ITT. Similarly as in other systems, the instructions transmitted remotely are coded by a transmitter, for instance SAA1024, in an electric signal modulating a wave being able to propagate in the environment. In the receiver for instance SAA 1130, the coded electric signal is received and gives at its outputs the completely decoded output information signal and decoded output control signals.
In known application notes of the firm ITT the decoded output control signals control directly the receiving devices SAA1021, SAA1020. The decoder of information transmits also other decoded control signals, for instance analog adjustment signals, turning a signal on the power supply, and other signals necessary for the operation of the system. A certain part of the total number of instructions transmitted in the coded input signal constitutes a group of additional instructions for decoding by an additional instructions decoder controlled by the output signal.
The method of increasing the number of instructions transmitted in digital systems, i.a. in remote control systems of television receivers, according to the invention comprises transmitting in the control signal additional instructions which, on being decoded in an instruction decoder and after processing in a circuit for generating strobing signals, strobe the operation of additional controlled devices and control the transmission of the control signal through a register to main controlled units. In the system according to the invention two variants of operation of the system are distinguished. In the first variant an inhibiting signal coming out of the strobing signal generation circuit enables storage by the register of the real values being decoded, the output control signals, and controls with a suitable signal the main controlled units, while blocking by another suitable signal the additional controlled devices. In the second variant of the method according to the invention, after transmission of the additional instruction in the input signal, the storage inhibiting signal inhibits the register which stores the previous instruction and interruptedly controls the controlled unit, whereby simultaneously another strobing signal enables the additional controlled units to receive the controlling instruction.
In the system according to the invention the controlling of additional units is performed in the course of uninterrupted operation of controlled units.
In the system for increasing the number of instructions transmitted in digital systems, i.a. in remote control systems of television receivers, according to the invention, between one output of the instruction decoder and first controlled units a register is connected, having an additional input for a recording inhibiting signal, whereas to another output of the instruction decoder a strobing signal generation circuit is connected for controlling additional controlled units.
The inputs of the additional controlled units are connected with any outputs of the instruction decoder and with outputs of a register of the strobing circuit. The register and the strobing generation circuit, employed in the system according to the invention, can be built-in in one integrated circuit or may be made in the form of separate integrated circuits.
Referring to the aforementioned system of the firm ITT, the list of instructions thereof comprises 10 instructions used for basic servicing of the television receivers, 16 instructions for program se

lection and 5 additional instructions. In the method according to the invention, by using all the additional instructions, additionally 5×16 instructions are obtained. The number of all useful instructions in the method according to the invention amounts to 10+16+5×16=106 instructions, and thus by 75 instructions more than it was foreseen by the manufacturer of said systems.
Employing of the method and the system in a simple constructional arrangement enables one to multiply the number of transmitted signals, and simultaneously the number of units to be controlled. With reference to the system of the firm ITT, based on integrated circuits SAA1024, SAA1130, SAA1021, SAA1020, this enables one to employ additionally a teletext, a time programmer, an electronic watch, remote control of a radio receiver, tuning of a second head to observe another program, and other uses that were not possible and not foreseen by the manufacturer of said circuits.
The method and system according to the invention will be now described by means of an exemplary embodiment with reference to the accompanying drawing, wherein:
FIG. 1 is the block diagram of the system, and
FIG. 2 is the connection diagram of the strobing circuit.
The system of an instruction invention consists of the decoder 1, one output of which is connected through a register 2 with units 3 to be controlled. Another output of the instruction decoder 1 is connected with a strobing signal generation system 4 to the output of which is connected an additional controlled unit 5 having inputs connected with either output of the decoder 1.
The strobing circuit 4 is equipped with a decoder 12 an output 13 of which is connected with the clearing input of a register 14, and outputs 15, 16, 17, 18 of which are connected with the recording inputs of the register 14. The registers outputs 19, 20, 21, and 22, however, are connected with the additional unit 5 (FIG. 1) and with an adding gate 23, the output 10 of which is connected with the record inhibiting input of the register 14 and with the record inhibiting input of the register 2.
In the method according to the invention, the control signal 6 received by the instruction decoder 1 is decoded into groups of instructions 7 and 8. The instructions 8 after being processed in the strobing signal generating circuit 4 strobe the operation of additional devices 5 in the form of a signal 9, and in the form of the inhibiting signal 10 they control the operation of the register 2. A part of instructions 8, after processing in the strobbing circuit 4, enables with the signal 10 the transmission of the instructions 7 through the register 2 to the controlled units 3 in the form of the decoded control signal 11. Simultaneously, the decoded instruction 8 blocks with the strobing signal 9 the receiving of instructions 7 or 8 by the additional units 5 to be controlled. After transmitting the additional information from the second part of the instructions 8 in the signal 6, the instruction 8 after processing in the strobing signal generating circuit 4 blocks with the signal 10 the register 2, which stores the previous signal 7 and uninterruptedly controls the units 3 to be controlled, and simultaneously enables the additional controlled units 5 to receive instructions 7 or 8. The transmission of an erasing instruction in the signal 6 causes the return to the previous way of transmission and the turning off of the additional units 5.
The controlling of additional units 5 in the method according to the invention by means of the signal 7 or 8 is performed in the course of uninterrupted controlling of the units 3 by means of the signal 11 from the register 2.

 

 

CRT   TV EHT VOLTAGE MULTIPLIER - KASKADE COCKCROFT-WALTON CASCADE CIRCUIT FOR VOLTAGE MULTIPLICATION:

A Cockcroft-Walton cascade circuit comprises an input voltage source and a pumping and storage circuit with a series array of capacitors with pumping and storage portions of the circuit being interconnected by silicon rectifiers, constructed and arranged so that at least the capacitor nearest the voltage source, and preferably one or more of the next adjacent capacitors in the series array, have lower tendency to internally discharge than the capacitors in the array more remote from the voltage source.


1. An improved voltage multiplying circuit comprising,

2. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor is a self-healing impregnated capacitor which is impregnated with a high voltage impregnant.

3. An improved voltage multiplying circuit in accordance with claim 1 wherein said first pumping capacitor comprises a foil capacitor.

Description:
BACKGROUND OF THE INVENTION

The invention relates in general to Cockcroft-Walton cascade circuits for voltage multiplication and more particularly to such circuits with a pumping circuit and a storage circuit composed of capacitors connected in series, said pumping circuits and storage circuit being linked with one another by a rectifier circuit whose rectifiers are preferably silicon rectifiers, especially for a switching arrangement sensitive to internal discharges of capacitors, and more especially a switching arrangement containing transistors, and especially an image tube switching arrangement.

Voltage multiplication cascades composed of capacitors and rectifiers are used to produce high D.C. voltages from sinusoidal or pulsed alternating voltages. All known voltage multiplication cascades and voltage multipliers are designed to be capacitance-symmetrical, i.e., all capacitors used have the same capacitance. If U for example is the maximum value of an applied alternating voltage, the input capacitor connected directly to the alternating voltage source is charged to a D.C. voltage with a value U, while all other capacitors are charged to the value of 2U. Therefore, a total voltage can be obtained from the series-connected capacitors of a capacitor array.

In voltage multipliers, internal resistance is highly significant. In order to obtain high load currents on the D.C. side, the emphasis in the prior art has been on constructing voltage multipliers with internal resistances that are as low as possible.

Internal resistance of voltage multipliers can be reduced by increasing the capacitances of the individual capacitors by equal amounts. However, the critical significance of size of the assembly in the practical application of a voltage multiplier, limits the extent to which capacitance of the individual capacitors can be increased as a practical matter.

In television sets, especially color television sets, voltage multiplication cascades are required whose internal resistance is generally 400 to 500 kOhms. Thus far, it has been possible to achieve this low internal resistance with small dimensions only by using silicon diodes as rectifiers and metallized film capacitors as the capacitors.

When silicon rectifiers are used to achieve low internal resistance, their low forward resistance produces high peak currents and therefore leads to problems involving the pulse resistance of the capacitors. Metallized film capacitors are used because of space requirements, i.e., in order to ensure that the assembly will have the smallest possible dimensions, and also for cost reasons. These film capacitors have a self-healing effect, in which the damage caused to the capacitor by partial evaporation of the metal coating around the point of puncture (pinhole), which develops as a result of internal spark-overs, is cured again. This selfhealing effect is highly desirable as far as the capacitors themselves are concerned, but is not without its disadvantages as far as the other cirucit components are concerned, especially the silicon rectifiers, the image tubes, and the components which conduct the image tube voltage.

It is therefore an important object of the invention to improve voltage multiplication cascades of the type described above.

It is a further object of the invention to keep the size of the entire assembly small and the internal resistance low.

It is a further object of the invention to increase pulse resistance of the entire circuit.

It is a further object of the invention to avoid the above-described disadvantageous effects on adjacent elements.

It is a further object of the invention to achieve multiples of the foregoing objects and preferably all of them consistent with each other.

SUMMARY OF THE INVENTION

In accordance with the invention, the foregoing objects are met by making at least one of the capacitors in the pumping circuit, preferably including the one which is adjacent to the input voltage source, one which is less prone to internal discharges than any of the individual capacitors in the storage circuit.

The Cockcroft-Walton cascade circuit is not provided with identical capacitors. Instead, the individual capacitors are arranged according to their loads and designed in such a way that a higher pulse resistance is attained only in certain capacitors. It can be shown that the load produced by the voltage in all the capacitors in the multiplication circuit is approximately the same. But the pulse currents of the capacitors as well as their forward flow angles are different. In particular, the capacitors of the pumping circuit are subjected to very high loads in a pulsed mode. In the voltage multiplication cascade according to the invention, these capacitors are arranged so that they exhibit fewer internal discharges than the capacitors in the storage circuit.

The external dimensions of the entire assembly would be unacceptably large if one constructed the entire switching arrangement using such capacitors.

The voltage multiplication cascade according to the invention also makes it possible to construct a reliably operating

arrangement which has no tendency toward spark-overs, consistent with satisfactory internal resistance of the voltage multiplication cascade and small dimensions of the entire assembly. This avoids the above cited disadvantages with respect to the particularly sensitive components in the rest of the circuit and makes it possible to design voltage multiplication cascades with silicon rectifiers, which are characterized by long lifetimes. Hence, a voltage multiplication cascade has been developed particularly for image tube circuits in television sets, especially color television sets, and this cascade satisfies the highest requirements in addition to having an average lifetime which in every case is greater than that of the television set.

A further aspect of the invention is that at least one of the capacitors that are less prone to internal discharges is a capacitor which is impregnated with a high-voltage impregnating substance, especially a high-voltage oil such as polybutene or silicone oil, or mixtures thereof. In contrast to capacitors made of metallized film which have not been impregnated, this allows the discharge frequency due to internal discharges or spark-overs to be reduced by a factor of 10 to 100.

According to a further important aspect of the invention, at least one of the capacitors that are less prone to internal discharges is either a foil capacitor or a self-healing capacitor. In addition, the capacitor in the pumping circuit which is adjacent to the voltage source input can be a foil capacitor which has been impregnated in the manner described above, while the next capacitor in the pumping circuit is a self-healing capacitor impregnated in the same fashion.

Other objects, features and advantages of the invention will be apparent from the following detailed description of preferred embodiments, taken in connection with the accompanying drawing, the single FIGURE of which:

BRIEF DESCRIPTION OF THE DRAWING

is a schematic diagram of a circuit made according to a preferred embodiment of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The voltage multiplier comprises capacitors C1 to C5 and rectifiers D1 to D5 connected in a cascade. An alternating voltage source UE is connected to terminals 1 and 2, said voltage source supplying for example a pulsed alternating voltage. Capacitors C1 and C2 form the pumping circuit while capacitors C3, C4 and C5 form the storage circuit.

In the steady state, capacitor C1 is charged to the maximum value of the alternating voltage UE as are the other capacitors C2 to C5. The desired high D.C. voltage UA is picked off at terminals 3 and 4, said D.C. voltage being composed of the D.C. voltages from capacitors C3 to C5. Terminal 3 and terminal 2 are connected to one pole of the alternating voltage source UE feeding the circuit, which can be at ground potential. In the circuit described here, a D.C. voltage UA can be picked off whose voltage value is approximately 3 times the maximum value of the pulsed alternating voltage UE. By using more than five capacitors, a correspondingly higher D.C. voltage can be obtained.

The individual capacitors are discharged by disconnecting D.C. voltage UA. However, they are constantly being recharged by the electrical energy supplied by the alternating voltage source UE, so that the voltage multiplier can be continuously charged on the output side.

According to the invention, in this preferred embodiment, capacitor C1 and/or C2 in the pumping circuit are designed so that they have a lower tendency toward internal discharges than any of the individual capacitors C3, C4 and C5 in the storage circuit.

It is evident that those skilled in the art, once given the benefit of the foregoing disclosure, may now make numerous other uses and modifications of, and departures from the specific embodiments described herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in, or possessed by, the apparatus and techniques herein disclosed and limited solely by the scope and spirit of the appended claims.

Inventors:Petrick, Paul (Landshut, DT)
Schwedler, Hans-peter (Landshut, DT)
Holzer, Alfred (Schonbrunn, DT)
ERNST ROEDERSTEIN SPEZIALFABRIK

US Patent References:
3714528    ELECTRICAL CAPACITOR WITH FILM-PAPER DIELECTRIC    1973-01-30    Vail    
3699410    SELF-HEALING ELECTRICAL CONDENSER    1972-10-17    Maylandt    
3463992    ELECTRICAL CAPACITOR SYSTEMS HAVING LONG-TERM STORAGE CHARACTERISTICS    1969-08-26    Solberg    
3457478    WOUND FILM CAPACITORS    1969-07-22    Lehrer    
3363156    Capacitor with a polyolefin dielectric    1968-01-09    Cox    
2213199    Voltage multiplier    1940-09-03    Bouwers et al.