SABA ULTRACOLOR " Festival " SABA 150 Anniversary Limited edition CHASSIS ICC5 (5103) UNITS VIEW.

- VIDEO CHROMA UNIT 550162.01.000 WITH TDA4556 + U4647 - DIGITAL SOUND UNIT 550168 00.000 301743 0 000 592.750 85918 418 00 WITH ITT APU2400 + ADC2300 TDA4556 Multistandard decoder GENERAL DESCRIPTION The TDA4555 and TDA4556 are monolithic integrated multistandard colour decoders for the PAL, SECAM, NTSC 3,58 MHz and NTSC 4,43 MHz standards. The difference between the TDA4555 and TDA4556 is the polarity of the colour difference output signals (B-Y) and (R-Y). Features Chrominance part · Gain controlled chrominance amplifier for PAL, SECAM and NTSC · ACC rectifier circuits (PAL/NTSC, SECAM) · Burst blanking (PAL) in front of 64 ms glass delay line · Chrominance output stage for driving the 64 ms glass delay line (PAL, SECAM) · Limiter stages for direct and delayed SECAM signal · SECAM permutator Demodulator part · Flyback blanking incorporated in the two synchronous demodulators (PAL, NTSC) · PAL switch · Internal PAL matrix · Two quadrature demodulators with external reference tuned circuits (SECAM) · Internal filtering of residual carrier · De-emphasis (SECAM) · Insertion of reference voltages as achromatic value (SECAM) in the (B-Y) and (R-Y) colour difference output stages (blanking) Identification part · Automatic standard recognition by sequential inquiry · Delay for colour-on and scanning-on · Reliable SECAM identification by PAL priority circuit · Forced switch-on of a standard · Four switching voltages for chrominance filters, traps and crystals · Two identification circuits for PAL/SECAM (H/2) and NTSC · PAL/SECAM flip-flop · SECAM identification mode switch (horizontal, vertical or combined horizontal and vertical) · Crystal oscillator with divider stages and PLL circuitry (PAL, NTSC) for double colour subcarrier frequency · HUE control (NTSC) · Service switch. U4647 - TEA5040 (TELEFUNKEN) WIDE BAND VIDEO PROCESSOR An automatic contrast control circuit in a color television receiver for stabilizing the average DC level of the luminance information at a desired level and preventing focus blooming. The control circuitry, which is suitable for fabrication as a monolithic integrated circuit, contemplates the provision of a gain-controlled luminance amplifier stage for driving an image reproducer with luminance information having a stabilized black level. An average detector coupled to the amplifier stage output develops a control signal representative of the average DC level of the luminance information and applies it to the amplifier stage, varying its gain inversely with changes in the average luminance level. A peak limiter circuit is also provided for modifying the control signal to reduce the amplifier stage's gain whenever an AC brightness component comprising the luminance information exceeds a defined threshold level, regardless of the average DC level of the luminance information. 1. In a television receiver having a luminance processing channel for translating instantaneous luminance signals derived from received broadcast transmissions to an image reproducer, said luminance signals including black level reference information, an automatic contrast control circuit comprising in combination: 2. An automatic contrast control circuit in accordance with claim 1, wherein adjustable level shifting means are interposed between said amplifier stage and said average detector means, said adjustable level shifting means providing a contrast control for manually varying the average DC level of said luminance signals. 3. An automatic contrast control circuit in accordance with claim 1, wherein said average detector means includes a capacitor having an output terminal coupled to said amplifier stage and a second terminal coupled to a plane of reference potential, said capacitor being charged by luminance signals from said amplifier stage and developing control signals representative of the average DC level of said luminance signals. 4. An automatic contrast control circuit in accordance with claim 3, wherein said control signals with respect to a plane of reference potential are equal to the potential at which black level is stabilized minus the potential drop between black level and the average DC level of said luminance information, said control signal increasing with respect to said plane of reference potential responsive to decreasing average DC levels of said luminance signals and decreasing responsive to increasing average DC levels. 5. An automatic contrast control circuit in accordance with claim 3, wherein said peak detector means includes a semi-conductor arrangement for providing said capacitor with a low impedance discharge path whenever said brightness components exceed a predetermined threshold level, the impedance of said discharge path being dependent on the amplitude of said brightness components and the discharge interval of said semiconductor arrangement being the time period during which said brightness components exceed said threshold level, said semiconductor arrangement further decreasing said control signals with respect to said plane of reference potential irrespective of the average DC level of said luminance signals. 6. An automatic contrast control circuit in accordance with claim 5, wherein said semiconductor arrangement comprises first and second transistors, said luminance signals from said amplifier stage being coupled to the input base electrode of said first transistor, said first transistor further having an emitter electrode coupled to said capacitor output terminal and a collector electrode coupled to the base electrode of said second transistor, said second transistor having a collector electrode coupled to said capacitor output terminal and an emitter electrode coupled to said plane of reference potential, said semiconductor arrangement being conductive to provide said capacitor with a low impedance discharge path whenever said brightness components exceed the base-emitter junction breakdown voltage of said first transistor. 7. An automatic contrast control circuit in accordance with claim 6, wherein said gain-controlled luminance amplifier stage includes a pair of transistors arranged in a differential amplifier configuration, the gain of which is dependent on the bias applied to the base electrodes of said transistors. 8. An automatic contrast control circuit in accordance with claim 7, wherein inverter means invert and couple said control signals to said base electrodes in said amplifier stage, the inverted control signals increasing the gain of said amplifier stage whenever the average DC level of said luminance signals decreases and decreasing the gain of said amplifier stage whenever the average DC level of said luminance information increases or whenever said brightness components exceed said threshold level. 9. An automatic contrast control circuit in accordance with claim 3, wherein said beam current limiter means provide a low impedance discharge path for said capacitor whenever the beam current exceeds a predetermined level. 10. An automatic contrast control system in accordance with claim 9, wherein said beam current limiter means monitors pulses from a voltage multiplier high-voltage system, said pulses being proportional to the beam current generated during the previous horizontal scan line. 11. An automatic contrast control circuit in accordance with claim 10, wherein said beam current limiter means comprises a transistor having a base electrode coupled to said voltage multiplier high-voltage system, an emitter electrode coupled to a plane of reference potential and a collector electrode coupled to said capacitor, said transistor providing a low impedance discharge path whenever said pulses exceed the base-emitter junction breakdown voltage of said transistor.

Description:

BACKGROUND OF THE INVENTION This invention relates in general to control circuitry for color television receivers and more particularly to an automatic contrast control circuit incorporated in the luminance processing channel. In accordance therewith, a variable DC control signal is derived from the luminance signal information as a function of the average luminance level. The DC control signal is applied to a gain-controlled amplifier stage in the luminance channel, varying its gain and thereby insuring that excessive beam currents will not be generated due to high average luminance levels. Conversely, the circuit is effective to increase the gain of the amplifier stage when under-modulated signals are received thereby providing the desired contrast level. When the white content of the instantaneous received signal exceeds a predetermined level, however, the DC control signal is modified to reflect the excessive white content even though the average luminance level may be low. Accordingly, the amplifier stage's gain is reduced to prevent defocusing. In color television receivers, the various elemental areas of differing brightness levels, or shades, in the televised image correspond to the amplitude levels of the instantaneous brightness components of the luminance signals which, together with the chrominance signal, reproduce the transmitted picture information on the image display tube. The intensity of the electron beams developed in the receiver's image display tube are varied, for the most part, according to the detected amplitude levels of the instantaneous luminance signals. Accordingly, progressively higher amplitude levels generate higher intensity electron beams and, consequently, progressively lighter shades. In addition, suitable viewer-adjustable controls are customarily provided in the television receiver whereby a particularized contrast and brightness setting may be selected according to viewer preference. It is desirable that the level of the luminance signal component corresponding to black in the televised image be maintained at the cut-off of the image reproducer. But even in those instances where there is a measure of DC coupling, the DC components of the luminance signal coupled from the video detector to the luminance channel may be degraded or otherwise restricted due to the nature of the processing circuitry as well as to other factors. Moreover, the luminance processing channel itself may well permit a degradation or undesirable shift in the desired DC characteristics. The result is that the DC level in the processed luminance signal is not properly maintained, such that, upon application to the image display tube, the black level is shifted to some undesirable reference. This leads to less than faithful half-tone reproduction on the screen of the image display tube. Gray tones can be lost simply because they are beyond the cut-off of the display tube. In other instances, blacks may appear as grays on the image display tube screen. Thus, it is desirable to make provision for the maintenance of black level in the televised image at some stabilized reference. Various systems are of course known in the art for accomplishing this objective and take various forms and configurations. For example, an arrangement commonly known as a DC restorer circuit which includes a clamping device may be employed. However, when the black level is effectively stabilized at the image reproducer's cut-off bias point, the average level of the luminance signal information may reach the point where excessive average beam currents capable of severely damaging the image reproducer are generated. In addition, the high voltage power supply during instances of high beam current may be incapable of delivering the required beam current. Such overloading reduces the power supply output voltage and results in undesirable "focus blooming." That is, there will be a loss of brightness, reduction of horizontal widths and severe defocusing of the reproduced image. The problem in this regard has been further compounded by the "new generation" high-brightness cathode-ray tubes which require higher beam currents in order to illuminate the tube to its fullest capability during high-modulation (white) scenes. In view of the added demands on the high voltage power supply and the danger of damaging the image display tube, some method for effectively limiting the beam current is required. Accordingly, automatic contrast control systems have been developed which reduce the gain of the luminance amplifier stage to prevent the generation of excessive beam currents or increase the gain when under-modulated signals are received. Most of these prior art automatic contrast control systems, however, measure only the average level of the luminance signals to derive the control signal utilized to vary the gain of the luminance amplifier. Consequently, when all or a major portion of the luminance signal's white content is of a high amplitude level and is concentrated on a very small portion of the image reproducer's screen, the control signal derived from the average luminance level is low, permitting the luminance amplifier stage to operate at nearly maximum gain. By concentrating the high-amplitude white content into a small area of the screen, the image display tube is likely to be overdriven during that period of time and "focus blooming" will result. Some automatic contrast systems, on the other hand, derive a control signal based on the peak amplitudes of the instantaneous luminance signals without regard to the average luminance level. Thus, while preventing blooming on high-amplitude white content, such systems are susceptible to luminance signals which have a dangerously high average level, but do not have any peak white signal content of a level where the system would take corrective action. OBJECTS OF THE INVENTION Accordingly, it is an object of the present invention to provide a color television receiver having black level stabilization with a new and improved automatic contrast control circuit which effectively overcomes the aforenoted disadvantages and deficiencies of prior circuits. A further object of the invention is to provide an improved automatic contrast control circuit which develops control signals effectively varying the gain of a luminance amplifier stage to maintain an optimum contrast, while preventing the generation of excessive beam currents in the cathode-ray tube. A more particular object of the invention is to provide an improved automatic contrast control circuit for continuously monitoring the average (DC) level of the luminance signal information and providing a control signal representative thereof to vary the gain of a luminance amplifier stage while remaining sensitive to the amplitude levels of brightness components exceeding a threshold level and modifying the control signal in accordance therewith. Another object of the invention is to provide an improved automatic contrast control circuit which increases the gain of a luminance amplifier stage during reception of undermodulated luminance signals. A further object of the present invention is to provide an automatic contrast control circuit of the foregoing type for deriving a variable DC control potential from applied luminance signals which, upon application to the luminance channel, adjusts the gain of a luminance amplifier stage in accordance with the varying luminance signal requirements. Still another object of the invention is to provide a luminance processing channel including automatic contrast control circuitry which may be fabricated as a monolithic integrated circuit to provide an output luminance signal having stabilized black level and optimum contrast without producing excessive beam currents. SUMMARY OF THE INVENTION In accordance with the present invention, an improved automatic contrast control circuit is provided for varying the gain of an amplifier stage in the luminance processing channel of a color television receiver whenever the average DC level of the input luminance information varies from a desired level, or whenever the peak amplitudes of the AC brightness components of the luminance information exceed a predetermined threshhold level. In a preferred embodiment, the automatic contrast control circuit includes a gain-controlled luminance amplifier stage in a luminance processing channel for translating instantaneous luminance signals derived from received broadcast transmissions to an image reproducer. The amplified luminance signals found at the output of the amplifier stage have a stabilized black level. There are also provided detector means coupled to the amplifier output for developing control signals that are representative of the average DC level of the instantaneous luminance signals. The control signals are then applied to the gain-controlled amplifier stage to vary its gain inversely with changes in the average luminance level. Finally, peak limiter means are coupled between the amplifier output and the detector means to modify the control signals whenever the instantaneous luminance signals exceed a threshhold level. The modified control signals are similarly utilized to effect inverse gain variations in the gain-controlled amplifier stage regardless of the average level of the luminance signals. DESCRIPTION The U4647 - TEA5040S is a serial bus-controlled videoprocessing device which integrates a complex architecture fulfilling multiple functions. .DIGITAL CONTROL OF BRIGHTNESS, SATURATION AND CONTRAST ON TV SIGNALS AND R, G, B INTERNAL OR EXTERNAL SOURCES .BUS DRIVE OF SWITCHING FUNCTIONS .DEMATRIXING OF R, G, B SIGNALS FROM Y, R-Y, B-Y, TV MODE INPUTS .MATRIXING OF R, G, B SOURCES INTO Y, R-Y, B-Y SIGNALS .AUTOMATIC DRIVE AND CUT-OFF CONTROLS BY DIGITAL PROCESSING DURING FRAME RETRACE .PEAK ANDAVERAGE BEAM CURRENT LIMITATION .ON-CHIP SWITCHING FOR R, G, B INPUT SELECTION .ON-CHIP INSERTION OF INTERNAL OR EXTERNAL R, G, B SOURCES GENERAL DESCRIPTION Brief Description This integrated circuit incorporates the following features : - a synchro and two video inputs - a fixed video output - a switchable video output - normal Y, R-Y, B-Y TV mode inputs - double set of R, G, B inputs - brightness, contrast and saturation controls as wellon aR,G, B picture ason a normalTVpicture - digital control inputs by means of serial bus - peak beam current limitation - average beam current limitation - automaticdrive and cut-off controls Block Diagram Description BUS DECODER A 3 lines bus (clock, data, enable) delivered by the microcontroller of the TV-set enters the videoprocessor integrated circuit (pins 13-14-15). A control system acts in such a way that only a 9-bit word is taken intoaccount by the videoprocessor.Six of the bits carry the data, the remaining three carry the address of the subsystem. A demultiplexer directs the data towards latches which drive the appropriate control. More detailed information about serial bus operation is given in the following chapter. Video Switch The video switch has three inputs : - an internal video input (pin 39), - an external video input (pin 37), - a synchro input (pin 41), and two outputs : - an internal video output (pin 40), - a switchable video output (pin 42) The 1Vpp composite video signal applied to the internal video input is multiplied by two and then appears as a 2Vpp low impedance composite video signal at the output. This signal is used to deliver a 1Vpp/75W composite video signal to the peri-TV plug. The switchable video output canbe any of the three inputs.When the Int/Ext one active bit word is high (address number 5), the internal video input is selected. If not, either a regeneratedsynchro pulse or the external video signal is directed towards this output depending on the level of the Sync/Async one active bit word (address number 4). As this output is to be connected to the synchro integrated circuit, RGB information derived from an external source via the Peri-TV plug canbedisplayed on the screen, the synchronization of the TV-set being then made with an external video signal. When RGB information is derived from a source integrated in the TV-set, a teletext decoder for example, the synchronization can be made either on the internal video input (in case of synchronous data) or on the synchro input (in case of asynchronous data). R, G, B Inputs There are two sets of R, G, B inputs : one is to be connected to the peri-TV plug (Ext R, G, B), the second one to receive the information derived from the TV-set itself (Int R, G, B). In order to have a saturation control on a picture coming from the R, G, B inputs too, it is necessary to getR-Y, B-Y and Y signals from R, G, B information : this is performed on the first matrix that receives the three 0.9Vp (100% white) R, G, B signals and delivers the corresponding Y, R-Y, B-Y signals. These ones are multiplied by 1.4 in order to make the R-Y and B-Y signals compatible with the R-Y and B-Y TV mode inputs. The desired R, G, B inputs are selected by means of 3 switches controlled by the two fast blanking signal inputs. A high level on FB external pin selects the external RGB sources. The three selected inputs are clamped in order to give the required DC level at the output of this firstmatrix. Thethree not selected inputs are clamped on a fixed DC level. Y, R-Y, B-Y Inputs The 2Vpp composite video signal appearing at the switchable output of the video switch (pin 42) is driven through the subcarrier trap and the luminance delay line with a 6 dB attenuation to the Y input (1Vpp ; pin 12). In order to make this 1Vpp (synchro to white) Y signal compatible with the 1Vpp (black to white) Y signal delivered by the first matrix, it is necessary to multiply it by a coefficient of 1.4. Controls The four brightness, contrastand saturationcontrol functions are direct digitally controlled without using digital-to-analog converters. The contrast control of the Y channel is obtained by means of a digital potentiometer which is an attenuator including several switchable cells directly controlled by a 5 active bit word (address number 1). The brightness control is also made by a digital potentiometer (5 active bit word, address number 0). Since a + 3dB contrast capability is required, the Y signal value could be up to 0.7Vpp nominal. For both functions, the control characteristics are quasi-linear. In each R-Y and B-Y channel, a six-cell digital attenuator is directly controlled by a 6 active bit word (address number 6 and 7). The tracking needed to keep the saturation constant when changing the contrast has to be done externally by the microcontroller. Furthermore, colour can be disabledby blankingR-Y andB-Ysignals using one active bit word (address number 2) to drive the one-chip colour ON/OFF switch. Second Matrix, Clamp, Peak Clipping, Blanking The second matrix receives the Y, R-Y and B-Y signals and delivers the corresponding R, G, B signals. As it is required to have the capability of + 6dB saturation, an internal gain of 2 is applied on both R-Y and B-Y signals. A low clipping level is included in order to ensure a correct blanking during the line and frame retraces. Ahigh clipping level ensures thepeakbeamcurrent limitation. These limitations are correct only if the DC bias of the three R, G, B signals are precise enough. Therefore a clamp has been added in each channel in order to compensate for the inaccuracy of the matrix. Sandcastle Detector And Counter The three level supersandcastle is used in the circuit to deliver the burst pulse (CLP), the horizontal pulse (HP), and the composite vertical and horizontal blanking pulse (BLI). This last one is regenerated in the counter which delivers a new composite pulse (BL) in which the vertical part lasts 23 lines when the vertical part of the supersandcastle lasts more than 11 lines. The TEA5040S cannot work properly if this minimum duration of 11 lines is not ensured. The counterdelivers different pulses neededcircuit and especially the line pulses 17 to 23 used in the automatic drive and cut-off control system. Automatic Drive And Cut-off Control System Cut-off and drive adjustments are no longer required with this integrated circuit as it has a sample and hold feedback loop incorporating the final stages of the TV-set. This system works in a sequentialmode. For this purpose, special pulses are inserted in G, R and B channels. During the lines 17, 18 and 19, a ”drive pulse” is inserted respectively in the green, red and blue channels. The line 20 is blanked on the three channels. During the lines 21, 22 and 23, a ”quasi cut-off pulse” is inserted respectively in the green, red and blue guns. The resulting signal is then applied to the input of a voltage controlled amplifier. In the final stages of the TV-set, the current flowing in each green, red and blue cathode is measured and sent to the videoprocessorby a current source. The three currents are added together in a resistor matrix which can be programmed to set the ratio between the three currents in order to get the appropriate colour temperature. The output of the matrix forms a high impedance voltage source which is connectedto the integratedcircuit (pin 34). Same measurement range between drive and cutoff is achieved by internally grounding an external low impedance resistor during lines 17, 18 and 19. This is due to the fact that the drive currents are about one hundred times higher than the cut-off and leakage currents. Each voltage appearing sequentially on the wire pin 34 is then a function of specific cathode current : - When a current due to a drive pulse occurs, the voltage appearing on the pin 34 is compared within the IC with an internal reference, and the result of the comparison charges or discharges an external appropriate drive capacitor which stores the value during the frame. This voltage is applied to a voltage controlled amplifier and the system works in such a waythat the pulse current drive derived from the cathode is kept constant. - During the line 20, the three guns of the picture tube are blanked. The leakagecurrent flowing out of the final stages is transformed into a voltage which is stored by an external leakage capacitor to be used later as a reference for the cut-off current measurement. - When a current due to a cut-off pulse occurs, the voltage appearing on the pin 34 is compared within the ICto the voltagepresenton the leakage memory. Anappropriate externalcapacitor is then charged or discharged in such a way that the difference between each measured current and the leakage current is kept constant, and thus the quasi cut-off current is kept constant. AverageBeam Current Limitation The total current of the three guns is integrated by means of an internal resistor and an external capacitor (pin 36) and thencompared with a programmable voltage reference(pin 38). When 70% of the maximum permitted beam current is reached, the drive gain begins to be reduced ; to do so, the amplitude of the inserted pulse is increased. In order to keep enough contrast, the maximum drive reduction is limited to 6dB. If it is not sufficient, the brightness is suppressed. SPECIFICATION FOR THE THOMSON BI-DIRECTIONAL DATA BUS This is a bi-directional 3-wire (ENABLE, CLOCK, DATA) serial bus. The DATA line transmission is bi-directional whereas ENABLE and CLOCK lines are only microprocessor controlled. The ENABLE and CLOCK lines are only driven by the microcomputer.

 

THOMSON CHASSIS ICC5 REPAIRING / SERVICING NOTES:

icc5 (110deg) lg11 faulty cg11(1nf)
icc intermittent controls- replace membrane .
icc5 1 sec eht then stby try s/c pin5 micro pro to earth .
icc5 3 lines of scan at top of pic only il14 tea2029.
icc5 3 trips then off dl55(ba157)+cl58(47uf100v)+rv82(10r).
icc5 330nf s-correction cap, check j134 22v .
icc5 3trips/dead tda2030 .
icc5 3trips/dead ,test pin 4/11 to earth if < 700r loptx.
icc5 3trips/dead dl55 ba157,cl58 47uf100v rv82 (10r, on crt base pcb) .
icc5 3trips/dead l25, zpd10 zener diode.
icc5 3trips/dead tl17 bc548b in trip cct.
icc5 3trips/dead, cp24 47uf,100v from choptr base tp24.
icc5 bent sides ew coil,tda4950,dl41(byw76),dl46(by228),rl44(66+120r).
icc5 bent sides tda4950 ew ig01 dl42(ba157) 18k across it.
icc5 blank bright raster. 10r on crt base.
icc5 blank raster dots hot smell dl21/dl22.
icc5 blank raster no snd tda2541
icc5 blank raster no snd, osd & scart ok,tda2451-2.
icc5 blank raster,line across top, dl21(esm740g).
icc5 child lock “press red green blue then hold yellow 10 secs” .
icc5 cl44(0.44uf250v).
icc5 cl48(12n4f)+tda4950+tl17.
icc5 clicking on nicam add 47k between pins 13 & 16 ic1580 nicam pcb
icc5 cold hiss ds03(bb809).
icc5 cold top lines/foldover cl52 from pin 3 loptx.
icc5 cold tripping il14(tea2029c),
icc5 color cast/bright text tv41(1k).
icc5 dead lg11,cl44(300nf).
icc5 dead rp23+1n4148 dl28.
icc5 dead “88” showing, rp42 1r2 in psu,
icc5 dead 1a6t+cap next to 1r4w resistors in mains filter unit.
icc5 dead 330nf400v lg11 tda4950+fusible jl34(22r) .
icc5 dead bu508at.
icc5 dead choptr(tp24) dp37 tl31 rl10(115k).
icc5 dead cl44 300nf250v .
icc5 dead cl48 12.4nf +tda4950 + bc548b tl17.
icc5 dead cl48.choptr(bu508a),cp23.
icc5 dead coil,lg11, tda4950 tda4950 rl44, cl48 10.5nf cl44 300nf.
icc5 dead cp02(10nf250v) blue disc.
icc5 dead cp37(1000uf) 8v line.
icc5 dead dl55(ba157).
icc5 dead eht surge cp26(470uf16v) loc241
icc5 dead fp05 rp01 rp02 rp01 on scan coils.
icc5 dead front digits ok,line scan coil plug
icc5 dead fuse blown check degauss ptc.
icc5 dead fuse cp02 10nf blue disc cap.
icc5 dead led flash once cp26(470uf25v).
icc5 dead led flash, rr30 pins.
icc5 dead led flicks once,lg11+tda4950+cl44+rl46(1k)+rl44(56r+120r)+j134(22r).
icc5 dead lg11 cl44(33pf) rl44 ig01(tda4950) add 22r in place of ji34.
icc5 dead lg11 coil+rl44(56+120r)+tda4950+cl48(10n5)+cl44(300nf).
icc5 dead lo start volts at il14 ,dp45(zpd9v1).
icc5 dead loptr 2000a3 cl48
icc5 dead loptr cause loptx try discon pins 6/8/9/10 to prove.
icc5 dead loptr cause scan coils leak to field /ew raster coil.
icc5 dead loptr s2000af bend the corners of the heatsink away from choptx.
icc5 dead loptr+cl48 11nf(51k7) loptx rl10
icc5 dead loptr,cl42(360nf250v)
icc5 dead loptr= ew trans=lg11 ig01 rl44 120r+56r.
icc5 dead loptx, choptr bu508a, field thy, jungle chip, fucus/a1 unit
icc5 dead pulse of power at switch off cl44(330nf250v).
icc5 dead rl23 1r
icc5 dead rp23 w/wound,no line drive dl29(1n4148)
icc5 dead s2000a3+4*by255+pins+mains plug.
icc5 dead stby programme up button on tv front for 6 seconds.
icc5 dead stby ir73(mda2062).
icc5 dead stby lg11 ig01 tda4950 cl44 rl46 rrl44 j134 22r
icc5 dead stby tp45=4v(should be 11.5v) stby tx lp03 .
icc5 dead switching stby/on qr27.
icc5 dead throbbing lo ht 50v, 220uf385v mains cap.
icc5 dead tl17 bc548 il14
icc5 dead tl17(bc548)
icc5 dead tp15(bc548b).
icc5 dead tp45 11.5vn, the stby transformer lp03
icc5 dead tp45(bc649).
icc5 dead trip is41(tda2030)
icc5 dead tripping dl18(zpd36),tl31(bu508a),rp43.
icc5 dead/dark blank raster, cp37 4700uf25v
icc5 degauss posistor+1r0+1.6at.
icc5 disable trip by shorting tl17 collector to emitter.
icc5 eht stays up 10 secs/no digits.
icc5 eht stby, ic904(sl486)try reset use remote or hold ch up.”
icc5 eht surge only, try disconnect pin 4 loptx, field collapse
icc5 eht/htrs ok no brill,unplug field scan coils (scr to earth)
icc5 ew (tda4950) cause lg11 flashover.
icc5 ew bowing (59p7).dg 10 6.8 zener
icc5 ew bowing tda4950
icc5 ew coil 1r+6.5r
icc5 ew coil on 110 crt,cl44 330nf,rl44,56+120r,j134 22r,tda4950.cg11 inf
icc5 ew distortion rl44(120r+56r) cl 44 0.3uf tda4950 ig010 ew coil lg11,
icc5 ew j134(22r)+tda4950 dl42(ba159)+18k, ig01
icc5 ew lg11 110deg tubes cl44 330nf; rl44 56r+120r fusible; j134 22r, ig01 tda4950 ew
icc5 ew raster ,tda4950,cg11(1nf),dg13(1n4148),dl41(byw76),lg11,rg08(22r).
icc5 ew raster ig8,rg41(10r),tg62(bc547b).
icc5 ew raster lg11 dl46+dl41+lg11+rl44+cg11+ig01+cl41+cl44+j134(72r),ig01.
icc5 excess blue iv50 .
icc5 excess brill rv82(10r) crt base.
icc5 faint pic snd ok cv90,cp37
icc5 field cl22+rl22+cl52 1000uf.
icc5 field collapse (wavy line) scan coil plug
icc5 field collapse ,line nr top, rl33(3m3),il14.
icc5 field collapse cf01, 470nf,il14,rf01(3m)/rl33, scan coil pins.
icc5 field collapse dp47, bg22,bg36,cf01, scan coil pins.
icc5 field collapse rf01(3m).
icc5 field collapse rf21(820r),rl50(1r), loptx pins.
icc5 field collapse. rf01(3m).
icc5 field top cramp,cl22 rl22,cl52 1,000uf, 23v line.
icc5 field top foldover rf(1k).
icc5 flyback lines, tv50(bf422), dl22,cl22,rl22(1k5),tv81.
icc5 front leds pulsing rp42 (1r) o/c+dp41 o/c pins.
icc5 ha11498 changed to u4647/b1-tea5040
icc5 hot hum bar/field collapse. dp47
icc5 hot snd cracks (51k5), two screen cans on nicam pcb; pin 24 of main edge.
icc5 hot snow it20(tda6316ap).
icc5 hum/hissy snd pc1253 pins cs36 qs05.
icc5 inch of pic lhs, iv02(saa5243) on t/text.
icc5 int blue pic flyback pin 11 of crt base.
icc5 int color when setting pic geometry, mod change dv11 to 100pf.
icc5 int colour,dv21(1n4148)
icc5 int field collapse. dp47
icc5 int interference/lines tda4443
icc5 int line flashes across it20(u6316).
icc5 int nicam pc1253-001.is01 ta8662 is08 adc2300 pins
icc5 int nicam ta8662+adc2300 pins.
icc5 int no color dv21(1n4148).
icc5 int no pic, tuner
icc5 int no snd,headphone socket
icc5 int no start, earth pin28 il14 for tripped test.
icc5 int pic cv57(22nf).
icc5 int sides ew, loptx pins .
icc5 int snd cr56 .
icc5 int snd headphone socket pins.
icc5 int start lines at top,1.5k rl22 4.7nf cl22.cl52 1000uf.
icc5 int stby choptr tp24
icc5 int stby,choptr tp24. pins
icc5 int ticking snd/int mute, earth spkr grill.
icc5 int trip degauss positor .
icc5 int trips ,rl48(4k7).
icc5 int trips led flashing 6 times rl18 4k7 sm.
icc5 int trips,degaussing posistor.
icc5 interference pic ,tda4443
icc5 just osd tda2451-2
icc5 just snow c109(1nf).
icc5 led flashing 6 times,rl18(4k7sm)
icc5 line collapse 2″ dl41, ll46,rl46.
icc5 lineop disconnect ,dummy load tween dp41 cathode, chassis
icc5 lines across screen, pf14(100r) field cct.
icc5 lines flashing , tuner unit,it20(u6316). pll
icc5 low blue tea5040+mod kit.
icc5 low height il14(tea2029c), ty01(bf422).
icc5 low ht(158vn), rl10(115k).
icc5 low tuning voltage ci05(1nf).
icc5 low width cl44(300nf400v)+rl44(120r+56r)
icc5 low width cl54 680nf
icc5 low width, dg10,ig01(tda4950).,dl41(byw76).
icc5 low width/ew ,0.33uf250+td4950+4r7(rf14).
icc5 lop transistor getting hot ,bend h/sink corner away from choptx.
icc5 loptr running hot cause loptx magnetic field hitting heatsink, add shield.
icc5 loptr scancoils lg11/tda4950+,,,.
icc5 loptr(s2000af)
icc5 loptx arcing dst85b172/401416, hr6260
icc5 loptx dst85b243/473197_00= hr6373
icc5 loptx+bu508a choptr (chopper transistor).
icc5 loptx=hr6373/hr6067 dst85b243 473 197_00.
icc5 mod ha11498 changed to u4647/b1-tea5040
icc5 nicam (nasty) resolder earths on nicam pcb screen
icc5 nicam clicking , earth speaker .
icc5 nicam crackles ii71(tda4445b) is09 .
icc5 nicam=nasty inconsistant companded audio muckup
icc5 no 5v cp44(22nf)leaks.
icc5 no blue rv73(47k)
icc5 no blue tea5040 iv21. mod kit wve
icc5 no channel change. ic ir01.
icc5 no channel store ir01 .
icc5 no color chv5700 as panel.
icc5 no eht,loptx.
icc5 no ew correction. j134(22r),ig01(tda4950)
icc5 no fastext ir01.
icc5 no green tv62.
icc5 no line sync ql07 from pin 18 il14.
icc5 no luma/dark screen chroma subpanel.
icc5 no nicam pc1253 qs03(16m384hz).
icc5 no nicam snd poor mono snd c176 10uf inside if can
icc5 no osd rv02(47r) tv05(mps2369a).
icc5 no osd tv07,4v3 zener on text board
icc5 no osd/ttext, tv67(bc547c)
icc5 no osd/ttext. dv05 zener (zpd10) on text pcb.
icc5 no picture bc558b decoder
icc5 no picture dl21
icc5 no picture tv50 on decoder pcb
icc5 no pic/snd lt13 dt21(in4150).
icc5 no pic/snd. cp37(4700uf) .
icc5 no pic/snd/led digits, micropro ir01(ferg07)
icc5 no raster dl22(ba157) il14,rp42(1r).
icc5 no raster/snd cp37(4u700f)
icc5 no remote ,ir receiver remove c950(10uf) add link.
icc5 no remote ir rx (mod c950 with wire)
icc5 no remote ir73/ ir01.
icc5 no scart sound tba120t.
icc5 no sound even on scart tba120t
icc5 no sound just hiss. tda4453 in if can.
icc5 no sound rs13(4r7) tr57(bc558b) ts04 is08(adc2300).
icc5 no sound tba120t sound det chip
icc5 no sound tr57(bc558b), rs13(4r7), headphone socket.
icc5 no start.rp42 on main pcb – low volts to ic il14
icc5 no text cv05 rv43 rv44(0r22).
icc5 no text dv03(zpd4v3)/dvo5(zpd10v) .
icc5 no text/osd iv05 tv67(bc547c) dv05(zpd10)dv03(zpd4v3)
icc5 no text/osd. tv67 (bc547c)
icc5 no ttext/osd. dv05 zener (zpd10) on text pcb.dv03 zener zpd4v3
icc5 no tuning it20 (tda6316ap) no volts to tuner.
icc5 no tuning it20(tda6316ap).
icc5 no video text ok rv74 2r7
icc5 no video tv50.
icc5 no video,nicam pcb 3 connect pins, luma output (top);luma input (bottom).
icc5 no/int color dv21, r35.
icc5 ns raster rg42(1r5).
icc5 odd field coloured lines(1k5) nr thyristor
icc5 odd lines on pic , scart ok,u6316 pll chip it20
icc5 osd sync rv36(22k).
icc5 osg ir01 ir01 tr84(bc238-40).
icc5 picture flutter check cp37(4700uf).
icc5 pic ripple. tr107 l120.
icc5 poor ew,ew coil+tda4950 ,dl41(byw76), dl46(by228),rl44(66+120r)
icc5 poor focus loptx faulty
icc5 poor pic lo emission rv73 47kr 1w,
icc5 poor scart picture,add 6n8f63v across rs26.
icc5 poor sound cs05(22nf/100nf).
icc5 poor start+top lines rl22(1k5) cl22(4u7f)+cl52(1000uf).
icc5 pulsing sound = nicam unit.
icc5 pulsing. dl55 (ba157)
icc5 ragged verticals dv68 on text pcb
icc5 remote control, ir receiver sl466 ic
icc5 rhs crackling is10.
icc5 ripple on picture, tr107+l120.
icc5 rolling lines, dl22(ba157).
icc5 scart poor pic. add 6n8f63v across rs26.
icc5 set trips 3 times tl29(bc639), rl30(1r ).
icc5 slow start dp51(1n4002) 12v bridge.
icc5 smeary picture iv50(u4647b).
icc5 sound hiss, tda4453 in can.
icc5 sound popping add 47k between pins 13 & 16 of is08 on pc1253
icc5 sound stutter front of spk & mid spk mounting
icc5 sound int rhs front mounted headphone socket.
icc5 sparking from res nr coil in corner lg11
icc5 stby programme up button on tv front for 6 seconds.
icc5 stby cp46, dl52(ba157),rp46dp44(zpd5v6),mda2062).
icc5 stby eht surge ic904(sl486) .
icc5 stby loptr s2000a3 tl31,cl48 10.5nf
icc5 stby press prog up front for 6 seconds.
icc5 stby rp42
icc5 stby s2000a3 +cl48(10n5f)
icc5 stby s2000a3 loptr tl31+cl48(10n5)
icc5 telefunken 617 3trips loptx.
icc5 test discon loptx 8+10, bulb 100w pin8 to earth lites 3 times if ok.
icc5 text dropout iv28 dvt5403 ir01.
icc5 text line tearing dv68(zdp6v2).
icc5 text no osg tv07.
icc5 top 3 colored flyback lines dl21 thyristor
icc5 top cramp rf12(1k),il14.
icc5 tripped cp37 4,700uf was .
icc5 tripped rl10
icc5 tripping cl48(11nf).+loptx
icc5 tripping cp29(47nf).
icc5 tripping dl51(by397)/cg05.
icc5 tripping focus arcing.
icc5 tripping ir01(micropro).
icc5 tripping ir81(mc7805).
icc5 tripping lg11 tda 4950 +s2000af .
icc5 tripping loptr+cl48.
icc5 tripping loptx s/c pins 11/3.
icc5 tripping loptx+dp37(byw72).
icc5 trips (0u33f250v)+tda4950 .
icc5 trips (22uf250v)+rl23(1r) .
icc5 trips 3 times dead cp24 47uf100v drive coupler to tr24.
icc5 trips 3 times cp24(47uf100v) drive coupler to tr24 .
icc5 trips 3 times dead dl55 ba157 cl58 47uf100v rv82 10r .
icc5 trips 3 times dl25(zpd10).
icc5 trips 3 times dl55(ba157),cl58(47uf100v),rv82(10r)
icc5 trips cl16(3n3f) il14,dl51.
icc5 trips cp37(4700uf).
icc5 trips disable tl17 c/e. dl25 zpd10 zener 13v line monitor.
icc5 trips dl25(zpd10 zenner.
icc5 trips once stby rl44 56r hold mains sw for 3-4secs
icc5 trips quietly 0u33f 250v nr loptx, e/w coil tda4950
icc5 trips tp16(bc368).
icc5 tuning bad qt16(4mhz).
icc5 tuning no 33v voltage ,tt12 bc547
icc5 vcr flag waving ,use channels end in zero. ie 10, 20 etc.
icc5 warm no ew correction pg02 2k2
icc5 warm trips cl33(10uf25v)+cp23(2n2)
icc5 white raster check rv82.
icc5 white raster rv82.
icc5 width 1″ on lhs text ic iv02.