SINUDYNE STUDIO 2568Q CHASSIS PROFESSIONAL T 6700 TEA2164 /2165 SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT
.POSITIVE AND NEGATIVE OUTPUT CURRENT
UP TO 1.2AAND – 1.7A .A TWO LEVEL COLLECTOR CURRENT LIMITATION
.COMPLETE TURN OFF AFTER LONG DURATION
OVERLOADS .UNDER AND OVER VOLTAGELOCK-OUT .SOFT START BY PROGRESSIVE CURRENT
LIMITATION .DOUBLE PULSE SUPPRESSION .BURST MODE OPERATION UNDER STANDBY
CONDITIONS
DESCRIPTION
In amaster slave architecture, the TEA2164control
IC achieves the slave function. Primarily designed
for TV receivers and monitors applications, this
circuit provides an easy synchronizationand smart
solution for low power stand by operation.
Located at the primary side the TEA2164 Control
IC ensures :
- the power supply start-up
- the power supply control under stand-by conditions
- the process of the regulation signals sent by the
master circuit located at the secondary side
- directbasedrive of the bipolarswitching transistor
- the protection of the transistor and the power
supply under abnormal conditions.
II. GENERAL DESCRIPTION
In a master slave architecture, the TEA2164 Control
IC, located at the primary side of an off line
power supply achievesthe slave function ;whereas
the master circuit is located at the secondary side.
The link between both circuits is realized by a small
pulse transformer
In the operation of the master-slave architecture,
four majors cases must be considered :
- normal operating
- stand-bymode
- power supply start-up
- abnormal conditions : off load, short circuit, ...
II.1. Normal Operating (master slave mode)
In this configuration, the master circuit generatesa
pulse widthmodulatedsignal issued from themonitoring
of the output voltage which needs the best
accuracy (in TV applications : the horizontal deflection
stagesupplyvoltage).Themaster circuit power
supply can be supplied by another output.
The PWM signal are sent towards the primary side
through small differentiating transformer. For the
TEA2164 positive pulses are transistor switchingon
commands ; and negative pulses are transistor
switching-offcommands (Figure 4). In this configuration,
only by synchronizing the master oscillator,
the switching transistor may be synchronized with
an external signal.
II.2. Stand-by Mode
In this configuration the master circuit no longer
sends PWM signals, the structure is not synchronized
; and the TEA2164 operates in burst mode.
The average power consumption at the secondary
side may be very low 1W 3 P 3 6W (as it is
consumed in TV set during stand by).
By action on the maximum duty cycle control, a
primary loop maintains a semi-regulation of the
output voltages.Voltage on feed-back is applied on
Pin 9.
Burst period is externally programmedby capacitor
C1.
II.3. Power Supply Start-up
After the mains have been switched-on, the VCC
storage capacitor of the TEA2164 is charged
through a high value resistor connected to the
rectified high voltage.When Vcc reaches VCC start
threshold (9V typ), the TEA2164 starts operatingin
burst mode. Since available output power is low in
burst mode the output power consumption must
remain low before complete setting-up of output
voltage. In TV application it can be achieved by
maintaining the TV in stand-by mode during startup.
Overvoltage Protection
When VCC exceeds VCC max, an internal flip-flop
stops output conduction signals. The circuit will
start again after the capacitor C1 discharge ; it
means : after loss of synchronization or after Vcc
stop crossing (Figure 7).
In flyback converters, this function protects the
power supply against output voltage runaway.
SINUDYNE STUDIO 2568Q CHASSIS PROFESSIONAL T6700 Synchronized switch-mode power supply:
In a switch mode power supply, a first switching transistor is coupled to a primary winding of an isolation transformer. A second switching transistor periodically applies a low impedance across a second winding of the transformer that is coupled to an oscillator for synchronizing the oscillator to the horizontal frequency. A third winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a DC control voltage in the capacitor that varies in accordance with a supply voltage B+. The control voltage is applied via the transformer to a pulse width modulator that is responsive to the oscillator output signal for producing a pulse-width modulated control signal. The control signal is applied to a mains coupled chopper transistor for generating and regulating the supply voltage B+ in accordance with the pulse width modulation of the control signal.
Description:
The invention relates to switch-mode power supplies.
Some television receivers have signal terminals for receiving, for example, external video input signals such as R, G and B input signals, that are to be developed relative to the common conductor of the receiver. Such signal terminals and the receiver common conductor may be coupled to corresponding signal terminals and common conductors of external devices, such as, for example, a VCR or a teletext decoder.
To simplify the coupling of signals between the external devices and the television receiver, the common conductors of the receiver and of the external devices are connected together so that all are at the same potential. The signal lines of each external device are coupled to the corresponding signal terminals of the receiver. In such an arrangement, the common conductor of each device, such as of the television receiver, may be held "floating", or conductively isolated, relative to the corresponding AC mains supply source that energizes the device. When the common conductor is held floating, a user touching a terminal that is at the potential of the common conductor will not suffer an electrical shock.
Therefore, it may be desirable to isolate the common conductor, or ground, of, for example, the television receiver from the potentials of the terminals of the AC mains supply source that provide power to the television receiver. Such isolation is typically achieved by a transformer. The isolated common conductor is sometimes referred to as a "cold" ground conductor.
In a typical switch mode power supply (SMPS) of a television receiver the AC mains supply voltage is coupled, for example, directly, and without using transformer coupling, to a bridge rectifier. An unregulated direct current (DC) input supply voltage is produced that is, for example, referenced to a common conductor, referred to as "hot" ground, and that is conductively isolated from the cold ground conductor. A pulse width modulator controls the duty cycle of a chopper transistor switch that applies the unregulated supply voltage across a primary winding of an isolating flyback transformer. A flyback voltage at a frequency that is determined by the modulator is developed at a secondary winding of the transformer and is rectified to produce a DC output supply voltage such as a voltage B+ that energizes a horizontal deflection circuit of the television receiver. The primary winding of the flyback transformer is, for example, conductively coupled to the hot ground conductor. The secondary winding of the flyback transformer and voltage B+ may be conductively isolated from the hot ground conductor by the hot-cold barrier formed by the transformer.
It may be desirable to synchronize the operation of the chopper transistor to horizontal scanning frequency for preventing the occurrence of an objectionable visual pattern in an image displayed in a display of the television receiver.
It may be further desirable to couple a horizontal synchronizing signal that is referenced to the cold ground to the pulse-width modulator that is referenced to the hot ground such that isolation is maintained.
A synchronized switch mode power supply, embodying an aspect of the invention, includes a transfromer having first and second windings. A first switching arrangement is coupled to the first winding for generating a first switching current in the first winding to periodically energize the second winding. A source of a synchronizing input signal at a frequency that is related to a deflection frequency is provided. A second switching arrangement responsive to the input signal and coupled to the second winding periodically applies a low impedance across the energized second winding that by transformer action produces a substantial increase in the first switching current. A periodic first control signal is generated. The increase in the first switching current is sensed to synchronize the first control signal to the input signal. An output supply voltage is generated from an input supply voltage in accordance with the first control signal.
SINUDYNE STUDIO 2568Q CHASSIS PROFESSIONAL T6700 Switch-mode power supply with burst mode standby operation:
In a switch mode power supply, a first switching transistor is coupled to a primary winding of a transformer for generating pulses of a switching current. A secondary winding of the transformer is coupled via a switching diode to a capacitor of a control circuit for developing a control signal in the capacitor. The control signal is applied to a mains coupled chopper second transistor for generating and regulating supply voltages in accordance with pulse width modulation of the control signal. During standby operation, the first and second transistors operate in a burst mode that is repetitive at a frequency of the AC mains supply voltage such as 50 Hz. In the burst mode operation, during intervals in which pulses of the switching current occur, the pulse width and peak amplitude of the switching current pulses progressively increase in accordance with the waveform of the mains supply voltage to provide a soft start operation in the standby mode of operation within each burst group.
Description:
The invention relates to switch-mode power supplies.
In a typical switch mode power supply (SMPS) of a television receiver the AC mains supply voltage is coupled to a bridge rectifier. An unregulated direct current (DC) input supply voltage is produced. A pulse width modulator controls the duty cycle of a chopper transistor switch that applies the unregulated supply voltage across a primary winding of a flyback transformer. A flyback voltage at a frequency that is determined by the modulator is developed at a secondary winding of the transformer and is rectified to produce DC output supply voltages such as a voltage B+ that energizes a horizontal deflection circuit of the television receiver and a voltage that energizes a remote control unit.
During normal operation, the DC output supply voltages are regulated by the pulse width modulator in a negative feedback manner. During standby operation, the SMPS is required to generate the DC output supply voltage that energizes the remote control unit. However, most other stages of the television receiver are inoperative and do not draw supply currents. Consequently, the average value of the duty cycle of the chopper transistor may have to be substantially lower during standby than during normal operation.
Because of, for example, storage time limitation in the chopper transistor, it may not be possible to reduce the length of the conduction interval in a given cycle below a minimum level. Thus, in order to maintain the average value of the duty cycle low, it may be desirable to operate the chopper transistor in an intermittent or burst mode, during standby. During standby, a long dead time interval occurs between consecutively occurring burst mode operation intervals. Only during the burst mode operation interval switching operation occurs in the chopper transistor. The result is that each of the conduction intervals is of a sufficient length.
In accordance with an aspect of the invention, burst mode operation intervals are initiated and occur at a rate that is determined by a repetitive signal at the frequency of the AC mains supply voltage. For example, when the mains supply voltage is at 50 Hz, each burst mode operation interval, when switching cycles occur, may last 5 milliseconds and the dead time interval when no switching cycles occur, may last during the remainder portion or 15 milliseconds. Such arrangement that is triggered by a signal at the frequency of the mains supply voltage simplifies the design of the SMPS.
The burst mode operation intervals that occur in standby operation are synchronized to the 50 Hz signal. During each such interval, pulses of current are produced in transformers and inductances of the SMPS. The pulses of current occur in clusters that are repetitive at 50 Hz. The pulses of current occur at a frequency that is equal to the switching frequency of the chopper transistor within each burst mode operation interval. Such qurrent pulses might produce an objectionable sound during power-off or standby operation. The objectionable sound might be produced due to possible parasitic mechanical vibrations as a result of the pulse currents in, for example, the inductances and transformers of the SMPS.
In accordance with another aspect of the invention, the change in the AC mains supply voltage during each period causes the length of the conduction interval in consecutively occurring switching cycle during the burst mode operation interval to increase progressively. Such operation that occurs during each burst mode operation interval may be referred to as soft start operation. The soft start operation causes, for example, gradual charging of capacitors in the SMPS. Consequently, the parasitic mechanical vibrations are substantially reduced. Also, the frequency of the switching cycles within each burst mode operation interval is maintained above the audible range for further reducing the level of such audible noise during standby operation.
A switch mode power supply, embodying an aspect of the invention, for generating an output supply voltage during both a standby-mode of operation and during a run-mode of operation includes a source of AC mains input supply voltage. A control signal at a given frequency is generated. A switching arrangement energized by the input supply voltage and responsive to the first control signal produces a switching current during both the standby-mode of operation and the run-mode operation. The output supply voltage is generated from the switching current. An arrangement coupled to the switching arrangement and responsive to a standby-mode/run-mode control signal and to a signal at a frequency that is determined by a frequency of the AC mains input supply voltage controls the switching arrangement in a burst mode manner during the standby-mode of operation. During a burst interval, a plurality of switching cycles are performed and during an alternating dead time interval no switching cycles are performed. The two intervals alternate at a frequency that is determined by the frequency of the AC mains input supply voltage.
TEA5170 SWITCH MODE POWER SUPPLY SECONDARY CIRCUIT:
.INTERNAL PWM SIGNAL GENERATOR .POWER SUPPLY WIDE RANGE 4.5V – 14.5V .SOFT START .REFERENCE VOLTAGE 2V ± 5% .WIDE FREQUENCY RANGE 250kHz .MINIMUM OUTPUT PULSE WIDTH 500nS
.MAXIMUM PRESET DUTY CYCLE
.SYNCHRONIZATION WINDOW
.OUTPUT SWITCH .UNDERVOLTAGELOCKOUT .FREQUENCYRANGE WITH SYNCHRONIZATION 64kHz
DESCRIPTION
The TEA5170 is designed to work in the secondary
part of an off-line SMPS, sending pulses to the
slaved TEA2260/61 which are located on the primary
side of the main transformer. An accurate
regulated voltage is obtained by duty cycle control.
The TEA5170 can be externally synchronized by
higher or lower frequency signal, then it could be
used in applications like TV set ones.
GENERAL DESCRIPTION
The TEA5170 takes place in the secondary part of
an isolated off-line SMPS. During normal mode
operation, it sends pulses to the slave circuit located
in the primary side (TEA2164, TEA2260/61)
through a pulse transformer to achieve a very
precisely regulated voltage by duty cycle control.
The main blocs of the circuit are :
- an error voltage amplifier
- an RC oscillator
- an output stage
- a VCC monitor
- a voltage reference bloc
- a pulse width modulator
- two logic blocs
- a soft start and Duty cycle limiting bloc
PRINCIPLE OF OPERATION
The TEA5170 sends pulses continuously to the
slave circuit in order to insure a proper behaviour
of the primary side.
- According to this, the output duty cycle is varying
between DON (min.) (0.05) and DON (max.) (0.75) :
then even in case of open load, pulses are still
sent to the slave circuit.
SYNCHRONIZED MODE
The TEA5170 will enter the Synchronized Mode
when it receives one pulse through Rt during Ct
discharge.
At that time Ct charging current will be multiplied
by 0.75 and period will increase up to To x 1.26.
Apulse occuring during the synchro window, commands
the Ct downloading. If none, the TEA5170
will return to normalmode at the end of the period.
STARTING
When VCC is under 4V, output pulses are not
allowed and the slave circuit keeps its own mode.
When VCC is going over 4V, output pulses are sent
via the pulse transformer (or an optical device) to
the slave circuit which is synchronizing and entering
the slaved mode. Output pulses can be shut
down only if VCC goes below 3.8 Volt.
SOFT START
Using Csf, it is possible to make a soft start sequence.
When VCC grows from 0V to 4V, voltage
on Csf equals0V.When VCC is higher than 4V, Csf
is loaded by a 3.7mA current, then TonMAX (Vcsf)
will vary linearly from Tonmin to Tonmax according
to Csfst bias.
When VCC will go low (3.8 Volt threshold), Csf will
be downloadedby an internal transistor.
TDA8175 TV VERTICAL DEFLECTION OUTPUT CIRCUIT
POWER AMPLIFIER
.FLYBACK GENERATOR
.AUTOMATIC PUMPING COMPENSATION
.THERMAL PROTECTION
.REFERENCE VOLTAGE
DESCRIPTION
The TDA8175 is a monolithic integrated circuit in
HEPTAWATT package. It is a high efficiency power
booster for direct driving of vertical windings of TV
yokes. It is intended for use in Color and B & W
television sets as well as in monitors and displays. THERMAL PROTECTION
The thermal protection circuit intervenes when the
die temperatures reaches 150oC and turns-off the
output power device.
PUMPING COMPENSATION
The device incorporatesa special preampliflier, the
gain of which varies withchanges in supplyvoltage.
This functionallows perfect compensationof height
variations caused by changes in brightness.
TDA8140 HORIZONTAL DEFLECTION POWER DRIVER
DESCRIPTION
The TDA 8140 is a monolithic integrated circuit designed
to drive the horizontal deflectionpower transistor.
The current source characteristic of this device is
adapted to the on-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8140 is internally protected
against short circuit and thermal overload.
During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitry mustbe adaptedto the required
base current in order to ensure the power transistor
saturation.
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 5
wegive a comparisonbetweenthe typical real base
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base current
which gives an additional power dissipation on
the power transistor.
Furthermoreduring the turn-ONand turn-OFFtransient
phase of the chassis the power transistor is
extremely stressed when the conventionalnetwork
cannot guarantee the saturation ; for this reason,
generally, the driving circuit must be carefully designed
and is different for each deflection system.
The new approach, using the TDA 8140, overcomes
these restrictions by means of a feedback
principle.
As shown in Figure 5, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the required
base current Ib can be easily generated by a feedback
transconductanceamplifier gm which senses
the deflection current across the resistor Rs at the
emitter of the power transistor and delivers :
Ib = RS . gm . Ie
The transconductance must only fulfill the condition
:
1
1 + bmin V 1
RS
<>
RS
Where bmin is the minimum current gain of the
transistor. This method always ensures the correct
base current and acts time independent on principle.For the turn-OFF, the base of the power transistor
must be discharged by a quasi linear time decreasing
current as given in Figure 6.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
This is due to the constant base charge in the
turn-ON phase independent from the collector current
; hence a high peak current results into a low
storage time of the transistor because the excess
base charge is a minimum and vice versa. In the
active deflection the required function, high peak
current-fast switch-OFF and low peak current-slow
switch-OFF, is obtained by a controlled base discharge
current for the power transistor ; the negative
slope of this ramp is proportional to the actual
sensed current.
As a result, the active driving system even improves
the sharpnessof vertical lines on the screen
compared with the traditional solution due to the
increasedstability factor of the loop representedas
the variation of the storagetime versus the collector
peak current.
TDA2545A Quasi-split-sound circuitGENERAL DESCRIPTION The TDA2545A is a monolithic integrated circuit for quasi-split-sound processing in television receivers. Features · 3-stage gain controlled i.f. amplifier · A.G.C. circuit · Reference amplifier and limiter amplifier for vision carrier (V.C.) processing · Linear multiplier for quadrature demodulation.
TDA2541 IF AMPLIFIER WITH DEMODULATOR AND AFC
DESCRIPTION
The TDA2540 and 2541 are IF amplifier and A.M.
demodulator circuits for colour and black and white
televisionreceiversusingPNPorNPNtuners. They
are intended for reception of negative or positive
modulation CCIR standard.
They incorporate the following functions : .Gain controlled amplifier .Synchronous demodulator .White spot inverter .Video preamplifier with noise protection .Switchable AFC .AGC with noise gating .Tuner AGC output (NPN tuner for 2540)-(PNP
tuner for 2541) .VCR switch for video output inhibition (VCR
play back).
TDA1521 TDA1521Q 2 x 12 W hi-fi audio power amplifier:
GENERAL DESCRIPTION
The TDA1521/TDA1521Q is a dual hi-fi audio power amplifier encapsulated in a 9-lead plastic power package.
The device is especially designed for mains fed applications (e.g. stereo tv sound and stereo radio).
Features
· Requires very few external components
· Input muted during power-on and off
(no switch-on or switch-off clicks)
· Low offset voltage between output and ground
· Excellent gain balance between channels
· Hi-fi according to IEC 268 and DIN 45500.
FUNCTIONAL DESCRIPTION
This hi-fi stereo power amplifier is designed for mains fed applications. The circuit is designed for both symmetrical and
asymmetrical power supply systems. An output power of 2 ´ 12 watts (THD = 0,5%) can be delivered into an 8 W load
with a symmetrical power supply of ± 16 V.
The gain is fixed internally at 30 dB. Internal gain fixing gives low gain spread and very good balance between the
amplifiers (0,2 dB).
A special feature of this device is a mute circuit which suppresses unwanted input signals during switching on and off.
Referring to Fig.13, the 100 mF capacitor creates a time delay when the voltage at pin 3 is lower than an internally fixed
reference voltage. During the delay the amplifiers remain in their DC operating mode but are isolated from the
non-inverting inputs on pins 1 and 9.
Two thermal protection circuits are provided, one monitors the average junction temperature and the other the
instantaneous temperature of the power transistors. Both protection circuits activate at 150 °C allowing safe operation to
a maximum junction temperature of 150°C without added distortion.
Input mute circuit
The input mute circuit operates only during switching on and off of the supply voltage. The circuit compares the 1/2 supply
voltage (at pin 3) with an internally fixed reference voltage (Vref), derived directly from the supply voltage. When the
voltage at pin 3 is lower than Vref the non-inverting inputs (pins 1 and 9) are disconnected from the amplifier. The voltage
at pin 3 is determined by an internal voltage divider and the external 100 mF capacitor.
During switching on, a time delay is created between the reference voltage and the voltage at pin 3, during which the
input terminal is disconnected.
2. Features of the CCU 2030, CCU 2050 and CCU 2070
With the proliferation of low cost microprocessors and microprocessor controlled devices, television (TV) receivers are being designed to utilize digitized signals and controls. There are many advantages associated with digital TV receivers, including uniformity of product, precise control of signal parameters and operating conditions, elimination of mechanical switches and a potential for reliability that has been heretofore unknown. Digital television receivers include a high speed communication bus for interconnecting a central control unit microprocessor (CCU) with various TV function modules for processing a TV signal. These modules include a deflection processing unit (DPU), a video processing unit (VPU), an automatic phase control (APC), a video codec unit (VCU), an audio analog to digital converter (ADC) and an audio processing unit (APU). The CCU has associated with it a non-volatile memory, a hardware-generated clock signal source and a suitable interface circuit for enabling the CCU to control processing of the TV signal throughout the various TV function modules. The received TV signal is in analog form and suitable analog to digital (A/D) converters and digital to analog (D/A) converters are provided for converting the digital and analog signals for signal processing and for reconverting them after processing for driving a cathode ray tube (CRT) and suitable speakers. The CCU microprocessor is heavily burdened because of the high speed timing required to control the various TV function modules.
Central
Control Units All three types, differing only in their ROM and RAM
capacity, are the unprogrammed versions and are programmed during
production according to the customer's specifications. For programming,
an emulator board is available. The programmed versions have the type
designations CCU2031, CCU 2032 and so on. Combined with peripheral
hardware, CCU 2030, CCU 2050 and CCU 2070 offer the following features:
infrared remote control ~ front-panel control with up to 32 commands —
tuning by frequency synthesis (PLL) and band switching non-volatile
program storage LED display for channel indication, max. 4 digits,
directly driven storage of alignment information during production
generation and recognition of various signals control of the digital
signal processors for video, audio, teletext and deflection via a serial
bus (IM bus) The CCUs are produced in N-channel HMOS technology, are
housed in a 40-pin Dil plastic package, and contain on one chip the
following functions (Fig. 4): 8049 8-bit
microcomputer
remote-control decoder Ports P2 and P3 for connecting a maximum of 32
keys and 4-digit seven-segment LED channel indication PLL tuner circuit
for VHF and UHF IM bus interface for inputting and outputting control
signals and for inputting alignment instructions crystal-controlled
clock oscillator which also serves as reference for the PLL circuit
mains flip-flop and reset circuit This specification is restricted to
the hardware aspects of the CCU 20.0 Central Control Unit. Many
functions are defined in detail by the microcomputer’s ROM code and are
thus described in the program specifications of the individual
applications. For understanding the operation of the CCU, the following
texts are useful: IM bus specification (section 11.) and the manual of
the 48-series microprocessor family (see sections 12. and 13.).
3. Functional Description
The
CCU 20.0 Central Control Unit provides an efficient interface between
user and TV set. Their programmability enables different set makers to
design receivers according to their own specs. The CCU has the main
functions: — processing of user’s settings — control of the digital
signal processors for video, audio, Teletext and deflection By means of
the MDA 2062 non-volatile memory (EE-PROM) which has a capacity of 128 x
8 bits, the CCU controls storage and output of factory alignment values
that have been programmed during production of the TV set.
10. Description of the Connections and Signals
Pin
1 — XTAL: Oscillator Crystal The internal configuration of this
in/output is shown in Fig. 8. For normal use, a 4 MHz crystal is
connected to this oscillator pin and to GND. The input is self-biasing
to ap- prox. 3.5 V, input DC resistance is approx. 350 kQ. The output
signal is the 4 MHz clock signal of the CCU. It may be fed to other
circuits, but maximum load configurations have to be observed as loading
affects oscillation start-up after power-on of the ST.BY supply (see
section 8.).
Pin 2 — S: Single-Step Input
The internal configuration of this input is shown in Fig. 9. Via this input, the CCU can be put into the single-step mode (see section 12.2.2.). The inactive low level is 0 to +5 V and the required, active high level is +12 V. The input contains a pull-down device (about 30 pA to GND) which allows to leave the input unconnected for normal operation.
Pin 3 - Osc Out: fos./4096 Output
‘The
internal configuration of this output is shown in Fig. 10. This output
provides the memory clock signal for the MDA 2062 EEPROM (1 kHz). The
drive capability of pin 3 is one TTL gate. The frequency is selected by a
mask option (see section 14.).
Pin 4 — Reset: Reset Input The internal configuration of this input is shown in Fig. 11. An active low level at this pin provides normalization for uC and peripheral circuits. An inactive high level is fed to the uC and peripheral circuits depending on the state of the mains flip-flop and the setting of the reset options (cf. sec- tions 4.6. and 14.). The input circuit is of a Schmitt trigger configuration and provides some noise immunity. In critical applications, however, an additional ceramic capacitor, connected between this pin and GND, may be necessary to increase noise immunity.
Pin 5 — Mains: Mains Switch Input/Output The internal configuration of this in/output is shown in Fig. 12.
Pin 5 represents the output of the mains flip-flop with a resistive pull-up. The output is active low (mains on). By shorting this pin to GND momentarily, the mains flip-flop is set to the active, low state via the input circuitry of this pin. The resistive pull-up provides drive for a PNP transistor connected emitter to ST.BY, base via a resistor to pin 5, and collector to the mains relay. A detailed functional de- scription of the mains flip-flop and reset circuit is given in section 4.6.
Pin 6 — EA: Test Enable Input The internal configuration of this input is shown in Fig. 9. Pin 6 is a test input providing external access to the uC (cf. sections 5. and 12.2.4.). For normal operation, an inactive low level is required at this pin (GND). Pin 7 to 9 — Data, Ident, Clock: IM Bus Connections The internal configurations of these pins are shown in Figs. 12 and 13. By means of these pins, the CCU links with peri- pheral devices. The IM bus is described in detail in section 11. Please note that the resistive pull-ups for all open-drain outputs connected to the IM bus are situated within the CCU.
Pins 10 and 11 — Up and Down: Tuning Voltage Outputs The internal configuration of these pins is shown in Fig. 13. Active high levels on these outputs indicate whether the tuner frequency should be increased (Up) or reduced (Down) and represent the output signals of the phase- locked loop circuit of the CCU (cf. section 4.4.). The out- puts contain resistive pull-ups.
Pin 12 — IR: Remote-Control Input The internal configuration of this pin is shown in Fig. 14. Via an external coupling capacitor of 10 nF, the remote-control signal, amplified by the TBA 2800 preamplifier IC, is fed to the remote-control decoder contained in the CCU (cf. sec- tion 4.2.). The input is self-biasing to approx. 1.4 V, and the input DC resistance is approx. 150 kQ. For highest input sensitivity, this pin must not be loaded resistively.
Pin 13 — LO: Local Oscillator Input The internal configuration of this input is shown in Fig. 14. Via an external coupling capacitor of at least 1 nF, the tuner oscillator frequency (signal), divided by 64 by a prescaler device, is fed to the PLL circuit contained in the CCU, thereby providing feedback from the tuner oscillator (cf. section 4.4.). The input is self-biasing to approx. 1.7 V, and the input DC resistance is approx. 200 kQ. For highest in- put sensitivity, this pin must not be loaded resistively.
Pin 14 to 19, 21 and 22 — Port P3, Bits 0 to 7 The internal configuration of these outputs or test in/out- puts is shown in Fig. 15. During normal use, these open- drain outputs provide multiplexed drive for LED display and keyboard (cf. section 4.3.). The voltage handling capability is limited to Vpp. During test operations (EA at or above 5 V, cf. section 5.), these pins give access to the nC bus port DBp to DB7 which also connects to peripheral circuits as PLL, IM bus interface, remote-control decoder etc. Drive capability of the bus port via P3 is very limited (external CMOS bidirectional buffers required).
Pin 20 — GND: Ground, 0 This pin must be connected to the negative of the supply. It may also be designated Vsgg. Please note that current on this pin is total Vpp and ST.BY supply current plus currents flowing into outputs (Port P3) and may amount to more than 300 mA.
Pins 23 to 26 and 36 to 39 — Port P2, Bits 0 to 7
The internal configuration of these in/outputs or test out- puts is shown in Fig. 16. Direct data transfer with the uC can be executed via this port (cf. sections 12.2.12. and 4.3.). The outputs drive one TTL gate. Open-drain outputs with a 5 V rating may be specified on each single pin of this port as an option (cf. section 14.). During test operations (EA at or above 5 V, cf. section 5.), P24, to P27 give access to the C output signals RD, WR, ALE and PSEN which al- so connect to peripheral circuits as PLL, IM bus interface, remote-control! decoder etc. Drive capability of the uC con- trol signals via connections P2, to P27 is very limited (exter- nal CMOS buffers required). Pin 27 — ST.BY: Standby Supply Voltage This pin must be connected to the positive of the 5 V standby supply. it powers the crystal oscillator, the mains flip-flop and reset circuits, the remote-control decoder and a specific portion of the 1.C-resident RAM. From standby operation, an infrared signal may activate the mains flip-flop and thus awake the system to full operation.
Pins 28 to 35 — Port P1, Bits 0 to 7
The internal configuration of these in/outputs is shown in Fig. 17. Direct data transfer with the 4C can be executed via this port (cf. section 12.2.12.). The outputs are open- drain with a 12 V rating. Pin 40 —- Vpp: Supply Voltage This pin must be connected to the positive of the 5 V supply.
11. Description of the IM Bus
The
INTERMETALL Bus (IM Bus for short) has been designed to control the
DIGIT 2000 ICs by the CCU Central Control Unit. Via this bus the CCU can
write data to the ICs or read data from them. This means the CCU acts
as a master whereas all controlled ICs are slaves. The IM Bus consists
of three lines for the signals Ident (ID), Clock (CL) and Data (D). The
clock frequency range is 50 Hz to 170 kHz. Ident and clock are
unidirectional from the CCU to the slave ICs, Data is bidirectional. Bi
directionality is achieved by using open-drain outputs with
On-resistances of 150 Q maximum. The 2.5 kQ. pull-up resistor common to
all outputs is incorporated in the CCU. The timing of a complete IM Bus
transaction is shown in Fig. 18 and Table 1.
In the non-operative state the signals of all three bus lines are High. To start a transaction the CCU sets the ID signal to Low level, indicating an address transmission, and sets the CL signal to Low level as well to switch the first bit on the Data line.
Thereafter
eight address bits are transmitted beginning with the LSB. Data
takeover in the slave ICs occurs at the High levels of the clock signal.
At the end of the address byte the ID signal goes High, initiating the
address comparison in the slave circuits. In the addressed slave the IM
bus interface switches over to Data read or write, because these
functions are correlated to the address. Also controlled by the address
the CCU now transmits eight or sixteen clock pulses, and accordingly one
or two bytes of data are written into the addressed IC or read out from
it, beginning with the LSB. The Low clock level after the last clock
pulse switches the Data line to High level. After this the completion of
the bus transaction is signalled by a short Low-state pulse of the ID
signal. This initiates the storing of the transferred data. It is
permissible to interrupt a bus transaction for up to 10 ms. For future
software compatibility, the CCU must write a zero into all bits not used
at present. When reading undefined or unused bits, the CCU must adopt
“don’t care” behaviour.
VCU 2134 Video Codec
High-speed
coder/decoder IC for analog - to-digital and digital-to- analog
conversion of the video signal in digital TV receivers based on the
DIGIT 2000 concept and having double-scan horizontal deflection. The VCU
2134 is a VLSI circuit in Cl technology, housed in a 40-pin Dil plastic
package. One single silicon chip combines the following functions and
circuit details (see Fig. 1):
— two input video amplifiers
— one A/D converter for the composite video signal
— the noise inverter
— one D/A converter for the luminance signal
— two D/A converters for the color difference signals
~ one RGB matrix for converting the color difference signals and the luminance signal into RGB signals
— three RGB output amplifiers
— programmable auxiliary circuits for blanking, brightness
adjustment and picture tube alignment
~ additional clamped
RGB inputs for text and other analog RGB signals
— programmable beam current limiting
1. Functional Description
The
VCU 2134 Video Codec Unit is intended for converting the analog
composite video signal from the video demodulator into a digital
signal. The latter is further processed digitally in the CVPU 2235 Video
Processor, in the PSP 2210 Progressive Scan Processor, and in the DPU
2554 Deflection Processor. After processing in the CVPU and the PSP
(color demodulation, comb filtering, line storage for double scanning
etc.), the PSP’s output signals (luminance and color difference) are
reconverted into analog signals in the VCU 2134. From these analog
signals are de- rived the RGB signals by means of the RGB matrix, and,
af- ter amplification in the internal RGB amplifiers, the RGB signals
drive the RGB output amplifiers of the color TV re- ceiver. In addition,
the VCU 2134 carries out the following functions:
— brightness adjustment
— automatic CRT spot-cutoff contro! (black level)
- white balance control and beam current limiting
Further,
the VCU 2134 offers direct inputs for text or other analog RGB signals
including adjustment of brightness and contrast for these signals. The
RGB matrix and RGB amplifier circuits integrated in the VCU 2134 are
analog. The CRT spot-cutoff control is carried out via the RGB
amplifiers’ bias, and the white balance control is accomplished by
varying the gain of these amplifiers. The VCU 2134 is clocked both by a
14 to 20.5 MHz clock signal and a 28 to 41 MHz clock signal supplied by
the MCU 2632 Clock Generator IC.
1.1. The A/D Converter with Input Amplifiers and Bit Enlargement The video signal is input to the VCU 2134 via pin 37 which is intended for normal TV video signal and for VCR or SCART video signal respectively. The video amplifier whose action is required, is activated by the CCU 2030, CCU 2050 or CCU 2070, via the IM bus by software (see Fig. 9). Video Amp | has the low gain (2 V video amplitude required), and Video Amp Il has the high gain (1 V video amplitude required). The amplification of both video amplifiers is doubled during the undelayed horizontal blanking pulse (at pin 36) in order to obtain a higher digital resolution of the color synchronization signal (burst). The A/D converter is of the flash type, a circuit of 2" comparators connected in parallel. This means that the number of comparators must be doubled if one additional bit is needed. Thus it is important to have as few bits as possible. For a slowly varying video signal, 8 bits are required. In order to achieve an 8-bit picture resolution
using a 7-bit converter, a trick is used: during every other line the reference voltage of the A/D converter is changed by an
amount corresponding to one half of the least significant bit. In this procedure, a grey value located between two 7-bit steps is converted to the next lower value during one line and to the next higher value during the next line. The two grey values on the screen are averaged by the viewer’s eye, thus producing the impression of grey values with 8-bit resolution. The A/D converter’s sampling frequency is 14 to 20.5 MHz, the clock being supplied by the MCU 2632 Clock Generator IC which is common to all circuits for the digital TV system. The converter’s resolution is 1/2 LSB of 8 bits. Its output signal is Gray-coded to eliminate spikes and glitches resulting from different comparator speeds or from the coder itself. The output is fed to the CVPU 2235 and to the DPU 2554 in parallel form.
1.2. The Noise Inverter
The
digitized composite video signal passes the noise inverter circuit
before it is put out to the CVPU and to the DPU 2554. The noise inverter
serves for suppressing bright spots on the screen which can be
generated by noise pulses, p. ex. produced by ignition sparks of cars
etc. The function of the noise inverter can be seen in Fig. 2.
The maximum white level corresponds with step 126 of the A/D converter’s output signal (that means a voltage of 7 V at pin 37 in the case Video Amp | being selected). If, due to an unwanted pulse on the composite video signal, the voltage reaches 7.5 V (what means step 127 in digital) or more, the signal level is reduced by such an amount, that a medium grey is obtained on the screen (about 40 IRE). The noise inverter circuit can be switched off by software (address 16 in the CVPU, see there). The luminance D/A converter is designed as an R-2R ladder network. It is clocked with the 28.6 MHz clock signal applied to pin 23. The cutoff frequency of the luminance signal is determined by the clock frequency.
1.3. The Luminance D/A Converter (Y)
After
having been processed in the CVPU 2235 (color demodulation, comb
filtering, etc.) and in the PSP 2210, the different parts of the
digitized video signal are fed back to the VCU 2134 for further
processing to drive the RGB out- put amplifiers. The luminance signal
(Y) is routed to the Y D/A converter in the VCU 2134 in the form of a
parallel 8- bit signal with a resolution of 1/2 LSB of 9 bits. This bit
range provides a sufficient signal range for contrast as well as
positive and negative overshoot caused by the peaking filter (see Data
Sheet CVPU).
1.4. The D/A Converters for the Color Difference Signals
R-Y
and B-Y In order to save input and output pins at the VCU 2134, CVPU
and PSP as well as connection lines, the two digital color difference
signals R-Y and B-Y are transferred in time muitiplex operation. This is
possible because these signals’ bandwidth is only 2 MHz and the clock
is a 28 to 41 MHz signal. The two 8-bit D/A converters R-Y and B-Y are
also built as R-2R ladder networks. They are clocked with % clock fre-
quency, but the clock for the multiplex data transfer is 28 to 41 MHz.
Four times 4 bits are transferred sequentially, giving a total of 16
bits. A sync signal coordinates the multi- plex operations in the VCU
2134, CVPU and PSP. Thus, only four lines are needed for 16 bits.
Fig. 4 shows the timing diagram of the data transfer described. To switch the CO input the VCU 2134 from chroma signal reception to sync signal reception, the information to do this is given by the PSP to pins 10 to 17 of the VCU in the shape of “zero luminance” during horizontal blanking time. To avoid mistakes, a limiter in the PSP ensures that no zero luminance is put out at other times.
1.5. The RGB
Matrix
and the RGB Output Amplifiers In the RGB matrix, the signals Y, R-Y and
B-Y are dematrixed, the reduction coefficients of 0.88 and 0.49 being
tak- en into account. In addition, the matrix is supplied with a signal
produced by an 8-bit D/A converter for setting the brightness of the
picture. The brightness adjustment range corresponds to ‘2 of the
luminance signal range. It can be covered in 255 steps. The brightness
is set by commands fed from the CCU 2030, CCU 2050 or CCU 2070 Central
Control Unit to the CVPU via the IM bus. There is available one matrix,
called matrix 1, based on the formula: R = 1, + (RY) + 2° (BY) + Y G =
g,- (RY) + go: (BY) + Y B = b, - (R-Y) + bp - (BY) + Y
The three RGB
output amplifiers are impedance converters having a low output
impedance, an output voltage swing of 6 V (p-p), thereof 3 V for the
video part and 3 V for bright- ness and dark signal. The output current
is 4 mA.
Fig. 5 shows the recommended video output stage configuration. For the purpose of white-balance control, the amplification factor of each output amplifier can be varied stepwise in 127 steps (7 bits) by a factor of 1 to 2. Further, the CRT spot-cutoff control is accomplished via these amplifiers’ bi- as by adding the output signal of an 8-bit D/A converter to the intelligence signal. The amplitude of the output signal corresponds to one half of the luminance range. The eight bits make it possible to adjust the dark voltage in 0.5% steps. By means of this circuit, the factory-set values for the dark currents can be maintained and aging of the picture tube compensated.
1.6. The Beam Current and Peak Beam Current Limiter The principle of this circuitry may be explained by means of
Fig. 6. Both facilities are carried out via pin 38 of the VCU 2134. For beam current limiting and peak beam current limiting, contrast and brightness are reduced by reducing the reference voltages for the D/A converters Y, R-Y and B-Y. At a voltage of more than +4 V at pin 38, contrast and brightness are not affected. In the range of +4 Vto +3V, the contrast is continuously reduced. At +3 V, the original contrast is reduced to a programmable level, which is set by the bits of address 16 of the CVPU as shown in Table 2. A further decrease of the voltage merely reduces brightness, the contrast remains unchanged. At 2.5 V, the brightness is reduced to zero. At voltages lower than 2 V, the output goes to ultra black. This is provided for security purposes. The beam current limiting is sensed at the ground end of the EHT circuit, where the average value of the beam cur- rent produces a certain voltage
drop across a resistor inserted between EHT circuit and ground. The peak beam current limiting can be provided additionally to avoid “blooming” of white spots or letters on the screen. For this, a fast peak current limitation is needed which is sensed by three sensing transistors inserted between the RGB amplifiers and the cathodes of the picture tube. One of these three transistors is shown in Fig. 6. The sum of the picture tube’s three cathode currents produces a voltage drop across resistor R1. If this voltage exceeds that generated by the divider R2, R3 plus the base emitter voltage of T2, this transistor will be turned on and the voltage at pin 38 of the VCU 2134 sharply reduced. Time constants for both beam current limiting and peak beam current limiting can be set by the capacitors C1 and C2.
1.7. The Blanking
Circuit
The blanking circuit coordinates blanking during vertical and
horizontal flyback. During the latter, the VCU 2134's output amplifiers
are switched to “ultra black”. Such switching is different during
vertical flyback, however, be- cause at this time the measurements for
picture tube alignment are carried out. During vertical flyback, only
the cathode to be measured is switched to “black” during measuring time,
the other two are at ultra black so that only the dark current of one
cathode is measured at the same time. For measuring the leakage current,
all three cathodes are switched to ultra black. The sequence described
is controlled by three code bits contained in a train of 72 bits which
is transferred from the CVPU through PSP to the VCU 2134 during each
vertical blanking interval. This transfer starts with the vertical
blanking pulse. During the transfer all three cathodes of the picture
tube are biased to ultra black. In the same manner, the white-balance
control is done. The blanking circuit is controlled by two pulse
combinations supplied by the DPU 2554 Deflection Processor (“sandcastle
pulses”).
Pin 34 of the VCU 2134 receives the combined vertical blanking and delayed horizontal blanking pulse from pin 22 of the DPU (Fig. 7b), and pin 36 of the VCU gets the combined undelayed horizontal blanking and color key pulse from pin 19 of the DPU (Fig. 7a). The two outputs of the DPU are tristate controlled, supplying the output levels max. 0.4 V (low), min. 4.0 V (high), or high impedance, whereby the signal level in the high-impedance mode is determined by the VCU's input configuration, a voltage divider of 3.6 kQ and 4.7 kQ between the +5 V supply and ground, to 2.8 V. The VCU’s input amplifier has two thresholds of 2.0 V and 3.4 V for detecting the three levels of the combined pulses. In this way, two times two pulses are transferred via only two lines.
1.8. The Circuitry for Picture Tube Alignment
During
vertical flyback, a number of measurements are taken and data is
exchanged between the VCU 2134, the CVPU via PSP and the CCU. This
measurements deal with picture tube alignment, as white level and dark
current adjustment, and with the photo current supplied by a photo
resistor which serves for adapting the contrast of the picture to the
light in the room where the TV set is operated (the latter feature only
in connection with the CVPU 2235, see Fig. 5). The circuitry for
transferring the picture tube alignment data, the sensed beam currents
and the photo current is clocked in compliance with the PSP 2210 by the
vertical blanking pulse and the color key pulse.
To carry out the measurements, a quadruple cycle is provided (see Table 3). The timing of the data transfer during the vertical flyback is shown in Fig. 8, and Fig. 9 shows the data sequence during that data transfer.
A) Video signal during vertical flyback, lines No. 1 to 22.
B) Vertical blanking pulse supplied by pin 22 of the DPU 2554 to pin 34 of the VCU 2134 (tgp), duration is 13 lines and delay with respect to the start of line 4 is tyg = 23 us. With this pulse starts the 72-bit data transfer described in section 1.7., and with the end of pulse starts the picture tube’s cathode current measurement.
C) Internal control pulse for CRT current measurement, generated simultaneously in VCU 2134 and CVPU. The cathode under test is set to black by code bits.
D) Internal control pulse generated in VCU 2134 (pulse B + pulse C). During this pulse the cathodes of the CRT are at ultra black, the D/A converters for chroma and brightness are set to zero output, and Teletext fast blanking is off.
E) Control pulse generated in CVPU and VCU 2134 for CRT spot-cutoff current sensing. During this time, the measured output is set to black level. E’) Control pulse generated in VCU 2134. During this pulse, the output of the Y D/A converter delivers the white- current measuring level. This is achieved by switchi ng off the clock for the D/A converter.
F) Control pulse generated in VPU and VCU for white cur- rent sensing. During this time, the measured output is set to white current measuring level. F’) Control pulse generated in VCU 2134 which sets the Y D/A converter to zero output by setting its reference voltage to zero.
G) Window pulse for 72-bit data transfer from CVPU to VCU as described in section 1.7., duration 4 lines, generated in VCU 2134. The end of this pulse starts the clock hold-off time for the Y D/A converter (diagram E’).
H) Signal at the CO/Msync output of the PSP supplied to the CO/Msync input of the VCU 2134 (pin 21). Normally, via this connection are transferred chroma data and the sync signal. With the begin of the vertical blanking, chroma data transfer is interrupted to enable the trans- fer of 72 clock pulses for 72-bit data transfer.
1) Window pulse for 72-bit data transfer, generated in CVPU, duration 6 lines. The end of this pulse enables Y and chroma data output from CVPU to VCU.
J) Signals at the LO to L7 outputs of the PSP supplied to the LO to L7 inputs (pins 10 to 17) of the VCU 2134. With the begin of vertical blanking, luma data transfer is interrupted and the luminance output of the CVPU supplies white-current measuring level during lines 19 and 20 (see diagram F).
Fig. 9:
Data sequence during the transfer of test results from the CVPU to the VCU 2134. Nine Bytes are transferred, in each case the MSB first. These 9 Bytes, 8 bits each, coincide with the 72 pulses of 4.4 MHz that are transferred during vertical flyback from pin 8 of the PSP to pin 21 of the VCU 2134 (see Fig. 8). ! and m: beam current limiter range k: noise inverter on/off n: video input amplifier switching bit n=0 means Video Amp | selected (input amplitude 2 V) n= 1 means Video Amp II selected (input amplitude 1 V) : clamping mode: S=0 means clamping by color key pulse at pin 36 S=1 means clamping by additional pulse (Fig. 10) R, G, B: code bits p= 1: no doubled gain in the input amplifier during horizon- tal blanking (see section 1.1.) q=1: no changing of the A/D converter’s reference voltage during every other line (see section 1.1.)
1.9. The Analog RGB Inputs
The
three additional analog RGB inputs are provided for inputting text or
other analog RGB signals. They are connected to fast voltage-to-current
converters whose output current can be altered in 64 steps (6 bits) for
contrast set- ting between 100 % and 30 %. The three inputs are clamped
to a DC black level which corresponds to the level of 31 steps in the
luminance channel, by means of either the color key pulse or an
additional pulse provided by a modified fast switching input. The mode
is selected by the shift register (Fig. 9). So, the same brightness
level is achieved for normal and for external RGB signals. The output
currents of the converters are then fed to the three RGB output
amplifiers. Switchover to the external video signal is also fast.
The present invention relates to a set of three or more integrated circuits for digital video signal processing in color-television receivers as is set forth in the preamble of claim 1. An IC set of this kind is described in a publication by INTERMETALL entitled "Eine neue Dimension-VLSI-Digital-TV-System", Freiburg im Breisgau, September 1981, on pages 6 to 11 (see also the corresponding English edition entitled "A new dimension-VLSI Digital TV System", also dated September 1981).
The first integrated circuit, designated in the above-mentioned publications by "MAA 2200" and called "Video Processor Unit" (VPU), includes an analog-to-digital converter followed by a first serial-data-bus interface circuit which, in turn, is followed by a first multiplexer. During the vertical blanking interval, the analog-to-digital converter is fed, via a second multiplexer, with measured data corresponding to the cathode currents of the picture tube flowing at "black" (="dark current") and "white" ("white level") in each of the three electron guns, and with the signal of an ambient-light detector. The processed digital chrominance signals are applied to the first multiplexer.
The second integrated circuit, designated by "MAA 2000" and called "central control unit" (CCU) in the above publications, contains a microprocessor, an electrically reprogrammable memory, and a second serial-data-bus interface circuit. The memory holds alignment data and nominal dark-current/white-level data entered by the manufacturer of the color-television receiver. From these data and the measured data, the microprocessor derives video-signal-independent operating data for the picture tube.
The third integrated circuit, designated by "MAA 2100" and called "video-codec unit" (VCU) in the above publications, includes a demultiplexer, an analog RGB matrix, and three analog amplifiers each designed to drive one of the electron guns via an external video output stage. After digital-to-analog conversion, the dark current of the picture tube is adjusted via the operating point of the respective analog amplifier, and the white level of the picture tube is adjusted by adjusting the gain of the respective analog amplifier. The demultiplexer is connected to the first multiplexer of the first integrated circuit via a chroma bus.
As to the prior art concerning such digital color-television receiver systems, reference is also made to the journal "Elektronik", Aug. 14, 1981 (No. 16), pages 27 to 35, and the journal "Electronics", Aug. 11, 1981, pages 97 to 103.
During the further development of the prior art system following the above-mentioned publication dates, the developers were faced with the problem of how to accomplish the dark-current/white-level control of the picture tube within the existing system, particularly with respect to measured-data acquisition and transfer and to the transfer of the operating data to the picture tube.
Another requirement imposed during the further development of the prior art system was that the leakage currents of the electron guns of the picture tube be measured and processed within the existing system. The solution of these problems is to take into account the requirement that the number of external terminals of the individual integrated circuits be kept to a minimum.
The object of the invention as claimed is to solve the problems pointed out. The essential principles of the solution, which directly give the advantages of the invention, are, on the one hand, the division of the measurement to four successive vertical blanking intervals and, on the other hand, the utilization of one wire of the chroma bus at the beginning of the next vertical blanking interval as well as the measurement of the ambient light by means of the light detector and the measurement of the leakage currents during a single vertical blanking interval.
The invention will now be explained in more detail with reference to the accompanying drawing, which is a block diagram of one embodiment of the IC set in accordance with the invention. It shows the first, second, and third integrated circuits ic1, ic2, and ic3, which are drawn as rectangles bordered by heavy lines. The first integrated circuit ic1 includes the analog-to-digital converter ad, which converts the measured dark-current, white-level, ambient-light, and leakage-current data into digital signals, which are fed to the first bus interface circuit if1. The latter is connected via the line db to the first multiplexer mx1, which interleaves data from the first bus interface circuit if1 with digital chrominance signals cs produced in the first integrated circuit ic1, and places the interleaved signals on the chroma bus cb. The generation of the digital chrominance signals cs is outside the scope of the present invention and is disclosed in the references cited above.
The first integrated circuit ic1 further includes the second multiplexer mx2, which consists of the three electronic switches s1, s2, s3, and represents a subcircuit which is essential for the invention. The input of the first switch s1 is grounded through the first resistor r1, and connected to the collectors of the external transistors tr, tg, tb, each of which is associated with one of the electron guns. Via the base-emitter paths of these transistors, the cathodes of the three electron guns are driven by the video output stages ve. The final letters r, g, and b in the reference characters tr, tg, and tb and in the reference characters explained later indicate the assignment to the electron gun for RED (r), GREEN (g), and BLUE (b), respectively. The output of the first switch s1 is connected to the input of the analog-to-digital converter ad.
The input of the second switch s2 is connected to the light detector ls, which has its other terminal connected to a fixed voltage u and combines with the grounded resistor r3 to form a voltage divider. The input of the second switch s2 is thus connected to the tap of this voltage divider, while the output of this switch, too, is coupled to the input of the analog-to-digital converter ad.
The input of the third switch s3 is connected to the input of the first switch s1 via the second resistor r2, while the output of the third switch s3 is grounded. The value of the resistor r1 is about one order of magnitude greater than that of the resistor r2.
For the whole duration of the picture shown on the screen of the picture tube b, and throughout the vertical sweep, the first switch s1 and the third switch s3 are closed, and the second switch s2 is open. During the vertical retrace interval, for the white-level measurement, the switches s1, s3 are closed, and the switch s2 is open; for the dark-current measurement and the leakage-current measurement, the switch s1 is closed, and the switches s2, s3 are open, and for the light-detector-current measurement, the switches s2, s3 are closed, and the switch s1 is open.
The measurements of the dark current and the white level of each electron gun and the measurements of the light-detector current and the leakage currents are made in four successive vertical blanking intervals. One end of the respective cathode is connected to a voltage us for blacker-than-black, and the other end is connected to a voltage ud for black and then to a voltage uw for white, in accordance with the following table:
______________________________________ |
Measurement in the first at about the Vertical half of the end of the blanking vertical vertical interval blanking blanking Cathode No. interval interval red green blue |
______________________________________ |
1 Leakage cur- Light-detect- us us us rents of the or current cathodes 2 Dark current White level ud/uw us us red red 3 Dark current White level us ud/uw us green green 4 Dark current White level us us ud/uw blue blue |
______________________________________ |
The voltage ud for black is, as usual, a voltage which just causes no brightness on the screen of the picture tube b, i.e., a voltage just below the dark threshold of the picture tube. The voltage us for blacker-than-block is then a cathode voltage lying further in the black direction than the voltage for black. The voltage for white is the voltage for the screen brightness to be measured; the brightness of the screen is generally below the maximum permissible value.
Thus, two measurements are made during each vertical blanking interval, namely one in the first half, preferably at one-third of the pulse duration of the vertical blanking interval, and the other at about the end of the first half. During the four successive vertical blanking intervals, the first measurement determines the leakage currents of the cathodes and the dark currents for red, green, and blue. The second measurements determine the light-detector current and the white levels for red, green, and blue. During the measurement of the cathode leakage currents and the light-detector current, all three cathodes are at the voltage us. During the measurements of the dark current and the white level of the respective cathode, the latter is connected to the respective dark-current cathode voltage ud and white-level cathode voltage uw, respectively, while the cathodes of the two other electron guns, which are not being measured, are at the voltage us.
The second integrated circuit circuit ic2 contains the microprocessor mp, the electrically reprogrammable memory ps, and the second bus interface circuit if2, which is associated with the serial data bus sb in this integrated circuit and also connects the microprocessor mp and the memory ps with one another and with itself. The memory ps holds alignment data and nominal dark-current/white-value data of the picture tube used, which were entered by the manufacturer. From this alignment and nominal data and from the measured data obtained via the second multiplexer mx2 and the analog-to-digital converter ad of the first integrated circuit ic1, the microprocessor mp derives video-signal-independent operating data for the picture tube.
The derivation of these operating data is also outside the scope of the invention; it should only be mentioned that with respect to the operating data of the picture tube, the microprocessor performs a control function in accordance with a predetermined control characteristic.
The third integrated circuit ic3 includes the demultiplexer dx, which is connected to the first multiplexer mx1 of the first integrated circuit ic1 via the chroma bus cb and separates the chrominance signals cs and the operating data of the picture tube from the interleaved signals transferred over the chroma bus. While the transfer of measured data from the analog-to-digital converter ad to the microprocessor mp of the second integrated circuit ic2 takes place via the two interface circuits if1, if2 and the data bus sb at an appropriate instant, the video-signal-independent operating data for the picture tube b, which are derived by the microprocessor mp, are transferred from the second integrated circuit ic2 via the two interface circuits if1, if2 and the line db to the first multiplexer mx1 at an appropriate instant, and from the first multiplexer mx1 over a wire of the chroma bus cb into the shift register sr of the third integrated circuit ic3 shortly after the beginning of the next vertical blanking interval. To accomplish this, the first interface circuit if1 also includes a shift register from which the operating data are read serially.
During this data transfer into the shift register sr, the cathodes of the picture tube b are preferably at the voltage us in order that this data transfer does not become visible on the screen.
The appropriate instant for the transfer of measured data to the microprocessor mp is determined by the latter itself, i.e., depending on the program being executed in the microprocessor, and on the time needed therefor, the measured data are called for from the interface circuits not at the time of measurement but at a selectable instant within the working program of the microprocessor mp. If the measurement currently being performed should not yet be finished at the instant at which the measured data are called for, in a preferred embodiment of the invention, the stored data of the previous measurement will be transferred to the microprocessor mp.
As mentioned previously, the operating data for the picture tube b are transferred into the shift register sr at the beginning of a vertical blanking interval. The parallel outputs of this shift register are combined in groups each assigned to one operating value, and each group has one of the digital-to-analog converters dh, ddr, ddg, ddb, dwr, dwg, dwb associated with it. In the figure, the division of the shift register into groups is indicated by broken lines. The shift register sr performs a serial-to-parallel conversion in the usual manner, and the operating data are entered by the demultiplexer dx into the shift register in serial form and are then available at the parallel outputs of the shift register.
The digital-to-analog converter dh provides the analog brightness control signal, which is applied to the RGB matrix m in the integrated circuit ic3. Also applied to the RGB matrix m are the analog color-difference signals r-y, b-y and the luminance signal y. The formation of these signals is outside the scope of the invention and is known per se from the publications cited at the beginning.
The three analog-to-digital converters ddr, ddg, ddb provide the dark-current-adjusting signals for the three cathodes, which are currents and are applied to the inverting inputs--of the analog amplifiers vr, vg, vb. Also connected to these inputs is a resistor network which is adjustable in steps in response to the digital white-level-adjusting signals at the respective group outputs of the shift register sr. The resistors serve as digital-to-analog converters dwr, dwg, dwb and establish the connection between the inverting inputs--and the outputs of the analog amplifiers vr, vg, vb.
In an arrangement according to the invention which has proved good in practice, each of the three dark-current-adjusting signals is a seven-digit signal, and each of the three white-level-adjusting signals and the brightness control signal are five-digit signals. The voltages us and ud/uw of the three cathodes are assigned a three-digit identification signal in accordance with the above table, which signal is also fed into the shift register sr in the implemented circuit. Finally, a three-digit contrast control signal is provided in the implemented circuit for the Teletext mode of the color-television receiver. These nine data blocks are transferred in the implemented circuit from the demultiplexer dx to the shift register sr in the following order, with the least significant bit transmitted first, and with the specified number of blanks: identification signal, white-level signal blue, three blanks, white-level signal green, three blanks, white-level signal red, one blank, dark-current signal blue, one blank, dark-current signal green, one blank, dark-current signal red, contrast signal Teletext, and brightness control signal. These are seven eight-digit data blocks which are assigned to 56 pulses of a 4.4-MHz clock frequency, which is the frequency of the shift clock signal of the shift register sr.
It should be noted that the data sequence just described does not correspond to the order of the groups of the shift register sr in the figure. The order in the figure was chosen only for the sake of clarity.
The outputs of the three analog amplifiers vr, vg, vb are coupled to the inputs of the video output stage ve, whose outputs, as explained previously, are connected to the bases of the transistors pr, tg, td, so that the cathodes of the picture tube b are driven via the base-emitter paths of these transistors.
In another preferred embodiment of the invention, the measurement performed during a vertical blanking interval is not enabled until the data of the previous measurement has been transferred into the microprocessor mp. In this manner, no measurement will be left out.
It is also possible to omit the digital-to-analog converter dh if the analog RGB matrix m is replaced with a digital one.
One advantage of the invention is that the use of the chroma bus for the transfer of operating data facilitates the implementation of the third integrated circuit ic3 using bipolar technology, because an additional bus interface circuit, which could be used there, would occupy too much chip area.
VCU 2136
The VCU 2136 and VPU 2204 represent further developments of the VCU 2133 and VPU 2203 that are suitable for S-VHS. This application note describes the modifications that were necessitated for these ICs by the S-VHS. lt should be read as an addendum to data sheets VCU 2133/5E and VPU 2203/1E. Some improvements have been made in the luminance filters to get better frequency response and therefore better picture quality. See the part "New filters” in VPU 2204. With S-VHS the luma and chroma information is transmitted in parallel channels. The luma and chroma data are converted by the VCU 2136 A/D converter and are transmitted in the time multiplex via the digital bus. It is important that a corresponding demultiplex takes place in the PVPU and that the SPU 2223 is able to separate the chroma information from the multiplexed data. Furthermore, the DTI 2223 is able to compensate group delay difference between the luma and chroma data.
Fig. 1 illustrates the timing
of the data: the analog signals at the inputs V1 at pin 35 and V2 at pin 37 of the VCU 2136 are taken over in time multiplex and an A/D conversion is performed. As the timing diagram (fig. 1) shows, the data 1 (luma in S-VHS operation) are taken over with the rising edge and the data 2 with the falling edge of the clock signal. The data rate is doubled in comparison to the VCU 2133 (Double Data Stream DDS).
Changes from the VCU 2133 to the VCU 2136: With the help of two control bits, three possible VCU operation modes "Composite Video”, "VHS” and "S-VHS” can be set. First, these two bits are entered into register 16 of the VPU 2204 by the CCU. During the vertical blanking interval this information is passed on from the VPU to the VCU inside the 72 bit data stream. Composite Video, VHS and S-VHS operation mode of the VCU only differ in the setting of the input operation multipliers 1 and 2 (see fig. 2). The function of the input multiplexer remains unchanged. The following constellations are possible. Refer to the VPU 2203/1E data sheet, table 3: "Data transfer between Address no. 16, high byte, bit 6=1, Address no. 16, high byte, bit 5=0 "S-VHS mode” Pin 35: Analog Luma, 2.0V max. 1 V input is also possible if high byte bit 5 = 1 in address 16 Pin 37: Analog Chroma, 0.3V max. for burst. Address no. 16, high byte, bit 6=0, Address no. 16, high byte, bit 5=0: "Composite Video” mode Amplification during color
burst key x 2 Pin 35: Analog Composite Video, 2.0V max. Pin 37: Analog Composite Video, 2.0V max. only the data on pin 35 is processed in this mode.
Address no. 16, high byte, bit 6=0 Address no. 16, high byte, bit 5=1: "VHS" mode. Amplification during color burst key x 2 Pin 35: Analog Composite Video, 1.0V max. Pin 37: Analog Composite Video, 1.0V max. Only the data on pin 37 is processed in this mode. Note: The VCU 2136 does not contain the noise inverter that was incorporated in the VCU 2133 any longer. Address no. 16, high byte bit 6 is the former bit "noise inverter”. Changes from the VPU 2203 to the VPU 2204: - on the input side, a demultiplexer was inserted to separate the luma and chroma data in the double data stream and to distribute them into the luma and chroma channels of the VPU (see fig. 3). — the colour trap was conceived to be switched off for the S-VHS operation mode. — Two additional control bits were introduced (refer to the VPU 2203/1E data sheet table 3: "Data transfer between ...”), that is: Address no. 15, low byte, bit 2 "S-VHS on” (see fig. 2): bit 2=0: S-VHS off VPU works on the V1 data only. Luma and chroma data are
separated with the help of chroma trap and chroma filter. bit 2=1: S-VHS on demultiplex of the sequential luma and chroma data, no chroma x 2 during color burst. Address no. 15., low byte, bit 1 (see fig. 3): bit 1=0: chroma trap on. bit 1=1: chroma trap off. New filters in the VPU 2204 To improve frequency response and picture quality some changes in the luminance- and peaking filter part of the VPU have been made. The old filter characteristics are still available. New features are: the S-VHS characteristics without chroma trap the “enhanced” Munakami filter without ringing the “broad” version. For SECAM the broader chroma trap can be switched off to the same chroma trap as for PAL.
DPU 2553, DPU 2554, DPU 2555 Deflection Processors.
During the past few years, digital circuit technology has come into se in television receivers, including color television receivers, for processing the received signal and for generating the deflection signal required to control the movement of the electron beam. During the research for and the development and implementation of these digital circuit systems, the course traced ou by conventional analog signal processing was followed, and the known individual problems were solved by means of digital rather than analog circuits.
By contrast, the present invention is predicated on the realization that, against the background of digital signal processing in television receivers, the constraints resulting from conventional analog technology, particularly with respect to predetermined signal waveforms, can be eliminated, thus making it possible to cope with difficult problems better than with conventional analog and/or digital technology. One of those difficult problems is still the geometric distortions introducted by the nonspherical curvature of the tube screen during reproduction. To eliminate these distortions, a considerable amount of circuitry is required both with conventional analog technology and more recent digital technology; an example is the great number of pincushion-correcting circuits.The fundamental idea of the invention as claimed is to abandon the rigid dependence on the commonly used sawtooth signal for ohorizontal deflection and vertical deflection, which both have a very short retrace period in comparison with the trace period, and to make the individual pixels of the video signal visible on the screen when the two deflection signals have moved the electron beam to the point intended on the transmitter side.
In the present invention, therefore, the deflection signals are no longer generated by a sawtooth generator of long-known analog or more recent digital design, but a deflection processor is provided which generates horizontal and vertical deflection signals with freely selectable waveforms.
The video signal, after being digitized by means of a clock signal, is written into a random-access memory and is read ou in such a way that the individual pixels occupy the intended positions on the screen. The memory has a suitable controller associated therewith, of course. The digital signals read out of the memory must be applied to a compensating stage for correcting picture tube errors before they drive the picture tube via digital-to-analog converters.
Deflection Processors
1.
Introduction These programmable VLSI circuits in N-channel MOS
technology carry out the deflection functions in digital color TV
receivers based on the DIGIT 2000 system and are also suitable for text
and D2-MAC application. The three types are basically identical, but are
modified according to the in- tended application: DPU 2553 —
normal-scan horizontal deflection, standard CTV receivers, also equipped
with Teletext and D2-MAC facility
DPU 2554 -— double-scan horizontal deflection, for CTV receivers equipped with double-frequency horizontal deflection and double-frequency vertical deflection for improved picture quality. At pow- er-up, this version starts with double horizontal frequency.
DPU 2555 — normal scan horizontal deflection as DPU 2553, but with an extra flag for the IM bus, so that one DPU 2553 and one DPU 2555 may be operated simultaneously in one CTV receiver as is required for Teletext or Viewdata operation if increased deflection frequency is intended for high-quality text display. In this case, the DPU 2553 acts as sync separator for the received Teletext or Viewdata signal, whereas the DPU 2555 is used as deflection processor for the displayed page, or viceversa.
1.1.
General Description The DPU 2553/54/55 Deflection Processors contain
the following circuit functions on one single silicon chip: video
clamping horizontal and vertical sync separation horizontal
synchronization normal horizontal deflection east-west correction, also
for flat-screen picture tubes vertical synchronization normal vertical
deflection sawtooth generation text display mode with increased
deflection frequencies (18.7 kHz horizontal and 60 Hz vertical) — D2-MAC
operation mode and for DPU 2554 only: -— double-scan horizontal
deflection - normal and double-scan vertical deflection In this data
sheet, all information given for double-scan mode is available with the
DPU 2554 only.
Types DPU 2553 and DPU 2555 start the horizontal
deflection with 15.5 kHz according to the normal TV standard, whereas
type DPU 2554 starts with 31 KHz according to the double-scan sys- tem.
The
only difference between types DPU 2553 and DPU 2555 is in the function
of the flag IMS which enables and disables the IM bus interface of the
respective deflection processor. With this, it is possible to operate
both types in parallel on the same IM bus, as is required for the
Teletext or Viewdata display mode with increased deflection frequencies.
The following characteristics are programmable: ~ selection of the TV
standard (PAL, D2-MAC or NTSC) - selection of the deflection standard
(Teletext, horizontal and vertical double -scan, and normal scan) —
filter time-constant for horizontal synchronization — vertical
amplitude, S correction, and vertical position for in-line, flat-screen
and Trinitron picture tubes — east-west parabola, horizontal width, and
trapezoidal correction for in-line, flat-screen and Trinitron picture
tubes — switch over characteristics between the different
synchronization modes — characteristic of the synchronism detector for
PLL switching and muting.
1.2. Environment
Fig. 1-1 shows the
simplified block diagram of the video and deflection section of a
digital TV receiver based on the DIGIT 2000 system. The analog video
signal derived from the video detector is digitized in the VCU 2133
Video Codec and supplied in a parallel 7 bit Gray code. This digital
video signal is fed to the video section (VPU, CVPU, SPU and DMA) and to
the DPU 2553/54/55 Deflection Processor which carries out all functions
required in conjunction with deflection, from sync separation to the
control of the deflection power stages, as described in this data sheet.
. Pin Connections
- Ground
- @TMM Main Clock Input
- Output for Single-Scan Vertical Blanking Pulse
- Clamping Output 2
- Reset Input
- Input for the D2-MAC Composite Sync Signal and Output for the Separated Composite Sync Signal
- 1H and 2H Skew Data Output
- Vsup Supply Voltage
- V6 Video Input (MSB)
- V5 Video Input
- V4 Video Input
- V3 Video Input
- V2 Video Input
- V1 Video Input
- VO Video Input (LSB)
- IM Bus Clock Input
- IM Bus Ident Input
- IM Bus Data Input/Output
- Combined Output for the Color Key Pulse and the Undelayed Horizontal Blanking Pulse
- Ground
- Clamping Output 1
- Combined Output for the Delayed Horizontal Blanking Pulse and the Vertical Blanking Pulse
- Horizontal Flyback Input
- Undelayed Horizontal Blanking Output
- Vertical Flyback Safety Input
- Vertical Flyback Output
- Vertical Sawtooth Output
- East-West Parabola Output
- Horizontal Output Polarity Select Input and Start Oscillator Pulsewidth Select Input
- Ground
- Horizontal Output
- Vsup Supply Voltage
- External Standard Selection Input
- Start Oscillator Clock Input
- Start Oscillator Supply Voltage
- Start Oscillator Select Input
- Control Switch Output for the Horizontal Power Stage
- Test Pin, leave vacant
- Interlace Control Output
- Vsup Supply Voltage
2.3. Pin Descriptions
Pins 1, 20 and 30 — Ground These pins must be connected to the negative of the supply.
Pins 2— @M Main Clock Input (Fig. 2-4) By means of this input, the DPU receives the required main clock signal from the MCU 2600 or MCU 2632 Clock Gen- erator IC.
Pin 3 — Single-Scan Vertical Blanking Output (Fig. 2-11) In vertical double-scan mode, this pulse is also required by the CVPU 2235 Comb Filter Video Processor.
Pins 4 and 21 — Clamping Outputs 2 and 1 (Fig. 2-10) These pins supply pulses for clamping the video signal at the VCU 2133 or VCU 2134 during the back porch.
Pin 5 — Reset Input (Fig. 2-2) This pin is used for hardware reset. At low level, reset is actuated, and at high level the DPU is ready for communication with the CCU via the IM bus.
Pin 6 — Input for the D2-MAC Composite Sync Signal and Output for the Separated Composite Sync Signal This pin (Fig. 2-9) is the input for the D2-MAC composite sine signal and the output for the separated composite sync signal.
Pin 7 — Skew Data Output (Fig. 2-10) This pin delivers the 1H and 2H skew data stream required by the PSP 2210 or PSP 2032 Progressive Scan Processor and the TPU 2732 or TPU 2733 or TPU 2740 Teletext Processor or others for adjusting the phase of the double- scan video signal and for information about vertical sync.
Pins 8, 32 and 40 — Vsyp Supply Voltage These pins must be connected to the positive of the supply.
Pins 9 to 15 — V6 to VO Video Inputs (Fig. 2-3) Via these pins, the DPU receives the digitized composite video signal from the VCU 2133 or VCU 2134 Video Codec in a parallel 7-bit Gray code. With a standard signal, the sync pulse resolution is 6 bits.
Pins 16 to 18 — IM Bus Connections These pins connect the DPU to the IM bus. It is via the IM bus that the DPU communicates with the CCU. Pins 16 (IM Bus Clock Input) and 17 (IM Bus Ident Input) have the con- figuration shown in Fig. 2-2. Pin 18 (IM Bus Data Input/Out- put) is shown in Fig. 2-9.
Pin 19 — Combined Output for the Color Key Pulse and the Undelayed Horizontal Blanking Pulse (Fig. 2-11) his output is tristate-controlled. In conjunction with the in- put load represented by the VCU, the three-level key and blanking pulse is produced which is also needed by the other DIGIT 2000 processors.
Pin 22 - Combined Output for the Delayed Horizontal Blanking Pulse and the Vertical Blanking Pulse (Fig. 2-11) This pin is a tristate-controlled output. In conjunction with the input load represented by the VCU, the three-level combined blanking pulse is produced which is also needed by the other DIGIT 2000 processors. Pin 23 — Horizontal Flyback Input (Fig. 2-5) Pin 23 requires horizontal flyback pulses which must be clamped by a diode to the +5 V supply.
Pin 24 — Undelayed Horizontal Blanking Output (Fig. 2-11) This output supplies undelayed horizontal blanking pulses. These pulses are for keying of the IF amplifier and are key- ing pulses for the VCU.
Pin 25 — Vertical Flyback Safety Input (Fig. 2-5) To protect the picture tube from damage by burn-in in the event of a malfunction of the vertical deflection, an ac- knowledge pulse derived from the vertical deflection yoke is fed to pin 25. If this pulse exceeds the 2.5 V threshold during vertical blanking, the blanking pulse will be terminated. If it is planned to operate without this picture tube protection, pin 25 must be connected to +5V.
Pin 26 — Vertical Flyback Output (Fig. 2-12) This pin supplies the same pulse width-modulated sawtooth signal as pin 27, but only for 350 us from the start of the vertical flyback. During the remaining time, pin 26 is at high impedance. The signal supplied by pin 26 is used for fast charge-reversal of the integration capacitor.
Pin 27 ~ Vertical Sawtooth Output (Fig. 2-12) This pin supplies the signal, in pulse width-modulated form, for driving the vertical output stage. To produce the analog sawtooth signal, this signal must be integrated externally, e. g. by an RC network. By way of the IM bus interface and the HSP processor, it is possible for this sawtooth to be varied by the CCU.
Pin 28 — East-West Parabola Output (Fig. 2-12) This pin supplies the vertical-frequency parabola signal for the east-west correction in pulse width-modulated form. Via the IM bus and the HSP processor, the east-west parabola can be adjusted by the CCU.
Pin 29 — Horizontal Output Polarity and Pulse width Select Input (Fig. 2-6) This pin serves for selecting the polarity and the pulse width of the output pulses of pin 31 as described in section 3.4. This pin must be connected to ground or to +5 V.
Pin 31 — Horizontal Output (Fig. 2-10) This output supplies the driving pulses for the horizontal output stage. The output pulse polarity can be selected by means of pin 29.
Pin 33 — External Standard Selection Input (Fig. 2-7) This input is used for selecting the horizontal frequency standard, as shown in Table 3-2. If pin 33 is +5 V, the DPU operates only with the NTSC standard. If it is connected to ground, however, the DPU is set for the PAL or SECAM standard, and the horizontal standard can only be changed by the CCU command between PAL/SECAM and Text dis- play mode. If pin 33 is unconnected, all standards can be selected by the CCU via the IM bus. Furthermore, when pin 33 is unconnected, the horizontal protection circuit is in ef- fect, and for this a 4 MHz signal is required at pin 34. In this case, the output pulse at pin 31 is limited to a maximum du- ration of 30 us for all standards. The phase resolution of the trailing edge of this pulse is reduced to 250 ns, if the output pulse is set to more than 30 ys pulse width.
Pin 34 — Protection Circuit Clock Input (Fig. 2-8) When pin 33 is left unconnected, a 4 MHz clock signal is required at pin 34 for the horizontal protection circuit. The 4 MHz clock can be fed to pin 34 via a capacitor, and is available, e. g., at pin 1 of the CCU at no added cost. If the 4 MHz signal is not present and pin 33 is not connected, the horizontal output pin 31 is undefined.
Pin 35 — Start Oscillator Supply
Via this pin it is possible with minimum current consumption to operate the horizontal protection circuit as a starting oscillator. For this purpose only the 4 MHz signal at pin 34 is required. Pin 36 must be connected to pin 35.
Pin 36 — Start Oscillator Select Input (Fig. 2-6) if the start oscillator function is required (see Table 3-2), pin 36 must be connected to pin 35. If the start oscillator function is not used, pin 36 has to be connected to ground. In this mode, the horizontal output pin 31 is switched off (at high level) as long as the Reset input pin 5 is Low.
Pin 37 — Control Switch Output for the Horizontal Power Stage (Fig. 2-11) This pin serves for switching over the horizontal output
stage to another frequency.
Pin 38 — Test pin This pin is an input/output of the type shown in Fig. 2-9. It is used for testing the DPU during production and should be left unconnected in normal operation.
Pin 39 — Interlace Control Output (Fig. 2-10) This pin is for controlling an AC coupled vertical power stage for interlace-free mode.
3. Functional Description
3.1. Block Diagram
The DPU has two different clamping outputs, No. 1 and No. 2, one of which supplies the required clamping pulses to the video input of the VCU as shown in Fig. 3-1. The following values for the clamping circuit apply for Video Amp. I. Since the gain of Video Amp. Il is twice that of Video Amp I, all clamping and signal levels of Video Amp II are half those of Video Amp | referred to +5 V. After the TV set is switched on, the video clamping circuit first of all ensures by means of horizontal-frequency cur- rent pulses from the clamping output of the DPU to the coupling capacitor of the analog composite video signal, that the video signal at the VCU’s input is optimally biased for the operation range of the A/D converter of 5 to 7 V. For this, the sync top level is digitally measured and set to a constant level of 5.125 V by these current pulses. The horizontal and vertical sync pulses are now separated by a fixed separation level of 5.250 V so that the horizontal synchronization can lock to the correct phase (
see section 3.3. and Figs. 2-17 and 3-2). With the color key pulse which is now present in synchro with the composite video signal, the video clamping circuit measures the DC voltage level of the porch and by means of the pulses from pin 21 (or pin 4), sets the DC level of the porch at a constant 5.5 V (5.25 V for Video Amp ll). This level is also the reference black level for the VPU 2203, CVPU 2233 or CVPU 2235 Video Processors. When horizontal synchronization is achieved, the slice level for the sync pulses is set to 50 % of the sync pulse amplitude by averaging sync top and black level. This ensures optimum pulse separation, even with small sync pulse amplitudes (see application notes, section 4.).
SPU 2220 SECAM Chroma Processor
SECAM
Chroma Processor Digital real time signal processor for processing
SECAM video chroma signals in combination with the VPU 2203 Video
Processor which processes the luminance information at the same time.
The SPU 2220 is an N-channel VLSI MOS circuit, housed in a 40-pin Dil
plastic package and contains on a single silicon chip the following
functions: — a code converter — a digital SECAM bell filter — a
switchable IF spectrum compensation filter ~ a digital FM de modulator
with DC offset correction, de emphasis and de multiplexer — a digital
Red-/Blue-line identification - a digital standard recognition circuit —
a color saturation multiplier with multiplexer for the color difference
signals — the IM bus interface circuit which provides the communication
with the CCU 2030, CCU 2050 or CCU 2070 Central Control Unit via the
bidirectional IM bus — chroma outputs (pins 23 to 26) can be disabled by
means of pin 22
1. Functional Description
The SPU 2220 digitally processes the SECAM color signals supplied in digital form as a parallel 7-bit Gray-coded signal by the VCU 2133 Video Codec. Acting in parallel with the VPU 2203 Video Processor (Fig. 2),
the SPU 2220 separates the color information from the digital video signal, performs the bell filter function and the IF spectral compensation before submitting the 17.734 MHz sampled signal to the digital algebraic demodulator. The demodulator produces an 8-bit signal, sampled at 4.43 MHz, whose amplitude is proportional to the frequency of the incoming frequency-modulated color difference signal. After demodulation, the color difference signals undergo digital deemphasis before being demultiplexed using a 64 us delay line. After passing the saturation multiplier the co- lor difference signals are multiplexed in a form compatible to that used in the VPU 2203. The SPU 2220 also includes automatic SECAM identification logic as well as Red-/Blue-Line detection and synchronization. Since the signal-
processing delay in the performance of SECAM decoding is greater than that experienced during PAL or NTSC decoding, the SPU 2220 compensates for this delay by delaying the digital video signal supplied to the VPU 2203 by a corresponding amount (5.5 us) in SECAM operation.
1.1. The Code Converter The 7-bit digital video signal supplied by the VCU 2133 Video Codec in the Gray code is initially converted into 7-bit two’s complement binary code for further processing.
1.2. The 5.5 us Delay Line This part of the SPU 2220 delays the digital video signal supplied by the VCU 2133 to be delivered to the VPU 2203. In this way the difference in processing time between the VPU 2203 (luminance channel) and the SPU 2220 (chrominance channel) in SECAM operation is compensated. The color key pulse for the VPU 2203 passes the Aux Delay block of the SPU 2220 in order to provide the same delay as for the video signal delayed in the 5.5 us delay line.
1.3. The SECAM Bell Filter This filter which has the same function as the conventional LC bell filter hitherto used, removes the luminance information and compensates the anti-bell response of the transmitter. Center frequency and frequency response of the bell filter are fixed and cannot be altered externally. The response of the SECAM bell filter is shown in Figs. 3 and 4.
1.4. The IF Spectrum Compensation Filter Since the FM color information in the SECAM system covers a range of frequencies from 3.9 to 4.75 MHz (unlike the single frequency with its AM color information in the PAL and NTSC systems), the slight spectral distortion resulting from the tuner and IF section of the TV set should be compensated. For this, the 14-bit output of the bell filter passes the IF spectrum compensation filter which gives a compensating frequency response of about 4 dB/MHz. This filter can be switched on and off by the CCU via the IM bus using address 107 (see Table 2). Fig. 4 shows the various filter responses of the bell and IF compensation filter with the latter switched on and off.
CVPU 2233 NTSC Comb Filter Video Processor
Article "Color Decoding a PCM NTSC Television Signal" by J. P. Rossi,
Jun., 1974, Journal of the SMPTE, vol. 83, No. 6, pp. 489-495.
Article "Digital Television Image
Enhancement" by J. P. Rossi, 1975, Journal of the SMPTE, vol. 84, at pp.
545-551.
Text "Theory and Application of Digital
Signal Processing" by Rabiner and Gold, (Prentice-Hall, 1975), p. 550.
Paper "Nonrecursive Digital Filters with
Coefficients of Powers of Two" by A. Tomozawa, in the IEEE Int'l. Conf.
on Comm., pp. 18D-1 through 18D-5.
Paper "Colour Demodulation of an NTSC
Television Signal Using Digital Filtering Techniques" by A. G. Deczky,
1975 IEEE Int'l. Conf. on Comm., vol. II, pp. 23-6 through 23-11.
U.S. patent application filed Aug. 31, 1981
in the name of H. G. Lewis, Jr., Digital Color Television Signal
Demodulator, Ser. No.: 297,556.
An Approach to the Implementation of Digital
Filters by L. R. Jackson, reprinted from IEEE Trans. Audio
Electroacoust., vol. AU-16, pp. 413-421, Sep. 1968.
W. Weltersbach et al., "Digitale
Videosignalverarbeitung im Farbfernsehempfanger", Fernseh und
Kino-Technik, 35 Jahrgang, Nr. 9, Sep. 1981, pp. 317-323, (with
translation).
T. Fischer, "Digital VLSI Breeds
Next-Generation TV Receivers", Electronics, Aug. 11, 1981, pp. 97-103.
T. Fischer, "Fernsehen Wird Digital",
Elektronik, No. 16, 1981, pp. 27-35, (with translation of pp. 30-31).
ITT Intermetall, A New Dimension-VLSI Digital TV System, Sep. 1981, pp. 1-23.
In a conventional television receiver, all signals are analog-processed. Analog signal processing, however, has the problems at the video stage and thereafter. These problems stem from the general drawbacks of analog signal processing with regard to time-base operation, specifically, incomplete Y/C separation (which causes cross color and dot interference), various types of problems resulting in low picture quality, and low precision of synchronization. Furthermore, from the viewpoints of cost and ease of manufacturing the analog circuit, a hybrid configuration must be employed even if the main circuit comprises an IC. In addition to these disadvantages, many adjustments must be performed.
In order to solve the above problems, it is proposed to process all signals in a digital form from the video stage to the chrominance signal demodulation stage. In such a digital television receiver, various improvements in picture quality should result due to the advantages of digital signal processing.
NTSC Comb Filter Video Processor Digital real-time signal processor for processing the video signals digitized by the VCU 2133 Video Codec Unit in digital color TV receivers according to the NTSC standard.
The CVPU 2233 is an N-channel MOS circuit, is housed in a 40- pin Dil plastic package and contains on a single silicon chip the following functions:
— a code converter
— an NTSC comb filter
— the chroma band pass filter
— the luminance filter with peaking facility
— a contrast multiplier with limiter for the luminance signal
~- all color signal processing circuits such as automatic color control (ACC), color killer, identification, decoder and hue correction
~ a color saturation multiplier with multiplexer for the color difference signals
— the IM bus interface circuit for communicating with the CCU 2030 or CCU 2050 Central Control Unit ~ circuitry for measuring dark current (CRT spot-cutoff), white level and photo current, and for transferring this data to the CCU.
1. Functional Description The CVPU 2233 Comb Filter Video Processor digitally processes the digital video signal supplied by the VCU 2133 Video Codec in the various circuit parts just mentioned.
The resulting digital signals are then reconverted to analog signals in the VCU 2133 and used to drive the cathodes of the picture tube, via the external RGB output amplifiers. Further, in conjunction with the VCU 2133, the CVPU 2233 performs a number of measurements and control operations relating to picture tube alignment such as spot-cutoff current adjustment, white level controi, beam current limiting, etc. To understand the signal processing in the two integrated circuits VCU 2133 and CVPU 2233, Fig. 2 may prove useful because it shows the signal flow and the several functional blocks in their logical sequence regardless of whether these blocks are in the VCU 2133 or CVPU 2233.
1.1. The Code Converter This circuit is shown only in Fig. 1. It serves to convert the digitized video signal, delivered by the VCU 2133 in a parallel Gray code, into a simple binary-coded signal for the comb filter.
1.2. The Comb Filter With the NTSC system, a comb filtering for separation of chrominance and luminance signals is easy to realize by a delay line that has the delay of one horizontal period (64 us). In the case of the CVPU 2233, this delay is realized by a RAM. When a comb filter is used, it is no longer necessary to have a chroma trap in the luminance signal path.
1.3. The Luminance Channel The luminance filter has two different values for its band- with, 4 MHz in the case an IF filtered video signal is processed, and 7 MHz if the video signal originates from a camera, a video signal disc player etc. Additionally, the filter handles peaking whereby the high-frequency components of the luminance signal in the range of 3 MHz are raised to improve picture sharpness. The amount of peaking is set by the CCU 2030 or CCU 2050 via the IM bus. Us- ing a fixed subtrahend of —0.25, the sync signal component not required in the luminance channel is suppressed. Peaking at 3 MHz is provided in the range from —3 dB to + 10 dB. It can be set by the user in eight steps. The peaking has a dead-data zone as shown in Fig. 14
in the description of the VCU 2133. The luminance filter has a DC gain of 1.0 (see Fig. 4). Behind the luminance filter, 9 bits are used to carry the luminance signal, so that the overshoots caused by the peaking filter can be transmitted to the Y D/A converter in
the VCU 2133.
The peaking curves are shown in Fig. 5.
Following the peaking circuit (Fig. 2) is the contrast multiplier which, combined with a limiter, limits the luminance signal if its amplitude becomes too high. The contrast setting, too, is controlled by the CCU via the IM bus, depending on the user’s instructions. Further, the contrast is adapted to the room lighting by means of a photo sensor connected to pin 17 of the CVPU 2233. In this process, the signal generated by the photo sensor is first digitized in the CVPU 2233 and then, during vertical flyback, transferred in multiplex operation to the CCU. The CCU calculates the contrast needed and finally sends the corresponding control signal to the CVPU 2233's contrast multiplier via the IM bus. After the contrast multiplier are added 31 steps as a constant DC signal, so that the system can transmit the negative undershoots-caused by peaking, to the D/A converter (see Fig. 3). From the contrast multiplier, the digital luminance signal is back to 2133 form of a 8-bit signal. In fed the VCU in the VCU 2133,
the signal enters the Y D/A converter. The converter feeds the analog luminance signal to the RGB matrix.
The setting range of the contrast multiplier comprises 6 bits (63 steps) and a gain of 1. If the product of the multiplication at the multiplier’s output is higher than the working range, the largest possible number (1 111 1 1 1 1) is put out. This means the limiting mentioned above is achieved.
4. Inner Configuration of the Connection Pins The following figures schematically show the circuitry at the various pins. The integrated protection structures are not shown. The letter “E” means enhancement, the letter “D” depletion.
5. Description of the Connections and the Signals
Pin 1 - Color Key Pulse Input This input’s configuration is shown in Fig. 8. Via this pin, the CVPU 2233 gets the color key pulse from pin 19 of the DPU 2543. In the quiescent state high level must be applied, and during pulse a low level.
Pins 2 to 4 - IM Bus Connections By means of these pins, the CVPU 2233 is linked with the CCU 2030 or CCU 2050.
Pins 3 (Ident Input) and 4 (Clock Input) are configured as shown in Fig. 8. Pin 2 (Data Input/ Output) is shown in Fig. 13.
Pins 5 to 11 — Inputs VO to V6 The circuit of these inputs is shown in Fig. 9. Via these in- puts, the CVPU 2233 receives the digitized composite video signal from the VCU 2133 in a 7-bit parallel Gray code. Input VO gets the least significant bit (LSB) and input V6 the most significant bit (MSB).
Pins 12, 24 and 31 — Supply Voltage, +5 V These pins must be connected to the positive of the 5 V supply. Pin 13 — Vertical Blanking Pulse Input Fig. 8 shows the diagram of this input. Via this pin the CVPU 2233 receives the vertical blanking pulse from the DPU 2543. In the steady state, high level must be applied, and during pulse a low level. The vertical blanking pulse is required for controlling the tests described in section 1.5., which are carried out during vertical flyback.
Pin 14 - Outputs Disable Input This input (Fig. 8) serves for fast switch over of the luma and chroma outputs (Pin 27 to 30 and 32 to 39) to the high- impedance state. Pin 14 low means outputs active, and Pin 14 high means outputs disabled.
Pin 15 —- Beam Current Input By means of this pin, whose circuit is shown in Fig. 10, the CVPU 2233 receives the common analog signal which is supplied by three current sensing transistors inserted in the cathode lines of the picture tube. Via the internal switch $1 (Fig. 5) the analog signal is fed to the internal A/D converter. Input voltage range is 0 V to Vig.
Pin 16 — Beam Current Switch over Output This pin serves for selecting the sensitivity of the beam cur- rent input pin 15 by connecting an additional 10 kQ resistor parallel to pin 15 and ground, thus reducing this input’s sensitivity. By this means, the current supplied by the three sensor transistors mentioned is the spot-cutoff current on the one hand (high sensitivity) and the white level current on the other (low sensitivity).
The circuit of pin 16 is shown in Fig. 11.
Pin 17 — Photo Sensor Input This input has the same properties as pin 15. It serves for measuring the current supplied by the photo sensor and is activated by switch S2 (Fig. 5). Its input voltage range is al- so 0 V to Vig.
Pin 18 — Analog Ground, 0 This pin is used as a ground connection in conjunction with pins 15 to 17.
Pin 19 — Reference Voltage Input This pin gets the externally-produced reference voltage of half the supply voltage, that is required by the circuitry shown in Fig. 5 and must be filtered by a capacitor of sufficient capacity.
Pin 20 — Reset Input This pin’s circuit is shown in Fig. 8. In the steady state, high level is required. A low level normalizes the CVPU 2233.
Pins 21 and 40 — Digital Ground, 0 These pins are used as ground connection in all cases where digital signals are invoived.
Pins 22 — gM Main Clock Input Via this pin the CVPU 2233 is supplied with the required main clock signal by the MCU 2600 or MCU 2632 Clock Generator IC. Fig. 12 shows the diagram of Pin 22.
Pin 23 — Test Pin During normal operation, this pin must be connected to ground.
Pin 25 — Data Clock Output (PLL) This pin whose diagram is shown in Fig. 11 supplies the data clock signal needed for the serial data transfer of the PLL information from the phase comparator contained in the CVPU 2233 to the voltage-controlled oscillator (VCO) contained in the MCU 2600 or MCU 2632 Clock Generator IC. The frequency of the data clock signal is one fourth of the main clock’s frequency.
Pin 26 — Data Output (PLL)
This pin whose diagram is shown in Fig. 11 supplies the 12- bit data word explained in section 1.6., which serves for closing the PLL circuit which determines the main clock signal used in the DIGIT 2000 TV receiver.
Pins 27 to 30 — Outputs C3 to CO These outputs’ configuration is shown in Fig. 11. Via these pins, the R-Y, B-Y, and picture tube alignment data is transferred in multiplex operation to the VCU 2133.
Pins 32 to 39 — Outputs LO to L7
These outputs are identical to pin 27, too. Via these pins, the CVPU 2233 delivers the digital luminance signal (Y) to the VCU 2133, where it is reconverted to an analog signal.
VPU 2204
VPU 2204 ,
DTI 2222 2223.
This invention relates generally to digital television systems and specifically to an arrangement for improving the luminance signal transient response characteristics and peaking of a digital television receiver.
A digital television receiver described in the ITT publication entitled "Digit 2000-DSLI Digital TV System," which is incorporated by reference herein, describes a digital color television receiver arrangement having a microprocessor that controls a plurality of function control modules over a so-called IM (Intermetall) bus. The luminance signal processing system of the present invention may be utilized with a television receiver constructed in accordance with the above-mentioned publication.
The art has circuits illustrating transient improvement of video signals to compensate for the effects of limited band-width and the like. In U.S. Pat. No. 4,030,121, issued Jun. 14, 1977, a "video crispener" is disclosed for improving the transient response of vide signals. That system developed first and second differentials of an analog input video signal and processing the first differential through a full wave rectifier and the second differential through a limiting amplifier. The products of the rectifier and limiting amplifier were multiplied and added back to the suitably delayed input video signal. Other variants on the above method were also disclosed. The inventive arrangement of the patent, to Applicants' knowledge has never been implemented in video apparatus.
Peaking of video signals has long been done in television receivers in an attempt to enhance the video display by emphasizing certain frequencies of the video signal. Peaking is arbitrary and is based upon subjective criteria as to what constitutes an optimized display. Conventional analog signal peaking techniques are not useful with digital signals however.
The present invention describes apparatus for processing a digitized luminance signal to accentuate or improve transients in the signal and to selectively and variably peak the signal to emphasize low and high frequencies while controlling undershoot and overshoot of the signal. In accordance with the preferred form of the invention, the various parameters for controlling the amount of peaking and transient improvement are factory settings which may be accomplished in software.
Functional Description 3.1. Block Diagram The DTI 2222 is an N-channel MOS circuit which contains on one silicon chip mainly the following functional blocks (see Fig. 3-1):
- chroma nibble demultiplexer and R-Y/B-Y demultiplexer - R-Y and B-Y interpolation filters - R-Y and B-Y rise time detectors - hold pulse generator - chroma nibble multiplexer - clock generator and MUX/DEMUX control - luminance delay circuit - IM bus interface The normal risetime of Luminance transients is about 150 ns, how- ever, for chrominance transients the rise time is between 800 and 1000 ns. The picture impression, especially of color bars in the standard test pattern, is considerably improved if the chrominance transients are given the same short rise time as the luminance transients.
TPU 2732
Teletext
Processor for Level 1 Teletext The TPU 2732 is specified to handle
Level-1-Teletext information (in Germany: Video text) as it is
transmitted today by the TV broadcast stations in Great Britain, Germany
and other European countries. In this function, the TPU 2732 is part of
the DIGIT 2000 digital TV system and works in con- junction with the
other VLSI circuits and processors of this system. The Teletext adapter
designed with the TPU 2732 is very simple and economic (Fig. 1), so that
this new fea- ture may now become common as it was not possible due to
the high cost of former multi-chip solutions up to now.
The TPU 2732 is an N-channel VLSI MOS circuit, housed in a 40-pin Dil plastic package and contains on a single silicon chip the following functions:
— one-chip solution of the Teletext processing (except for external RAM)
— ghost compensation to eliminate the effects of ghost pictures due to reflections
— as input signal is used the 7-bit digitized composite video signal delivered in a parallel Gray code by the VCU 2133 or VCU 2134 Video Codec
— reduced access time is provided for the Teletext pages by receiving and storing up to eight pages in one go
— up to eight stored pages
— function extended by automatic language-dependent character selection
~ switchover facility PAL/NTSC TPY 2732 H for Hebrew Characters Using the type designation TPU 2732 H, a mask option of the TPU 2732 can be supplied which, instead of the automatic language-dependent character selection described in sections 9.7. and 10.3., only displays the Hebrew character set.
With this device, the language-selecting control bits Cy to C14 or LSO to LS2 have no effect. 1. Short Functional Description The TPU 2732 whose block diagram is shown in Fig. 2, op- erates according to a rigid timing determined by the vertical cycle of the TV receiver. The data acquisition period starts at line 7 with PAL or line 10 with NTSC and ends at line 22 with PAL or line 21 with NTSC. During this period, the input data is processed by a ghost filter which is able to compensate reflections with short delay time of 0 to 0.8 us for PAL or 0 to 1 us for NTSC. Teletext information is synchronized and identified. A comparator pre selects the pages with page numbers that are requested by the CCU 2030, CCU 2050 or CCU 2070 Central Control Unit and loads them into the RAM. To eliminate speed problems of the external RAMs, the data is buffered in an internal RAM buffer (Fig. 2). The comparator contained in the data acquisition unit decides into which sector of the RAM the data is stored. The display period
starts at line 48 with PAL or line 50 with NTSC and ends at line 286 with PAL or line 242 with NTSC. The display control unit selects one of the stored eight pages for display. The 8-bit character words are trans- formed into a 6 x 10 dot matrix with PAL or 6 x 8 dot matrix with NTSC by a character generator (ROM) of 96 programmed characters and are displayed in 24 rows of 40 characters each. Different character sets are available for eight languages under CCU or transmitter control, the required character set being selected automatically by the control bits C1 to C14 of row O of the Teletext page display- ed. Every tenth line with PAL or every eighth line with NTSC a new Teletext row is loaded from the RAM into the RAM buffer. When the RAM is not.accessed by the TPU 2732, the memory control refreshes the memory and handles CCU requests for RAM access. Via the IM bus the CCU can read from and write into ail RAM locations and controls the TPU 2732 by loading the appropriate registers in the RAM, so that the
TPU 2732 can be used to display text from other sources. The TPU 2732 can display a list of contents of the stored eight pages (me- nu) all by itself. As external RAM can be used either one 64 K x 1 bit Dynamic RAM or one 16 K x 1 bit Dynamic RAM. So, the RAM capacity is flexible to store 2 or 8 pages. The RAMs can be standard types (see section 3.).
MCU 2600 Clock Generator IC
Clock
Generator IC Integrated circuit in Cl technology for generating the
main clock @M for digital TV receivers according to the DIGIT 2000
concept.
1.
Introduction The MCU 2600 Clock Generator IC supplies the digital
signal processors, decoders, converters etc. of the DIGIT 2000 digital
TV system with the required main clock signal, which is of trapezoidal
shape, with rounded corners, in order to avoid interference.
For PAL
and SECAM, the clock frequency is four times the PAL color subcarrier
frequency, and for NTSC, the clock frequency is four times the NTSC
color subcarrier frequency: for PAL and SECAM: fom=4 x 4.4383 618 75
MHz= 17.734475 MHz for NTSC: fom=4 x 3.579545 MHz= 14.318 180 MHz for
D2-MAC: fg. =20.25 MHz
2. Functional Description As can be seen from the block diagram Fig. 2-1,
three VCOs (voltage-controlled oscillators) integrated in the MCU 2600 Clock Generator IC (one for PAL and SECAM, one for NTSC, and one for D2-MAC operation) form part of a PLL (phase-locked loop) circuit, the other parts of which, the phase comparator and the digital PLL filter are placed in the VPU 2203 or the CVPU 2233 or the CVPU 2235 or the DMA 2270. The filtered phase difference signal Ag is sup- plied in digital serial form (Fig. 2-2) to pin 6 of the MCU 2600. This data transfer is controlled by means of the data clock signal which is fed to pin 5 of the MCU 2600 and whose frequency is % of the main clock signal @M. With the negative transition of the data clock signal, the data is written into the shift register, and with the positive transition, the content of the shift register is shifted by 1 bit. After 12 bit have been written into the shift register and the data clock signal has attained again the stable high level (Fig. 2-2), an internal delay of about one data clock period occurs.
This following, the data are taken over into the parallel register. From there, the information is fed to the oscillator control circuit and to the 9-stage D/A converter that produces the tuning voltage for the three voltage-controlled oscillators. The write-and-store cycle is initiated at the begin of each horizontal sweep. The closed control loop ensures a phase-true locking be- tween the oscillator signal (from which is produced the @M main clock) and the color subcarrier burst or the digital data burst contained in the received signal. The signal produced by the VCO in action, is transferred to the filter via the oscillator control circuit. The filter forms the required main clock @M and is followed by the output buffer that provides a low-impedance output signal suited for clocking the DIGIT 2000 signal processors. The timing of the data transfer from the VPU 2203, CVPU 2233 or CVPU 2235 Video Processor or the DMA 2270 D2-- MAC Decoder to the MCU 2600 Clock Generator IC is illustrated in Fig. 2-2. The
first three bits serve for selecting the required VCO, depending on whether PAL/SECAM, NTSC, or D2-MAC operation is chosen. The following nine bits (LSB first) provide the tuning signal for the VCO in the shape of two’s complement. These nine bits are composed of the filtered sign-containing phase deviation Aq (7 bits) and the sign-containing alignment value for the oscillator (8 bits). If the MCU 2600 Clock Generator IC is employed in a multi- standard TV set, the required VCO is selected in the way al- ready described. For use in a single-standard receiver, the selection of the operating VCO is free and independent of the data signal. The not-used oscillators can be blocked externally by applying ground to pins 9, 10 or 12. In the case of a multi-standard TV set with up to three operated VCOs, the priority level for operation is internally fixed with the highest level for VCO 1 and the lowest level for VCO 3. This means, when switching on and also in the case of data faults the oscillator control circuit
will select the oscillator with the highest level, if the input of this oscillator is not externally grounded. It should be noted that all connection rails on the PC board must be designed under the point of view of HF signals. An inductance of 10 nH/cm can be assumed at a 0.5 to 1 mm wide rail. This makes an inductive impedance of several Ohms per cm length for the important 3°¢ harmonic of f gy. Best performance is given by ground plane layout of the PC board. All ground and signal lines should be as wide as possible, inductance-free and without loops in the neighbourhood of high HF currents. All supply pins of the clock generator IC must be equipped with ceramic bypass capacitors directly at the IC to ground pins on the shortest possible way.
6. Description of the Connections and Signals
Pin 1 — Ground of Output Buffer This pin serves as separate ground pin for the output buffer and must be carefully decoupled from the crystal oscillators and the input signals.
Pin 3 —- @M Main Clock Output (Fig. 5-1) This pin supplies the clock signal for the DIGIT 2000 TV receiver for clocking all signal processors used in this system.
Pin 4 — Vsyp Output Buffer Supply A positive supply voltage of 5 V is required which powers the output buffer and must be well decoupled with respect to the other supply pin. For this, a bypass capacitor is required between pins 4 and 1.
Pin 5 — PLL Clock Input (Fig. 5-2) Via this pin the MCU 2600 Clock Generator receives the PLL clock for transferring the tuning signal from the VPU, the CVPU or the DMA to the VCO integrated in the MCU 2600.
Pin 6 — PLL Data Input (Fig. 5-2) The desired oscillator is selected by the signal fed to pin 6 as described in Table 4-1. Additionally, pin 6 receives the digital PLL information supplied by the VPU, the CVPU or the DMA, to control the VCO included in the MCU 2600 Clock Generator.
Pin 7 — Ground This pin serves as ground pin for the whole circuit except the output buffer. Its connection should be separated care- fully from the pin 1 ground connection.
Pins 8 to 13 — Crystal Connections (Fig. 5-3) In addition to the oscillator function, the respective input pin serves also for switching off the not-used oscillators by connecting their input pins to ground (pin 7).
Pin 14 — Vgyp Supply Voltage This pin is the supply pin for the whole IC except the output buffer. It must be decoupled carefully with respect to the output buffer supply pin 4. For this, a bypass capacitor between pins 14 and 7 is required.
MDA 2062 1024-Bit EEPROM
1024-Bit EEPROM
Electrically erasable programmable read-only memory (EEPROM) in N-channel floating-gate technology with a capacity of 128 words, 8 bits each. The MDA 2062 is intended for use as a re programmable non-volatile memory in conjunction with the CCU 2030/2050/2070 series Central Control Units of the DIGIT 2000 Digital TV System, the MAA 4000 Remote-Control and PLL-Tuning Microcomputers for TV receivers or the SAA 1280, SAA 1290 and SAA 1293 Remote-Control and Tuning ICs. It serves for storing the tuning information as well as several analog settings, further alignment information given in the factory when producing the TV set. The stored information remains stored even with the supply voltages switched off. Reading and programming operations are executed via the IM bus (see section 7.). Input and output signals are TTL level. An address option input provides the possibility to operate two memories in parallel, to obtain a total storage capacity of 2048 bits.
1. Functional Description
1.1. Memory Operation
The internal memory address space ranges from address 128 to address 255. Addresses 4 and 14 provide special functions. To read a stored data word, the desired memory address has to be entered to the memory address register first. This is done by serially entering the IM bus address 128 (optionally 132) (during Ident = L), followed by the memo- ry address (during Ident = H) in a single IM bus operation. With the memory address register set, the memory data may be read. This, in turn, is done by entering the IM bus address 129 (optionally 133) to the device (during Ident = L). Immediately after this, within the same IM bus operation (during Ident = H) the open-drain Data output will conduct to serially transmit the respective 8-bit memory data. Reprogramming a memory location is done in two steps, a) and b), that are identical except for the data word to be entered. Step a) resets all bits to “1”, and step b) programs the desired data into the selected memory location. a) First, the desired memory address is
entered in the way described above. Second, the actual programming is initiated by serially entering the IM bus address 131 (optional- ly 135) followed by the data word to be stored, which is 255 for step a). The device will now internally time its program- ming sequence of approx. 16 periods of the 1 kHz memory clock. During this “busy” time all inputs are blocked from affecting the programming except for the Reset input. A Reset = L signal will immediately cancel any programming operation as well as any bus operation in progress. The busy state may be interrogated by reading bit 1 of ad- dress location 14. A high level of this “busy-bit” indicates that programming is still under way. The IM bus operation for entering address 14 should always directly precede reading the busy-bit. Reading any other address location during the busy state will produce erroneous data at the Data output. An address change operation during the busy state will not change the memory address register content. The intended start of another programming operation during the busy time will not be executed. b) After time-out, normal operation may be resumed, e. g. by performing the second step of a programming sequence, i. e. by programming the desired 8-bit data word into the respective memory address location. This is done by restoring the proper memory address first, if necessary, and then by serially entering the IM bus address 131 (optionally 135) followed by the desired 8-bit data word. The device will again time its own programming sequence as described under a). After time-out the new data may be verified.
1.2. Redundancy
The MDA 2062 EEPROM contains circuitry that allows to replace up to two rows of the memory matrix, each containing 4 bytes of memory, by redundant rows SR 1 and SR 2. This substitution can be done in the field, by the user. To prepare for activation of SR 1, memory address location 192 must contain the 5 LSB of the memory address containing the defect, which identifies the row to be substituted. Furthermore, bit 5 has to be set to “0”, which identifies the data to be redundancy relevant (see Fig. 2). To prepare for activation of SR 2, memory address location 160 must contain the equivalent data.
The activation itself of the redundant rows is done by reading the content of memory address locations 192 and 160. This transfers the repair information stored nonvolately in the memory array to volatile repair registers. It is important to note that the repair registers are cleared (bit 5 set to “1”) by any Reset = L signal. Thus, any LH transition of the Reset signal must immediately be followed by reading the memory address locations 192 and 160, which restores the repair information to the repair registers. SR 2 may be substituted by SR 1, whereas SR 1 cannot be substituted. As well, row 0 which contains the memory address locations 192 and 160 cannot be substituted. SR 1 and SR 2 are part of the memory matrix portion that is not protectable by the S signal. Memory address locations 192 and 160 are part of the protectable portion.
1.3. Testing The MDA 2062 EEPROM contains circuitry designed to facilitate testing of the various functions. By programming data into address location 4, the device is switched to one or more of a number of test modes. A detailed description is given in section 6.
1.4. Protected Matrix The programming matrix contains a protectable portion. Addresses 128 to 134, 160 to 166, 192 to 198 and 224 to 230 can only be programmed if the “Safe” input S (pin 6) is at high potential. In that way, this portion of the memory is protected against inadvertent reprogramming even if such false information were received via the IM bus. The second part of the programming matrix is not protected.
1.5. Shipment Parts are shipped with all bits set to “1”, except for ad- dresses 192 and 160 which may contain repair information. The content of memory address locations 192 and 160, if different from 255, should not be altered, as this will result in defective rows appearing within the memory address space.
5. Description of the Connections and the Signals
Pin 1 — Option Input Fig. 5 shows the internal configuration of this input. With Pin 1 at ground potential (low) or floating, the MDA 2062 reacts upon the IM bus addresses 128, 129 and 131. With pin 1 continuously at Vpp potential (high), the MDA 2062 reacts upon this IM bus addresses 132, 133 and 135 (see Fig. 8). In this way, parallel operation of two MDA 2062 is permitted, to obtain 2048 bits of non-volatile storage direct- ly accessible via the IM bus. Pin 1 is internally tied to ground via a transistor equivalent to a 40 kQ resistor.
Pins 2, 4, 5 and 11 — NC These pins are not connected internally.
Pin 3 — Programming Voltage Vp A programming voltage of + 20 V (+ 5%) is required. The current consumption during programming is approximately 1 mA. During non-programming operations, pin 3 may be held at any level between (Vpp — 0.7 V) and + 21 V. It may also be left floating. The MDA 2062 EEPROM must not be inserted or removed from a socket with Vp > 6 V. During power on/off sequences, current from the Vp supply should be limited to Ip max = 5 MA.
Pin 6 ~ Safe Input S Fig. 5 shows the internal configuration of this input. Normally, with pin 6 at ground potential (low), one portion of the programming matrix is protected so that this part of the memory cannot be reprogrammed inadvertently. Only when pin 6 receives high potential continuously, the protected portion of the memory matrix can be programmed. Pin 6 is internally tied to ground via a transistor equivalent to a 40 kQ. resistor.
Pin 7 — Ground, 0 This pin must be connected to the negative of the supplies.
Pins 8 to 10 — IM Bus Connections These pins serve to connect the MDA 2062 EEPROM to the IM bus (see section 7.), via which it communicates with the CCU 2030/2050/2070 or MAA 4030 series pC or the SAA 1280/SAA 1290/SAA 1293.
Pins 8 (IM Bus Clock In- put) and 9 (IM Bus Ident Input) are inputs as shown in Fig. 6 and pin 10 (IM Bus Data) is an input/output as shown in Fig. 7. The signal diagram for the IM bus is illustrated in Figs. 8 and 11. The required addresses which the MDA 2062 EEPROM receives from the microcomputer, are also shown in Fig. 8.
Pin 12 — Reset Input This input has a configuration as shown in Fig. 6. Via this in- put, the MDA 2062, together with the other circuits belong- ing to the system, receives the Reset signal which is derived from Vpp via an external RC circuit. A low level is required during power-up and power-down procedures. Low level at pin 12 (max. 1.3 V) cancels a programming procedure and an IM bus operation in progress.
The memory address register is not, the repair register is erased.
During operation, pin 12 requires high level (min. 2.4 V). Pin 13 — Memory Clock Input Via this input (Fig. 6) the MDA 2062 receives a 1 kHz clock signal from pin 3 of the CCU 2030, CCU 2050, CCU 2070 or MAA 4030 microcomputer or the SAA 1280/SAA 1290/SAA 1293.
Pin 14 — Supply Voltage Vpp
The supply voltage required is + 5 V (+ 5 %), and the current
consumption in active operation is approx. 30 mA.
6. Test Functions
This description of the test byte is not part of the specification. It contains no information necessary for normal (intended) use of the MDA 2062 memory. It is only intended as a description of the various functions of the test byte that are designed for factory use, but it does not specify such properties. The description is subject to change. Address location 4 contains a test byte which governs test mode operation of the MDA 2062. The test byte is set by performing the IM bus operation for entering address 4, followed by an IM bus programming operation with the desired test data word.
The test byte is valid during all following IM bus operations until changed or set to 0 by a Reset = L signal. The test byte shall not be changed during the busy time of a programming operation. Fig. 9 shows the bit arrangement of the test byte. Set bit 5 for activation of the test byte!
Block Programming Three block program modes can be activated by the test byte, in conjunction with the memory address loaded into the memory address register: 1) all bytes are selected (including 8 bytes in redundant rows): 2) all even-numbered bytes are selected (redundant bytes are not predetermined, they have to be defined as even bytes): 3) all odd-numbered bytes are selected (redundant bytes are not predetermined): memory address 76543210 1xxxxxOx (e.g. 128) 1xxxxx10 = (e.g. 130) 1xxxxx11~= (e.g. 131)
Thus, programming all selected bytes with the same de- sired data is done within one programming sequence. The complete sequence is: Enter Address 4 Program Test byte (e. g. 160) Enter Address 128, 130 or 131 Program Data A checker board pattern is programmed with two program- ming operations after loading the test byte: Enter Address 130 Program Data 85 Enter Address 131 Program Data 170 Read Reference Shifting
During read operations the memory cell threshold voltage is compared with a reference voltage. The comparator out- put then produces the logic one level for a cell threshold higher than the reference and the logic zero level for a cell threshold lower than the reference. The test byte provides means to shift the reference voltage in positive or negative direction in three steps: +0.3V, +06Vand + 09V.
During a read operation a positive-shifted reference voltage establishes a margin test for logic ones, whereas a negative-shifted reference does so for logic zeroes. This margin test is performed digitally by IM bus operations on- ly, without the need to switch analog power supplies. +0.9V: +0.6V: +0.3V: -—-03V: —06V: —~0O9V: 76543210 ~x010x1x1 x010x0x1 x010x1x0 *x110x0x0 x011x0x0 ‘%~111x0x0
Redundancy Disable
With bit one of the test byte set, the redundant rows can be accessed neither during byte program operations nor during any read operation, even if the redundancy registers are properly loaded. This test byte function has no effect on block programming operations.
Ramp Disable
The MDA 2062 contains circuitry to shape the internal program supply voltage to be a ramp function during programming operations. This feature is considered to be essential to a high erase/write endurance of the memory cells. Bit 3 of the test byte disables this ramp function so that the internal program supply, according to the timing diagram Fig. 10, is immediately disconnected from the Vop supply and connected to the Vp supply at the 4th falling edge of the 1 kHz memory clock, and is immediately disconnected from the Vp supply and re-connected to the Vpp supply at the 14th falling edge of the 1 kHz clock after the last rising Ident signal edge of the IM bus operation starting the program cycle. By this feature other than the built-in ramp function (approx. 100 ts/V) can be applied via the Vp supply pin.
7. Description of the IM Bus
The INTERMETALL Bus (IM Bus for short) has been designed to control the DIGIT 2000 ICs by the CCU Central Control Unit. Via this bus the CCU can write data to the ICs or read data from them. This means the CCU acts as a master whereas all controlled ICs are slaves. The IM Bus consists of three lines for the signals Ident (ID), Clock (CL) and Data (D). The clock frequency range is 50 Hz to 170 KHz. Ident and clock are unidirectional from the CCU to the slave ICs, Data is bidirectional. Bidirectionality is achieved by using open-drain outputs with On-resistances of 150 2 maximum. The 2.5 kQ pull-up resistor common to all outputs is incorporated in the CCU. The timing of a complete IM Bus transaction is shown in Fig. 11 and Table 1. In the non-operative state the signals of all three bus lines are High. To start a transaction the CCU sets the ID signal to Low level, indicating an address transmission, and sets the CL signal to Low level as well to switch the first bit on the Data line. Thereafter eight address
bits are transmitted beginning with the LSB. Data takeover in the slave ICs occurs at the High levels of the clock signal. At the end of the address byte the ID signal goes High, initiating the address comparison in the slave circuits. In the addressed slave the IM bus interface switches over to Data read or write, because these functions are correlated to the address. Also controlled by the address the CCU now transmits eight or sixteen clock pulses, and accordingly one or two bytes of data are written into the addressed IC or read out from it, beginning with the LSB. The Low clock level after the last clock pulse switches the Data line to High level. After this the completion of the bus transaction is signalled by a short Low state pulse of the ID signal. This initiates the storing of the transferred data. It is permissible to interrupt a bus transaction for up to 10 ms.
ADC 2310 E Audio A/D Converter
Audio A/D Converter
1. Introduction
Analog-to-digital
converter for digitizing the analog stereo sound signals in digital TV
receivers based on the DIGIT 2000 system, intended for working together
with the APU 2400 T or the APU 2470 Audio Processor, being controlled by
the CCU 2030, CCU 2050 or CCU 2070 Central Control Unit and being
clocked by the MCU 2632 Clock Generator. The ADC 2310 E is an integrated
circuit in Cl technology, housed in a 24-pin Dil plastic package, and
contains on one silicon chip the following functions (see Fig. 1-1):
— several analog input and output amplifiers
— five analog switches (S1 to $5) for selecting different
signal sources
— an analog stereo dematrix circuit
— alevel control facility
- two pulse-density modulators (PDM | and PDM Il)
— an IM bus interface
2. Functional Description Fig. 2-1 shows the block diagram of a digital stereo sound channel intended for a DIGIT 2000 TV receiver, equipped with additional audio inputs and outputs which can be used with the so-called Euro connector or SCART connector, e. g. for connecting a video recorder.
The analog sound signals selected for conversion by the analog switch S1 firstly pass through the level control section where the desired level control is carried out. Thereafter, they are fed to the first processing stage of the A/D conversion, the pulse-density modulators PDM | and PDM Il, whose output signals are 1-bit data streams with a data rate of 4.7 MHz maximum. This data is then transferred to the APU Audio Processor where the digital decimation filters are the input, performing the second step of the con- version process. Due to the very high sampling rate of the pulse-density modulators, no steep anti-aliasing filters are needed at the input. The digital output data of the whole converting system has a signal-to-noise ratio which can be compared to that of a conventional 13-bit A/D converter.
The TV Audio inputs get their analog signal (_+R and 2 R) from the stereo decoder of the TV set, whereas the Aux. Analog inputs are intended to receive an audio signal from a video recorder or another external source, e.g. via the SCART connector. The Analog Out | and II pins supply the selected audio signal, e.g., to the SCART connector for connection to a video recorder or other equipment.
2.1. The Analog Switches The five analog switches S1 to S5 (S1 and S3 are two-pole switches) are controlled via the IM bus (see section 2.6.) to select the required connections between the four analog inputs and the two digital outputs and the two additional analog outputs.
2.2. The Dematrix When switched on via the IM bus (switch 2, see Table 2-2),
the dematrix provides the 2 R and 2L stereo signals at the analog outputs. These signals are extracted form the L+R and 2R input signals according to the German TV stereo sound system (see Table 2-1 ).
2.3. The Pulse-Density Modulators The two pulse-density modulators, PDM | and PDM Il, are sigma-delta modulators equipped with two feedback loops each. At the outputs they supply pulse trains whose pulse density is proportional to the amplitude of the input signal. The maximum sampling rate, and thus the maximum pulse rate, is 4.7 MHz. possibilities are switched off, the capacitor at pin 9 is discharged rapidly to 2.8 V, and the level control goes to full level. The level control is under IM Bus control as shown in Table 2-2.
2.4. The Level Control Section This part of the ADC 2310 E serves to reduce the level of the input signal to be converted if the input signal exceeds the level for full drive of the PDM pulse-density modulators. Controlled by the IM bus, the audio level is sensed either in channel | or in channel fl or in both channels. If all three possibilities are switched off, the capacitor at pin 9 is discharged rapidly to 2.8 V, and the level control goes to full level. The level control is under IM Bus control as shown in Table 2-2.
2.5. The Clock Divider This part of the ADC 2310 E is provided for adapting the digital stereo sound channel to different TV standards. With bit 7 = Low (see Table 2-2 ), the divider ratio is set to 4:1, whereas bit 7 = High gives 3:1. This allows operation of the ADC 2310 E with almost the same sampling frequency at a main clock frequency OM of 17.7 MHz (PAL) or 14.3 MHz (NTSC), both supplied by the MCU 2632 Clock Generator.
2.6. The IM Bus Interface This circuit section is provided for controlling the ADC 2310 E by the CCU 2030, CCU 2050 or CCU 2070 Central Control Unit via the IM bus (see section 7.). In the case of ADC 2310 E, the IM bus is unidirectional from the CCU to the ADC. That means that information is only transferred from the CCU to the ADC 2310 E. The bit arrangement is shown in Fig. 2-2, and the actions performed can be de- rived from Table 2-2.
2.7. The Preemphasis and Deemphasis
The audio signal supplied by the stereo decoder or video demodulator of the TV set has a preemphasis determined.
5. Description of the Connections and Signals
Pin 1 — Ground
(Analog) This pin serves as ground connection for the analog input signals at pins 4, 5, 8, 21 and 24 and as ground connection for the supply of the analog part of the ADC 2310 E.
Pins 2, 3, 6 and 7 — Capacitor Pins (Fig. 4-8) The filter capacitors for the inner and the outer feedback loop of the pulse-density modulators PDM | and PDM II must be connected to these pins.
Pins 4 and 5 — Analog (TV) Audio Inputs | and I! (Fig. 4-1)
These two inputs get their input signal from the stereo decoder or sound demodulator of the TV set, coupled via capacitors. The input signal range can be increased by adding series resistors.
Pin 8 — Analog (TV) Pilot Input (Fig. 4-2) It is possible to supply the ADC 2310 E with the pilot regardless of the position of switch S1 via this pin. The signal must be coupled capacitively.
Pin 9 ~ Level Control RC Pin (Fig. 4-9) The RC element connected to this pin determines the response time of the level control circuit.
Pins 10 and 11 — PDM Digital Sound Outputs (Fig. 4-5) These pins are the outputs of the pulse-density modulators PDM | and II which supply the PDM data to the APU Audio Processor.
Pin 12 —Vgyp; Supply Voltage (Analog) The analog circuitry of the ADC 2310 E is supplied via this pin.
Pin 13 —- Vgype Supply Voltage The supply at this pin powers the analog switches.
Pin 14 — Ground (Digital)
This pin is the ground connection for the digital output signals supplied by pins 10 and 11 and for the supply of the digital part of the ADC 2310 E.
Pin 15 — @M Clock Input (Fig. 4-3) This pin receives the required clock signal from the MCU 2632 Clock Generator.
Pin 16 — Bit 6 Data Output (Fig. 4-6) This output provides the status of bit 6 (see Table 2-2).
Pins 17 to 19 ~ IM Bus Inputs (Fig. 4-4) The ADC 2310 E is connected to the IM Bus and receives commands issued by the CCU via these pins.
Pin 20 — Vgyp; Supply Voltage (Digital) Pin 20 supplies the digital part of the ADC 2310 E.
Pins 21 and 24 — Analog (Aux) Audio Inputs | and Il (Fig. 4-2) These inputs can be used as playback inputs from a video recorder or other external sources, e. g. connected via the Euro or SCART connector. The input signal must be coupled via capacitors. The input signal range can be in- creased by adding series resistors.
Pins 22 and 23 —- Analog Audio Outputs | and II (Fig. 4-7)
These two analog outputs provide either the signals of the TV inputs (pins 4 and 5) or the signals of the Aux inputs pins 21 and 24, depending on the state of the analog switches which are set by the CCU via the IM bus according to Table 2-2.
APU2470 Audio Processor
digital Audio Processor
1. Introduction
The APU 2470 Audio Processor is an N-channel MOS circuit, housed in a 24 pin Dil plastic package. It is designed to perform digital processing of TV audio information. The architecture of the APU 2470 combines two main blocks:
1/0 blocks DSP block The I/O blocks are used to manage the input and output of audio information. The DSP block consists of a mask-programmable digital signal processor, whose software can be controlled by a microprocessor (CCU) via the IM bus. So parameters like coefficients can be modified during performance. By means of the DSP software, audio functions like dematrixing, bilingual mode, tone manipulation and volume control are performed. To allow bilingual performance two audio processing channels are available: MAIN channel, provided for the loudspeaker system AUX channel, provided for headphones Fig. 1-1 gives an overview of the APU functions.
1.1. Application of the APU 2470 The APU2470 is designed to interface with ITT’s ADC 2310E Audio A/D Converter as well as with the DMA 2270 D2-MAC Decoder or the NIP 2400 NICAM Demodulator/Decoder and the AMU 2485 Audio Mixer. It can receive digital data in two different formats:
a) The ADC 2310E receives analog audio information either from the SCART Interface, also called Euro connector (for example: video recorder) or from any terrestrial TV transmission and converts it into two 1-bit PDM streams. For this input format, decimation filters are provided in the APU 2470, converting each PDM stream into a 16-bit word at a sampling rate of approximately 35 kHz.
b) Digital serial audio data, provided for example by the DMA 2270 D2-MAC Decoder or the NIP 2400 NICAM Demodulator/Decoder and mixed in the AMU 2485 Audio Mixer, can be received via the S bus by means of the S bus interface.
ITT’s CCU 2030, CCU 2050, CCU 2070 or CCU 3000 Central Control Units of the DIGIT 2000 family are well suited for interfacing with the APU 2470 Audio Processor. Fig. 1-2 shows how the APU 2470 can be used together with the mentioned ITT ICs to realize multistandard audio processing with PAL and D2-MAC or NICAM signals. In the follow- ing descriptions data coming from the ADC will be called “PDM-Data’”, and data from the AMU will be called “S-Data”. Two different audio configurations are possible with the APU 2470 (Fig. 1-2). The dashed line version uses the AMU 2485 as a pre processing unit both for PDM-Data and S-Da- ta and allows mixing between both kinds of inputs. Another advantage of this version is the digital 50 us deemphasis included in the AMU 2485 applied to the PDM inputs. This gives the flexibility to switch between the D2-MAC/NICAM J17 deemphasis and the FM 50 us deemphasis without using analog means. This version is recommended for new TV concepts. The other application needs an analog 50 us
deemphasis in case of S-Data input in the AMU 2485. For that reason a switchable 50 us preemphasis is included in the AMU 2485. This version can be used in conjunction with the old ADC-APU concept.
5.3. Pin Descriptions
Pins 1 and 21 — Reference Current Inputs (Fig. 5-2) These inputs require a current of 150 uA called reference current Ine- and serving for volume adjustment in the DAC interfaces.
Pins 2 and 12 — Digital Ground, 0 These pins must be connected to the negative of the supply. They have to be used for ground connections in con- junction with digital signals.
Pins 3, 4 and 5 — IM Bus Connections
Via these pins, the APU 2470 is connected to the IM bus and communicates with the CCU. Pins 4 (IM bus Ident input) and 5 (IM bus Clock input) have the configuration shown in Fig. 5-3. Pin 3 (IM bus Data input/output) is shown in Fig. 5-7. The IM bus is described in section 2.1.3.
Pins 6, 8, 9 and 15 — Serial Audio Interface (S Bus)
Pin 9 is the S-Data input (Fig. 5-6) and pin 6 the S-Data out- put (Fig. 5-9). Pins 8 and 15 are S-Clock and S-Ident inputs/outputs (Fig. 5-8), the status depending on bit 4 in co- efficient k33 (see sections 2.1.2. and 4.13.). Pins 7, 14 and 18 — Vsyp Supply Voltage These pins must be connected to the positive of the supply. The clock buffer supply pin 14 must be decoupled carefully from the other supply pins.
Pin 10 — Vigg internal Substrate Bias Voltage
The APU 2470 has an on-chip substrate bias generator which produces a negative bias voltage of about 3.4 V. Pin 10 should have a 0.1 uF capacitor to ground.
Pin 11 — Reset Input (Fig. 5-3)
In the steady state, high level is required at pin 11. A low level normalizes the APU 2470. Initialization of the APU 2470 is described in section 4.12.
Pin 13 — @M
Main Clock Input (Fig. 5-4) This pin receives the required main clock signal from the MCU 2600 or MCU 2632 Clock Generator IC or from the DMA 2270 D2-MAC Decoder or the NIP 2400 NICAM Demodulator/Decoder.
Pins 16 and 17 —- PDM Il and PDM | Digital Inputs (Fig. 5-5) These pins receive the pulse-density modulated output signals of the ADC 2300 E or ADC 2310 E.
Pins 19 and 20 - AUX DAC Outputs 2L and 2R (Fig. 5-9) These pins supply the audio output signals as output cur- rents whose amplitude is determined by the reference cur- rent Inco fed to pin 1. The output signal of pins 19 and 20 is not influenced by the VOL 1 and VOL 2 volume controls and is intended for headphones, for example.
Pins 22 and 23 — MAIN DAC Outputs 1L
and 1R (Fig. 5-9) These pins supply the audio output signals as output cur- rents whose amplitude is determined by the reference cur- rent Iger, fed to pin 21. The output signal of pins 22 and 23 is influenced by the VOL 1 and VOL 2 volume control facilities.
Pin 24 — Analog Ground 0 This pin must be connected to the negative of the supply. It serves as ground connection for analog signals.
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Ciciora, Walter et al., “An Introduction to Teletext and Viewdata with Comments on Compatibility,” IEEE Transactions on Consumer Electronics, vol. CE-25, No. 3, Jul. 1979, (“Consumer Electronics”), pp. 235-245.
Tanton, N. E. “UK Teletext— Evolution and Potential,” Consumer Electronics, pp. 246-250.
Bright, Roy D., “Prestel—The World's First Public Viewdata Service,” Consumer Electronics, pp. 251-255.
Bown, H.G. et al., “Telidon: A New Approach to Videotex System Design,” Consumer Electronics, pp. 256-268.
Chitnis, A.M. et al., “Videotex Services: Network and Terminal Alternatives,” Consumer Electronics, pp. 269-278.
Hedger, J. “Telesoftware: Home Computing Via Broadcast Teletext,” Consumer Electronics, pp. 279-287.
Crowther, G.O., “Teletext and Viewdata Systems and Their Possible Extension to Europe and USA,” Consumer Electronics,, pp. 288-294.
Gross, William S., “Info-Text, Newspaper of the Future,” Consumer Electronics, pp. 295-297.
Robinson, Gary et al., “‘Touch-Tone’ Teletext—A Combined Teletext-Viewdata System,” Consumer Electronics, pp. 298-303.
O'Connor, Robert A., “Teletext Field Tests,” Consumer Electronics, pp. 304-310.
Blank, John, “System and Hardware Considerations of Home Terminals With Telephone Computer Access,” Comsumer Electronics, pp. 311-317.
Plummer, Robert P. et al, “4004 Futures for Teletext and Videotex in the U.S.,” Consumer Electronics, pp. 318-326.
Marti, B. et al., The Antiope Videotex System, Consumer Electronics, pp. 327-333.
Frandon, P. et al, “Antiope LSI,” Consumer Electronics, pp. 334-338.
Crowther, G.O., “Teletext and Viewdata Costs As Applied to the U.S. Market,” Consumer Electronics, pp. 339-344.
Mothersole, Peter L., “Teletext Signal Generation Equipment and Systems,” Consumer Electronics pp. 345-352.
Harden, Brian, “Teletext/Viewdata LSI,” Consumer Electronics, pp. 353-358.
Swanson, E. et al., “An Integrated Serial to Parallel Converter for Teletext Application,” Consumer Electronics, pp. 359-361.
Neal, C. Bailey et al., “A Frequency-Domain Interpretation of Echoes and Their Effect on Teletext Data Reception,” Consumer Electronics, pp. 362-377.
Goyal, Shri K. et al., “Reception of Teletext Under Multipath Conditions,” Consumer Electronics, pp. 378-392.
Prosser, Howard F., “Set Top Adapter Considerations for Teletext,” Consumer Electronics, pp. 393-399.
Suzuki, Tadahiko et al., Television Receiver Design Aspects for Employing Teletext LSI, Consumer Electronics, pp. 400-405.
Baer, Ralph H., “Tele-Briefs—A Novel User-Selectable Real Time News Headline Service for Cable TV,” Consumer Electronics, pp. 406-408.
Sherry, L.A., “Teletext Field Trials in the United Kingdom,” Consumer Electronics, pp. 409-423.
Clifford, Colin, “A Universal Controller for Text Display Systems,” Consumer Electronics, pp. 424-429.
Barlow, “The Design of an Automatic Machine Assignment System”, Journal of the SMPTE, Jul. 1975, vol. 84, p. 532-537.
Barlow, “The Automation of Large Program Routing Switchers”, SMPTE Journal, Jul. 1979, Vol. 88, p. 493-497.
Barlow, “The Computer Control of Multiple-Bus Switchers”, SMPTE Journal, Sep. 1976, Vol. 85, p. 720-723.
Barlow, “The Assurance of Reliability”, SMPTE Journal, Feb. 1976, Vol. 85, p. 73-75.
Barlow, “Some Features of Computer-Controlled Television Station Switchers”,Journal of the SMPTE, Mar. 1972, vol. 81, p. 179-183.
Barlow et al., “A Universal Software for Automatic Switchers”, SMPTE Journal, Oct. 1978, vol. 87, p. 682-683.
Butler, “PCM-Multiplexed Audio in a Large Audio Routing Switcher”, SMPTE Journal, Nov. 1976, vol. 85, p. 875-877.
Dickson et al., “An Automated Network Center”, Journal of the SMPTE, Jul. 1975, Vol. 84, p. 529-532.
Edmondson et al., “Nbc Switching Central”, SMPTE Journal, Oct. 1976, Vol. 85, p. 795-805.
Flemming, “NBC Television Central—An Overview”, SMPTE Journal, Oct. 1976, Vol. 85, p. 792-795.
Horowitz, “CBS” New-Technology Station, WBBM-T, SMPTE Journal, Mar. 1978, vol. 87, p. 141-146.
Krochmal et al., “Television Transmission Audio Facilities at NBC New York”, SMPTE Journal, Oct. 1976, vol. 85, p. 814-816.
Kubota et al., “The Videomelter”, SMPTE Journal, Nov. 1978, Vol. 87, p. 753-754.
Mausler, “Video Transmission Video Facilities at NBC New York”, SMPTE Journal, Oct. 1976, vol. 85, p. 811-814.
Negri, “Hardware Interface Considerations for a Multi-Channel Television Automation System”, SMPTE Journal, Nov. 1976, vol. 85, p. 869-872.
Paganuzzi, “Communication in NBC Television Central”, SMPTE Journal, Nov. 1976, vol. 85, p. 866-869.
Roth et al., “Functional Capabilities of a Computer Control System for Television Switching”, SMPTE Journal, Oct. 1976, vol. 85, p. 806-811.
Rourke, “Television Studio Design—Signal Routing and Measurement”, SMPTE Journal, Sep. 1979, vol. 88, p. 607-609.
Yanney, Sixty-Device Remote-Control System for NBC's Television Central Project, SMPTE Journal, Nov. 1976, vol. 85, p. 873-877.
Young et al., “Developments in Computer-Controlled Television Switches”, Journal of the SMPTE, Aug. 1973, vol. 82, p. 658-661.
Young et al., “The Automation of Small Television Stations”, Journal of the SMPTE, Oct. 1971, vol. 80, p. 806-811.
Zborowski, “Automatic Transmission Systems for Television”, SMPTE Journal, Jun. 1978, vol. 87, p. 383-385.
“Landmark forms cable weather news network,” Editor & Publisher, (Aug. 8, 1981) p. 15.
“Broadcast Teletext Specification,” published jointly by British Broadcasting Corporation, Independent Broadcasting Authority, British Radio Equipment Manufacturers' Association (Sep. 1976), pp. 1-24.
“Colormax Cable captioning—16,000,000 Subs Need It!,” Colormax Electronic Corp. (advertisement), 3 pages.
“7609 Sat-A-Dat Decoder/Controller,” Group W Satellite Communications (advertisement) 2 pages.
“Teletext Timing Chain Circuit (SAA5020),” (Aug. 1978), pp. 109.
“Teletext Video Processor (SAA 5030),” Mullard (Dec. 1979), pp. 1-9.
“Video Text Decoder Systems (Signetics)”, Phillips IC Product Line Summary (May 1981), pp. 15-16.
“Teletext Acquisition and Control Circuit (SAA5040 Series),” Mullard (Jun. 1980), pp. 1-16.
“Asynchronous Data Transmission System Series 2100 Vidata,”Wagener Communications, Inc. (advertisement), 2 pages.
“Zenith VIRTEXTTM . . . Vertical Interval Region Text and Graphics,” Zenith Radio Corporation (flyer), 7 paged.
Anon, “Television Network Automated by Microcomputer-Controlled Channels,” Computer Design, vol. 15, No. 11, (Nov. 1976), pp. 50, 59, 62, 66 and 70.
Kinik, et al., “A Network Control System for Television Distribution by Satellite,” Journal of the SMPTE, Feb. 1975, vo. 84 No. 2, pp. 63-67.
Chiddix, “Videocassette Banks Automate Delayed Satellite Programming,” Aug. 1978, TV Comunications, pp. 38-39.
Curnal, et al., “Automating Television Operating Centers,” Bell Laboratories Record, Mar. 1978, pp. 65-70.
Baran, Paul (Packetcable Inc.), “Packetcable: A New Interactive Cable System Technology,” Cable '82—Technical Papers, National Cable Television Association 31st Annual Convention, Las Vegas, NV, May 3-5, 1982 (“CABLE '82”), pp. 1-6.
Tunmann, Ernest O. (Tele-Engineering Corporation), “Two-Way Cable TV Technologies,” Cable '82, pp. 7-15.
Dickinson, Robert V.C. (E-COM Corporation), “Carriage of Multiple One-Way and Interactive Service on CATV Networks,” Cable '82, pp. 16-21.
McNamara, R.P. et al. (Sytek, Incorporated), “MetroNet: an Overview of a CATV Regional Data Network,” Cable '82, pp. 22-31.
Eissler, Charles (Oak Communications Systems), “Addressable Control for the Small System,” Cable '82, pp. 32-36.
Mesiya, M.F. et al. (Times Fiber Communications, Inc.), “Mini-Hub Addressable Distribution System for Hi-Rise Application,” Cable '82, pp. 37-42.
Thomas, William L. (Zenith Radio Corporation), “Full Field Tiered Addressable Teletext,” Cable '82, pp. 44 46.
Langley, Don et al. (University of Cincinnati and Rice-Richter Associates), “Interactive Split Screen Teleconferencing,” Cable '82, pp. 47-50.
Klare, Stephen W. (Scientific—Atlanta), “Bandwidth-Efficient, High-Speed Modems for Cable Systems,” Cable '82, pp. 72-78.
Jubert, Jay (Wang Laboratories, Inc.), “Wangnet, a Cable-Based Localnet,” Cable '82, pp. 79-81.
Switzer, I. (Cable America, Inc.), “Cable TV Advances and TV Receiver Compatibility Problems,” Cable '82, pp. 114-118.
Skrobko, John (Scientific-Atlanta Incorporated), “Improving CATV System Reliability with Automatic Status Monitoring and Bridger Switching,” Cable '82, pp. 133-137.
Dahlquist, John (Jerrold Division, General Instrument Corporation), “Techniques for Improving Continuity of Service in a CATV Distribution System,” Abstract, Cable '82, p. 138.
Polishuk, Paul Dr. (Information Gatekeepers, Inc.) “Present Status of Fiber Optics Technology and its Impact on the CATV Industry,” Cable '82, pp. 142-147.
Dufresne, Michel (Videotron Communications LTEE), “New Services: an Integrated Cable Networks's Approach,” Cable '82, pp. 156-160.
Stanton, Gary W. (Southern Satellite Systems), “Downloading and Addressing via Teletext,” Cable '82, pp. 161-165.
Goldberg, Efrem I. (GTE Laboratories Incorporated), “Videotex on Two-Way Cable Television Systems—Some Technical Considerations,” Cable '82, pp. 166-174.
Noirel, Yves (CCETT/Rennes, France), “Abstract of paper entitled Data Broadcasting: “Didon” and “Diode” Protocols,” Cable '82, pp. 175-179.
von Meister, William F. (Digital Music Company), “The Home Music Store,” Cable '82, pp. 180-182.
Brown, Jr., Robert R. (Cima Telephone and Television), “Inter Bridger Trunking for Information Services,” Cable '82, pp. 183-189.
Alvord, Charles, Dr. (Communications Technology Management, Inc.), “Creating Standards for Interconnect Systems,” Cable '82, pp. 190-196.
Schrock, Clifford B. (Cable Bus Systems Corporation), “Can Noise and Ingress Coexist with Two-Way Services?,” Cable '82, pp. 205-209.
The Weather Channel, “The Weather Star Satellite Transponder Addressable Receiver,” Operation/Installation Manual, Rev. 01.5/82.
Lafayette, Jon, “TV ad monitor system starts tests here Mon.,” New York Post, Oct. 18, 1985, p. 63.
Jones, Stacy V., “Patents/Monitoring Display of TV Ads,” The New York Times, Oct. 19, p. 34.
Remley, F.M., “Television Technology,” SMPTE Journal, May 1982, pp. 458-462.
Proposed American National Standard, “Electrical and Mechanical Characteristics for Digital Control Interface,” SMPTE Journal, Sep. 1982, pp. 888-897.
Zaludek, Jerry P., “Videotape—Past, Present, and Future,” SMPTE Journal, Apr. 1982, pp. 356-360.
Kary, Michael Loran, “Video-Assisted Film Editing System,” SMPTE Journal, Jun. 1982, pp. 547-551.
Glover, S. “Automatic Switching at the Edmonton Television Studios,” SMPTE Journal, Nov. 1966, vol. 75, pp. 1089-1092.
Barlow, M.W.S., “The Remote Control of Multiplexed Telecine Chains,” SMPTE Journal, Apr. 1971, vol. 80, pp. 270-275.
Campbell, Keith D., “An Automated Video-Tape Editing System,” Journal of the SMPTE, Mar. 1970, vol. 79, pp. 191-194.
Bonney, R.B. et al., “A Proposed Standard Time and Control Code for Video-Tape Editing,” Journal of the SMPTE, Mar. 1970, vol. 79, pp. 186-190.
Barlow, M., Letter to the Editor, “Re: Coding and Packaging Film for Broadcasting,” Journal of the SMPTE, Oct. 1969, vol. 78, p. 889.
Barlow, M., Letter to the Editor, “Re: Automation of Telecine Equipment,” Journal of the SMPTE, Apr. 1970, vol. 79, pp. 345-346.
Matley, J. Brian, “A Digital Framestore Synchronizer,” SMPTE Journal, Jun. 1976, vol. 85, pp. 385-388.
Connolly, W.G. et al., “The Electronic Still Store: A Digital System for the Storage and Display of Still Pictures,” SMPTE Journal, Aug. 1976, vol. 85, pp. 609-613.
Sadashige, K., “Overview of Time-Base Correction Techniques and Their Applications,” SMPTE Journal, Oct. 1976, vol. 85, pp. 787-791.
Siocos, C.A., “Satellite Technical and Operational Committee—Television (STOC-TV) Guidelines for Waveform Graticules,” SMPTE Journal, Nov. 1976, vol. 85, pp. 878-879.
“Index to Subjects—Jan.-Dec. 1976 • vol. 85,” 1976 Index to SMPTE Journal, SMPTE Journal, vol. 85, pp. I-5 to I-13, I-15.
Rodgers, Richard W., “Design Considerations for a Transmission and Distribution System for SMPTE Time-Code Signals,” SMPTE Journal, Feb. 1977, vol. 86, pp. 69-70.
Allan, J.J., III, et al., “A Computer-Controlled Super-8 Projector,” SMPTE Journal, Jul. 1977, vol. 86, pp. 488-489.
“Index to Subjects—Jan.-Dec. 1977 • vol. 86,” 1977 Index to SMPTE Journal, SMPTE Journal, vol. 86, pp. I-5 to I-14.
Hamalainen, KJ., “Videotape Editing Systems Using Microprocessors,” SMPTE Journal, Jun. 1978, Vol. 87, pp. 379-382.
McCoy, Reginald F.H., “A New Digital Video Special-Effects Equipment,” SMPTE Journal, Jan. 1978, vol. 87, pp. 20-23.
Leonard, Eugene, “Considerations Regarding the Use of Digital Data to Generate Video Backgrounds,” SMPTE Journal, Aug. 1978, vol. 87, pp. 499-504.
Swetland, George R., “Applying the SMPTE Time and Control Code to Television Audio Post Production,” SMPTE Journal, Aug. 1978, vol. 87, pp. 508-512.
Moore, J.K., et al., “A Recent Innovation in Digital Special Effects, The CBS ‘Action Track’ System,” SMPTE Journal, Oct. 1978, vol. 87, pp. 673-676.
Connolly, William G., “Videotape Program Production at CBS Studio Center,” SMPTE Journal, Nov. 1978, vol. 87, pp. 761-763.
Nicholls, William C., “A New Edit Room Using One-
Inch Continuous-Field Helical VTRs,” SMPTE Journal, Nov. 1978, vol. 87, pp. 764-766.
“Index to vol. 87 Jan.-Dec. 1978,” SMPTE Journal, Part II to Jan. 1979 SMPTE Journal, pp. I-1, I-4 to I-14.
Wetmore,
R. Evans, “System Performance Objectives and Acceptance Testing of
the Public Television Satellite Interconnection System,” SMPTE
Journal, Feb. 1979, vol. 88, pp. 101-111.
Bates, George W.,
“Cut/Lap: A New Method for Programmable Fades and Soft Edit
Transitions Using a Single Source VTR,” SMPTE Journal, Mar. 1979, vol.
88, pp. 160-161.
Douglas, W. Gordon, “PBS Satellite
Interconnection Technical Operations and Maintenance,” SMPTE Journal,
Mar. 1979, vol. 88, pp. 162-163.
Oliphant, Andrew et al., “A Digital Telecine Processing Channel,” SMPTE Journal, Jul. 1979, vol. 88, pp. 474-483.
Bates,
George W. et al., “Time Code Error Correction Utilizing a
Microprocessor,” SMPTE Journal, Oct. 1979, vol. 88, pp. 712-715.
Geise,
Heinz-Dieter, “The Use of Microcomputers and Microprocessors in
Modern VTR Control,” SMPTE Journal, Dec. 1979, vol. 88, pp. 831-834.
“Index to Subjects—Jan.-Dec. 1979 • vol. 88,” 1979 Index to SMPTE Journal, SMPTE Journal, vol. 88, pp. I-4 to I-10.
“Advanced Transmission Techniques,” SMPTE Journal, Report on the 121st Technical Conference, Jan. 1980, vol. 89, pp. 31-32.
“Anderson: Progress Committee Report for 1979—Television,” SMPTE Journal, May 1980, vol. 89, pp. 324-328.
SMPTE Journal, May 1980, vol. 89, p. 391, no title.
“The TCR-119 Reader,” Gray Engineering Laboratories, SMPTE Journal, May 1980, vol. 89, p. 438. (advertisement).
Hopkins, Robert S., Jr., “Report of the Committee on New Technology,” SMPTE Journal, Jun. 1980, vol. 89, pp. 449-450.
Limb, J.O. et al., “An Interframe Coding Technique for Broadcast Television,” SMPTE Journal, Jun. 1980, vol. 89, p. 451.
“Preliminary List of Papers,” SMPTE Journal, Sep. 1980, vol. 89, p. 677.
Davis, John T., “Automation of a Production Switching System,” SMPTE Journal, Oct. 1980, vol. 89, pp. 725-727.
“Video Tape Recording Glossary,” SMPTE Journal, Oct. 1980, vol. 89, p. 733.
Advertisement,
“CTVM 3 series of Barco master control color monitors”, “Barco TV
Modulator, Model VSBM 1/S”, “VICMACS Type 1724 Vertical Interval
Machine Control System”, “Videotape Editing Controllers by US JVC
Corp., RM-70U, RM-82U, RM-88U”, SMPTE Journal, Oct. 1980, Vol. 89, p.
820 et seq.
Ciciora, Walter, “Teletext Systems: Considering the Prospective User,” SMPTE Journal, Nov. 1980, vol. 89, pp. 846-849.
Hathaway,
R.A. et al., “Development and Design of the Ampex Auto Scan Tracking
(AST) System,” SMPTE Journal, Dec. 1980, vol. 89, p. 931.
Connor, Denis J., “Network Distribution of Digital Television Signals,” SMPTE Journal, Dec. 1980, vol. 89, pp. 935-938.
“Index to Subjects—Jan.-Dec. 1980 • vol. 89,” 1980 Index to SMPTE Journal, SMPTE Journal, pp. I-5 to I-11.
“Index
to SMPTE-Sponsored American National Standards, Society Recommended
Practices, and Engineering Committee Recommendations,” 1980 Index to
SMPTE Journal, SMPTE Journal, pp. I-15 to I-20.
Table of Contents, SMPTE Journal, Feb. 1981, vol. 90, No. 2, 1 page.
Table of Contents, SMPTE Journal, Mar. 1981, vol. 90, No. 3, 1 page.
Table of Contents, SMPTE Journal, Apr. 1981, vol. 90, No. 4,1 page.
Table of Contents, SMPTE Journal, May 1981, vol. 90, No. 5, 1 page.
“Television,” SMPTE Journal, May 1981, pp. 375-379.
Table of Contents, SMPTE Journal, Jan. 1981, vol. 90, No. 1,1 page.
Table of Contents, SMPTE Journal, Jun. 1981, vol. 90, No. 6, 1 page.
Table of Contents, SMPTE Journal, Jul. 1981, vol. 90, No. 7,1 page.
Table of Contents, SMPTE Journal, Aug. 1981, vol. 90, No. 8, 1 page.
“American
National Standard” “time and control code for video and audio tape
for 525-line/ 60-field television systems,” SMPTE Journal, Aug. 1981,
pp. 716-717.
Table of Contents, SMPTE Journal, Sep. 1981, vol. 90, No. 9, 1 page.
“Proposed
SMPTE Recommended Practice” “Vertical Interval Time and Control Code
Video Tape for 525-Line/ 60-Field Television Systems,” SMPTE Journal,
Sep. 1981, pp. 800-801.
Table of Contents, SMPTE Journal, Oct. 1981, vol. 90, No. 10, 1 page.
Kaufman, Paul A. et al., “The Du Art Frame Count Cueing System,” SMPTE Journal, Oct. 1981, pp. 979-981.
“American
National Standard” “dimensions of video, audio and tracking control
records on 2-in video magnetic tape quadruplex recorded at 15 and 7.5
in/ s,” SMPTE Journal, Oct. 1981, pp. 988-989.
Table of Contents, SMPTE Journal, Nov. 1981, vol. 90, No. 11, 1 page.
Table of Contents, SMPTE Journal, Dec. 1981, vol. 90, No. 12, 1 page.
Powers,
Kerns H., “A Hierarchy of Digital Standards for Teleproduction in the
Year 2001,” SMPTE Journal, Dec. 1981, pp. 1150-1151.
“Application
of Direct Broadcast Satellite Corporation for a Direct Broadcast
Satellite System,” Before the Federal Communications Commission,
Washington, D.C., Jul. 16, 1981.
Rice, Michael, “Toward
Enhancing the Social Benefits of Electronic Publishing,” Report of an
Aspen Institute Planning Meeting, Communications and Society Forum
Report, Feb. 25-26, 1987.
Rice, Michael, “Toward Improved
Computer Software for Education and Entertainment in the Home,” Report
of an Aspen Institute Planning Meeting, Communications and Society
Forum Report, Jun. 3-4, 1987.
Gano, Steve, “Teaching ‘real world’ systems,” 1 page, 1987.
Pollack, Andrew, “Putting 25,000 Pages on a CD,” New York Times, 1 page, Mar. 4, 1987.
Gano,
Steve, “A Draft of a Request for Proposals Concerning the Adoption of
Computer Technology in the Home,” Jan. 1988, Draft © 1987 Steve Gano.
COMSAT, “Communications Satellite Corporation Magazine,” No. 7, 1982.
COMSAT, “Satellite to Home Pay Television,” no date.
COMSAT, “Annual Report 1981.”
“Comsat's STC: Poised for blastoff into TV's space frontier,” Broadcasting, Feb. 22, 1982, pp. 38-45.
Taylor,
John P., “Comsat bid to FCC for DBS authorization: Questions of
finances, ‘localism,’ monopoly,” Television/Radio Age, May 4, 1981,
pp. 42-44 and 80-81.
Taylor, John P., “Fourteen DBS
authorization applications to FCC differ greatly in both structure and
operations,” Television/Radio Age, Oct. 5, 1981, pp. 40-42 and
116-119.
Taylor, John P., “Comsat bid to FCC for DBS
authorization: Is direct broadcasting the wave of the future?”,
Television/Radio Age, Mar. 23, 1981, pp. A-22-24 and A-26 and A-28-31.
“At Sequent Computer, One Size Fits All,” Business Week, Sep. 17, 1984, 1 page.
Hayashi, Alden, M., “Can Logic Automation model its way to success?”, Electronic Business, Aug. 1, 1986, 1 page.
“Imager monitors the bloodstream,” High Technology, Mar. 1987, 1 page.
Merritt,
Christopher R.B., M.D., “Doppler blood flow imaging: integrating flow
with tissue data,” Diagnostic Imaging, Nov. 1986, pp. 146-155.
Eisenhammer, John, “Will Europe's Satellite TV Achieve Lift-Off?”, Business, Aug. 1986, pp. 56-60.
Hayes, Thomas C., “New M.C.C. Chief's Strategy: To Speed Payoff on Research,” The New York Times, Jun. 24, 1987, 2 pages.
Collins, Glenn, “For Many, a Vast Wasteland Has Become a Brave New World,” New York Times, no date, 2 pages.
Gleick, James, “U.S. Is Lagging on Forecasting World Weather,” The New York TimesFeb. 15, 1987, 2 pages.
Browning,
E.S., “Sony's Perseverance Helped It Win Market for Mini-CD Players,”
Wall Street Journal, Feb. 27, 1986, 2 pages.
Dragutsky, Paula, “Data in the bank is booming biz,” New York Post, Apr. 29, 1985, 1 page.
Wayne, Leslie, “Dismantling the Innovative D.R.I.,” The New York Times, Dec. 16, 1984, 2 pages.
Sanger, David E., “A Computer Full of Surprises,” The New York Times, May 8, 1987, 2 pages.
Hoffman, Paul, “The Next Leap in Computers,” The New York Times Magazine, Dec. 7, 1986, 6 pages.
Taylor, Thayer C., “Laptops and the Sales Force: New Stars in the Sky,” pp. 81-84.
Parker,
Edwin B., “Satellite micro earth stations—a small investment with big
returns,” Data Communications, Jan. 1983, 5 pages.
“Micro Key System,” Video Associates Labs, product description.
“SMPTE Journal Five-Year Index 1971-1975,” SMPTE Journal.
“SMPTE Journal Five-Year Index 1976-1980,” SMPTE Journal.
“SMPTE Journal Five-Year Index 1981-1985,” SMPTE Journal, vol. 95, No. 1, Jan. 1986.
“SMPTE Journal Five-Year Index 1986-1990,” SMPTE Journal, vol. 100, No. 1, Jan. 1991.
“Annual Index 1982,” SMPTE Journal, vol. 91, Jan.-Dec. 1982, pp. 1253-1263.
“Highlights, SMPTE, The 124th SMPTE Conference,” SMPTE Journal, Jan. 1983, p. 3.
SMPTE Journal, Jan. 1983, pp. 64, 69-70, 87-90, 92-98.
“Highlights, SMPTE,” SMPTE Journal, Feb. 1983, p. 163.
“Highlights, SMPTE,” SMPTE Journal, Mar. 1983, p. 267.
“Highlights, SMPTE,” SMPTE Journal, Apr. 1983, p. 355.
Thomas, L. Merle, “Television,” SMPTE Journal, Apr. 1983, pp. 407-410.
“Highlights, SMPTE,” SMPTE Journal, May 1983, p. 547.
“Highlights, SMPTE,” SMPTE Journal, Jun. 1983, p. 627.
“Highlights, SMPTE,” SMPTE Journal, Jul. 1983, p. 715.
“Highlights, SMPTE,” SMPTE Journal, Aug. 1983, p. 803.
Tooms,
Michael S. et al., “The Evolution of a Comprehensive Computer Support
System for the Television Operation,” SMPTE Journal, Aug. 1983, pp.
824-833.
“Highlights, SMPTE,” SMPTE Journal, Sep. 1983, p. 907.
“Highlights, SMPTE,” SMPTE Journal, Oct. 1983, p. 1027.
“Highlights, SMPTE,” SMPTE Journal, Nov. 1983, p. 1173.
“Highlights, SMPTE,” SMPTE Journal, Dec. 1983, p. 1269.
“Index to Subjects—Jan.-Dec. 1983 • vol. 92,” Annual Index 1983, SMPTE Journal, pp. 1385-1391.
“Highlights, SMPTE,” SMPTE Journal, Jan. 1984, p. 3.
“Index to Subjects—Jan.-Dec. 1984 • vol. 93,” Annual Index 1984, SMPTE Journal, pp. 1211-1217.
“Highlights, SMPTE,” SMPTE Journal, Jan. 1985, p. 3.
Barlow, Michael W.S., “Application of Personal Computers in Engineering,” SMPTE Journal, Jan. 1985, pp. 27-30.
“Television Systems and Broadcast Technology,” SMPTE Journal, Jan. 1985, pp. 172-175.
“Highlights, SMPTE,” SMPTE Journal, Feb. 1985, p. 181.
Day, Alexander G., “From Studio to Home—How Good is the Electronic Highway?”, SMPTE Journal, Feb. 1985, pp. 216-217.
“Highlights, SMPTE,” SMPTE Journal, Mar. 1985, p. 265.
“Proposed
SMPTE Recommended Practice, Storage of Edit Decision Lists on 8-in.
Flexible Diskette Media,” SMPTE Journal, Mar. 1985, pp. 353-354.
McCroskey, Donald C., “Television,” SMPTE Journal, Apr. 1985, pp. 382-395.
“Highlights, SMPTE,” SMPTE Journal, Apr. 1985, p. 361.
SMPTE Journal, Apr. 1985, pp. 366-368, 473-478.
“Highlightsd SMPTE,” SMPTE Journal, May 1985, p. 545.
Morii, Yutaka, et al., “A New Master Control System for NHK's Local Stations,” SMPTE Journal, May 1985, pp. 559-564.
Kuca, Jay, et al., “A Fifth-Generation Routing Switcher Control System,” SMPTE Journal, May 1985, pp. 566-571.
“Highlights, SMPTE,” SMPTE Journal, Jun. 1985, p. 641.
“Highlights, SMPTE,” SMPTE Journal, Jul. 1985, p. 721.
Busby, E.S., “Digital Component Television Made Simple,” SMPTE Journal, Jul. 1985, pp. 759-762.
“Highlights, SMPTE,” SMPTE Journal, Aug. 1985, p. 801.
Rayner, Bruce, “High-Level Switcher Interface Improves Editing Techniques,” , SMPTE Journal, Aug. 1985, pp. 810-813.
Hayes, Donald R., “Vertical-Interval Encoding for the Recordable Laser Videodisc,” SMPTE Journal, Aug. 1985, pp. 814-820.
“SMPTE
Recommended Practice, Video Record Parameters for 1-in Type C
Helical-Scan Video Tape Recording,” SMPTE Journal, Aug. 1985, pp.
872-873.
“Proposed SMPTE Recommended Practice, Time and
Control Codes for 24, 25, or 30 Frame-Per-Second Motion-Picture
Systems,” SMPTE Journal, Aug. 1985, pp. 874-876.
“Proposed
SMPTE Recommended Practice, Data Tracks on Low-Dispersion Magnetic
Coatings on 35-mm Motion-Picture Film,” SMPTE Journal, Aug. 1985, pp.
877-878.
“Highlights,” SMPTE Journal, Sep. 1985, p. 881.
“Proposed SMPTE Recommended Practice, Control Message Archtecture,” SMPTE Journal, Sep. 1985, pp. 990-991.
“Proposed SMPTE Recommended Practice, Tributary Interconnection,” SMPTE Journal, Sep. 1985, pp. 992-995.
“Highlights,” SMPTE Journal, Oct. 1985, p. 1001.
Zimmerman, Frank, “Hybrid Circuit Construction for Routing Switchers,” SMPTE Journal, Oct. 1985, pp. 1015-1019.
“Highlights,” SMPTE Journal, Nov. 1985, p. 1155.
Sabatier, J., et al., “The D2-MAC-Packet System for All Transmission Channels,”SMPTE Journal, Nov. 1985, pp. 1173-1179.
“Highlights,” SMPTE Journal, Dec. 1985, p. 1243.
Shiraishi, Yuma, “History of Home Videotape Recorder Development,” SMPTE Journal, Dec. 1985, pp. 1257-1263.
“Index to Subjects—Jan.-Dec. 1985 • vol. 94,” Annual Index 1985, SMPTE Journal, pp. 1351-1357.
“Highlights,” SMPTE Journal, Jan. 1986, p. 3.
“Proposed
American National Standard for component digital video
recording—19-mm type D-1 cassette— tape cassette,” SMPTE Journal, Mar.
1986, pp. 362-363.
“Index to SMPTE-Sponsored American
National Standards and Society Recommended Practices and Engineering
Guidelines,” Smpte Journal, Annual Index 1987, pp. 1258, 1260-1262.
Rice, Philip, et al., “Development of the First Optical Videodisc,” SMPTE Journal, Mar. 1982, pp. 277-284.
Kubota, Yasuo, “The Videomelter,” SMPTE Journal, vol. 87, Nov. 1978, pp. 753-754.
“USTV Direct Satellite to Home Television Service,” General Instrument News Release, Aug. 1982.
“Second
Senior Executive Conference on Productivity Improvement,” SALT,
Society for Applied Learning Technology, Dec. 4-6, 1986.
“New Publications for 1987 from The Videodisc Monitor,” advertisement, 2 pages.
“The Videodisc Monitor,” vol. IV: No. 10, Oct. 1986.
“The Videodisc Monitor,” vol. IV: No. 12, Dec. 1986.
Smith, Charles C., “Computer Update” “Program Notes,” TWA Ambassador, Sep. 1982, pp. 74-90.
Harrar, George, “Opening Information Floodgates,” American Way, Oct. 1982, pp. 53-56.
“Publishers Go Electronic,” Business Week, Jun. 11, 1984, pp. 84-97.
“Serious Software Helps the Home Computer Grow Up,” Business Week, Jun. 11, 1984, pp. 114-118.
“Videoconferencing: No Longer Just a Sideshow,” Business Week, Nov. 12, 1984, pp. 116-120.
“Ratings War,” Forbes, Aug. 1, 1983, 1 page.
Kindel, Stephen, “Pictures at an exhibition,” Forbes, Aug. 1, 1983, pp. 137-139.
“Merrill Lynch and IBM Form Joint Venture to Market Financial Data Systems and Services,” News Release, Mar. 1984, 2 pages.
Branch, Charles, “Text Over Video,” PC World, Dec. 1983, pp. 202-210.
“Window on the World” “The Home Information Revolution,” 1981, Business Week, Jun. 29, 1981, pp. 74-83.
“Correspondence School Via Computer Is Planned,” The New York Times, Sep. 13, 1983, 1 page.
“‘Smart’ Digital TV Sets May Replace The Boob Tube,” Business Week, Sep. 26, 1983, p. 160, 2 pages.
“Round Two for Home Computer Makers,” Business Week, Sep. 19, 1983, pp. 93-95.
“High Technology,” Business Week, Jan. 11, 1982, pp. 74-79.
Kneale, Dennis, “Stations That Show Only Ads Attract a Lot of TV Watchers,” The Wall Street Journal, Sep. 23, 1982, 1 page.
“Video
Kitchen” “Commercial Prospects for Food Data-Base Management,”
Prospectus for a Multiclient Study from American Information Exchange,
1982.
I/Net Corporation, Company Brochure.
Diamond,
David, “Why Television's Business Programs Haven't Turned a
Profit,”The New York Times, Jun. 16, 1985, pp. F10-F11.
Tagliabue, John, “ITT's Key. West German Unit,” The New York Times, Apr. 29, 1985, p. D8.
Tagliaferro, John, “Tag Lines,” 1982, 1 page.
“PBS Project With Merrill,” newsarticle, Apr. 4, 1983.
“Merrill Lynch sinks $4M into FNN's Data Cast service,” Cable Vision, Mar. 11, 1985, p. 23.
“Merrill Lynch bullish on new data service,” Electronic Media, Feb. 28, 1985, p. 4.
“Merrill Lynch Plans Stock-Quote Service Linked to IBM's PC,” The Wall Street Journal, Mar. 21, 1984, p. 60.
Sanger,
David E., “Public TV Joins Venture to Send Finance Data to Computer
Users,” The New York Times, Feb. 21, 1985, pp. 1 and D8.
Dolnick, Edward, “Inventing The Future,” The New York Times Magazine, Aug. 23, 1987.
“Everything you've always wanted to know about TV Ratings,” A.C. Nielsen Company, brochure, 1978.
“Management With The Nielsen Retail Index System,” A.C. Nielsen Company, 1980.
Pollack, Andrew, “Computer Programs as University Teachers,” The New York Times, 4 pages.
“Business Television” “Changing the Way America Does Business,” PSN, 1986.
Merrell, Richard G., “TAC-Timer,” 1986 NCTA Technical Papers, 1986, pp. 203-206.
“Universal Remote Control,” Radio Shack, Owner's Manual, 4 pages.
Long, Michael, E., “The VCR Interface,” 1986 NCTA Technical Papers, 1986, pp. 197-202.
“Flexible programmieren mit. VPS,” Funkschau, (German publication), 1985. (translation provided).
Chase,
Scott, “Corporate Satellite Networks No Longer A Luxury But Rather A
Necessity,” Via Statellite, Jul. 1987, pp. 18-21.
Diamond, Sam, “Turning Television Into A Business Tool,” High Technology, Apr. 1987, 2 pages.
“The Portable Plus Personal Computer,” Hewlett-Packard, advertisement, Mar. 1986.
“The Portable Plus for Professionals in Motion,” Hewlett-Packard, advertisement, Jul. 1985.
“KBTV Kodak Business TeleVision,” Kodak, brochure, Sep. 1987.
“Broadway Video,” Brochure, Feb. 1987.
“Digital TV set to burst on U.S. mart,” New York Post, 2 pages.
Prospectus, VIKONICS, Inc., Jul. 14, 1987.
Prospectus, DIGITEXT, Inc., Feb. 27, 1986.
Prospectus, Color Systems Technology, Inc., Aug. 13, 1986.
Prospectus, Cheyenne Software, Inc., Oct. 3, 1985.
1986 Annual Report, the Allen Group Inc.
Wilson,
Donald H., “A Process for Creating a National Legal Computer Research
Service in The United States,” remarks at the conference on World
Peace Through World Law and World Assembly of Judges, Belgrade
Yugoslavia, Jul. 23, 1971.
Pollack, Andrew, “Teletext is Ready for Debut,” The New York Times, Feb. 18, 1983, 2 pages.
“Sunny Outlook for Landmark's John Wynne; Landmark Communications Inc.,” Broadcasting, Lexis-Nexis, Jul. 27, 1987.
“Applications
Information VCR-3001A Universal Videocassette Control Module,”
Channelmatic, Inc., product description, 5 pages, Mar. 1984.
Killion, Bill, “Advertising,” SAT Guide, Jul. 1982.
“PL-5A Price List Typical Systems,” Channelmatic, Inc., Nov. 1984.
“Channelmatic SPOTMATIC Random Access Commercial Insert System,” Channelmatic, Inc., product description, Jul. 1983.
Killion,
Bill, “Automatic Commercial Insertion Equipment for the Unattended
Insertion of Local Advertising,” paper presented at 33rd Annual
National Cable Television Association Convention, Jun. 1984.
“Channelmatic SDA-1A Sync Stripping Pulse Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Broadcast
Quality Random Access Commercial Insert System Featuring the
Channelmatic SPOTMATIC Z,” Channelmatic, Inc., product description, 1
page.
“Audio Level Detector ALD-3000A,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“CVS-3000A Commercial Verification System,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Four-Channel
Commercial Insert System Featuring the Channelmatic CIS-1A SPOTMATIC
JR,” Channelmatic, Inc., product description, 1 page.
“Local
Program Playback System Featuring the Channelmatic VCR-3005A-5
Videocassette Sequencer,” Channelmatic, Inc., product description, 1
page.
“Channelmatic BBX-1A Billibox Bypass and Test Switcher,” Channelmatic, Inc., product description, 2 pages.
“Channelmatic's Handimod I,” Channelmatic, Inc., product description, 2 pages.
“SPOTMATIC JR. Single VCR Commercial Insert System,” Channelmatic, Inc., product description, 4 pages.
“PL-1A Price List, 3000 Series Equipment,” Channelmatic, Inc., Feb. 1985, 2 pages.
“PL-2B 1000 Series Price List, 1.75× 19 Inch Rack Mounting,” Channelmatic, Inc., Jul. 1985.
“VPD-3001A Signal Presence Detector,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Channelmatic CMG-3008A 8-page Color Message Generator Module,” Channelmatic, Inc., product description, 1 page.
“Tone Switching System Model TSS-3000A-1,” Channelmatic, Inc., product description, 1 page.
“Series 3000 Satellite Receiver Controllers,” Channelmatic, Inc., product description, 2 pages.
“Channelmatic UAA-6A Universal Audio Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic ADA-3006A Audio Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic ADA-1A, ADA-2A, ADA-3A Audio Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic VDA-3006A Video Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic VDA-1A, VDA-2A, VDA-3A Video Distribution Amplifier,” Channelmatic, Inc., product description, 1 page.
“Channelmatic AVS-10A Patchmaster,” Channelmatic, Inc., product description, 2 pages.
“Broadcast Break Sequencer Model BBS-3006A,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Audio-Video Emergency Alert System,” Channelmatic, Inc., product description, Mar. 1984, 2 page.
“VCR Automation System LPS-3000A,” Channelmatic, Inc., product description, Mar. 1984, 2 pages.
“Clock Switching System Model CCS-3000A-1,” Channelmatic, Inc., product description, Mar. 1984, 1 page.
“Channelmatic PCM-3000A Superclock Programmable Controller Module,” Channelmatic, Inc., product description, 2 pages.
“PL-3A Price List Videocassette Changers,” Channelmatic, Inc., Nov. 1984, 1 page.
Channelmatic, Inc., advertisement, “Looking at Local Ad Sales?”, 1 page.
“Channelmatic Television Switching and Control Equipment 3000 Series,” Channelmatic, Inc., product descriptions, 1984.
“CIS-1A
SPOTMATIC JR. & CIS-2A Li' l Moneymaker,” Channelmatic, Inc.,
Installation and Operations Guide, 950-0066-00, V1.0.
“1986 Annual Report to Shareowners, Customers and Employees,” The Dun & Bradstreet Corporation.
Landro,
Laura, “CBS, AT&T May Start Videotex Business in '83 if
7-Month Home Test Is Successful,” The Wall Street Journal, Sep. 28,
1982, p. 8.
“Video Visionaries,” Review, Sep. 1982, pp. 95-103.
“Video-Game Boom Continues Despite Computer Price War,” Technology, The Wall Street Journal, Oct. 1, 1982, p. 33.
Dunn,
Donald H., editor, “How to Pick Your Stocks by Computer,” Personal
Business, Business Week, Sep. 12, 1983, pp. 121-122.
Sandberg-Diment, Erik, “Instruction Without Inspiration,” Personal Computers, The New York Times, Sep. 6, 1983, p. C4.
Pace, Eric, “Videotex: Luring Advertisers,” The New York Times, Oct. 14, 1982.
“Will Knight-Ridder Make News With Videotex?”, Media, Business Week, Aug. 8, 1983, pp. 59-60.
Kneale,
Dennis, et al., “Merrill Lynch and IBM Unveil Venture To Deliver
Stock-Quote Data to IBM PCs,” The Wall Street Journal, Mar. 22, 1984,
p. 8.
“Merrill Lynch Joins I.B.M. in Venture, ” The New York Times, Mar. 22, 1984, 1 page.
Kneale,
Dennis, “Merrill Lynch Plans Stock-Quote Service Linked to I.B.M.'s
PC,” The Wall Street Journal, Mar. 21, 1984, 1 page.
“A Videotex Pioneer Pushes Into the U.S. Market,” Business Week, Apr. 16, 1984, p. 63.
Gregg, Gail, “The Boom In On-Line Information,” New Businesses, Venture, Mar. 1984, pp. 98-102.
Sanger, David E., “Trading Stock by Computer,” Technology, The New York Times, Mar. 29, 1984, 1 page.
Saddler,
Jeanne et al., “COMSAT, Citing Risks, Ends Negotiations With
Prudential on Satellite—TV Venture,” The Wall Street Journal, Dec. 3,
1984, p. 51.
Pollack, Andrew, “Electronic Almanacs Are There for the Asking,” The New York Times, Mar. 18, 1984, 1 page.
Connelly,
Mike, “Knight-Ridder's Cutbacks at Viewtron Show Videotex Revolution
Is Faltering,” The Wall Street Journal, Nov. 2, 1984, p. 42.
“Time Inc. May Drop Teletext,” newspaper article, 1 page.
Pollack, Andrew, “Time Inc. Drops Teletext Experiment,” newspaper article, 1 page.
Arenson, Karen W., “CBS, I.B.M., Sears Join in Videotex Venture,” newspaper article, 1 page.
“E.F. Hutton to Start A Videotex Service,” newspaper article, 1 page.
Dunn,
Donald H., editor, “Devices That Let You Track Stocks Like A Floor
Trader,” Personal Business, Business Week, Jul. 25, 1983, pp. 83-84.
“United Satellite Racing Competitors,” newspaper article, 1 page.
Fantel, Hans, “Videotex to Expand What a TV Can Do,” article, 1 page.
“Zenith and Taft Co. In Teletext Venture,” The New York Times, p. D3.
Pollack, Andrew, “Videodisk's Data Future,” The New York Times, Oct. 7, 1982, p. D2.
Pace, Eric, “Videotex in Years To Come,” The New York Times, Sep. 1, 1982, p. D15.
“Advanced
Minicomputer-based Systems for Banking and Financial Institutions,”
Money Management Systems, Incorporated, brochure, 1980, 9 pages.
Middleton, Teresa, “The Education Utility,” American Educator, Winter 1986, pp. 18-25.
Perlez, Jane, “Teachers Act to Increase Decision-Making Power,” The New York Times, Jul. 8, 1986, 1 page.
Couzens, Michael, “Invasion of the People Meters,” Channels, Jun. 1986, pp. 40-45.
Behrens, Steve, “People Meters vs. The Gold Standard,” Channels, p. 72, Sep. 1987.
Diamond, Edwin, “Attack of the People Meters,” New York, pp. 38-41, Aug. 24, 1987.
“Ratings Brawl (Is Nielsen losing its grip?)” Time, p. 57, Jul. 20, 1987.
Sheets,
Kenneth R., “No go. TV networks nix new high-tech rating system,”
U.S. News & World Report, p. 39, Jul. 20, 1987.
Lieberman, David, “The Networks' Big Headache,” Business Week, pp. 26-28, Jul. 6, 1987.
Barbieri, Rich, “Perfecting the Body Count,” Channels, p. 15, Jun. 1987.
Dumaine, Brian, “Who's Gypping Whom in TV Ads?”, Fortune, pp. 78-79, Jul. 6, 1987.
Behrens, Steve, “People Meters' Upside,” Channels, p. 19, May 1987.
“People Meters,” The New Yorker, pp. 24-25, Mar. 2, 1987.
Zoglin, Richard, “Peering Back at the Viewer,” Time, p. 84, Jun. 30, 1986.
Kanner, Bernice, “Now, People Meters,” New York, 3 pages, May 19, 1986.
Trachtenberg, Jeffrey A., “Anybody home out there?”, Forbes, pp. 169-170, May 19, 1986.
Waters, Harry F. et al., “Tuning In on the Viewer,” Newsweek, p. 68, Mar. 4, 1985.
Berss, Marcia, “Tune in,” Forbes, p. 227, Sep. 24, 1984.
“Financial
News Network Eyeing Teletext Service Tied To Home Computers,”
International Videotex Teletext News, Dec. 1983, 1 page.
Prospectus, Financial News Network, Inc., Jul. 13, 1982.
“ELRA Group Cablemark Reports vol. I,” SAT Guide, Feb. 1982, 1 page.
“DOWALERT,” Brochure, 1983, 6 pages.
New York Stock Exchange, Inc., Computer Input Services, Schedule of Monthly Charges, Aug. 1, 1981, 1 page.
New York Stock Exchange, Inc., Market Data Services, Schedule of Monthly Charges, Jan. 1, 1982, 1 page.
“Introducing DowAlert,” brochure, 1982, 8 pages.
“Dow Jones Cable Information Services,” Company Brochure, 1982.
“Personal Portfolio Button,” brochure, JS&A, 1982.
“Business news breakthrough from Dow Jones,” advertisement, The Wall Street Journal, Jun. 10, 1982, p. 47.
“Charting
A More Profitable Course for Your Portfolio?”, advertisement, Dow
Jones News/Retrieval, The Wall Street Journal, Jun. 24, 1982, p. 40.
“Now you can get the precise business and financial news you
want . . . throughout the business day.” “Dow Alert,” brochure, 1982.
Promotional letter, “Dow Jones Cable News,” Dow Jones & Company, Inc., Jan. 1, 1982, 2 pages.
“1981 Annual Report,” Quotron Systems, Inc.
Prospectus, Quotron Systems, Inc., Nov. 1982.
“Threat to Quotron Discounted,” The New York Times, 1984, 2 pages.
“Quotron's
Central Position in Statistics Service Is Facing Competition From
Several Challengers,” The Wall Street Journal, Feb. 2, 1984, p. 59.
“European Security Prices Are Now Available As New Service From Quotron Systems,” News Release, Sep. 21, 1984, 1 page.
“1983 Annual Report,” Quotron Systems, Inc.
“How to increase training productivity through Videodisc and Microcomputer systems,” seminar brochure, 1981.
“The Revolution Continues . . . ”, Regency Systems, Inc., company brochure, 1984, 6 pages.
“How personal computers can backfire,” Business Week, Jul. 12, 1982, pp. 56-59.
“Taking control of computer spending,” Business Week, Jul. 12, 1982, pp. 59-60.
Meserve, Everett T., “A History of Rabbits,” Datamation, pp. 188-192.
Meserve, Everett T. (BILL), “The Future of Rabbits,” Datamation, Jan. 1982, pp. 130-136.
PC Ideas International Corp., product catalog, 7 pages, 1985.
UltiTech, Inc., “The Portable Interactive Videodisc System 3,” brochure, 1985.
Sony Video Communications, “LDP-1000A Laser Videodisc Player,” product description, 1983, 2 pages.
TMS Inc., Digital Laser Technology, product information, 1984, 16 pages.
Sony Video Communications, “Videodisc, Premastering and Formatting,” brochure, 1982.
Pioneer Video, Inc., “LD-V4000 Industrial Laserdisc Player,” product description, Feb. 1984, 2 pages.
Pioneer Video, Inc., “LD-V6000 Industrial Laserdisc Player,” product description, May 1985, 2 pages.
Pioneer Video, Inc., “LD-V6000 Industrial Laserdisc Player,” products price list, Apr. 1984, 1 page.
Pioneer Video, Inc., “Customer Support Publications,” 2 pages.
Pioneer Video, Inc., “Pioneer LD-V1000 Laserdisc Player,” price list, Feb. 1984, 1 page.
Pioneer Video, Inc., “LD-V1000 Laserdisc Player,” product description, Feb. 1985, 2 pages.
Pioneer Video, Inc., “LD-V4000 Laserdisc Player,” products price list, Dec. 1983, 1 page.
“Space-Age Navigation For The Family Car,” reprinted from Business Week, Jun. 18, 1984, 2 pages.
Held,
Thomas et al., “Videodisc to Lure and to Learn,” reprinted from The
Journal of the International Television Association, International
Television, May 1984, 4 pages.
Sony, “SONY View System, The Intelligent Video System,” product description, 1985, 2 pages.
Sony, “LDP-2000 Series, VideoDisc Players,” brochure, 1985, 12 pages.
Digital, “Vax Producer, A System for Creating Interactive Applications,” product bulletin, May 1984, 8 pages.
“Laserdata Announces Trio Encoder at the SALT Show,” News release, Aug. 21, 1985, 3 pages.
“Laserdata Still Frame Audio Premastering Guide,” advertisement, 3 pages.
“Laserdata Trio Encoder Product Description,” product description, 4 pages.
“PC Trio,” Laserdata, product description, 2 pages.
Laserdata, price list, Aug. 1, 1985, 4 pages.
News Release, Industrial Training Corporation, Merger of IIAT with and into ITC, Jun. 11, 1985, 1 page.
“A
Touch-Screen Disc (Devlin Interviews the Producer),” reprinted
magazine, E&ITV magazine, vol. 16, No. 5, May 1984, 4 pages.
“Interactive
Videodisc in Education and Training,” Seventh Annual Conference,
Society for Applied Learning Technology, conference agenda, Aug. 1985.
“Inter Active Video from . . . . ” BCD Associates, brochure, 1985.
The Videodisc Monitor, vol. II: No. 8, Aug. 1984, 16 pages.
“Products From The VideoDisc Monitor,” order form, 2 pages.
“Interactive Video Served on a disc,” Scotch Laser Videodisc, 3M, brochure, 8 pages.
Scotch Laser Videodisc, Price List, May 1, 1984, 2 pages.
“How to find the pot of gold at the end of this rainbow,” Scotch Videodisc, 3M, brochure.
Scotch Laser Videodisc, Prices for Special Services, Feb. 15, 1984, 2 pages.
Scotch Laser Videodisc, Master Tape Specifications, May 1984, 2 pages.
“IEV Graphics and Interactive Video Products,” IEV Corporation, product information, 1 page.
“IEV-20 High-Resolution Color Graphics for The IBM-PC,” IEV Corporation, product description, 1 page.
“IEV-40 Graphics Overlay and Video Disc and Tape Control for the IBM-PC,” IEV Corporation, product description, 1 page.
“IEV-10
A Direct Replacement for the IBM Color/Graphics Adapter Card with
Video Overlay Capability,” IEV Corporation, product description, 1
page.
“Model 60 Graphics Overlay and Disc or Tape Controller,” IEV Corporation, product description, 1 page.
“The IRIS System,” Silicon Graphics, Inc., product brochure, 1983.
“IRIS 1400, High Performance Geometry Computer,” Silicon Graphics, Inc., product specification, 2 pages.
“IRIS 1000/1200, High Performance Geometry Terminals,” Silicon Graphics, Inc., product specification, 2 pages.
“IRIS 1500, High Performance Geometry Computer,” Silicon Graphics, Inc., product specification, 2 pages.
“The IRIS Graphics System,” Silicon Graphics, Inc., system description, 1983, 6 pages.
“UNIX, Operating System for the IRIS Geometry Computer,” Silicon Graphics, Inc., product specification, 1 page.
“IRIS Graphics Library, Programming Support for IRIS Systems,” Silicon Graphics, Inc., product specification, 1 page.
“Ethernet, 10mbit per second Local Area Network,” Silicon Graphics, Inc., product specification, 2 pages.
Sony, Sony Video Communications, “PVM-1910/PVM-1911 19” Trinitron Color Video Monitors, product brochure, 1984, 8 pages.
“Computer Controls for Video Production,” EECO EECODER Still-Frame Decoder VAC-300, product brochure, 1984, 4 pages.
O'Donnell, John et al., “Videodisc Program Production Manual,” Sony, 1981.
“Still Frame Audio Encoder,” Laserdata, product description, 2 pages.
“TRIO 110,” Laserdata, product description, 2 pages.
“LD-V6000, Industrial Laserdisc Player,” A Technical Perspective, Pioneer Video, Inc., May 1984.
“SWSD System,” Stills With Sound and Data, Pioneer Video, Inc., product description, Aug. 1984, 2 pages.
Pioneer Video, Inc., Price List, Industrial Disc Replication and Program Development Services, May 1984, 4 pages.
“V: Link 1000,” Visage, Inc., product description, 1984, 2 pages.
“The
University of Delaware Videodisc Music Series presents Interactive
Videodisc Instruction in Music,” advertisement, 8 pages.
“Interactive
Videodisc In Education and Training,” Sixth Annual Conference,
Society for Applied Learning Technology, conference agenda, Aug. 1984,
2 pages.
“Sony engineering introduces to industry the new
Sony Laser VideoDisc,” Sony Video Communications, product brochure, 12
pages.
“GraphOver 9500,” Hi-Res Graphics Overlays for NTSC Video, New Media Graphics, product description, 1983, 4 pages.
“New Horizons in Interactive Video,” Puffin product advertisement, IEV Corporation, 2 pages.
IEV Feb. 1985 Price List, 1 page.
“Fast Forth” “No Other Forth Comes Close,” IEV Corporation, product brochure.
“Pro
68 Advanced Technology 16/32 Bit Co-Processor for IBM PC, PC/XT,
PC/AT and Capatibles,” Hallock Systems Company, Inc., product
description, 7 pages.
“Pro 68 Software Facts,” Hallock Systems Company, Inc., product description, 6 pages.
“Pro CAD A Pro 68 Software Product,” Hallock Systems Company, Inc., product description, 4 pages.
“V: Station 2000 System,” Visage, Inc., product description, 2 pages.
“Upgrade Packages,” Visage, Inc., product description, 1 page.
“Development Software,” Visage, Inc., product description, 4 pages.
“V: Link Modules,” Visage, Inc., product description, 4 pages.
Visage, Price List, Visage, Inc., Apr. 1985, 4 pages.
Kalowski, Nathan, “Player, Monitor, Interface,” reprinted from Jan. 1985 issue of Data Training, 4 pages.
“Five
Authoring Languages Now Available for Use With Visage Interactive
Video Systems,” Visage News Release, Visage, Inc., Mar. 18, 1985, 5
pages.
“GraphOver 9500,” Hi-Res Hi-Speed Graphics Overlays for Videodisc, New Media Graphics, product description, 1985, 4 pages.
“PC-VideoGraph,” Hi-Res PC Graphics For Videotaping or Display, New Media Graphics, product description, 1985, 4 pages.
“PC-GraphOver,” Interactive Video With Graphics Overlays, New Media Graphics, product description, 1985, 4 pages.
“Off-the-shelf
raster scan display generator creates composite video image,”
reprinted by Defense Systems Review and Military Communications, Jan.
1985, p. 55.
“The NTN Entertainment Network,” NTN Entertainment Network, programming information sheet, 2 pages.
Dickey, Glenn, “A Game That's Better Than the Real Thing,” San Francisco Chronicle, Dec. 17, 1985, p. 63.
Connell,
Steve, “Arm-Chair Quarterbacking (Computer football game makes fans
the play-callers),” The Sacramento Union, Jan. 23, 1986, 3 pages.
Gunn, William, “Get Ready For Monday Night Football,” Night Club and Bar, Jul. 1986, pp. 20-22.
Brack, Fred, “QB1 Anyone?”, Alaska Airlines, Aug. 1986, 2 pages.
Dickey, Glenn, “QB1: Bringing The Game Into the Bar,” Sport Magazine, Oct. 1986, 1 page.
“The
Most Exciting Customer and Revenue Building Program Since Sports were
First Shown on T.V.”, NTN Communications, Inc., QB1 product brochure,
1986, 4 pages.
“NTN—The Company,” NTN Communications, Inc., company description, 1 page.
NTN Communications, Inc., “Trivia Countdown,” and “Trivia Showdown,” product descriptions, 1 page.
Pottle,
Jack T. et al., “The Impact of Competitive Distribution Technologies
on Cable Television,” Report, prepared for The National Cable
Television Association, Mar. 1982.
“Consumer Electronics: A
$40-Billion American Industry,” a report prepared by Arthur D. Little,
Inc. for the Electronic Industries Association/Consumer Electronics
Group, Apr. 1985.
“Camp,” Arbitron Cable, The Arbitron Company, product brochure, May 1980, 8 pages.
“Times Mirror Videotex/Infomart Joint Venture,” Times Mirror, Background, Jan. 8, 1982, 3 pages.
Cable Advertising Conference Feb. 9, 1982, conference agenda, Cabletelevision Advertising Bureau, Inc., 6 pages.
True
Stereo Television, Series 1600 Warner-Amex Stereo Processers, Wegener
Communications, Inc., product description, 1982, 3 pages.
“EUROM—a single-chip c.r.t. controller for videotex,” Mullard, Technical publication, 1984, 12 pages.
“EUROM” “A display IC for CEPT Videotex,” Mullard, product information, Feb. 1984, 6 pages.
“Satellite-Delivered Text Service Signs 4 Carriers,” Multichannel News, Jun. 18, 1984, p. 18.
Aarsteinsen,
Barbara, “How the Chip Spurs TV Growth,” “The promise of digital
televison has stirred the U.S. Industry,”The New York Times, May 20,
1984, 1 page.
Pollack, Andrew, “As Usual, Here Comes The Japanese,” The New York Times, May 20, 1984, 1 page.
“Unleashing IBM Could Help a Satellite Venture Blast Off,” Business Week, May 28, 1984, 2 pages.
Mayer, Martin, “Here comes Ku-band,” Forbes, May 21, 1984, pp. 65-72.
“The UCSD p-System Version IV,” SOFTECH Microsystems, product description, 2 pages.
“UCSD
p-System Languages, Version IV UCSD Pascal, Fortran-77, Basic and
Assembler,” SOFTECH Microsystems, product description, 2 pages.
“Add-On Features, UCSD p-System Version IV,” SOFTECH Microsystems, product description, 2 pages.
“USCD p-System, Version IV.1,” SOFTECH Microsystems, product description, 4 pages.
SOFTECH Microsystems, Product Order Form, Oct. 1982, 2 pages.
“Homecast, A Consumer Market Service from ICM Services,” Chase Econometrics, product brochure, 2 pages.
“Consumer Systems Industry Service,” research notes, Gartner Group, Inc., Jun. 22, 1983, 13 pages.
Download, Monthly Newsletter, vol. 1, No. 1, May 1984.
Nocera, Joseph, “Death of a Computer,” Texas Monthly, Apr. 1984.
Special Report, Business Week, Jul. 16, 1984, pp. 84-111.
Zenith, Video Hi-Tech Component TV, product brochure, Aug. 1982, 8 pages.
Ferretti, Fred, “For Major-League Times, Addicts, A Way to Win a Pennant,” The New York Times, Jul. 8, 1980, 1 page.
Friedman,
Jack, “The Most Peppery Game Since The Hot Stove League? It's
Rotisserie Baseball,” People weekly, Apr. 23, 1984, 2 pages.
“Information Package for MDS Applicants,” Department of Communications Radio Frequency Management Division, Oct. 1986.
Department
of Transport and Communications Radio Frequency Management Division,
Licensing Procedures for Ancillary Communications Services (ACS).
Minister
for Communications Guidelines for Provision of Video and Audio
Entertainment and Information Services, Oct. 13, 1986.
Christopher, Maurine, “BAR cable service set,” Advertising Age, Sep. 21, 1981, pp. 68 & 72.
“In this corner, Digisonics!”, Media Decisions, Jun. 1968, 5 pages.
“Did the ad run?”, Media Decisions, Jul. 1969, pp. 44 et seq.
“Digisonics TV Monitor System Finds Defenders,” Advertising Age, Dec. 8, 1969, 1 page.
“Merrill
Lynch Advanced Applications Systems,” Advanced Automation Systems
Department, system description, publication date unknown.
Dougherty, Philip, “Gathering Intelligence for Profit,” newspaper article, 1981, p. D7.
“Vidbits,” Advertising Age, Sep. 21, 1981, p. 70.
“Measuring The Cable Audience,” Ogilvy & Mather, Advertising, 1980, pp. H1-H8.
Cooney, John E., “Counting Cable's Gold Coins,” View, Sep. 1981, 4 pages.
“Cable TV Advertising,” Paul Kogan Associates, Inc., No. 22, Feb. 18, 1981, 6 pages,
“IDC begins monitoring,” At Deadline, Broadcasting, Sep. 14, 1970, p. 9.
“Contraband code,” Closed Circuit, Broadcasting, Sep. 28, 1970, 1 page.
“Listeners,” Closed Circuit, Broadcasting, 1 page.
“Digisonics violated standards, says BAR,” Broadcasting, Oct. 5, 1970, pp. 21-23.
“Talent pay code put off,” At Deadline, Broadcasting, Nov. 9, 1970, p. 9.
“Digisonics' Aim Is Info Bank, Not Just Proof of Performance,” Advertising Age, Nov. 9, 1970, 4 pages.
“Digisonics pushes its coding method,” Broadcasting, Dec. 7, 1970, p. 37.
“No. Digisonics friends show in comments,” Broadcasting, May 24, 1971, p. 62.
“Digisonics' dilemma,” Media Decisions, Jun. 1971, 6 pages.
“IDC encoding system still alive at FCC,” Broadcasting, Sep. 27, 1971, p. 31.
Howard, Niles A., “IDC drops tv monitoring; mulls revival,” reprint from Advertising Age, Feb. 3, 1975, 1 page.
“Teleproof I” “An Exciting New Development of International Digisonics Corporation,” product brochure, 13 pages.
“Teleproof 2,” IDC Services, Inc., product description, 6 pages.
“The Best Reason to Buy Odetics On-Air Automation Systems Today?” Advertisement, Odetics Broadcast, 1 page.
“Advertising
on Cable” “Automatic Commercial Insertion-Plus-Automatic Print-Out
Verification With the New Ad Machine and Ad Log,” Advertisement,
Tele-Engineering Corporation, 4 pages.
“NTN Communications, Inc. Entertainment Network Program Schedule,” Advertisement, NTN Communications, Inc., 2 pages.
“Interactive Football for The Home,” Advertisement, U.S. Videotel, 2 pages.
“NTN Programming,” Advertisement, NTN Communications, Inc., 2 pages.
“Electronic Surveys, Inc. Signs NTN Contract,” News Release, NTN Communications, Inc. Carlsbad, CA, 2 pages.
Andrews, Edmund L., “AT&T Sees The Future in Games,” The New York Times, Business Day, 2 pages.
“Total
Teleconferencing Solutions for Your Communication and Training
Needs,” brochure, Parker Communications Corporation, Parker
Associates.
“PSN Signs Fourth High Technology Customer As
Amdahl Corporation Implements Business Television,” PSN News, News
Release, Private Satellite Network, Inc., 2 pages.
PSN,
Private Satellite Network, Inc., product information for MISTS, Mass
Interactive Simultaneous Telecommunications System, 6 pages.
“Broadcasting Services,” brochure, PSN, Private Satellite Network, Inc., 6 pages.
Martin, Vivian B., “Companies use TV talk shows to inform workers,” The Hartford Journal, Business Weekly, 1 page.
Fisher, Lawrence M., “TV: Growing Corporate Tool,” The New York Times, 2 pages.
Vaughan,
Kimithy, “Evolution of Corporate Television Networks,”
Teleconference, The Business Communication Magazine, pp. 38-40.
“New in Teleconferencing Resources,” advertisement, Parker Associates, 4 pages.
“Business Television Services,” Irwin Communications, Inc., brochure, 1 page.
“Corporate Capabilities,” Irwin Communications, Inc., brochure, 1 page.
“Introducing RSVP: The latest breakthrough for cable!”, advertisement, Arbitron, 1 page.
“Viacom Unit Will Tap Into Pay Networks,” newspaper article, 1 page.
“Show or Tell?”, Advertising material, The Weather Star 4000, The Weather Channel, 8 pages.
“Video Hi-Tech Component TV,” CV 1950, CV 510, CV 540, CV 520, CV 150, advertisement, Zenith Radio Corporation, 4 pages.
“Point-To-Multipoint Data Communication Network Services,” product description, Equatorial Communications Company, 5 pages.
“C-100
Series Micro Earth Stations for Satellite Data Distribution,” product
description, Equatorial Communications Company, 4 pages.
“C-200
Micro Earth Station for Satellite Data Communications,” product
description, Equatorial Communications Company, 3 pages.
“Interactive Data Communication Network Services,” product description, Equatorial Communications Company, 3 pages.
“Data Communications Network Description,” product description, Equatorial Communications Company, 5 pages.
Landro, Laura, “Satellite Company Signs Merill Lynch For Its Video Service,” The Wall Street Journal, 1 page.
“Elite
2000 Creation System,” IBM Compatible Information Display System,
advertisement, Display Systems International, Inc., 1 page.
“Video Database Management . . . When Words Are Not Enough,” advertisement, U.S. Video, 2 pages.
“U.S.
Video presents . . . True Computer-Video Overlays,” The Raster Master
RM-110, product description, U.S. Video, 2 pages.
“Now You Can
Find Just the Right Image Every Time Quickly and Easily with Image
Search and the IBM PC/XT,” advertisement, Online Computer Systems,
Inc., 1 page.
“Touch the Future Today,” advertisement, MetaMedia Systems, Inc., 1 page.
“Training solutions for the 80's and beyond,” advertisement, Online Computer Systems, Inc., 2 pages.
“Experienced
Educator/Trainers,” “Use the new Pilot plus Training System to
develop highly interactive courseware on your IBM PC that will run on
most microcomputers,” advertisement, Online Computer Systems, Inc., 2
pages.
“Technical Specifications for Hardware and Software Products,” Online Products Corporation, 9 pages.
“Museum Image Series,” product information, Online Products Corporation, 2 pages.
“Omega Vision,” product description, Omega Management Group Corp., 2 pages.
“Visage Visual Information Systems,” Interactive Video Products, brochure, Visage, Inc.
“Now the Future Is Clear,” Visage Visual Information Systems, brochure, Visage, Inc., 4 pages.
“Speak Through The Power of Today's Technology,” QUEST, product description, Allen Communication, 4 pages.
“Universal Video Controller,” product description, Allen Communication, 2 pages.
“Video-Microcomputer Interface,” product description, Allen Communication, 2 pages.
“The Leader in Interactive Video,” advertisement, Allen Communication, 2 pages.
“Allen Communication Price List,” Allen Communication, 1 page.
“Touché
Interactive videodisc training by IIAT,” advertisement, IIAT,
International Institute of Applied Technology, Inc., 1 page.
“Touché
Interactive Videodisc System,” product description, IIAT,
International Institute of Applied Technology, Inc., 2 pages.
“IIAT
ST-1000A IIAT Training Station,” product description, IIAT,
International Institute of Applied Technology, Inc., 2 pages.
“IIAT
ST-1000B IIAT Training Station,” product description, IIAT,
International Institute of Applied Technology, Inc., 2 pages.
“IIAT International Institute of Applied Technology, Inc.,” company description, 4 pages.
“Pilot plus Course Authoring Interpreter,” IIAT Products, product description, 1 page.
“Touch Monitor/ Videodisc Player Interface Card and Video Switch Box,” IIAT Products, product description, 1 page.
“Touch Sensitive Monitor Interface Card for Apple II,” IIAT Products, product description, 1 page.
“Touchpoint, A Total Eclipse of Existing Technology,” product description, Allen Communication, 2 pages.
“Totally Integrated Interactive System—TII-PC,” product description, Allen Communication, 2 pages.
“Most Valuable Peripheral,” product description, Allen Communication, 2 pages.
“Allen Communication Introduces Integrated Interactive Video Systems,” brochure, 2 pages.
“Automation, Control and Monitoring Systems,” brochure, Jasmin Electronics Limited.
“jasmin,” company brochure, Jasmin Electronics Limited, 4 pages.
“jasmin Teletext Systems,” advertisement, Jasmin Electronics Limited, 4 pages.
“jasmin Process Control Systems,” advertisement, Jasmin Electronics Limited, 4 pages.
“Teleprompter of Denver Channel Line Up,” 2 pages.
“City of Seal Beach Channel Utilization Guide,” 3 pages.
“V: Link 1910: The Single-Slot VGA Interactive Video Solution,” product description, Visage, Inc., 4 pages.
“The OASYS Authoring System,” advertisement, Online Computer Systems, Inc., 1 page.
“Advertisers Guide to Cable TV Terms,” brochure, Cable Ad Associates, Inc.
“Cable
Audience Measurement Study,” A Prospectus based upon recommendations
of the Ad Hoc Cable Measurement Committee, pamphlet.
Kane, Sharyn et al., “Technology in the First Person,” reprint from Delta Air Lines' SKY magazine, 4 pages.
“Training Systems,” brochure, WICAT systems, Training Systems Division, 4 pages.
“The
Consultant,” advertisement, Co-Opportunities, Sales Development
Information Systems, a division of Jefferson-Pilot Communications
Company.
“Introducing Spot Data,” “Cable Ad Sales Just Got Better,” advertisement, TV Data Technologies, 4 pages.
“Do
You Want to be Making $5-$10 a Subscriber—Right Now?” “Join Us in Our
Success!”, advertisement, Multi-Image Systems, 1page.
“Mediastar,” “The message is clear,” brochure, Multi-Image Systems, 6 pages.
“Art to Go” “The Business Builder in a Box,” advertisement, Multi-Image Systems, 1 page.
“Few Things in Life Work As Well As TAPSCAN,” advertisement, Tapscan Incorporated, 6 pages.
“Dow Jones Cable News Service Daily Features Financial Markets,” product summary, 1 page.
“Financial News Network The Business Connection,” brochure, Financial News Network, 8 pages.
“The Financial News Network Means Business,” advertisement, The Financial News Network, 1 page.
“The Dawn of a New Era in Financial News Broadcasting,” advertisement, Financial News Network, 1 page.
“FNN
Financial News Network,” advertisement, brief review of research from
the Stanford Research Institute's VALS study, and research from ELRA
Group Cablemark Reports vol. I, 4 pages.
“Industrial Skills
Training With the Touch of a Finger . . . Introducing . . . Activ,”
Advanced Concepts in Touch-Interactive Video, advertisement,
Industrial Training Corporation, 4 pages.
“eca,” brochure, Effective Communication Arts, Inc., 4 pages.
“ODC 612 Encoder/Generator,” product description, Optical Disc Corporation, 2 pages.
“. . . the Recordable Laser Videodisc—RLV,” product description, Optical Disc Corporation, 2 pages.
“ODC 610 Videodisc Recording System,” product description, Optical Disc Corporation, 2 pages.
“Hitachi New CD-ROM Drive CDR-2500,” product description, Hitachi, Ltd., 2 pages.
“Hitachi CD-ROM Drive CDR-1502S,” product description, Hitachi, Ltd., 6 pages.
James, A., “Oracle—Broadcasting the Written Word,” Wireles Word, Jul. 1975.
Carne, E. Bryan, “The Wired Household,” IEEE Spectrum, Oct. 1979, p. 61-66.
McKenzie,
G.A., “Oracle—An Information Broadcasting Service Using Data
Transmission in the Vertical Interval ” Journal of the SMPTE, vol. 83,
No. 1, Jan. 1974, pp. 6-10.
Edwardson, S.M., “Ceefax: A Proposed New Broadcasting Service,” Journal of the SMPTE, Jan. 1974, p. 14-19.
J.
Chiddix, “Automated Videotape Delay of Satellite Transmissions,”
Satellite Communications Magazine, May 1978 (reprint—2 pages).
J.
Chiddix, “Tape Speed Errors in Line-Locked Videocassette Machines for
CATV Applications,” TVC, Nov. 1977 (reprint—2 pages).
CRC Electronics, Inc. Product Description, “Model TD-100-Time Delay Videotape Controller,” 2 pages.
CRC Electronics, Inc., Net Price List—Mar. 1, 1980 (TD-100 Time Delay Videotape Controller), 1 page.
CRC Electronics, Inc. Product Description, “Model P-1000 Videocassette Programmer,” 4 pages.
CRC Electronics, Inc., Net Price List—Jul. 31, 1981 (P-1000 Video Machine Programmer), 1page.
Tunmann,
E.O. et al. (Tele-Engineering Corp.), “Microprocessor for CATV
Systems,” Cable 78— Technical Papers, National Cable Television
Association 27th Annual Convention, New Orleans, LA, Apr. 30-May 3,
1978 (“Cable 78”), pp. 70-75.
Vega, Richard L.
(Telecommunications Systems, Inc.), “From Satellite to Earth Station to
Studio to S-T-L to MDS Transmitter to the Home; Pay Television Comes
to Anchorage, Alaska,” Cable 78, pp. 76-80, 1978.
Wright,
James B. et al. (Rockford Cablevision, Inc.), “The Rockford Two-Way
Cable Project: Existing and Projected Technology,” Cable 78, pp. 20-28,
1978.
Fannetti, John D. et al. (City of Syracuse), “The
Urban Market: Paving the Way for Two-Way Telecommunications,”Cable 78,
pp. 29-33, 1978.
Schnee Rolf M. et al.
(Heinrich-Hertz-Institut Berlin (West)), “Technical Aspects of Two-Way
CATV Systems in Germany,” Cable 78, pp. 34-41, 1979.
Dickinson,
Robert V.C. (E-Com Corporation), “A Versatile, Low Cost System for
Implementing CATV Auxiliary Services,” Visions '79—Technical Papers,
National Cable Television Association 28th Annual Convention, Las
Vegas, NV, May 20-23, 1979, (“Vision '79”), pp. 65-72.
Evans,
William E. et al. (Manitoba Telephone System), “An Intercity Coaxial
Cable Electronic Highway,” Visions '79, pp. 73-79.
Schrock,
Clifford B. (C.B. Schrock and Associates, Inc.), “Pay Per View,
Security, and Energy Controls Via Cable: The Rippling River Project,”
Visions '79, pp. 80-85.
Amell, Richard L. (Cox Cable Communications, Inc.), “Computer-Aided CATV System Design,” Visions '79, pp. 128-133.
Lopinto,
John J. (Home Box Office), “Considerations for Implementing Teletext
in the Cable System,” Visions of the 80's, pp. 45-48, 1980.
O'Brien,
Jr., Thomas E. (General Instrument Corporation), “System Design
Criteria of Addressable Terminals Optimized for the CATV Operator,”
Visions of the 80's, pp. 89-91, 1980.
Ost, Clarence S. et al.
(Electronic Mechanical Products Co.), “High-Security Cable Television
Access System ” Visions of the 80's, pp. 92-94, 1980.
Bacon, John C. (Scientific-Atlanta, Inc.), “Is Scrambling the Only Way?,” Visions of the 80's, pp. 95-98, 1980.
Davis, Allen (Home Box Office), “Satellite Security,” Visions of the 80's, pp. 99-100, 1980.
Mannino,
Joseph A. (Applied Date Research, Inc.), “Computer Applications in
Cable Television,” Visions of the 80's, pp. 116-117, 1980.
Beck,
Ann et al. (Manhattan Cable TV), “An Automated Programming Control
System for Cable TV,” Visions of the 80's, pp. 122-127, 1980.
Schloss,
Robert E. et al. (Omega Communications, Inc.), “Controlling Cable TV
Head Ends and Generating Messages by Means of a Micro Computer, ”
Visions of the 80's, pp. 136-138, 1980.
Eissler, Charles O.
(Oak Communications, Inc.), “Addressable Control,” Cable: '81 The
Future of Communications—Technical Papers, National Cable Television
Association 30th Annual Convention, Los Angeles, CA, May 29-Jun. 1,
1981 (“Cable: '81”), pp. 29-33.
Schoeneberger, Carl F. (TOCOM, Inc.), “Addressable Terminal Control Using the Vertical Interval,” Cable: '81, pp. 34-40.
Stern, Joseph L. (Stem Telecommunications Corporation), “Addressable Taps,” Cable: '81, p. 41.
Brown,
Larry C. (Pioneer Communications of America), “Addressable Control—A
Big First Step Toward the Marriage of Computer, Cable, and Consumer,”
Cable: '81, pp. 42-46.
Grabowski, Ralph E. (VISIONtec), “The Link Between the Computer and Television,” Cable: '81, pp. 99-100.
Ciciora,
Ph.D., W.S. (Zenith Radio Corporation), “Virtext & Virdata:
Adventures in Vertical Interval Signaling,” Cable: '81, pp. 101-104.
Gilbert, Bill et al. (TEXSCAN Corporation), “Automatic Status Monitoring for a CATV Plant,” Cable: '81, pp. 124-128.
Ciciora,
Walter et al., “An Introduction to Teletext and Viewdata with
Comments on Compatibility,” IEEE Transactions on Consumer Electronics,
vol. CE-25, No. 3, Jul. 1979 (“Consumer Electronics”), pp. 235-245.
Tanton, N. E. “UK Teletext— Evolution and Potential,” Consumer Electronics, pp. 246-250, 1979.
Bown, H.G. et al., “Telidon: A New Approach to Videotex System Design,” Consumer Electronics, pp. 256-268, 1979.
Chitnis, A..M. et al., “Videotex Services: Network and Terminal Alternatives ” Consumer Electronics, pp. 269-278, 1979.
Hedger, J. “Telesoftware: Home Computing Via Broadcast Teletext,” Consumer Electronics, pp. 279-287, 1979.
Crowther,
G.O., “Teletext and Viewdata Systems and Their Possible Extension to
Europe and USA,” Consumer Electronics, pp. 288-294, 1979.
Gross, William S., “Info-Text, Newspaper of the Future ” Consumer Electronics, pp. 295-297, 1979.
Robinson,
Gary et al., “‘Touch-Tone’ Teletext—A Combined Teletext-Viewdata
System,” Consumer Electronics, pp. 298-303, 1979.
O'Connor, Robert A., “Teletext Field Tests,” Consumer Electronics, pp. 304-310, 1979.
Blank,
John, “System and Hardware Considerations of Home Terminals With
Telephone Computer Access,” Comsumer Electronics, pp. 311-317, 1979.
Plummer, Robert P. et al., “4004 Futures for Teletext and Videotex in the U.S.,” Consumer Electronics, pp. 318-326, 1979.
Marti, B. et al., The Antiope Videotex System, Consumer Electronics, pp. 327-333, 1979.
Frandon, P. et al., “Antiope LSI,” Consumer Electronics, pp. 334-338, 1979.
Crowther, G.O., “Teletext and Viewdata Costs As Applied to the U.S. Market,” Consumer Electronics, pp. 339-344, 1979.
Mothersole, Peter L., “Teletext Signal Generation Equipment and system,” Consumer Electronics, pp. 345-352, 1979.
Harden, Brian, “Teletext/Viewdata LSI,” Consumer Electronics, pp. 353-358, 1979.
Swanson,
E. et al., “An Integrated Serial to Parallel Converter for Teletext
Application,” Consumer Electronics, pp. 359-361, 1979.
Neal, C.
Bailey et al., “A Frequency-Domain Interpretation of Echoes and Their
Effect on Teletext Data Reception,” Consumer Electronics, pp.
362-377, 1979.
Goyal, Shri K. et al., “Reception of Teletext Under Multipath Conditions,” Consumer Electronics, pp. 378-392, 1979.
Prosser, Howard F., “Set Top Adapter Considerations for Teletext,” Consumer Electronics, pp. 393-399, 1979.
Suzuki,
Tadahiko et al., Television Receiver Design Aspects for Employing
Teletext LSI, Consumer Electronics, pp. 400-405, 1979.
Baer,
Ralph H., “Tele-Briefs—A Novel User-Selectable Real Time News Headline
Service for Cable TV,” Consumer Electronics, pp. 406-408, 1979.
Sherry, L.A., “Teletext Field Trials in the United Kingdom,” Consumer Electronics, pp. 409-423, 1979.
Clifford, Colin, “A Universal Controller for Text Display Systems,” Consumer Electronics, pp. 424-429, 1979.
Barlow, “The Design of an Automatic Machine Assignment System”, Journal of the SMPTE, Jul. 1975, vol. 84, p. 532-537.
Barlow, “The Automation of Large Program Routing Switchers”, SMPTE Journal, Jul. 1979, vol. 88, p. 493-497.
Barlow, “The Computer Control of Multiple-Bus Switchers”, SMPTE Journal, Sep. 1976, vol. 85, p. 720-723.
Barlow, “The Assurance of Reliability”, SMPTE Journal, Feb. 1976, vol. 85, p. 73-75.
Barlow,
“Some Features of Computer-Controlled Television Station Switchers”,
Journal of the SMPTE, Mar. 1972, vol. 81, p. 179-183.
Barlow et al., “A Universal Software for Automatic Switchers” SMPTE Journal, Oct. 1978, vol. 87, p. 682-683.
Butler, “PCM-Multiplexed Audio in a Large Audio Routing Switcher”, SMPTE Journal, Nov. 1976, vol. 85, p. 875-877.
Dickson et al., “An Automated Network Center”, Journal of the SMPTE, Jul. 1975, vol. 84, p. 529-532.
Edmondson et al., “NBC Switching Central”, SMPTE Journal, Oct. 1976, vol. 85, p. 795-805.
Flemming, “NBC Television Central—An Overview”, SMPTE Journal, Oct. 1976, vol. 85, p. 792-795.
Horowitz, “CBS” New-Technology Station, WBBM-T, SMPTE Journal, Mar. 1978, vol. 87, p. 141-146.
Krochmal et al., “Television Transmission Audio Facilities at NBC New York”, SMPTE Journal, Oct. 1976, vol. 85, p. 814-816.
Kubota et al., “The Videomelter”, SMPTE Journal, Nov. 1978, vol. 87, p. 753-754.
Mausler, “Video Transmission Video Facilities at NBC New York”, SMPTE Journal, Oct. 1976, vol. 85, p. 811-814.
Negri,
“Hardware Interface Considerations for a Multi-Channel Television
Automation System”, SMPTE Journal, Nov. 1976, vol. 85, p. 869-872.
Paganuzzi, “Communication in NBC Television Central”, SMPTE Journal, Nov. 1976, vol. 85, p. 866-869.
Roth
et al., “Functional Capabilities of a Computer Control System for
Television Switching”, SMPTE Journal, Oct. 1976, vol. 85, p. 806-811.
Rourke, “Television Studio Design—Signal Routing and Measurement”, SMPTE Journal, Sep. 1979, vol. 88, p. 607-609.
Yanney,
Sixty-Device Remote-Control System for NBC's Television Central
Project, SMPTE Journal, Nov. 1976, vol. 85, p. 873-877.
Young
et al., “Developments in Computer-Controlled Television Switches”,
Journal of the SMPTE, Aug. 1973, vol. 82, p. 658-661.
Young et al., “The Automation of Small Television Stations”, Journal of the SMPTE, Oct. 1971, vol. 80, p. 806-811.
Zborowski, “Automatic Transmission Systems for Television”, SMPTE Journal, Jun. 1978, vol. 87, p. 383-385.
“Landmark forms cable weather news network,” Editor & Publisher, (Aug. 8, 1981) p. 15.
“Broadcast
Teletext Specification,” published jointly by British Broadcasting
Corporartion, Independent Broadcasting Authority, British Radio
Equipment Manufacturers' Association (Sep. 1976), pp. 1-24.
“Colormax Cable captioning—16,000,000 Subs NEED IT !,” Colormax Electronic Corp. (advertisement), 3 pages.
“7609 Sat-A-Dat Decoder/Controller,” Group W Satellite Communications (advertisement) 2 pages.
“Teletext Video Processor (SAA 5030),” Mullard (Dec. 1979), pp. 1-9.
“Video Text Decoder Systems (Signetics)”, Phillips IC Product Line Summary (May 1981), pp. 15-16.
“Teletext Acquisition and Control Circuit (SAA5040 Series),” Mullard (Jun. 1980), pp. 1-16.
“Asynchronous Data Transmission System Series 2100 VIDATA, ”Wagener Communications, Inc. (advertisement), 2 pages.
“Zenith Virtexttm . . . Vertical Interval Region Text and Graphics,” Zenith Radio Corporation (flyer), 7 pages.
Anon,
“Television Network Automated by Microcomputer-Controlled Channels,”
Computer Design, vol. 15, No. 11, (Nov. 1976), pp. 50, 59, 62, 66 and
70.
Kinik, et al., “A Network Control System for Television
Distribution by Satellite,” Journal of the SMPTE, Feb. 1975, vo 84, No.
2, pp. 63-67.
Chiddix, “'Videocassette Banks Automate Delayed Satellite Programming,” Aug. 1978, TV Comunications, pp. 38-39.
Curnal, et al., “Automating Television Operating Centers,” Bell Laboratories Record, Mar. 1978, pp. 65-70.
Chorafas, “Interactive Videotex: The Domesticated Computer,” 1981, Petrocelli Books, New York.
Hinton,
“Character rounding for the Wireless Word teletex decoder,” Wireless
World, Nov. 1978, pp. 49-53, vol. 84 No. 1515, IPC Business Press,
United Kingdom.
Kruger, “Speicherfernsehen, Das Digitale
Kennungssystem ZPS,” Proceedings 9th International Congress
Microelectronics, pp. 39-45.
“Fernsehempfang rund um die Uhr” Funk Technik, Mar. 1981, vol. 36.
Hanas et al.,“An Addressable Satellite Encryption System for Preventing Signal Piracy”, Nov. 1981, pp. 631-635.
National Cable Television Association Executive Seminar Series, Videotex Services, Oct. 1980, pp. 1-155.
Kokado et al.,“A Programmable TV Receiver”, Feb. 1976, pp. 69-82.
J. Hedger et al., “Telesoftware-Value Added Teletext”,Auqust 1980, pp. 555-567.
Marti , B., The Concept of a Universal “Teletext” Jun. 1979, pp. 1-11.
Article re: America's Talk-Back Television Experiment: Qube.
Article re: “Teletext-Applications in Electronic Publishing”.
Article re: A Description of the Broadcast Telidon System.
Article re: EPEOS—Automatic Program Recording System by G. Degoulet.
Article re: Teletext signals transmitted in Uk . . . .
Article re: New services offered by a packet data broadcasting system.
Article re: Philips TV set indicates station tunign and color settings on screen.
Vincent,A.et al., “Telidon Teletest System. Field Triasl” (Abstract).
Rzeszeewski, T.,“A New Telletex Channel”.
Numaguchi,
Y. et al., “Compatibility and Transmision Characteristics of Digital
Signals Inserted in the Field-Blanking Interval of the Television
Signal” (Abstract).
Zimmerman, R. et al., Bildschirmtextesysteme (Abstract).
Pilz,
F., “Digital Codierte Uebertragungen von Text and Graphik in den
Vertikal-anstastintervallen des Fernsehsignas” (Abstract).
Pilz,
F., “Uebertragung Insaitryliches Informationen, Insbesondere von
Texten, In Ungenutryten Zeilen der Vertikal-Anstastlueke des
Fernsehsignals” (Abstract).
Numaguchi, Y., Wie man
Stillstehende Bilder Uebertraegt. Ueberlick Ueber Teletext-,
Fernseheinzelbild-Und Faksimile-Uebertrragunsverfahren (Abstract).
Transcript,
Videotex, Viewdata, and Teletext: Viewdata '801 Online Conference on
Videotex, Viewdata and Teletext, London. Mar. 26k-28, 1980 (Abstract).
Graf, P.H., “Antiope-Uebertragung fuer Breitbandige Videotex-Verteildienste”, 1981.
Poubread, J.J., “Cryptage' du Son Pour la Televiser A Peague” 1981 (Abstract).
Graf, P.H., “Das Videotex-System Antiope” 1980 (Abstract).
Vardo, J.C., “Les Emetteurs de Television et la Diffusion de Donnees” 1980 (Abstract).
Noirel, Y., “Constructin D'un Reseau de Diffusion de Donnees Par Paquets” 1979 (Abstract).
Vardo, J.C., “ Effet de Distorsions en Diffusion de Donnes. II. Resultats Theoriques” 1979 (Abstract).
Baerfuss, C., “Experiences de Diffusion de Donnees dans un Canal de Television” 1979 (Abstract).
Blineau, J., “Liasons Telex a Support Video Sur Des Circuits de Television Internationaux” 1979 (Abstract) .
Dublet,
G., “Methodes Utilisees et Principaux Resultats Obtenus Lors D'Une
Campagne de esure ‘Didon’ Dans la Refion Centre-est” 1978 (Abstract).
Guinet, Y., “Etude Comparative des Systems de Teletexte en
Radio-Diffusion. Quelques Avantages de la Diffusion des Donnees Par
Paques Applique an Teletexte” 1977 (Abstract).
Goff, R., “A Review of Teletext” 1978 (Abstract).
Haplinsky, C.H., “The D**(2)B A One Logical Wire Bus for Consumer Applications” 1981.
Cazals, A., “cts Techniques du Teletexte Diffuse” 1981 (Abstract).
Sechet, C. et al., “Epees et la Viideomessagerie” 1981 (Abstract).
Cayet, A. “La Peritelevison Face a Son Public” 1981 (Abstract).
“La
Telematique au Service Des Entreprises et des Particliers: Les
Reseaux—Les Produits Noveaux—Les Aplication” 1980 (Abstract).
Sechet, C., “Antiope Teletext Captioning” 1980.
Lambert, O. et al., “Antiope and D.R.C.S.” 1980.
Broggini, P., “Antiope: La Bonne Information Au Bon Moment” 1980 (Abstract).
Strauch,
D., “(Texte Sur Ecran An Nivenn International. Viewdata 80. Premeire
Confirence Mendiale Sur Viewdata, Video text at Teletext, a Londres)”
1980.
Strauch, D., (Las Media De Telecommunication Devant la
Rapture. Les Nonvellas Methodes Presentees a L'Exposition
International 1979 de Radio (Et Television)) 1979.
Eymery, G., “Le Teletexte Antiope System D'Information a La Demande” 1979-1980 (Abstract).
Brasq , R., “Micro 8 Bits Dans Linite Gestion da Terminal de Videotex Antiope”.
Hughes, JW,“Videotex and Teletext Systems” 1979.
Marti, B., “Terminolegie Des Services de Communication De Texte” 1979.(Abstract).
Schreber, H., “Antiope et Tietae, La Tele-Informatique Sur L'ecran De Votre Televiscur” 1978 (Abstract).
Kulpok, A., “Videotext, Teletext, Bilschimzeiting” 1979 (Abstract).
Cochard, J.P. et al., “Antiope Prototype da Teletexte De Demain” 1979 (Abstract).
Messerschmid, U., “Videotext: Ein Nueur Informations dienst in Fernschrund funk” 1978 (Abstract).
D'Argoevves, T. et al, “La Chaine Vieo: Magnetoscopes, Videodisqhes, Andiodisques” 1979 (Abstract).
Klingler, R., “Les Systemes de Teletexte Unidirectionals” 1978 (Abstract).
Guillermin, J., “Dix Annees D'Antomatisation Au Service De la Radiodiffusion” 1977 (Abstract).
Brusq, R., “Le Terminal de Teletexte Antiope” 1977 (Abstract).
Guinet, Y., “Les Systemes des Teletextes Antiope” 1977 (Abstract).
Schwartz, C. et al., “Specification Preliminarie du Systeme Teletexte Antope” 1977 (Abstract).
United
States International Trade Commission notice of decision not to
review Admin. law judges initial dismissal of complaint (case involves
certain recombinantly Produced Human Growth Hormones).
U.S.
I.T.C.'s order granting Complainants Motion to Desqualify the Law Firm
of Finnegan, Henderson et al. (Case involves Certain Cardiac
Pacemakers and Components therof).
Decision in Ford Motor Company v. Jerome H. Lemelson.
General
Counsel's recommendation to U.S.I.T.C. to refuse a patent-based
section 337 investigation based on a complaint filed not by the owner
of the patents in issue, but by nonexclusive licensees.
Portion of ITC's Industry and Trade Summary serial publication.
ITC Admin. Judges Order #9: Initial Determination Terminating Investigation (Investigation #337-TA-373) .
“LSI Circuits for Teletext and Viewdata—The Lucy Generation” published by Mullard Limited, Mullard House (1981).
2 page article by Nicholas Negroponte in SID 80 Digest titled, “17.4/10:25 a.m.: Soft Fonts”, pp. 184-185.
IEEE Consumer Electronics Jul. 1979 issue from Spring Conference titled, “Consumer Text Display Systems”, pp. 235-429.
Videotext '81 published by Online Conferences Ltd., for the May 20-22, 1981 Confernece, pp. 1-470.
“Teletext and Viewdata Costs as Applied to the U.S. Market” Published by Mullard House (1979), pp. 1-8.
CCETT publication titled, “Didon Diffusion de donnees parpaquets”.
Dalton,C.J., “International Broadcasting Convention” (1968), Sponsors: E.E.A., I.E.E., I.E.E.E., I.E.R.E., etc.
Shorter,
D.E.L., “The Distribution of Television Sound by Pulse-Code
Modulation Signals Incorporated in the Video Waveform”.
Chorky, J.M., Shorter, D.E.L., “International Broadcasting Convention” (1970), pp. 166-169.
The Implementation of the Sound-in-Sync project for Eurovision (Feb. 1975), pp. 18-22.
Maegele, Manfred, “Digital Transmissions of Two Television Sound Channels in Horizontal Banking”, pp. 68-70.
Weston, J.D., “Digital TV Transmission for the European Communications Satellite” (1974), pp. 318-325.
Golding, L., “A 15 to 25 Mhz Digital Television System for Transmission of Commercial Color Television” (1967), pp. 1-26.
Huth,
Gaylord K., Digital Television System Design Study: Final Report
(Nov. 28, 1976), prepared for NASA Lyndon B. Johnson Space Center.
Weston, J.D., “Transmission of Television by Pulse Code modulation”, Electrical Communication (1967), pp. 165-172.
Golding,
L, “F1-Ditec-A-Digital Television Communications System for Satellite
Links,” Telecommunications Numeriques Par Satellite.
Haberle, H. et al.,“Digital TV Transmission via Satellite”, Electrical Communications (1974).
Dirks, H. et al., TV-PCM6 Integrated Sound and Vision Transmission System, Electrical Communication (1977), pp. 61-67.
Talygin,
N. V. et al., The “Orbita” Ground Station for Receiving Television
Programs Relayed by Satellites, Elecktrovinz, pp. 3-5.
1973 NAB Convention Program, Mar. 25-28, 1973.
Portions
of Electonic Engineer's Reference Book (1989)—Multichannel sound
systems, Teletext transmission, cable television, ISDN applications,
etc.
Yoshido, Junko, teletext back in focus: VBI service
revived as alternative delivery system, Electronic Engineering Times
(1994) (Abstract).
Blankenhorn, Dana, “ Int'l Teletext expands
market (International Teletext Communication Inc.),” NewsBytes (1993)
(Abstract).
Collin, Simon, PC Text II (Hardware Review (Shortlist), PC User (1990).
Alfonzetti, Salvatore, “Interworking between teletext and OSI systems,” Computer Communications (1989).
Gabriel, Michael R., Videotex and teletex: Waiting for the 21st century?, Education Technology (1988).
Voorman,
J.O. et al., A one-chip Automatic Equalizer for Echo Reduction in
Teletext , IIEE Transactions on Consumer Electronics, pp. 512-529.
National Online Meeting: Proceedings—1982 sponsored by: Online Review, pp. 547-551.
MacKenzie, G.A., A Model for the UK Teletext Level 2 Specification (Ref: GTV2 242 Annex 6″ based on the ISO Layer model.
Chambers, J.P., A Domestic Television Program Delivery Services, British Broadcasting Corporation, pp. 1-5.
McKenzie, G.A., UK Teletext—The Engineering Choices, Independent Broadcasting Authority, pp. 1-8.
Adding a new dimension to British television, Electronic Engineering (1974).
Jones, Keith, The Development of Teletext, pp. 1-6.
Marti, B. et al., Discrete, service de television cryptee, Revue de radiodiffusion—television (1975), pp. 24-30.
Ando,
Heiichero et al., Still-Picture Broadcasting—A new Informational and
Instructional Broadcasting System, IEEE Transactions on Broadcasting
(1973), pp. 68-76.
Sauter, Dietrich, “Intelligente Komponenten
Fur Das Afra-Bus-Fernsteuersystem”, Rundfunk technischen Mittelungen,
pp. 54-57.
Hogel, T. et al., “Afra-Bus-ein digitales
Fersteuersysten fur Fernsehstudion Komplexe”, Fernseh-Und Kino-Technik
(1974), pp. 13-14.
Hogel, G., “Das Afra-Bus System: 2.
Technische Struktur des AFRA-Bus-Systems”, Fernseh-Und Kino-Technik
(1975), pp. 395-400.
Krauss, G., “Das Afra-Bus-System: 4.
Wirtschaftlich Keits-betrachtungen und Rationalisierung seifekte beim
Einsatz des AFRA-Bus-Systems”, Fernseh-Und Kino-Technik (1976), pp.
40-49.
Wellhausen, H. “Das AFRA-Bus-System: 1.
Grundsatzliche-Betrachtungen und Rationlisierung und Automatisierun in
den Fernschbetreben”, Fernseh-Und Kino-Technik (1975), pp. 353-356.
Sauter,
D., “Das AFRA-Bus-System: 3. Einsatz-moglich Keiten des Afra-Bus
Systems in Fernsehbetrieben”, Fernseh-Und Kino-Technik (1976), pp.
9-13.
B.B.C.I.B.A., Specification of Standards for information
transmission by digitally coded signals in the field—blanking interval
of 625-line systems (1974), pp. 5-40.
Centre Commun Des De Television et Telecommunications, Specification du Systeme Di Teletext, Antiope.
Heller, Arthur, VPS—Ein Neues System Zuragsgesteurten Programmanfzeichnung, Rundfunk technisde Mitteilungen, pp. 162-169.
Institut fur Rundfunktechnik, ARD/SDF/ZXEI—Richlinie “Video Programm-System”, pp. 1-30.
Buro
der Technischen Kommission, “Niederschrift uber die Besprechung
zwischen Rundfunkanstalten (Techik, Sendeleiter) und ZVEI zur
Einfuhrung des Video-Programm-Systems”, pp. 1-4.
Buro der
Technischen Kommission, Ergebnisse und Festlegungen anda “Blich einer
Besprechung zwishen Rundfunanstalten..”, pp. 1-4.
Koch, H. et al., “Bericht der ad hoc—Arbeitsgruppe ‘Videotext programmiert Videorecorder’ der TEKO”, pp. 1-40.
European Broadcasting Union, “Specification of the Domestic Video Programme Delivery Control System”, pp. 1-72.
ARD/ZDF/ZVEI-Richtlinie “Video Programme System”.
Reports on Developments in USA, Teletext, EIA Meeting.
Videotex '81: A Special Report.
Tarrant, D.R., “Teletext for the World”.
Clifford,
Colin et al., “Microprocessor Based, Software Defined Television
Controller”, IEEE Transaction on Consumer Electronics (1978), pp.
436-441.
Hughes, William L. et al., “Some Design
Considerations for Home Interactive Terminals”, IEEE Transactions on
Broadcasting (1971).
Mothersdale, Peter L. , “Teletext and
viewdata: new information systems using the domestic television
receiver”, Electronics Record (1979), pp. 1349-1354.
Betts, W.R., “Viewdata: the evolution of home and business terminals”, PROC.IEE (1979), pp. 1362-1366.
Hutt, P.R., “Thical and practical ruggedness of UK teletext transmission”, PROC.IEE (1979), pp. 1397-1403.
Rogers, B.J., “Methods of measurement on teletext receivers and decoders”, PROC.IEE (1979), pp. 1404-1407 .
Green, N., “Subtitling using teletext service—technical and editorial aspects”, PROC.IEE (1979), pp. 1408-1416.
Chambers, M.A., “Teletext—enhancing the basic system”, PROC.IEE (1979), pp. 1425-1428.
Crowther,
G.O., “Adaptation of Uk Teletex System for 525/60 Operation”, IEEE
Transactions on Consumer Electronics (1980), pp. 587-596.
Marti, B. et al., Discrete, service de television cryptee , Revue de radiodiffusion—television (1975), pp. 24-30.
Lopinto,
John, “The Application of DRCS within the North American Broad cast
Teletext Specification”, IEEE Transactions on Consumer Electronics
(1982), pp. 612-617.
BBC, BBC Microcomputer: BBC Microcomputer with Added Processor and Teletex Adaptor (Manual).
Green, N.W., “Picture Oracle,” on Independent Television Companies Association Limited Letterhead.
National
Captioning Institute, Comments on the Matter of Amendment of Part 73,
Subpart E. of the Federal Communications Rules Government Television
Stations to Authorize Teletext (before F.C.C.).
Balchin, C., “Videotext and the U.S.A.”, I.C. Product Marketing Memo.
Koteen and Burt, “British Teletext/Videotex”.
EIA Teletext SubCommittee Meetings, Report on USA Visit.
Brighton's Experience with Software for Broadcast (Draft).
The institution of Electronic and Radio Engineers, Conference on Electronic Delivery of Data and Software.
AT&T, “Videotex Standard Presentation Level Protocol”.
Various Commissioner statements on Authorization of Teletext Transmissions by TV Stations.
Report
and Order of FCC on the Matter of Amendment of Parts 2,73, and 76 of
the Commission's Rules to Authorize the Transmission of Teletext by TV
Stations, pp. 1-37.
IBA Technical Review of Digital Television, pp. 1-64.
National Cable Television Association report, “Videotex Services” given at Executive Seminar.
Lexis Research results for Patent No. 4,145,717.
Web page—Company Overview of Norepack Corporation.
Coversheet titled, “Zing”.
Lemelson v. Apple Computer, Inc. patent case in the Bureau of National Affairs, 1996.
A computer printout from Library Search.
Electronic
Industries Association—Teletext Subcommittee Rask Group A—Systems
Minutes of Meeting Mar. 30, 1981 at Zenith plus attachments.
Electronic
Industries Association—Teletext Subcommittee Task Group A Systems
Interim Report, Mar. 30, 1981 by Stuart Lipoff, Arthur D. Little Inc.
Minutes of Eletronic Industries Association Teletext
Subcommittee Task Force B —Laboratory & Field Tests Mar. 30,
1981.
National Captioning Institute Report, “The 1980 Closed-Captioned Television Audience”.
Electronic Industries Assoc.—Teletext Subcommittee— Steering Committee Minutes of Meeting on Mar. 31, 1981.
Aug. 6, 1990 letter from Herb Zucker to Walter Ciciora with attachment.
Articles, information sheets under cover sheet “QVP—Pay Per View” Nov. 29, 1982.
National Cable Television Association report, “Videotex Services”.
Scala Info Channel Advertisement, “The Art of Conveying A Message”.
Zenith Corporation's Z-Tac Systems information includes Z-tac specifications, access list, etc.
Report by Cablesystems Engineering Ltd. on, “Zenith Addressable System and Operating Procedures” and Advertising documents.
Memo from W. Thomas to G. Kelly on Jan. 21, 1982 Re: Modified ZTAC/Multi Channel.
Notations by Walt Ciciora dated Aug. 19, 1981 referring to Virtext figures.
Stamped Zenith Confidential, “Preliminay Specification for Basic Text”.
Report titled “The Necams Business Plan,” dated Mar. 18, 1994.
The
Personalized Mass Media Corp. reported titled, “Portfolio of
Programming Examples” by Harvey, Keil, & Parker 1991.
Petition
to FCC dated Mar. 26, 1981 titled, “Petition for Rulemaking of
Unighted Kingdom Teletext Industry Goup,” also 1 page of handwritten
notes from Walter Ciciora.
“Enhanced Computer Controlled Teletext for 525 Line Systems (Usecct) SAA 5245 User Manual” report by J.R. Kinghorn.
“Questions and Answers about Pay TV” by Ira Kamen.
Oak Industries 1981 Annual Report.
Article, “50 Different Uses for At Home 2-Way Cable TV Systems” by Morton Dubin.
Derwent Info Ltd. search. Integrated broadcasting & Computer Processing system. Inventor J. Harvey/J. Cuddihy.
Telefax
from Arjen Hooiveld to Jones, Day, Reavis & Pogue Re:
European Patent Appl. No. 88908836.5 and abstract plus related
correspondence and Derwent search.
Advertisement in royal TV Society Journal (1972) for PYE TVT.
Letter to Dean Russell listing “reference papers”, pp. 1-4.
Letter from George McKenzie to Dean Russell Re: PMM Corp., v. TWC Inc.
Reisebericht (German memo).
Blanpunk (German memo).
“Relevant papers for Weather Channel V PMMC”.
Letter to Peter Hatt Re: BVT: Advisory UK Industry Contact Group.
Incomplete report on Antiope.
Memo FCC: Next Moves.
Memo—Re: British Teletext—ABC.
Memo with FCC Report and Order Authorizing Teletext Transmission.
Manual.
Notes to Section 22.4: Simple Block Encipherment Algorithm.
Memos on Zenith and Teletext.
Memo
to Bernie Kotten about National Cable TV Association meeting and
efforst to encourage Sony to integrate teletext chip sets into its TV.
Memo's from Koteen & Naftalin.
Description of patents from Official Gazette.
Explanation of Collateral Estoppel.
DNA's Intellectual Property Library on CD's summary of Jamesbury Corporation v. United States.
BBA's Intellectual Property printouts of Lemelson v. Apple Computer, Inc.
ITC
Judge Order denying Motion for Summary Judgment in the Matter of
Certain Memory Devices with Increased Capacitance and Products
Containing Same, Investigation #337-TA-371.
Decision in court case Corbett v. Chisolm and Schrenk invovling patent #3,557,265.
Matthew Beaden Printouts regarding interference practice and the Board Interference.
BNA's Intellectual Property Library on CD printouts about Corbett v. Chisolm.
Numerous Group W business cards including James Cuddihy.
The
Broadcast Teloetext Specification, published by the BBC, The IBA and
the British Radio Equipment Manufacturers' Association (1976).
Kahn,
et al., “Advances in Packet Radio Technology,” . . . Proceedings of
the IEEE, vol. 66, No. 11, Nov. (1978) pp. 1468-1495.
Clifford,
C., “A Universal Controller for Text Display Systems,” IEEE
Transactions on Consumer Electronics, (1979) pp. 424-429.
Harden, B., “Teletext/Viewdata LSI,” IEEE Transactions on Consumer Electronics, (1979), pp. 353-358.
Bown,
H. et al., “Comparative Terminal Realizatins with Alpha-Geometric
Coding,” IEEE Transaction on Consumer Electronics, (1980), pp.
605-614.
Crowther, “Dynamically Redefinable Character
Sets—D.R.C.S.,” IEEE Transaction on Consumer Electronics, (1980), pp.
707-716.
Chambers, John et al., “The Development of a Coding
Hierarchy for Enhanced UK Teletext,” IEEE Transaction on Consumer
Electronics, (1981), pp. 536-540.
Reexamination of U.S. Patent No. 4,706,121.
U.S. Patent Application by T. Diepholz (Serial No. 266900).
List of relevant or searched patents.
88908836.5 and Amendments to John C. Harvey,. European Patent Office.
88908836.5 International Application to John C. Harvey.
Kruger, H.E., “Memory Television, the ZPS Digital Identification System,” pp. 1-9.
Gaines, B.R. and Sams, J., “Minicomputers in Security Dealing,” Computer, Sep. 1976, pp. 6-15.
Kazama et al., “Automatic storage and retreival of video taped programs”, Apr. 1979.
Transcript of Viewdata '80, first world conference on viewdata, videotex, and teletext, Mar. 26-28, 1980, London.
Benson, K. B. et al., “CBS New York Video Tape Facilities”.
Brown et al., Project Score, pp. 624-630, 1960.
Burkhardt et al., “Digitial Television Transmisson With 34 Mbit/s”.
Byloff, “Automatic Control of Video Tape Equipment at NBC, Burbank,” by the National Broadcasting Company, Inc. In 1959.
Charles Gerrish, “QUBE”—Interactive Video on the Move.
Crowther, et al. G.O., “Teletext Receiver LSI Data Acquisition and Control,” Jan. 13, 1976, pp. 911-915.
Davidoff, Frank, “The All-Digital Television Studio,” SMPTE Journal, vol. 89, No. 6.
Diederich,
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Gaucher, “Automatic Program Recording System”.
M.W.S.. Barlow, “Automatic Switching in the CBC—An Update”.
Marsden, “Master Control Techniques,” v 9 of the “Journal of the Television Society,” 1959.
McArthur, David, “The television as a receive only terminal”.
Millar et al., “Transmission of Alphanumeric Data by Television”.
Schober, “The WETA Teletext Filed Trial: Some Technical Concerns . . . ”.
Skilton, The Digitrol 2—Automatic VTR Programme Control.
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Yamane et al., “System and apparatus for automatic Monitoring control of Broadcast Circuits”.
Zettl, “Television Production Handbook”, second edition.
Schiller et al., “CATV Program Origination and Production”.
Hughes
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Kaneko et al., “Digital Transmission of Broadcast Television with Reduced Bit Rate.”
Gautier, C., “Automatic Program Recording Systems”.
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Marti,
B., “The Concept of Universal Teletext,” CCETTt, Rennes 11th
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“Videotex Services,” National Cable Television
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“Specification du service de classe A, TeleDiffusion de France,” Antiope, Feb. 1985.
Gautier, J.P. “Language Telediffuse de Messagerie du Projet Ecrans Hybrides,” Antiope/Didon system, Jun. 1981.
Auer, R., “Die Warteschlange Uberlistet,” Funkschau, pp. 53-56, Jun. 1985.
Grethlein, M., “Videotext und Bildschirmtext,” Funkschau, Heft 5, 1981, pp. 69-73, May 1981.
Heider, et al., “Videotext und Bildschirmtext,” Grundig Technische Informationen, Heft 4/5, 1980, pp. 171-195, Apr. 1980.
Kombinierer fur Videotextsignal, “Runfunktechnische Mitteilungen,” Jahrgang 28, (1984), Heft 6, pp. 273-289, Jun. 1984.
Art Kleiman, “Heathkit GR-2001—Programmable Color TV,” Radio Electronics, May 1977.
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Colin, “Broadcast teletext—who says it isn't interactive?” pp. 1-12
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Veith, Richard H., “Television's
Teletext,” Elsevier Science Publishing, Inc., New York, 1983, pp. 9,
12, 17, 19, 32, 46-47, 136-137, 139.
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“Videotex/Teletext, Principles and Practices,” McGraw-Hill Book
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Sigel,
Efrem et al. Videotext: The Coming Revolution in Home/Office
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Carol A. “Electronic Media and the Publishers, Part 1: Teletext,”
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J.R. “CEEFAX: evolution and potential,” BBC Reseach Department Report
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20-22, 1981 Toronto, Canada (Northwood Hills, UK: Online Conference,
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Winsbury, Rex, ed. Viewdata in Action: A
Comparative Study of Prestel (London: McGraw-Hill, Ltd., 1981), pp.
10-12, 31, 35, 36, 57-61, 102, 103, 109, 202-204, 211-219.
“Colloquium
on Broadcast and Wired Teletext Systems—Ceefax, Oracle, Viewdata,”
Tuesday, Jan. 13, 1976, IEE Electronics Division, Professional Groupm
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Anon. “Updating databases by off-peak TV,” New Scientist, Oct. 21, 1976, p. 162.
Martin, Bernard. “New Ancillary Services Using a Televison Channel,” SMPTE Journal, vol. 86, Nov. 1977, pp. 815, 817, 818.
Biggs,
A.J. et al., “Broadcast data in television,”GEC Journal of Science
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Heuer, D.A.
“A Microprocessor Controlled Memory Tuning System,” Consumer
Electronics, vol. CE-25, No. 4, Aug. 1979, pp. 677-683.
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Lipoff, Stuart J. “Mass Market Potential for Home Terminals,” Consumer Electronics, vol. unk., pp. 169-184.
Crowther,
G.O., “Adaptation of U.K. Teletext System for 525/60 Operations,”
IEEE Transactions on Consumer Electronics, vol. CE-26, Aug. 1980, pp.
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Gosch, John, “Code accompanying TV program turns on
video cassette recorder in proposed scheme,” Electronics, Feb. 10,
1981, pp. 80-82.
Somers, Eric, “Appropriate Technology for
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and Videotext, and teletext, Knowledge Industry Publications, Inc.,
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499-514.
Dages, Charles L., “Playcable: A Technological
Alternative for Information Services,” IEEE Transactions on Consumer
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Kokado,
N. et al., “A Programmable TV Receiver,” IEEE Transactions on
Consumer Electronics, vol. 22, No. 1, Feb. 1976, pp. 69-83.
“Advanced
Minicomputer-based Systems for Banking and Financial Institutions,”
Money Management Systems, Incorporated, brochure, 1980, 9 pages.
“Advanced
Transmission Techniques,” SMPTE Journal, Report on the 121st
Technical Conference, Jan. 1980, vol. 89, pp. 31-32.
“American
National Standard” “dimensions of video, audio and tracking control
records on 2-in video magnetic tape quadruplex recorded at 15 and 7.5
in/s,” SMPTE Journal, Oct. 1981, pp. 988-989.
“American
National Standard” “time and control code for video and audio tape for
525-line/60-field television systems,” SMPTE Journal, Aug. 1981, pp.
716-717.
“Anderson: Progress Committee Report for 1979—Television,” SMPTE Journal, May 1980, vol. 89, pp. 324-328.
“Application
of Direct Broadcast Satellite Corporation for a Direct Broadcast
Satellite System,” Before the Federal Communications Commission,
Washington, D.C., Gen. Docket No. 80-603, Jul. 16, 1981.
“Cable TV Advertising,” Paul Kogan Associates, Inc., No. 22, Feb. 18, 1981, 6 pages.
“CAMP,” Arbitron Cable, The Arbitron Company, product brochure, May 1980, 8 pages.
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