Richtige Fernseher haben Röhren!

Richtige Fernseher haben Röhren!

In Brief: On this site you will find pictures and information about some of the electronic, electrical and electrotechnical technology relics that the Frank Sharp Private museum has accumulated over the years .

Premise: There are lots of vintage electrical and electronic items that have not survived well or even completely disappeared and forgotten.

Or are not being collected nowadays in proportion to their significance or prevalence in their heyday, this is bad and the main part of the death land. The heavy, ugly sarcophagus; models with few endearing qualities, devices that have some over-riding disadvantage to ownership such as heavy weight,toxicity or inflated value when dismantled, tend to be under-represented by all but the most comprehensive collections and museums. They get relegated to the bottom of the wants list, derided as 'more trouble than they are worth', or just forgotten entirely. As a result, I started to notice gaps in the current representation of the history of electronic and electrical technology to the interested member of the public.


Following this idea around a bit, convinced me that a collection of the peculiar alone could not hope to survive on its own merits, but a museum that gave equal display space to the popular and the unpopular, would bring things to the attention of the average person that he has previously passed by or been shielded from. It's a matter of culture. From this, the Obsolete Technology Tellye Web Museum concept developed and all my other things too. It's an open platform for all electrical Electronic TV technology to have its few, but NOT last, moments of fame in a working, hand-on environment. We'll never own Colossus or Faraday's first transformer, but I can show things that you can't see at the Science Museum, and let you play with things that the Smithsonian can't allow people to touch, because my remit is different.

There was a society once that was the polar opposite of our disposable, junk society. A whole nation was built on the idea of placing quality before quantity in all things. The goal was not “more and newer,” but “better and higher" .This attitude was reflected not only in the manufacturing of material goods, but also in the realms of art and architecture, as well as in the social fabric of everyday life. The goal was for each new cohort of children to stand on a higher level than the preceding cohort: they were to be healthier, stronger, more intelligent, and more vibrant in every way.

The society that prioritized human, social and material quality is a Winner. Truly, it is the high point of all Western civilization. Consequently, its defeat meant the defeat of civilization itself.

Today, the West is headed for the abyss. For the ultimate fate of our disposable society is for that society itself to be disposed of. And this will happen sooner, rather than later.

OLD, but ORIGINAL, Well made, Funny, Not remotely controlled............. and not Made in CHINA.

How to use the site:

- If you landed here via any Search Engine, you will get what you searched for and you can search more using the search this blog feature provided by Google. You can visit more posts scrolling the left blog archive of all posts of the month/year,
or you can click on the main photo-page to start from the main page. Doing so it starts from the most recent post to the older post simple clicking on the Older Post button on the bottom of each page after reading , post after post.

You can even visit all posts, time to time, when reaching the bottom end of each page and click on the Older Post button.

- If you arrived here at the main page via bookmark you can visit all the site scrolling the left blog archive of all posts of the month/year pointing were you want , or more simple You can even visit all blog posts, from newer to older, clicking at the end of each bottom page on the Older Post button.
So you can see all the blog/site content surfing all pages in it.

- The search this blog feature provided by Google is a real search engine. If you're pointing particular things it will search IT for you; or you can place a brand name in the search query at your choice and visit all results page by page. It's useful since the content of the site is very large.

Note that if you don't find what you searched for, try it after a period of time; the site is a never ending job !

Every CRT Television saved let revive knowledge, thoughts, moments of the past life which will never return again.........

Many contemporary "televisions" (more correctly named as displays) would not have this level of staying power, many would ware out or require major services within just five years or less and of course, there is that perennial bug bear of planned obsolescence where components are deliberately designed to fail and, or manufactured with limited edition specificities..... and without considering........picture......sound........quality........

..............The bitterness of poor quality is remembered long after the sweetness of todays funny gadgets low price has faded from memory........ . . . . . .....
Don't forget the past, the end of the world is upon us! Pretty soon it will all turn to dust!

Have big FUN ! !
-----------------------

©2010, 2011, 2012, 2013, 2014 Frank Sharp - You do not have permission to copy photos and words from this blog, and any content may be never used it for auctions or commercial purposes, however feel free to post anything you see here with a courtesy link back, btw a link to the original post here , is mandatory.
All sets and apparates appearing here are property of
Engineer Frank Sharp. NOTHING HERE IS FOR SALE !

Friday, May 11, 2012

PHILIPS 26C871 LIPPI CHASSIS K12 (20AX) INTERNAL VIEW.











































































































View of Internals of K12 Modular Chassis. Code: 8222 280 1286.2 and 3122 123 3282.0
PHILIPS 26C871 CHASSIS K12 (20AX) Tube Philips 20 AX A66-510X.


Detailed Views Of Chassis K12 Mono print Code: 8222 280 1286.2 and 3122 123 3282.0
sections.

Includes CRT Socket with RGB Hybrid Modules.


This version of the PHILIPS K12 is introducing the TRD TUNING SYSTEM (TUNING REMOTE DIGITAL) WHICH allows direct selection of channel frequency on front ROTARY SELECTORS or even via remote through a help of a LOGIC controller BOARD which sends command to the TRD Units system.


PHILIPS 26C871 CHASSIS K12 (20AX) Channel selector having a plurality of tuning systems:A channel selector characterized in that a plurality of receivers capable of simultaneously performing a receiving operation have a main part of a phase-locked loop frequency synthesizer connected in common thereto, the frequency synthesizer having a programmable frequency divider, a phase comparator, a reference oscillator and a reference frequency divider. The frequency synthesizer is controlled so that a local oscillation frequency corresponding to a determined frequency close to a broadcast signal of a desired receiving channel is synthesized, and one of a plurality of search tuning systems searches and tunes the broadcast signal from the local oscillation frequency.

1. A channel selector for controlling the tuning frequency of a plurality of receivers capable of simultaneously performing receiving operations, each of said plurality of receivers having a portion of a phase-locked loop frequency synthesizer; wherein another portion of a phase-locked loop frequency synthesizer is commonly used by said portions of said synthesizers whereby each of said plurality of receivers has an equivalent complete phase-locked loop frequency synthesizer;
and wherein each of said plurality of receivers has its own low pass filter included in its equivalent phase-locked loop frequency synthesizer, and an output of a phase comparator is switched to an input terminal of one low pass filter from among said plurality of low pass filters by a 3-state switching circuit.


2. A channel selector according to claim 1, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a programmable frequency divider, a phase comparator, a reference oscillator and a reference frequency divider.

3. A channel selector according to claim 1, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a prescaler.

4. A channel selector according to claim 1, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a channel entry means and a code converter means.

5. A channel selector for controlling the tuning frequency of a plurality of receivers capable of simultaneously performing receiving operations, each of said plurality of receivers having a portion of a phase-locked loop frequency synthesizer; wherein another portion of a phase-locked loop frequency synthesizer is commonly used by said portions of said synthesizers whereby each
of said plurality of receivers has an equivalent complete phase-locked loop frequency synthesizer;
and wherein each of said equivalent phase-locked loop frequency synthesizers is controlled so that a local oscillation frequency corresponding to a predetermined frequency close to a broadcast signal of a desired receiving channel is synthesized, and one of a plurality of search tuning systems searches and tunes said broadcast signal from said local oscillation frequency whereby said broadcast signal of said desired receiving channel is tuned.


6. A channel selector for controlling the tuning frequency of a plurality of receivers capable of simultaneously performing receiving operations, each of said plurality of receivers having a portion of a phase-locked loop frequency synthesizer; wherein another portion of a phase-locked loop frequency synthesizer is commonly used by said portions of said synthesizers whereby each of said plurality of receivers has an equivalent complete phase-locked loop frequency synthesizer;
and wherein each of said phase-locked loop frequency synthesizers selects a desired receiving channel, and wherein a tuning voltage of said desired receiving channel is stored in a voltage memory means, and wherein said channel selector further comprises a tuning means provided for each of said plurality of receivers so that while receiving, said tuning means tunes in accordance with the output of said voltage memory means.


7. A channel selector according to claims 5 or 6, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a programmable frequency divider, a phase comparator, a reference oscillator and a reference frequency divider.

8. A channel selector according to claims 5 or 6, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a prescaler.

9. A channel selector according to claims 5 or 6, wherein said common portion of each of said equivalent phase-locked loop frequency synthesizers comprises a channel entry means and a code converter means.

Description:
BACKGROUND OF THE INVENTION
This invention relates to a channel selector for use in television receivers, FM (frequency modulation) radio receivers, AM (amplitude modulation) radio receivers and so on.



PHILIPS 26C871 CHASSIS K12 (20AX) PHILIPS CHASSIS K12 CIRCUIT ARRANGEMENT IN A PICTURE DISPLAY DEVICE UTILIZING A STABILIZED SUPPLY VOLTAGE CIRCUIT:

Line synch Switched Mode Power Supply with Line deflection output Transistor Drive Circuit:

A stabilized supply voltage circuit for a picture display device comprising a chopper wherein the switching signal has the line frequency and is duration-modulated. The coil of the chopper constitutes the primary winding of a transformer a secondary winding of which drives the line output transistor so that the switching transistor of the chopper also functions as a driver for the line output stage. The oscillator generating the switching signal may be the line oscillator. In a special embodiment the driver and line output transistor conduct simultaneously and in order to limit the base current of the line output transistor a coil shunted by a diode is incorporated in the drive line of the line output transistor. Other secondary windings of the transformer drive diodes which conduct simultaneously with the efficiency diode of the chopper so as to generate further stabilized supply voltages.






1. An electrical circuit arrangement for a picture display device operating at a given line scanning frequency, comprising a source of unidirectional voltage, an inductor, first switching transistor means for periodically energizing said inductor at said scanning frequency with current from said source, an electrical load circuit coupled to said inductor and having applied thereto a voltage as determined by the ratio of the ON and OFF periods of said transistor, means for maintaining the voltage across said load circuit at a given value comprising means for comparing the voltage of said load circuit with a reference voltage, means responsive to departures of the value of the load circuit voltage from the value of said reference voltage for varying the conduction ratio of the ON and OFF periods of said transistor thereby to stabilize said load circuit voltage at the given value, a line deflection coil system for said picture display device, means for energizing said line deflection coil system from said load voltage circuit means, means for periodically interrupting the energization of said line deflection coil comprising second switching means and means coupled to said inductor for deriving therefrom a switching current in synchronism with the energization periods of said transistor and applying said switching current to said switching means thereby to actuate the same, and means coupled to said switching means and to said load voltage circuit for producing a voltage for energizing said 2. A circuit as claimed in claim 1 wherein the duty cycle of said switching 3. A circuit as claimed in claim 1 further comprising an efficiency first 4. A circuit as claimed in claim 3 further comprising at least a second diode coupled to said deriving means and to ground, and being poled to 5. A circuit as claimed in claim 1 wherein said second switching means comprises a second transistor coupled to said deriving means to conduct simultaneously with said first transistor, and further comprising a coil coupled between said driving means and said second transistor and a third diode shunt coupled to said coil and being poled to conduct when said 6. A circuit as claimed in claim 1 further comprising a horizontal oscillator coupled to said first transistor, said oscillator being the 7. A circuit as claimed in claim 1 further comprising means coupled to said inductor for deriving filament voltage for said display device.

Description:

The invention relates to a circuit arrangement in a picture display device wherein the input direct voltage between two input terminals, which is obtained be rectifying the mains alternating voltage, is converted into a stabilized output direct voltage by means of a switching transistor and a coil and wherein the transistor is connected to a first input terminal and an efficiency diode is connected to the junction of the transistor and the coil. The switching transistor is driven by a pulsatory voltage of line frequency which pulses are duration-modulated in order to saturate the switching transistor during part of the period dependent on the direct voltage to be stabilized and to cut off this transistor during the remaining part of the period. The pulse duration modulation is effected by means of a comparison circuit which compares the direct voltage to be stabilized with a substantially constant voltage, the coil constituting the primary winding of a transformer.

Such a circuit arrangement is known from German "Auslegeschrift" 1.293.304. wherein a circuit arrangement is described which has for its object to convert an input direct voltage which is generated between two terminals into a different direct voltage. The circuit employs a switch connected to the first terminal of the input voltage and periodically opens and closes so that the input voltage is converted into a pulsatory voltage. This pulsatory voltage is then applied to a coil. A diode is arranged between the junction of the switch and the coil and the second terminal of the input voltage whilst a load and a charge capacitor in parallel thereto are arranged between the other end of the coil and the second terminal of the input voltage. The assembly operates in accordance with the known efficiency principle i.e., the current supplied to the load flows alternately through the switch and through the diode. The function of the switch is performed by a switching transistor which is driven by a periodical pulsatory voltage which saturates this transistor for a given part of the period. Such a configuration is known under different names in the literature; it will be referred to herein as a "chopper."
A known advantage thereof, is that the switching transistor must be able to stand a high voltage or provide a great current but it need not dissipate a great power. The output voltage of the chopper is compared with a constant reference voltage. If the output voltage attempts to vary because the input voltage and/or the load varies, a voltage causing a duration modulation of the pulses is produced at the output of the comparison arrangement. As a result the quantity of the energy stored in the coil varies and the output voltage is maintained constant. In the German "Auslegeschrift" referred to it is therefore an object to provide a stabilized supply voltage device.

In the circuit arrangement according to the mentioned German "Auslegeschrift" the frequency of the load variations or a harmonic thereof is chosen as the frequency for the switching voltage. Particularly when the load fed by the chopper is the line deflection circuit of a picture display device, wherein thus the impedance of the load varies in the rhythm of the line frequency, the frequency of the switching voltage is equal to or is a multiple of the line frequency.

It is to be noted that the chopper need not necessarily be formed as that in the mentioned German "Auslegeschrift." In fact, it is known from literature that the efficiency diode and the coil may be exchanged. It is alternatively possible for the coil to be provided at the first terminal of the input voltage whilst the switching transistor is arranged between the other end and the second terminal of the input voltage. The efficiency diode is then provided between the junction of said end and the switching transistor and the load. It may be recognized that for all these modifications a voltage is present across the connections of the coil which voltage has the same frequency and the same shape as the pulsatory switching voltage. The control voltage of a line deflection circuit is a pulsatory voltage which causes the line output transistor to be saturates and cut off alternately. The invention is based on the recognition that the voltage present across the connections of the coil is suitable to function as such a control voltage and that the coil constitutes the primary of a transformer. To this end the circuit arrangement according to the invention is characterized in that a secondary winding of the transformer drives the switching element which applies a line deflection current to line deflection coils and by which the voltage for the final anode of a picture display tube which forms part of the picture display device is generated, and that the ratio between the period during which the switching transistor is saturated and the entire period, i.e., the switching transistor duty cycle is between 0.3 and 0.7 during normal operation.

The invention is also based on the recognition that the duration modulation which is necessary to stabilize the supply voltage with the switching transistor does not exert influence on the driving of the line output transistor. This resides in the fact that in case of a longer or shorter cut-off period of the line output transistor the current flowing through the line deflection coils thereof is not influenced because of the efficiency diode current and transistor current are taken over or, in case of a special kind of transistor, the collector-emitter current is taken over by the base collector current and conversely. However, in that case the above-mentioned ratios of 0.3 : 0.7 should be taken into account since otherwise this take-over principle is jeopardized.


As will be further explained the use of the switching transistor as a driver for the line output transistor in an embodiment to be especially described hereinafter has the further advantage that the line output transistor automatically becomes non-conductive when this switching transistor is short circuited so that the deflection and the EHT for the display tube drop out and thus avoid damage thereof.

Due to the step according to the invention the switching transistor in the stabilized supply functions as a driver for the line deflection circuit. The circuit arrangement according to the invention may in addition be equipped with a very efficient safety circuit so that the reliability is considerably enhanced, which is described in the U.S. Pat. No. 3,629,686. The invention is furthermore based on the recognition of the fact that the pulsatory voltage present across the connections of the coil is furthermore used and to this end the circuit arrangement according to the invention is characterized in that secondary windings of the transformer drive diodes which conduct simultaneously with the efficiency diode so as to generate further stabilized direct voltages, one end of said diodes being connected to ground.

In order that the invention may be readily carried into effect, a few embodiments thereof will now be described in detail by way of example with reference to the accompanying diagrammatic drawings in which:



FIG. 1 shows a principle circuit diagram wherein the chopper and the line deflection circuit are further shown but other circuits are not further shown.

FIGS. 2a, 2b and 2c show the variation as a function of time of two currents and of a voltage occurring in the circuit arrangement according to FIG. 1.

FIGS. 3a 3b, 3c and 3d show other embodiments of the chopper.

FIGS. 4a and 4b show modifications of part of the circuit arrangement of FIG. 1.

In FIG. 1 the reference numeral 1 denotes a rectifier circuit which converts the mains voltage supplied thereto into a non-stabilized direct voltage. The collector of a switching transistor 2 is connected to one of the two terminals between which this direct voltage is obtained, said transistor being of the npn-type in this embodiment and the base of which receives a pulsatory voltage which originates through a control stage 4 from a modulator 5 and causes transistor 2 to be saturated and cut off alternately. The voltage waveform 3 is produced at the emitter of transistor 2. In order to maintain the output voltage of the circuit arrangement constant, the duration of the pulses provided is varied in modulator 5. A pulse oscillator 6 supplies the pulsatory voltage to modulator 5 and is synchronized by a signal of line frequency which originates from the line oscillator 6' present in the picture display device. This line oscillator 6' is in turn directly synchronized in known manner by pulses 7' of line frequency which are present in the device and originate for example from a received television signal if the picture display device is a television receiver. Pulse oscillator 6 thus generates a pulsatory voltage the repetition frequency of which is the line frequency.

The emitter of switching transistor 2 is connected at one end to the cathode of an efficiency diode 7 whose other end is connected to the second input voltage terminal and at the other end to primary winding 8 of a transformer 9. Pulsatory voltage 3 which is produced at the cathode of efficiency diode 7 is clamped against the potential of said second terminal during the intervals when this diode conducts. During the other intervals the pulsatory voltage 3 assumes the value V i . A charge capacitor 10 and a load 11 are arranged between the other end of winding 8 and the second input voltage terminal. The elements 2,7,8,10 and 11 constitute a so-called chopper producing a direct voltage across charge capacitor 10, provided that capacitor 10 has a sufficiently great value for the line frequency and the current applied to load 11 flowing alternately through switching transistor 2 or through efficiency diode 7. The output voltage V o which is the direct voltage produced across charge capacitor 10 is applied to a comparison circuit 12 which compares the voltage V o with a reference voltage. Comparison circuit 12 generates a direct voltage which is applied to modulator 5 so that the duration of the effective period δ T of switching transistor 2 relative to the period T of pulses 3 varies as a function of the variations of output voltage V 0 . In fact, it is readily evident that output voltage V o is proportional to the ratio δ :

V o = V i . δ

Load 11 of the chopper consists in the consumption of parts of the picture display device which are fed by output voltage V 0 . In a practical embodiment of the circuit arrangement according to FIG. 1 wherein the mains alternating voltage has a nominal effective value of 220 V and the rectified voltage V i is approximately 270 V, output voltage V o for δ = 0.5 is approximately 135 V. This makes it also possible, for example, to feed a line deflection circuit as is shown in FIG. 1 wherein load 11 then represents different parts which are fed by the chopper. Since voltage V o is maintained constant due to pulse duration modulation, the supply voltage of this line deflection circuit remains constant with the favorable result that the line amplitude(= the width of the picture displayed on the screen of the picture display tube) likewise remains constant as well as the EHT required for the final anode of the picture display tube in the same circuit arrangement independent of the variations in the mains voltage and the load on the EHT generator (= variations in brightness).

However, variations in the line amplitude and the EHT may occur as a result of an insufficiently small internal impedance of the EHT generator. Compensation means are known for this purpose. A possibility within the scope of the present invention is to use comparison circuit 12 for this purpose. In fact, if the beam current passes through an element having a substantially quadratic characteristic, for example, a voltage-dependent resistor, then a variation for voltage V o may be obtained through comparison circuit 12 which variation is proportional to the root of the variation in the EHT which is a known condition for the line amplitude to remain constant.

In addition this facilitates smoothing of voltage V o since the repetition frequency of pulsatory voltage 3 is many times higher than that of the mains and a comparatively small value may be sufficient for charge capacitor 10. If charge capacitor 10 has a sufficiently high value for the line frequency, voltage V o is indeed a direct voltage so that a voltage having the same form as pulsatory voltage 3 is produced across the terminals of primary winding 8. Thus voltages which have the same shape as pulsatory voltage 3 but have a greater or smaller amplitude are produced across secondary windings 13, 14 of transformer 9 (FIG. 1 shows only 2 secondary windings but there may be more). The invention is based on the recognition that one end of each secondary winding is connected to earth while the other end thereof drives a diode, the winding sense of each winding and the direction of conductance of each diode being chosen to be such that these diodes conduct during the same period as does efficiency diode 7. After smoothing, stabilized supply voltages, for example, at terminal 15 are generated in this manner at the amplitudes and polarities required for the circuit arrangements present in the picture display device. In FIG. 1 the voltage generated at terminal 15 is, for example, positive relative to earth. It is to be noted that the load currents of the supply voltages obtained in this manner cause a reduction of the switching power which is economized by efficiency diode 7. The sum of all diode currents including that of diode 7 is in fact equal to the current which would flow through diode 7 if no secondary winding were wound on transformer 9 and if no simultaneous diode were used. This reduction may be considered an additional advantage of the circuit arrangement according to the invention, for a diode suitable for smaller powers may then be used. However, it will be evident that the overall secondary load must not exceed the primary load since otherwise there is the risk of efficiency diode 7 being blocked so that stabilization of the secondary supply voltages would be out of the question.

It is to be noted that a parabola voltage of line frequency as shown at 28 is produced across the charge capacitor 10 if this capacitor is given a smaller capacitance so that consequently the so-called S-correction is established.

In FIG. 1 charge capacitors are arranged between terminals 15 etc. and earth so as to ensure that the voltages on these points are stabilized direct voltages. If in addition the mean value of the voltage on one of these terminals has been made equal to the effective value of the alternating voltage which is required for heating the filament of the picture display tube present in the picture display device, this voltage is suitable for this heating. This is a further advantage of the invention since the cheap generation of a stabilized filament voltage for the picture display tube has always been a difficult problem in transistorized arrangements.

A further advantage of the picture display device according to the invention is that transformer 9 can function as a separation transformer so that the different secondary windings can be separated from the mains and their lower ends can be connected to ground of the picture display device. The latter step makes it possible to connect a different apparatus such as, for example, a magnetic recording and/or playback apparatus to the picture display device without earth connection problems occurring.

In FIG. 1 the reference numeral 14 denotes a secondary winding of transformer 9 which in accordance with the previously mentioned recognition of the invention can drive line output transistor 16 of the line deflection circuit 17. Line deflection circuit 17 which is shown in a simplified form in FIG. 1 includes inter alia line deflection coils 18 and an EHT transformer 19 a secondary winding 20 of which serves for generating the EHT required for the acceleration anode of the picture display tube. Line deflection circuit 17 is fed by the output voltage V o of the chopper which voltage is stabilized due to the pulse duration modulation with all previously mentioned advantages. Line deflection circuit 17 corresponds, for example, to similar arrangements which have been described in U.S. Pat. No. 3,504,224 issued Mar. 31, 1970 to J.J. Reichgelt et al., U.S. patent application Ser. No. 737,009 filed June 14, 1968 by W. H. Hetterscheid and U.S. application Ser. No. 26,497 filed April 8, 1970 by W. Hetterscheid et al. It will be evident that differently formed lined deflection circuits are alternatively possible.

It will now be shown that secondary winding 14 can indeed drive a line deflection circuit so that switching transistor 2 can function as a driver for the line deflection. FIGS. 2a and b show the variation as a function of time of the current i C which flows in the collector of transistor 16 and of the drive voltage v 14 across the terminals of secondary winding 14. During the flyback period (0, t 1 ) transistor 16 must be fully cut off because a high voltage peak is then produced at its collector; voltage v 14 must then be absolutely negative. During the scan period (t 1 , t 4 ) a sawtooth current i C flows through the collector electrode of transistor 16 which current is first negative and then changes its direction. As the circuit arrangement is not free from loss, the instant t 3 when current i C becomes zero lies, as is known, before the middle of the scan period. At the end t 4 of the scan period transistor 16 must be switched off again. However, since transistor 16 is saturated during the scan period and since this transistor must be suitable for high voltages and great powers so that its collector layer is thick, this transistor has a very great excess of charge carriers in both its base and collector layers. The removal of these charge carriers takes a period t s which is not negligible whereafter the transistor is indeed switched off. Thus the fraction δ T of the line period T at which v 14 is positive must end at the latest at the instant (t 4 - t s ) located after the commencement (t = 0) of the previous flyback.

The time δ T may be initiated at any instant t 2 which is located between the end t 1 of the flyback period and the instant t 3 when collector current i C reverses its direction. It is true that emitter current flows through transistor 16 at the instant t 2 , but collector current i C is not influenced thereby, at least not when the supply voltage (= V o ) for line deflection circuit 17 is high enough. All this has been described in the U.S. Pat. No. 3,504,224. The same applies to line deflection circuits wherein the collector base diode does not function as an efficiency diode as is the case in the described circuit 17, but wherein an efficiency diode is arranged between collector and emitter of the line output transistor. In such a case the negative part of the current i C of FIG. 2a represents the current flowing through the said efficiency diode.

After the instant t 3 voltage v 14 must be positive. In other words, the minimum duration of the period T when voltage v 14 must be positive is (t 4 - t s ) - t 3 whilst the maximum duration thereof is (t 4 - t s ) - t 1 . In a television system employing 625 lines per raster the line period t 4 is approximately 64 μus and the flyback period is approximately 12 μus. Without losses in the circuit arrangement instant t 3 would be located approximately 26 μus after the instant t 1 , and with losses a reasonable value is 22 μus which is 34 μus after the commencement of the period. If for safety's sake it is assumed that t s lasts approximately 10 μus, the extreme values of δ T are approximately 20 and 42 μus and consequently the values for δ are approximately 0.31 and 0.66 at a mean value which is equal to approximately 0.49. It was previously stated that a mean value of δ = 0.5 was suitable. Line deflection circuit 17 can therefore indeed be used in combination with the chopper in the manner described, and the relative variation of δ may be (0.66 - 0.31) : 0.49 = 71.5 percent. This is more than necessary to obviate the variations in the mains voltage or in the various loads and to establish the East-West modulation and ripple compensation to be described hereinafter. In fact, if it is assumed that the mains voltage varies between -15 and +10 percent of the nominal value of 220 V, while the 50 Hz ripple voltage which is superimposed on the input voltage V i has a peak-to-peak value of 40 V and V i is nominally 270 V, then the lowest occurring V i is:

0.85 × 270 V - 20 V = 210 V and the highest occurring V i is

1.1 × 270 V + 20 V = 320 V. For an output voltage V o of 135 V the ratio must thus vary between

δ = 135 : 210 = 0.64 and δ = 135 : 320 = 0.42.

A considerable problem presenting itself is that of the simultaneous or non-simultaneous drive of line output transistor 16 with switching transistor 2, it being understood that in case of simultaneous drive both transistors are simultaneously bottomed, that is during the period δ T. This depends on the winding sense of secondary winding 14 relative to that of primary winding 8. In FIG. 1 it has been assumed that the drive takes place simultaneously so that the voltage present across winding 14 has the shape shown in FIG. 2b. This voltage assumes the value n(V i - V o ) in the period δ T and the value -nVo in the period (1 - δ )T, wherein n is the ratio of the number of turns on windings 14 and 8 and wherein V o is maintained constant at nominal mains voltage V o = δ V inom . However, if as a result of an increase or a decrease of the mains voltage V i increases or decreases proportionally therewith, i.e., V i = V i nom + Δ V, the positive portion of V 14 becomes equal to n(V i nom - V o +Δ V) = n [(1 -δ)V i nom +ΔV] = n(0.5 V inom +ΔV) if δ = 0.5 for V i = V i nom. Relatively, this is a variation which is twice as great. For example, if V i nom = 270 V and V o = 135 V, a variation in the mains voltage of from -15 to +10 percent causes a variation of V i of from -40.5 V to +27 V which ranges from -30 to +20 percent of 135 V which is present across winding 8 during the period δ T. The result is that transistor 16 can always be bottomed over a large range of variation. If the signal of FIG. 2b would be applied through a resistor to the base of transistor 16, the base current thereof would have to undergo the same variation while the transistor would already be saturated in case of too low a voltage. In this case it is assumed that transformer 9 is ideal (without loss) and that coil 21 has a small inductance as is explained in the U.S. patent application Ser. No. 737,009 above mentioned. It is therefore found to be desirable to limit the base current of transistor 16.

This may be effected by providing a coil 22 having a large value inductance, approximately 100 μH, between winding 14 and the small coil 21. The variation of said base current i b is shown in FIG. 2c but not to the same scale as the collector current of FIG. 2a. During the conducting interval δ T current i b varies as a linear function of time having a final value of wherein L represents the inductance of coil 22. This not only provides the advantage that this final value is not immediately reached, but it can be shown that variation of this final value as a function of the mains voltage has been reduced, for there applies at nominal mains voltage that: If the mains voltage V i = V i nom +Δ V, then ##SPC1## because V i nom = 2 V o . Thus this variation is equal to that of the mains voltage and is not twice as great.

During switching off, t 2 , of transistor 16 coil 22 must exert no influence and coil 21 must exert influence which is achieved by arranging a diode 23 parallel to coil 22. Furthermore the control circuit of transistor 16 in this example comprises the two diodes 24 and 25 as described in U.S. application Ser. No. 26,497 above referred to, wherein one of these diodes, diode 25 in FIG. 1, must be shunted by a resistor.

The control circuit of transistor 16 may alternatively be formed as is shown in FIG. 4. In fact, it is known that coil 21 may be replaced by the parallel arrangement of a diode 21' and a resistor 21" by which the inverse current can be limited. To separate the path of the inverse current from that of the forward current the parallel arrangement of a the diode 29' and a resistor 29" must then be present. This leads to the circuit arrangement shown in the upper part of FIG. 4. This circuit arrangement may now be simplified if it is noted that diodes 25 and 21' on the one hand and diodes 23 and 29' on the other hand are series-arranged. The result is shown in the lower part of FIG. 4 which, as compared with the circuit arrangement of FIG. 1, employs one coil less and an additional resistor.

FIG. 3 shows possible modifications of the chopper. FIG. 3a shown in a simplified form the circuit arrangement according to FIG. 1 wherein the pulsatory voltage present across the connections of windings 8 has a peak-to-peak amplitude of V i - V o = 0.5 V i for δ = 0.5, As has been stated, the provision of coil 22 gives a relative variation for the base current of transistor 16 which is equal to that of the mains voltage. In the cases according to FIG. 3b, 3c and 3d the peak-to-peak amplitude of the voltage across winding 8 is equal to V i so that the provision of coil 22 results in a relative variation which is equal to half that of the mains voltage which is still more favorable than in the first case.

Transistors of the npn type are used in FIG. 3. If transistors of the pnp type are used, the relevant efficiency diodes must of course be reversed.

In this connection it is to be noted that it is possible to obtain an output voltage V o with the aid of the modifications according to FIGS. 3b, c and d, which voltage is higher than input voltage V i . These modifications may be used in countries such as, for example, the United of America or France where the nominal mains voltage is 117 or 110 V without having to modify the rest of the circuit arrangement.

The above-mentioned remark regarding the sum of the diode currents only applies, however, for the modifications shown in FIGS. 3a and d.

If line output transistor 16 is not simultaneously driven with switching transistor 2, efficiency diodes 7 conducts simultaneously with transistor 16 i.e., during the period which is denoted by δ T in FIGS. 1 and 2b. During that period the output voltage V o of the chopper is stabilized so that the base current of transistor 16 is stabilized without further difficulty. However, a considerable drawback occurs. In FIG. 1 the reference numeral 26 denotes a safety circuit the purpose of which is to safeguard switching transistor 2 when the current supplied to load 11 and/or line deflection circuit 17 becomes to high, which happens because the chopper stops. After a given period output voltage V o is built up again, but gradually which means that the ratio δ is initially small in the order of 0.1. All this is described in U.S. patent No. 3,629,686. The same phenomenon occurs when the display device is switched on. Since δ = 0.1 corresponds to approximately 6 μs when T = 64 μs, efficiency diode 7 conducts in that case for 64 - 6 = 58 μus so that transistor 16 is already switched on at the end of the scan or at a slightly greater ratio δ during the flyback. This would cause an inadmissibly high dissipation. For this reason the simultaneous drive is therefore to be preferred.

The line deflection circuit itself is also safeguarded: in fact, if something goes wrong in the supply, the driver voltage of the line deflection circuit drops out because the switching voltage across the terminals of primary winding 8 is no longer present so that the deflection stops. This particularly happens when switching transistor 2 starts to constitute a short-circuit between emitter and collector with the result that the supply voltage V o for the line deflection circuit in the case of FIG. 1 becomes higher, namely equal to V i . However, the line output transformer is now cut off and is therefore also safe as well as the picture display tube and other parts of the display device which are fed by terminal 15 or the like. However, this only applies to the circuit arrangement according to FIG. 1 or 3a.

Pulse oscillator 6 applies pulses of line frequency to modulator 5. It may be advantageous to have two line frequency generators as already described, to wit pulse oscillator 6 and line oscillator 6' which is present in the picture display device and which is directly synchronized in known manner by line synchronizing pulses 7'. In fact, in this case line oscillator 6' applies a signal of great amplitude and free from interference to pulse oscillator 6. However, it is alternatively possible to combine pulse oscillator 6 and line oscillator 6' in one single oscillator 6" (see FIG. 1) which results in an economy of components. It will be evident that line oscillator 6' and oscillator 6" may alternatively be synchronized indirectly, for example, by means of a phase discriminator. It is to be noted neither pulse oscillator 6, line oscillator 6' and oscillator 6" nor modulator 5 can be fed by the supply described since output voltage V o is still not present when the mains voltage is switched on. Said circuit arrangements must therefore be fed directly from the input terminals. If as described above these circuit arrangements are to be separated from the mains, a small separation transformer can be used whose primary winding is connected between the mains voltage terminals and whose secondary winding is connected to ground at one end and controls a rectifier at the other end.

Capacitor 27 is arranged parallel to efficiency diode 7 so as to reduce the dissipation in switching transistor 2. In fact, if transistor 2 is switched off by the pulsatory control voltage, its collector current decreases and its collector-emitter voltage increases simultaneously so that the dissipated power is not negligible before the collector current has becomes zero. If efficiency diode 7 is shunted by capacitor 27 the increase of the collector-emitter voltage is delayed i.e., this voltage does not assume high values until the collector current has already been reduced. It is true that in that case the dissipation in transistor 2 slightly increases when it is switched on by the pulsatory control voltage but on the other hand since the current flowing through diode 7 has decreased due to the presence of the secondary windings, its inverse current is also reduced when transistor 2 is switched on and hence its dissipation has become smaller. In addition it is advantageous to delay these switching-on and switching-off periods to a slight extent because the switching pulses then contain fewer Fourier components of high frequency which may cause interferences in the picture display device and which may give rise to visible interferences on the screen of the display tube. These interferences occupy a fixed position on the displayed image because the switching frequency is the line frequency which is less disturbing to the viewer. In a practical circuit wherein the line frequency is 15,625 Hz and wherein switching transistor 2 is an experimental type suitable for a maximum of 350 V collector-emitter voltage or 1 A collector current and wherein efficiency diode 7 is of the Philips type BA 148 the capacitance of capacitor 27 is approximately 680 pF whilst the load is 70 W on the primary and 20 W on the secondary side of transformer 9. The collector dissipation upon switching off is 0.3 W (2.5 times smaller than without capacitor 27) and 0.7 W upon switching on.

As is known the so-called pincushion distortion is produced in the picture display tubes having a substantially flat screen and large deflection angles which are currently used. This distortion is especially a problem in color television wherein a raster correction cannot be brought about by magnetic means. The correction of the so-called East-West pincushion distortion i.e., in the horizontal direction on the screen of the picture display tube can be established in an elegant manner with the aid of the circuit arrangement according to the invention. In fact, if the voltage generated by comparison circuit 12 and being applied to modulator 5 for duration-modulating pulsatory voltage 3 is modulated by a parabola voltage 28 of field frequency, pulsatory voltage 3 is also modulated thereby. If the power consumption of the line deflection circuit forms part of the load on the output voltage of the chopper, the signal applied to the line deflection coils is likewise modulated in the same manner. Conditions therefore are that the parabola voltage 28 of field frequency has a polarity such that the envelope of the sawtooth current of line frequency flowing through the line deflection coils has a maximum in the middle of the scan of the field period and that charge capacitor 10 has not too small an impedance for the field frequency. On the other hand the other supply voltages which are generated by the circuit arrangement according to the invention and which might be hampered by this component of field frequency must be smoothed satisfactorily.

A practical embodiment of the described example with the reference numerals given provides an output for the supply of approximately 85 percent at a total load of 90 W, the internal resistance for direct current loads being 1.5 ohms and for pulsatory currents being approximately 10 ohms. In case of a variation of ± 10 percent of the mains voltage, output voltage V o is stable within 0.4 V. Under the nominal circumstances the collector dissipation of switching transistor 2 is approximately 2.5 W.

Since the internal resistance of the supply is so small, it can be used advantageously, for example, at terminal 15 for supplying a class-B audio amplifier which forms part of the display device. Such an amplifier has the known advantages that its dissipation is directly proportional to the amplitude of the sound to be reproduced and that its output is higher than that of a class-A amplifier. On the other hand a class-A amplifier consumes a substantially constant power so that the internal resistance of the supply voltage source is of little importance. However, if this source is highly resistive, the supply voltage is modulated in the case of a class-B amplifier by the audio information when the sound intensity is great which may detrimentally influence other parts of the display device. This drawback is prevented by means of the supply according to the invention.

The 50 Hz ripple voltage which is superimposed on the rectified input voltage V i is compensated by comparison circuit 12 and modulator 5 since this ripple voltage may be considered to be a variation of input voltage V i . A further compensation is obtained by applying a portion of this ripple voltage with suitable polarity to comparison circuit 12. It is then sufficient to have a lower value for the smoothing capacitor which forms part of rectifier circuit 1 (see FIG. 3). The parabola voltage 28 of field frequency originating from the field time base is applied to the same circuit 12 so as to correct the East-West pincushion distortion.



PHILIPS 26C871 CHASSIS K12 (20AX) CONVERGENCE CORRECTION CIRCUIT
 20AX PHILIPS CHASSIS K12
Colour television display apparatus incorporating a television display tube

Colour television display apparatus provided with a display tube in which the electron beams are generated in one plane. The deflection coils are designed in such known manner that the landing points of the beams on the display screen coincide. Owing to tolerance angular errors of the orientation of the plane relative to one direction of deflection convergence errors are produced in the other direction of deflection. They are corrected by means of a magnetic quadripolar field the polar axes of which substantially coincide with the directions of deflection and the field strength of which is a substantially quadratic function of either deflection current or the sum of both functions.


1. Colour television display apparatus incorporating a television display tube having a display screen and two deflection coils for the deflection in two directions of electron beams which are generated in the tube substantially in one plane, a first direction of deflection being substantially parallel to the said plane whilst the second direction of deflection is substantially at right angles to the first direction, the field generated by the deflection coil for deflection in the first direction having a distribution in which its meridional image plane substantially coincides with the screen whilst the field generated by the deflection coil for deflection in the second direction has a distribution in which its sagittal image plane substantially coincides with the screen, the deflection errors due to comma and anisotropic astigmatism being substantially equal to zero, whilst at least one deflection coil is divided into two substantially equal coil halves, characterized in that in order to correct for tolerance angular errors in the orientation of the plane in which the electron beams are generated relative to the first direction of deflection the split deflection coil generates a magnetic quadripolar field the polar axes of which substantially coincide with the directions of deflection and the field strength of which is a substantially quadratic function of the instantaneous strength of the deflection current flowing through at least one deflection coil, and means for clamping the peak of said quadratic field. 2. Apparatus as claimed in claim 1, characterized in that a substantially parabolic correction current which is adjustable in amplitude and in polarity flows in the same direction as the deflection current in one coil half and in the opposite direction in the other coil half and is zero at the middle of the trace interval of the deflection current. 3. Apparatus as claimed in claim 2, in which one direction of deflection is horizontal and the other is vertical, characterized in that a line-frequency correcting current flows through the coil halves of the deflection coil for horizontal deflection and a field-frequency correction current flows through the coil halves of the deflection coil for vertical deflection. 4. Apparatus as claimed in claim 2, characterized in that a sawtooth current supplied by the deflection current generator which produces the deflection current flows through a potentiometer the setting of the slider on which determines the adjustment of the polarity and of the amplitude of the correcting current. 5. Apparatus as claimed in claim 4, in which the deflection current is of field frequency, characterized in that the setting of the slider on the potentiometer also renders symmetrical the deflection fields generated by the coil halves. 6. A display apparatus as claimed in claim 1 wherein said split coil field strength is substantially the sum of quadratic functions of the current flowing through both coils. 7. A color television deflection system for a television display tube having a display screen, said system comprising two deflection coils for the deflection in two directions of electron beams which are generated in the tube substantially in one plane, said first direction of deflection being substantially parallel to the said plane, the second direction of deflection being substantially at right angles to the first direction, the field generated by the deflection coil for deflection in the first direction having a distribution in which its meridional image plane substantially coincides with the screen, the field generated by the deflection coil for deflection in the second direction having a distribution in which its sagittal image plane substantially coincides with the screen, the deflection errors due to comma and anisotropic astigmatism being substantially equal to zero, at least one deflection coil comprising two substantially equal coil halves, means for correcting for tolernace angular errors in the orientation of the plane in which the electron beams are generated relative to the first direction of deflection comprising means for providing that the split deflection coil generates a magnetic quadripolar field the polar axes of which substantially coincide with the directions of deflection and the field strength of which is a substantially quadratic function of the instantaneous strength of the deflection current flowing through at least one deflection coil, and means for clamping the peak of said quadratic field. 8. A deflection system as claimed in claim 7 wherein said split coil field strength is substantially the sum of quadratic functions of the current flowing through both coils.
Description:
The invention relates to a colour television display apparatus incorporating a television display tube having a display screen and two deflection coils for the deflection in two directions of electron beams which are generated in the tube substantially in one plane, a first direction of deflection being substantially parallel to the said plane whilst the second direction of deflection is substantially at right angles to the first direction, the field generated by the deflection coil for deflection in the first direction having a distribution in which its meridional image plane substantially coincides with the screen whilst the field generated by the deflection coil for deflection in the second direction has a distribution in which its sagittal image plane substantially coincides with the screen, the deflection errors due to comma and anisotropic astigmatism being substantially zero, whilst at least one deflection coil is split into two substantially equal coil halves.

Such an apparatus is described by J. Haantjes and G. J. Lubben in "Philips Research Reports", Volume 14, February 1959, pages 65-97 and in U.S. Pat. No. 2,886,125. In this apparatus the landing points of the electron beams on the display screen coincide everywhere, in other words the various beams, which generally are three in number, which intersect the deflection plane along a straight line are imaged as points on the screen. It is assumed that both the construction of the device or devices which generate the beams, for example three cathodes, and the distribution of the deflection fields exactly satisfy the requirements derived in the said paper. In practice, however errors are produced which are due to tolerances so that the images of the beams on the screen are not points but lines which are substantially parallel to the second direction, i.e. convergence errors, for when a point is referred to what is actually meant is that each electron beam strikes a phosphor dot or stripe on the screen to cause it to luminesce in a given colour, the landing points being associated so as to be perceived as a single point. This is no longer the case if the aforementioned straight line, which is the projection of the plane of the three cathodes in the deflection plane, does not exactly coincide with the first direction of deflection but is at an angle thereto. This error is a tolerance error, i.e. it is small, and may be due to a slight misplacement of the cathodes and/or to a slightly incorrect field distribution within the display tube and hence to tolerances in the construction of the deflection coils.

If the first direction of deflection is horizontal and the second one is vertical, the said error entails a convergence error in the vertical direction. The aforementioned straight line in the deflection plane can be made to coincide with the horizontal direction of deflection by rotation. Attempts have been made to cancel the convergence errors due to this rotation by means of a coil which is axially arranged on the neck of the display tube and through which an adjustable direct current flows. The effect of this coil is comparable to that of a focussing coil; it exerts a force on the travelling electrons which causes their paths to be helical, so that some compensation is obtained. It has been found, however, that this solution has the following disadvantages: the residual errors in the corners are increased; the effect on the horizontal and vertical directions are different, so that satisfactory adjustment in both directions is difficult to realise; depending upon the axial position an undesirable influence may occur at the centre of the screen which in turn can be eliminated by the means, for example permanent magnets, provided for static convergence, requiring iterative and hence time-consuming trimming. Furthermore the coil is an expensive component.

The present invention is based on the recognition that the aforementioned convergence errors due to tolerance errors in the construction of the display tube and/or of the deflection coils can be eliminated by means of simple circuits without the need for additional components to be mounted on the neck of the display tube whilst avoiding the aforementioned disadvantages. For this purpose the apparatus according to the invention is characterized in that to correct for tolerance angular errors in the orientation of the plane in which the electron beams are generated relative to the first direction of deflection the split deflection coil generates a magnetic quadripolar field the polar axes of which substantially coincide with the directions of deflection and the field strength of which is a substantially quadratic function of the instantaneous strength of the deflection current flowing through either deflection coil or the sum of both quadratic functions.

It should be mentioned that it is known to use a split deflection coil to generate a quadripolar field the polar axes of which substantially coincide with the directions of deflection. This is described in U. S. Pat. No. 3,440,483 in which, however, the field strength of the quadripolar field is a function of the product of the values of the two deflection currents so that deflection errors due to anisotropic astigmatism can be corrected. In contradistinction thereto the present application described an apparatus having substantially no anistropic astigmatism whilst the quadripolar field generated according to the invention has a field strength which depends upon the value of either deflection current or upon the sum of the squares of the two deflection currents. For the sake of clarity it should be mentioned that in the apparatus according to the said U.S. Patent, in the absence of the correction quadripolar field described, the image of a beam on the screen is a tilted ellipse, whereas in the present application the corresponding image when not corrected is a vertical line.

The known apparatus has some isotropic astigmatism so that the vertical focal lines, i.e. the Meridional focal lines of the horizontal deflection plane and the sagittal focal lines of the vertical deflection plane, coincide with the display screen. Since the imaginary ribbon-shaped beam produced by the three beams together has substantially no dimension in the vertical direction, its image on the screen is a point. In these circumstances the term "isotropic astigmatism" as used herein in actual fact is to be understood to mean that the coefficients which determine the isotropic astigmatism differ from the desired values. Consequently the cross-sectional area on the screen of the imaginary thick beam of circular cross-section in the deflection plane (see FIG. 2 of the said paper in which, however, the three beams are generated in a vertical plane) does not degenerate into a straight line but takes the form of an ellipse the axes of which are parallel to the directions of deflection. Means for correcting such undesirable isotropic astigmatism is described in U.S. patent application Ser. No. 447,564 filed March 4, 1974. In this means a correcting quadripolar field which varies with the square of the strength of either deflection current is generated in the deflection region. However, the axes of said quadripolar field lie substantially along the diagonal between the axes of the deflection directions and the field is generated by separate windings and not by the deflection coil or coils. It should be noted that the apparatus according to the invention also may be subject to this defect which in this case may be corrected in the manner described in the said U.S. patent application. For the sake of simplicity this will be disregarded hereinafter, that is to say the deflection coil will be assumed to have the correct degree of isotropic astigmatism, causing the landing points of the beams on the screen to coincide in one point everywhere but for the abovementioned tolerance error.

In order that the invention may be more readily understood, embodiments thereof will now be described by way of example with reference to the accompanying diagrammatic drawings, in which:

FIG. 1 is a sectional view of a colour television display tube subject to the defect to be corrected,

FIG. 2 shows schematically the ensuring convergence error on the display screen of the tube,

FIGS. 3, 4, 5 and 7 are circuit diagrams of embodiments of correction circuits, and

FIG. 6 is a wave form obtained in the circuit of FIG. 5.

FIG. 1 is a simplified elevation of a cross-section of a colour television display tube 1 taken on the deflection plane at right angles to the axis of the tube in a direction opposite to the direction of propagation of the electron beams, the deflection coils being omitted for simplicity. Three electron beams L, C and R are generated in one plane, the beam C substantially coinciding with the axis of the tube 1 and the beams L and R being located to the left and to the right respectively of the beam C. If the construction of the devices, for example cathodes, which generate the beams and the field distribution within the tube 1 were exactly as desired, the points of intersection of the beams L, C and R with the deflection plane would be a straight line coinciding for example with the X axis, which coincides with the direction of horizontal deflection, the Y axis coinciding with the direction of vertical deflection. However, owing to tolerances the points of intersection lie on a straight line D which is at an angle α to the X axis which it intersects in C.

The paper mentioned in the second paragraph of this application shows that an imaginary thick beam may be considered the cross-section S of which with the plane of deflection is a circle. The line section LCR of FIG. 1 is a diameter of this circle. If the horizontal deflection field has a distribution in which the meridional image plane substantially coincides with the display screen of the tube 1 whilst the vertical deflection field has a distribution in which the sagittal image plane substantially coincides with the screen, and if moreover the deflection errors due to comma and both anisotropic and isotropic astigmatism are substantially equal to zero, all the points on and within the circle S are imaged on vertical line everwhere on the screen. It is supposed that the correct degree of isotropic astigmatism is actually obtained. Otherwise the image of the circle S would be an ellipse the axes of which are parallel to the X and Y axes, i.e. there would be a horizontal convergence error.

In these circumstances the beams L, C and R of FIG. 3 are imaged on the screen 2 of the tube 1 along vertical lines, some of which are shown (in exaggerated form) in FIG. 2, with the exception of the image at the midpoint of the screen, i.e. without deflection, where they coincide. In the ideal case in which the beams L and R of FIG. 1 would lie on the X axis, i.e. with α = 0, in each triplet L', C', R' in FIG. 2 the points L' and R' would coincide with the point C'. Consequently the error angle α results in a vertical convergence error on the screen. In FIG. 1 the beam L lies above the X axis and the beam R beneath the X axis. Because the beams cross within the tube, the points L' and R' in FIG. 2 always lie beneath and above the point C' respectively.

According to the invention a magnetic correction quadripolar field is generated the polar axes of which substantially coincide with the X and Y axes and four lines of force of which are shown in FIG. 1. The quadripolar field does not influence the beam C which is located at the centre of the deflection plane. The beams L and R are subject to forces F L and F R respectively which are superposed on the forces exerted by the deflection fields. FIG. 1 shows that as a result the angle α is effectively reduced to substantially zero so that the convergence error of FIG. 2 is cancelled.

Such a quadripolar field is obtainable by causing an additional current, the difference current, to flow through a deflection coil divided in two coil halves in a manner such that the said current is added to the deflection current in one coil half and subtracted from it in the other coil half. FIG. 2 shows that the convergence errors on the left-hand and right-hand halves of the screen 2 have the same sign and that they have the same sign in the upper and lower halves. Hence it is desirable for the value of the difference current to vary substantially as the square of each deflection. Because initially the value and polarity of the angle α are unknown, the current must be adjustable both in amplitude and in polarity. At the middle of the line and field trace intervals the angle must be zero. For this purpose either one or both deflection coils may be used.

Because the images L', C', R' in FIG. 2 are vertical, i.e. are not tilted, the convergence error to be corrected is to be considered as an isotropic astigmatic deflection error. Hence the line-frequency component of the difference current must be a function of horizontal deflection only and its field-frequency component must be a function of vertical deflection only. Thus it is simpler, but not necessary, to cause the line-frequency component of the difference current to flow through the split deflection coil for horizontal deflection and its field-frequency component to flow through the split deflection coil for vertical deflection.

FIG. 3 shows a simple circuit for generating a line-frequency difference current which satisfies the said requirements. A line deflection current generator 3 at one terminal supplies a line-frequency sawtooth current i H to line deflection coil halves 4' and 4", which in this embodiment are connected in parallel for the current i H . Adjustable coils 5' and 5" of low inductance are connected in series with the coil halves 4' and 4" respectively. The coils 5' and 5" may be adjusted jointly and oppositely so as to eliminate in knwon manner any asymmetry of the deflection fields generated by coil halves 4' and 4". The ends of the coils 5' and 5" not connected to the coil halves 4' and 4" respectively are connected to one another via a potentiometer 6 the slider on which is connected to the other terminal of the generator 3. The resistance of, for example, 4.7 ohms of the potentiometer 6 is low compared with the impedance of the coil halves 4' and 4" for the line repetition frequency. Thus a sawtooth voltage the polarity and amplitude of which depend upon the position of the slider is produced across the potentiometer 6. As a first approximation this voltage may be considered as being produced by a voltage source of low internal impedance. The coil halves 4' and 4" pass a current which is proportioned to the integral of the voltage across the potentiometer 6 and consequently is the required parabolic correction difference current i KH . In one coil half it flows in the same direction as the current i H /2 and in the other coil half it flows in the opposite direction. For this purpose it is required that the position of the slider on the potentiometer 6 should differ from the electric midpoint thereof.

The potentiometer 6 is shunted by the series combination of two resistors 7' and 7" the junction point of which is connected to the anode of a diode 8 the cathode of which is connected to the slider on the potentiometer 6. The diode 8 and the resistors 7' and 7" ensure that the peak of the parabola will be at zero. In actual fact the diode 8 produces a direct current which compensates for the sagging of the parabola, provided that the resistances of the resistors 7' and 7" are equal and have the correct value, for example 8.2 ohms. This direct current also is a difference current and since the diode 8 is connected to the slider on the potentiometer 6 the reversal of its polarity is automatically effected together with that of the parabolic component.

A disadvantage of the circuit of FIG. 3 may be that the obtainable amplitude of the current i KH is limited because the permissible value of the potentiometer 6 is limited, for a comparatively large value of this potentiometer will increase dissipation and give rise to a linearity error of the deflection current whilst the current i KH will no longer be parabolic but will also include higher-order components. The amplitude i KH may be increased without increasing the resistance of the potentiometer 6 by coupling the latter to the remainder of the circuit by means of a transformer. This may be achieved by an autotransformer, as is shown in FIG. 4. Two windings 19' and 19" which are bifilarly wound on the same core and have the polarities shown are connected in series between the ends of the coils 5' and 5" not connected to the coil halves 4' and 4" respectively. The potentiometer 6 is connected between two tappings on the windings 19' and 19" which are symmetrical with respect to the junction point thereof and the potentiometer slider is connected to said junction point via the series combination of the diode 8 and a resistor 7.

In the circuit shown in FIG. 4 the operation of the balancing coils 5' and 5" is not disturbed, provided that the overall inductance value of the windings 19' and 19" between the junction point of the winding 19' and the coil 5' and the junction point between the winding 19" and the coil 5" is small compared with the inductance value of the coil halves 4' and 4" and the coils 5' and 5" measured between the same points. In a practical embodiment of the circuit of FIG. 4 the latter value is 3.55 mH and the former value is 1.25 mH. This means that the effect of the balancing coils 5' and 5" is reduced by only about one third. The tappings on the windings 19' and 19" are provided at the midpoints thereof, the value of the resistor 6 is about 3.3 ohms and that of the resistor 7 about 0.5 ohm. It should be noted that the resistance of the windings 19' and 19" should not be too small, for otherwise the direct component of the difference current would be short-circuited.

FIG. 5 shows a simple circuit for producing a field-frequency difference current in field-frequency deflection coil halves 9' and 9". Since these coil halves are predominantly resistive for the field repetition frequency, the circuits shown in FIGS. 3 and 4 cannot be used. A field deflection current generator 10 supplies a fieldfrequency sawtooth current i V to coil halves 9' and 9" which are connected in series in this embodiment. The series combination of a diode 11', a potentiometer 12' and a second diode 13' and the series combination of a third diode 11", a potentiometer 12" and a fourth diode 13" are connected in parallel with the series combination of the said coil halves, the said four diodes having the polarities shown in FIG. 5. An isolating resistor 14' is connected between the slider on the potentiometer 12' and the junction point of the coil halves 9' and 9", and an isolating resistor 14" is connected between the slider of the potentiometer 12" and the said junction point, the values of the isolating resistors being high relative to the impedance of the coil halves, for example about 100 ohms.

During one half of the field trace interval the current i V flows in the direction shown. Diodes 11' and 13' are conducting whereas diodes 11" and 13" are cutoff. Across the potentiometer 12' a sawtooth voltage is produced so that, if the position of the slider of the potentiometer 12' is different from the electric midpoint of the potentiometer, a sawtooth correction difference current i' KV flows through the coil half 9', for example in a direction opposite to that of the current i V , whilst the coil half 9" passes a sawtooth correction difference current i" KV in the same direction as the current i V , the currents i' KV and i" KV being substantially equal. It should be noted that a difference current, in this embodiment i" KV , flows through a diode, in this embodiment 13', from the cathode to the anode. However, because the elements 9', 9", 11', 12', 13' and 14' form a Wheatstone bridge comprising resistors, the diodes cannot be cut off.

During the other half of the trace interval current i V flows in the other direction. The diodes 11" and 13" are conducting and the diodes 11' and 13' are cut off. Sawtooth difference currents are produced which are derived from the slider on potentiometer 12". In FIG. 6 the variation of the extreme value i KVmax of the difference currents is shown as a function of time, T denoting the field trace interval. At the middle of the interval T these currents are zero, because the current i V and hence the voltage across the potentiometer 12' or 12" respectively are zero. Owing to the voltage drop across the diode the difference currents are zero for a certain time before and after the middle of the interval T. The resulting curves may be regarded as approximate parabolas, for practice has shown that the residual convergence error is negligibly small. Because the difference currents produced are sawtooth currents, the potentiometers 12' and 12" ensure also that the deflection fields generated by the coil halves 9' and 9" are symmetrical. An advantage of the circuit of FIG. 5 is that the adjustments of the upper half and of the lower half are independent of one another, which conduces to clarity. In the embodiment described both potentiometers have a resistance of about 330 ohms.

It will be appreciated that the quadripolar field generated will only be capable of correcting for the vertical convergence error if the angle α is very small. The error introduced by the incorrect position of the line D is compensated for by the quadripolar field according to the invention, it is true, however, at large values of the angle α this field in turn introduces new errors, especially in the corners of the screen. Practice has shown that an angle of from 2° to 3° still can be corrected.

Hereinbefore no statement has been made about the construction of the deflection coils. If they are in the form of saddle coils, no special steps are required. If, however, they are wound toroidally, a step as described in U.S. patent application Ser. No. 390,701 filed August 23, 1973 must be used which consists in the introduction of the difference currents into the deflection coil halves via tappings. In this case the simple circuits of FIGS. 3, 4 and 5 are to be replaced by circuits in which the parabolic difference currents are generated in a different manner, for example by separate generators.

In the embodiments described the coil halves 4' and 4" for horizontal deflection are connected in parallel for the line deflection current i H , whereas the coil halves 9' and 9" for vertical deflection are connected in series for the field deflection current i V . Obviously this is not of importance for the invention and the coil halves may be connected in a different manner. FIG. 7 shows an embodiment in which the coil halves 4' and 4" are connected in series for the current i H . In this embodiment two diodes 8' and 8" are required. It will further be appreciated that the invention may also be applied if the electron beams are generated in a plane of substantially vertical orientation, in which case the convergence error to be corrected is horizontal.




















PHILIPS 26C871 CHASSIS K12 (20AX) UNITS VIEW.

SUPPLY 4822 212 20302 WITH TDA2581Q

MATRIX 3122 133 31460 WITH TDA2771

CHROMA 4822 212 20306 WITH TDA2560 + TDA2523

SOUND 4822 212 20599 WITH TDA2790 + TDA2610

MULTISTABILIZER 4822 212 20304

IF AMPLIFIER 4822 212 20309 TDA2750
3122 133 31490

E/W + 29 /32/225V SUPPLY 4822 212 20305
















SYNCRONIZATION 3122 133 31470 WITH TDA2572

IF DETECTOR 3122 133 30480 WITH TDA2760

FRAME DEFLECTION 20AX 4822 212 20303 WITH TDA2780

TDA2581 CONTROL CIRCUIT FOR SMPS
The TDA2581 is a monolithic integrated circuit for controlling switched-mode power supplies (SMPS) which are provided with the drive for the horizontal deflection stage.
The circuit features the following:
— Voltage controlled horizontal oscillator.
— Phase detector.
— Duty factor control for the positive-going transient of the output signal.
— Duty factor increases from zero to its normal operation value.
— Adjustable maximum duty factor.
- Over-voltage and over-current protection with automatic re-start after switch-off.
— Counting circuit for permanent switch-off when n~times over~current or over-voltage is sensed

-Protection for open-reference voltage.
- Protection for too low supply voltage.
Protection against loop faults.
Positive tracking of duty factor and feedback voltage when the feedback voltage is smaller than the
reference voltage minus 1,5 V.












PHILIPS 26C871 CHASSIS K12 (20AX)
E/W CORRECTION Circuit arrangement in an image display apparatus for (horizontal) line deflection:Line deflection circuit in which the deflection coil is east-west modulated. In order to cancel an east-west dependent horizontal linearity defect the inductance value of the linearity correction coil is made independent of the field frequency, for example by means of a compensating current. In an embodiment this current is supplied by the shunt coil of the east-west modulator.



1. Circuit arrangement for use with a line deflection coil, said circuit comprising a generator means adapted to be coupled to said coil for producing a sawtooth line-deflection current through said line deflection coil, said deflection current having a field-frequency component current, a horizontal linearity correction coil adapted to be coupled in series with said deflection coil and including an inductor having a bias-magnetized core, and means for making the inductance value of the linearity correction coil substantially independent of the field frequency component current. 2. Circuit arrangement as claimed in claim 1, wherein said making means includes a current supply source means for producing a compensating line-frequency sawtooth current through a winding of the linearity correction coil, the amplitude of the compensating current having a field-frequency variation. 3. Circuit arrangement as claimed in claim 2, wherein the direction of curvature of the field-frequency envelope of the compensating current is opposite to the direction of curvature of the field-frequency component current of the line deflection current, whereby the magnetic fields produced in the core of the correction coil by the two currents have the same direction. 4. Circuit arrangement as claimed in claim 2, wherein the direction of curvature of the field-frequency envelope of the compensating current is the same as the direction of curvature of the field-frequency component current of the line deflection current, whereby the magnetic fields produced in the core of the correction coil by the two currents have opposite directions. 5. Circuit arrangement as claimed in claim 2, wherein said correction coil further comprises an additional winding disposed on the core, said additional winding being coupled to said supply source means to receive the compensating current. 6. Circuit arrangement as claimed in claim 5, further comprising modulator means for modulating the line deflection current with said field frequency component, said modulator including a compensation coil coupled in series with said additional winding. 7. Horizontal linearity correction coil comprising a core made of a magnetic material and bias-magnetized by at least one permanent magnet, and an additional winding disposed on the core. 8. Image display apparatus including a circuit arrangement as claimed in claim 1.
Description:
The invention relates to a circuit arrangement in an image display apparatus for (horizontal) line deflection, which apparatus also includes a circuit arrangement for (vertical) field deflection, provided with a generator for generating a sawtooth line-frequency deflecting current through a line deflection coil and with a modulator for field-frequency modulation of this current, the deflection coil being connected in series with a linearity correction coil in the form of an inductor having a bias-magnetized core.
By means of the linearity correction coil the linearity error due to the ohmic resistance of the deflection circuit is corrected. The sign of the bias magnetisation is chosen so that it is cancelled by the deflection current at the beginning of the deflection interval, so that the inductance of the correction coil is a maximum, whereas the voltage drop across the deflection coil then is a minimum. This voltage drop is adjustable by adjustment of the starting inductance of the correction coil. During the deflection interval the core gradually becomes saturated so that the inductance of, and the voltage drop across, the correction coil decrease. Thus the linearity error can be cancelled exactly at the beginning of the interval, that is to say on the left on the screen of the image display tube, and with a certain approximation at other locations.
In image display tubes using a large deflection angle, raster distortion, which generally is pincushion-shaped, of the image displayed occurs. This distortion can be removed in the horizontal direction, the so-called east-west direction, by means of field-frequency modulation of the line deflection current, the envelope in the case of pincushion-shaped distortion being substantially parabolic so that the amplitude of the line deflection current is a maximum at the middle of the field deflection interval.
It was found in practice that the said two corrections are not independent of one another, that is to say the adjustment of the east-west modulation affects horizontal linearity. As long as the modulation depth is not excessive, a satisfactory compromise can be found. However, in display tubes having a deflection angle of 110° and particularly in colour display tubes in which the deflection coils have a converging effect also, it is difficult to find such a compromise. A tube of this type is described in "Philips Research Reports," volume Feb. 14, 1959, pages 65 to 97; the distribution of the deflection field is such that throughout the display screen the landing points of the electron beams coincide without the need for a converging device. Owing to this field distribution, however, the pin-cushion-shaped distortion in the image displayed in the east-west direction is greater than in comparable display tubes of another type. Hence there must be east-west modulation of the line deflection current to a greater depth. It is true that under these conditions horizontal linearity can correctly be adjusted over a given horizontal strip after the east-west modulation has been adjusted correctly, i.e., for a rectangular image, but it is found that in other parts of the display screen a serious linearity error remains. When vertical straight lines are displayed as straight lines in the right-hand part of the screen, they are displayed as curved lines in the left-hand part.
It is an object of the present invention to remove the said defect so that horizontal linearity can satisfactorily be adjusted throughout the screen, and for this purpose the circuit arrangement according to the invention is characterized in that it includes means by which the inductance of the linearity correction coil is made substantially independent of the field frequency.
The invention is based on the recognition that the defect to be removed is due to a field-frequency variation of the said inductance because the latter is current-dependent. According to a further recognition of the invention the circuit arrangement is characterized in that it includes a current supply source for producing a compensating line-frequency sawtooth current through a winding of the linearity correction coil, the amplitude of the current being field-frequency modulated. The circuit arrangement according to the invention may further be characterized in that an additional winding is provided on the core of the linearity correction coil and is traversed by the compensating current. A circuit arrangement in which the modulator for modulating the line deflection current includes a compensation or bridge coil may according to the invention be characterized in that the additional winding is connected in series with the said coil.
The invention also relates to a linearity correction coil for use in a line deflection circuit having a core which is made of a magnetic material and is bias magnetized by at least one permanent magnet, which coil is characterized in that an additional winding is provided on the core.
Embodiments of the invention will now be described by way of example, with reference to the accompanying diagrammatic drawings, in which
FIG. 1 is the circuit diagram of a known circuit arrangement for line deflection in which the line deflection current is east-west modulated,
FIG. 2 shows the distorted image which is displayed on the screen when the circuit arrangement of FIG. 1,
FIG. 3 is a graph explaining the observed defect, and
FIGS. 4 and 7 show embodiments of the circuit arrangement according to the invention by which this defect can be cancelled.
FIG. 1 is a greatl simplified circuit diagram of a line deflection circuit of an image display apparatus, not shown further. The circuit includes the series combination of a line deflection coil L y , a linearity correction coil L and a trace capacitor C t , which series combination is traversed by the line deflection current i y . The collector of an npn switching transistor T r and one end of a choke coil L 1 are connected to a junction point A of a diode D, a capacitor C r and the said series combination. The other end of the choke coil is connected to the positive terminal of a supply voltage source which supplies a substantially constant direct voltage V b and to the negative terminal of which the emitter of transistor Tr is connected. This negative terminal may be connected to earth. The other junction point B of elements D and C r and of the series combination of elements C t , L y and L is connected to one terminal of a modulation source M for east-west correction which has its other terminal connected to earth. Diode D has the pass direction shown in the FIG.
To the base of transistor Tr line-frequency switching pulses are supplied. In known manner the said series combination is connected to the supply voltage source during the deflection interval (the trace time), diode D and transistor Tr conducting alternately. During the retrace time these elements are both cut off. Under these conditions the current i y is a sawtooth current. The coil L, which has a saturable ferrite core which is bias-magnetized by means of at least one permanent magnet, serves to correct the linearity of the current i y during the trace time, whilst the capacitance of the capacitor C t is chosen so that the currenct i y is subjected to what is generally referred to as S correction. During the retrace time, at point A pulses are produced the amplitude of which is much higher than that of the voltage V b and would be constant in the absence of modulation source M. Information from the field deflection circuit, not shown, of the image display apparatus and line retrace pulses, the latter for example by means of a transformer, are supplied in known manner to modulation source M. Amplitude-modulated line retrace pulses having a field-frequency parabolic envelope, as indicated in the FIG., are produced at point B. During the line trace time the voltage at point B is zero. Thus the current i y is given the desired field-frequency modulated form which is also shown in FIG. 1.
The amplitude of the envelope in point B at the beginning and at the end of the field trace time and the amplitude of this envelope at the middle of the said time can both be adjusted so that the image displayed on the display screen of the display tube (not shown) has the correct substantially rectangular form. If, however, the required modulation depth is comparatively large, a linearity error of the line deflection is produced which cannot be removed by means of the correction coil L.
FIG. 2 shows the image of a pattern of vertical straight lines as it is displayed on the screen with the correction coil L adjusted so that horizontal linearity is satisfactory along and near the central horizontal line. In FIG. 2 the defect is exaggerated. It is found that horizontal linearity is defective in other areas of the screen so that the vertical lines are displayed correctly in the right-hand half of the screen but as curves in the left-hand path, the defect increasing as the line is farther to the left.
This phenomenon can be explained with reference to FIG. 3. In this FIG. the inductance L of the linearity correction coil is plotted as a function of the magnetic field strength H. In the absence of current, H has a value H 0 owing to the bias magnetization. If an approximately linear sawtooth current i (t) as shown in the bottom left-hand part of FIG. 3 flows through the coil, the field strength H varies proportionally about the value H 0 , for the mean value of the current is zero. Because the curve of L is not linear, the variation L(t) of L, which is shown in the top right-hand part, is not a linear function of time. The resulting curve may be regarded as composed of a linear component and a substantially parabolic component which is to be taken into account when choosing the capacitance of capacitor C t .
Because owing to the east-west modulation the amplitude of current i(t) varies, the amplitude of L(t) also varies. This implies a field-frequency variation of L which is non-linear. This variation is undesirable. In the case of a small variation of the amplitude of current i(t) the variation of L(t) can be more or less neglected, but this is no longer possible when the amplitude of current i(t) varies greatly owing to the east-west modulation. L(t) varies according to different curves. FIG. 3 shows two of such curves and also illustrates the fact that the undesirable variation of L(t) is greatest at the beginning of the trace time and smallest at the end thereof.
FIG. 4 shows a circuit arrangement in which the defect described can be corrected. On the core of the correction coil L of the circuit of FIG. 1 an additional winding L 2 is provided. Winding L 2 is connected to a current source which produces a compensating current i 2 which has a line-frequency sawtooth variation and a field-frequency amplitude modulation. The envelope here also is parabolic, however, with a shape opposite to that of deflection current i y , that is to say having a minimum at the middle of the field trace time. The direction of current i 2 and the winding sense of winding L 2 relative to that of coil L are chosen so that the magnetic field produced in the core by winding L 2 has the same direction as the field produced by coil L. Hence the two field strengths are added. The amplitude of current i 2 and the turns number of winding L 2 can be chosen so that current i y flows through inductances the total value of which is not dependent upon the field frequency. The curve L(t) of FIG. 3 remains substantially unchanged. Consequently the undesirable field-frequency modulation is removed without variation of the bias magnetization, which would have been varied if current i 2 were a field-frequency current. Obviously the same result can be achieved by a choice such of the direction of current i 2 and of the winding sense of winding L 2 that the two field strengths are subtracted one from the other, whilst the curvature of the envelope of current i 2 has the same direction as that of the envelope of current i y .
The current source of FIG. 4 may be formed in known manner by means of a modulator in which a line-frequency sawtooth signal is field-frequency modulated, the envelope being parabolic. FIG. 5 shows a circuit arrangement in which current i 2 is produced by the modulation source which provides the east-west correction. In FIG. 5, the source M of FIG. 1 comprises a diode D', a coil L' and two capacitors C' r and C' t , which elements constitute a network of the same structure as the network formed by elements D, L y , C r and C t . The capacitor C' t is shunted by a modulation source V m which supplies a field-frequency parabolic voltage having a minimum at the middle of the field trace time.
With the exception of the linearity correction means to be described hereinafter, the circuit arrangement of FIG. 5 was described in more detail in U.S. Pat. No. 3,906,305. Hence it will be sufficient to mention that the capacitances of capacitors C r and C' r and of a capacitor C 1 connected between junction point A and earth and the inductance of coil L' are chosen so that the three sawtooth currents flowing through L y , L' and L 1 have the same retrace time. The capacitances of capacitors C t and C' t , which are large, are ignored. When voltage V b is constant, current i y is subjected to the desired east-west modulation having the form shown in FIG. 1.
Coil L y is connected in series with correction coil L, and winding L 2 is connected in series with coil L'. FIG. 5 shows that the current flowing through winding L 2 has the same waveform as the current i 2 of FIG. 4, for its envelope has the same shape as the voltage supplied by source V m . By a suitable choice of the number of turns of winding L 2 it can be ensured that the linearity correction remains the same for every line during the field trace time.
Modified embodiments of the circuit arrangement of FIG. 5 can also be used. FIG. 6 shows such a modified embodiment in which the capacitive voltage divider C r , C' r of FIG. 5 is replaced by an inductive voltage divider by means of a tapping on coil L 1 . A capacitor C 2 is included between the tapping and the junction point of diodes D and D', whilst capacitor C' t here forms part of two networks C t , L y and C' t , L' traversed by a sawtooth current. In FIG. 6 modulation source V m is connected via a choke coil L 3 to the junction point of D, D', C 2 and C' t . One end of winding L 2 is connected to the junction point of capacitor C' t and the coil L, whilst the other end is connected to earth via coil L'. The capacitances of capacitors C 1 and C 2 and the location of the tapping on coil L 1 are chosen so that the sawtooth currents flowing through L y , and L' and L 1 have the same retrace time, whilst the field-frequency linearity defect of FIg. 2 is cancelled by correctly proportioning winding L 2 .
Other east-west modulators are known in which the step of FIGS. 5 and 6 can be used. An example is the modulator described in the publication by Philips, Electronic Components and Materials: "110° Colour television receiver with A66-140X standard-neck picture tube and DT 1062 multisection saddle yoke," May 1971, pages 19 and 20, which modulator also comprises two diodes and a compensation coil L', which are arranged in a slightly different manner. In another example the east-west modulator and the line deflection generator are included in a bridge circuit whilst they are decoupled from one another by means of a bridge coil which has the same function as coil L' in FIGS. 5 and 6. In these circuit arrangements coil L and winding L 2 may be arranged in the same manner as in FIG. 6. The same applies to an east-west modulator using a transductor the operating winding of which is in series with the deflection coil.
In the abovedescribed embodiments of the circuit arrangement according to the invention the compensating current i 1 is provided by transformer action. In the embodiment of FIG. 7 the current source which supplies the current i 2 is connected in parallel with correction coil L, i.e., without an auxiliary winding. In this embodiment the east-west modulation is achieved not by means of a modulator, but by means of the fact that the supply voltage V b is the super-position of a field-frequency parabolic voltage on the direct voltage. In this known manner the supply source also is the modulator.
It will be seen that in the embodiments of FIGS. 4, 5 and 6 current i 2 counteracts the east-west modulation of deflection current i y . It was found in practice, however, that this counteraction is slight.


PHILIPS 26C871 CHASSIS K12 (20AX) Line oscillator synchronizing circuit:A television receiver having a line synchronizing circuit wherein gate pulses for keying the synchronizing signal are derived from the oscillator signal, the gate pulses being positioned, by means of an auxiliary phase control loop, substantially symmetrical relative to an edge of a reference signal also derived from the oscillator signal. The auxiliary control loop also eliminates the influence of phase variations occurring in the line deflection circuit.



1. A television receiver having a line deflection circuit and a line synchronizing circuit, said line synchronizing circuit comprising a controllable oscillator, a signal derived therefrom being applicable to said line deflection circuit; a pulse generator coupled to said oscillator for deriving pulse-shaped gate signals; a coincidence detector; means for applying said pulse-shaped gate signals and pulse-shaped line synchronizing signals to said coincidence detector; a first phase discriminator coupled to said coincidence detector for determining the phase difference between said line synchronizing signal and a reference signal derived from said oscillator signal; a first low-pass filter for smoothing the output voltage from said first phase discriminator, said controllable oscillator being coupled to said first low-pass filter whereby the output therefrom controls the frequency and/or phase of said controllable oscillator; a second phase discriminator for determining the interval between the center instant of a pulse of said pulse-shaped gate signal and the center instant of an edge occurring in said reference signal; a second low-pass filter for smoothing the output voltage from said second phase discriminator; and means for controlling the center instant of the edge in said reference signal using the output from said second low-pass filter; wherein said line synchronizing circuit further comprises gate means having a first input terminal for receiving the output from said pulse generator and a second input terminal for receiving an output signal from said line deflection circuit, said gate means also having an output terminal for generating the gate pulses for said coincidence detector and said second phase dis
criminator. 2. A television receiver as claimed in claim 1, wherein said controlling means comprises a differential amplifier for amplifying the difference between the second smoothed voltage and a reference voltage, the time position of an edge of the oscillator signal being controllable by the output signal of the differential amplifier. 3. A television receiver as claimed in claim 1, wherein the time constant of the second low-pass filter is at least ten times smaller than the time constant of the first low-pass filter. 4. A television receiver as claimed in claim 1, wherein the gate means comprises an AND-gate, a first input terminal of which is the second input terminal of the gate means and a second input terminal of said AND-gate is supplied with a signal originating from the controllable oscillator, and an OR-gate, a first input terminal of which is the first input terminal of the gate means and a second terminal of said OR-gate is connected to the output terminal of the AND-gate, the output terminal of the OR-gate being the output terminal of the gate means. 5. A television receiver as claimed in claim 1, wherein said line sychronizing circuit further comprises an amplifier for amplfying the first smoothed voltage, the output voltage of which is supplied to the pulse generator. 6. A television receiver as claimed in any of the preceeding claims, wherein said line synchronizing circuit, with the exception of capacitors forming a part of said low-pass filters, is integrated in a semiconductor body.
Description:
BACKGROUND OF THE INVENTION
The invention relates to a television receiver comprising a line synchronizing circuit and also comprising a line deflection circuit, the line synchronizing circuit comprising a controllable oscillator for generating an oscillator signal applicable to the line deflection circuit and being provided with means for applying a pulse-shaped line synchronizing signal and a pulse-shaped gate, which which is derived from the oscillator signal by means of a pulse generator, to a coincidence stage, an output terminal of which is connected to a first phase discriminator for determining the phase difference between the synchronizing signal and a reference signal which is also derived from the oscillator signal, the line synchronizing circuit being further provided with a first low-pass filter for smoothing the output voltage of the first phase discriminator, the frequency and/or phase of the oscillator being controllable by the first smoother voltage thus obtained, with a second phase discriminator for determining the interval between the center instant of a gate pulse and the center instant of an edge occurring in the reference signal, and with a second low-pass filter for smoothing the output voltage of the second phase discriminator, the center instant of said edge being controllable by means of the second smoothed voltage thus obtained. Such a line synchronizing circuit is disclosed in Applicant's Dutch Patent Application No. 7511633 (PHN.8169). In this known circuit a second phase control loop, which comprises the second discriminator and the second low-pass filter ensures that said two instants substantially coincide so that the gate pulses are substantially symmetrical relative to the edge of the reference signal. Consequently, the gate pulses may be of a very short duration, so that the insensitivity to noise is increased. The output signal of the circuit can be applied to the line deflection circuit ensuring that its phase is fixed relative to that of the received line synchronizing pulses.
It may, however, happen that phase variations occur in the line deflection circuit, for example because the turn-off time of a switch, usually a power transistor, present in said circuit is not constant. In order to reinstate the desired fixed phase relation between the deflection and the received synchronizing pulses, it is proposed in said patent application to apply the output signal of the present circuit first to a phase discriminator in which it is compared in known manner to a signal originating from the deflection circuit. This implies a third phase control loop. Consequently, the synchronizing circuit becomes complicated and more difficult to be implemented in integrated form.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a synchronizing circuit comprising only two phase-controlled loops and, to this end, the receiver according to the invention is characterized by a gate having a first input terminal for receivng the output signal of the pulse generator and a second input terminal for receiving an output signal of the line deflection circuit and having an output terminal for applying the gate pulses thus obtained to the coincidence state and to the second phase discriminator.
DESCRIPTION OF THE DRAWINGS
The invention will be further explained by way of non-limitative example with reference to the accompanying figures in which
FIG. 1 shows a block diagram of an implementation of a portion of a television receiver according to the invention and
FIGS. 2 and 3 show wave forms which may be used therein.
In FIG. 1 reference numeral 1 denotes the input terminal of the line synchronizing circuit. Line synchronizing pulses, having the line repetition frequency f H , i.e., for example, 15,625 or 15,750 Hz, are present at the input terminal. These pulses are derived, in known manner in the television receiver, not shown, of which the circuit forms part, from the received signal in a synchronizing-separation stage and are applied to an input terminal of an AND-gate 2. FIG. 2a shows the variation versus the time of these pulses. Herein the symbol T H denotes the line period, i.e. approximately 64 μs.
FIG. 2b shows the variation of gate pulses which are applied to another input terminal of gate 2 and which are generated in the circuit in a manner still to be explained hereafter. FIG. 2b shows each gate pulse symmetrically relative to the center instant t o of the corresponding line synchronising pulse of FIG. 2a. As known this pulse has a duration of, for example, 4.5 to 5 μs. The gate pulses have a somewhat longer duration of, for example, 7.7 μs. The output signal of gate 2 is applied to a controllable switch 3. If the pulses at the inputs of gate 2, as in FIG. 2, occur at least partly simultaneously, then switch 3 is made conductive for the duration of that portion of the line synchronizing pulses.
Switch 3 is supplied with a line frequency reference signal which is generated in a manner still to be explained hereafter and which is shown in FIG. 2c. In the synchronized state it has a falling edge at instant t o and a rising edge at an instant which is, for example, in the center of the time interval between instant t o and the corresponding instant t 1 one cycle later.
In these circumstances the voltage shown in FIG. 2d is present at the output terminal of switch 3. After smoothing by means of a low-pass filter 4, a d.c. voltage is produced which is supplied to a voltage controlled oscillator 5, whose frequency and/or phase is adjusted hereby. Switch 3 behaves as a phase discriminator by means of which the falling edge of the signal of FIG. 2c is adjusted to the center instant t o of the pulse of FIG. 2a. If the frequency of the signal of FIG. 2c deviates from the value f H , then the phase difference between this signal and that of FIG. 2a varies continuously. The control voltage supplied
to oscillator 5 is then an a.c. voltage, namely until the two frequencies are equal again, wherafter the control voltage is a d.c. voltage.
Oscillator 5 is also supplied with a d.c. voltage V o of, for example, 3 V on which the control voltage just mentioned is superimposed. Voltage V o may correspond to the nominal frequency of the line synchronizing pulses in accordance with the television standard for which the television receiver is suited. In the described implementation, however, the signal generated by oscillator 5 has, in the nominal case, a frequency 2f H which is double the line frequency. This signal is applied to a frequency divider circuit 6 in which the frequency is divided by the number of lines per picture in the relevant standard, being, for example, 625 or 525. A field frequency signal of, for example, 50 or 60 Hz, is available at an output terminal of divider circuit 6 in the synchronized state of the line phase-controlled loop, which signal can be applied to a field synchronizing circuit of known type.
The sawtooth signal shown in FIG. 3a is derived from the signal of oscillator 5, the sawtooth signal being applied to a pulse generator 7. By means of a d.c. voltage level V 1 which is applied to generator 7 and which is generated in a manner still to be explained, the sawtooth signal is converted in this generator into a pulse-shaped signal (FIG. 3b). The leading edges of these pulses and the rising edges in FIG. 3a occur simultaneously; while the instant of occurrence of the trailing edges of the pulses is determined by the value of voltage V 1 . These pulses are applied to a frequency dividing circuit 8 which, for example, is a binary divider circuit of known type, for example a master-slave flip-flop. The output signals thereof have the line frequency f H . The signal at an output terminal Q s thereof (see FIG. 3c) changes levels each time a falling edge occurs in the signal of FIG. 3b, while the signal at an output terminal Q m of circuit 8 (see FIG. 3d) changes levels each time a rising edge occurs in the signal of FIG. 3b. This implies that the signal of FIG. 3b is fixed relative to the time axis while the position of the signal of FIG. 3c depends on the value of voltage V 1 .
The signal at terminal Q m is the signal which is applied as a reference signal to switch 3, while the signal at terminal Q s is applied to a pulse shaper 9. The output signal thereof has the variation which is suitable for being applied, possibly via a driver stage, to a line output stage 10. Stage 10 supplies a line frequency current to the deflection coil, not shown, for the horizontal deflection in the picture display tube. Stage 10 comprises a switch usually a power transistor, whose turn-on time is relatively short, while its turn-off time is considerable, namely in the order of 10 μs. This is caused by the fact that the charge carriers, which are present in an excess in the saturated transistor, must first be removed. As known, the turn-off time depends on variations in the load of stage 10, for example the beam current in the picture display tube. In known manner, the adverse influence of such variations can be compensed for, for example by including a phase-controlled loop between oscillator 5 and the output of stage 10, this loop comprising a phase discriminator, a low-pass filter as well as an oscillator or a phase-shifting network. A signal originating from the output of stage 10 is used as a reference signal for this loop. Dutch Patent Application No. 7103465 (PHN.5499) discloses such a phase-controlled loop. A compensation is effected in the circuit of FIG. 1 in a different manner, which will be explained in the further course of this description.
The sawtooth voltage of FIG. 3a is also applied to a pulse generator 11 in which the sawtooth signal is converted into the pulse-shaped signal of FIG. 3e by means of a d.c. voltage V 2 applied thereto. The rising edges thereof occur simultaneously with those of FIG. 3a while the falling edges occur at the instants at which the sawtooth signal attains the value V 2 . In this manner the frequency of these pulses would have the double line frequency 2f H . However, the signal at the terminal Q m of divider circuit 8 is also applied to generator 11, thus, each rising edge of this signal cuts off generator 11. Other line frequency signals, for example line flyback pulses originating from stage 10, can also be used for this same purpose. The pulses obtained are applied to an input terminal of an OR-gate 12.
FIG. 3f shows line flyback pulses present in output stage 10, for example across a winding of a transformer thereof. For simplicity they are depicted as sine-shaped waves. They occur from approximately the instant at which the switch in stage 10 is switched-off, that is to say a time 96 after the occurrence of a falling edge of signal Q s (FIG. 3c) which time τ may be variable, while the duration of these pulses is substantially constant. The pulses of FIG. 3f are applied to an input terminal of an AND-gate 13, while another input terminal is connected to terminal Q m of the frequencies divider 8. The output terminal of gate 13 is connected to an input terminal of gate 12.
From FIGS. 3d and 3f it appears that the output signal of gate 13 has a leading edge from a time τ after the occurrence of a falling edge of signal Q s , and a trailing edge at the instant at which a falling edge of signal Q m occurs. The output signal of gate 12 has a leading edge at the same instant at which the leading edge of the output signal of gate 13 occurs and a trailing edge at the same instant at which the trailing edge of generator 11 occurs. The pulses at the output terminal of gate 12 are shown in FIG. 3g and are the gate pulses of FIG. 2b which are applied to gate 2. The leading edges thereof occur at instants which depend on the delay τ produced in output stage 10, while the instants at which the trailing edges occur depend only on the, optionally adjustable, voltage V 2 . These pulses do not contain any information concerning the signal Q m , in spite of the fact that Q m is one of the input signals of gate 13, which information is, for the rest not necessary. Said input signal is only used for removing the portion of the pulse of FIG. 3f occurring after the falling edge of signal Q m . The same result can be achieved by means of, for example, a bistable multivibrator, the output signal of which has a leading edge at the same instant as the flyback pulse and a trailing edge at the same instant as the signal of generator 11.
A phase discriminator 14, implemented as a controllable switch, is supplied with the reference signal at the output terminal Q m of divider circuit 8 (FIG. 3d) as well as with the gate pulses originating from gate 12. Switch 14 conducts during the occurrence of the gate pulses and its output voltage is smoothed by a low-pass filter 15.
The smoothed voltage obtained, as well as a d.c. voltage V 3 , derived from the supply voltage of the circuit, are supplied to a differential amplifier 16. The output voltage thereof is the voltage V 1 which is supplied to pulse generator 7. As a result thereof the duration of the pulses of FIG. 3b and, consequently, also the position along the time axis of the edges of signal Q s , depend on the value of the smoothed voltage. Elements 7 to 16 inclusive constitute an auxiliary control loop which operates so that each gate pulse of FIG. 3g remains symmetrical relative to the edge of the reference signal of FIG. 3d and, consequently, also relative to the center instant of the synchronizing pulse of FIG. 2a. This determines the duration of the gate pulse. Since, if the duration of the synchronizing pulse is 4.7 μs while the duration of the flyback pulse is 12 μs and if the interval between the starting instant of the flyback pulse (that is to say that of the blanking pulse in the received video signal) and the starting instant of the synchronizing pulse is equal to 1.5 μs, then the period of time between the leading edge in FIG. 2b and instant t o is equal, in the ideal case, to 1.5 +(4.7/2)=3.85 μs. Due to the action of voltage V 2 in stage 11 and of the auxiliary control loop, the trailing edge in FIG. 2b occurs 3.85 μs after instant t o , so that the duration of the gate pulse is 7.7 μs. In practice the pulse will be somewhat longer but it is obvious that, due to this rather short period of time, it is ensured that the sensitivity of the circuit to noise and disturbances is low, which especially holds for disturbances caused by reflection.
The final state of the auxiliary control loop is attained after a time which is independent of the frequency of oscillator 5, while the auxiliary control loop cannot experience an adverse influence from noise and disturbances. The time constant of filter 15 can therefore be chosen at will. Dutch Patent Application No. 7511633 (PHN.8169) describes all this more extensively. Because, however, the variations of delay τ can be rapid, this time constant must be many times smaller, for example ten times as small as that of filter 4.
If the frequency of oscillator 5 varies, for example due to a variation in the supply voltage, or if the frequency of the received line synchronisation pulses varies, for example because a switch-over to another transmitter is effected, the oscillator 4 is so adjusted by the operation of the control loop formed by elements 3 to 8 inclusive that the situation indicated in FIG. 2 occurs. This implies that the waveforms of the FIGS. 3a, 3b, 3c, 3d and 3e are shifted along the time axis until the leading edges of the pulses of FIG. 3a occur at the center instants of the synchronizing pulses of FIG. 2a. In this way it is ensured that also the trailing edges of the pulses of FIG. 3e and, consequently, also those of the gate pulses of FIGS. 3g and 2b are fixed relative to the synchronizing pulses.
If now the delay τ between the falling edge of the signal of FIG. 3c and the starting instant of the flyback pulse of FIG. 3f vary and/or if a shift of the gate pulses of FIG. 3g occurs relative to the reference signal of FIG. 3d as a result of spread in the properties of the various components and/or of inequalities of the transition times in the various transistors etc., then the pulse generator 7 is so adjusted by the operation of auxiliary control loop 7 to 16 inclusive that the situation shown in FIG. 3d occurs. In this situation the input voltage, originating from filter 15, of differential amplifier 16 is substantially equal to the voltage V 3 . Prior to the occurrence of this situation, said voltages deviate from one another, so that voltage V 1 varies. As a result, the position of the trailing edges of the pulses of FIG. 3b and, consequently, also the position of the edges of the signal Q s of FIG. 3 c change. Thus, the signal Q s is shifted along the time axis until the flyback pulses of FIG. 3f are fixed relative to the synchronizing pulses of FIG. 2a. Therefore, it is ensured, by means of the auxiliary control loop, that the influence of variations in time τ are considerably reduced and that the gate pulses shift only a little relative the reference signal, so that they may be of a short duration.
As in the previously mentioned Dutch Patent Application No. 7511633, the d.c. voltage V o , which is supplied to oscillator 5 in the absence of a control voltage originating from filter 4 and cause the oscillator to generate a signal having the nominal frequency, may be derived from the output voltage of filter 15. Also a pulse may be derived from one of the signals of FIG. 2 or FIG. 3, for example the sawtooth signal of FIG. 3a, for keying out the color synchronizing signal, which pulse may also be used for stabilising the black level. A coincidence detector may be used with which it is possible to reinstate the at least partly simultaneous occurrence of the gate pulses and the synchronizing pulses. In the case of non-coincidence, the gate pulses assume a longer duration, or the supply load for the gate pulses to gate 2 is interrupted, while the loop gain of control loop 3 to 8 inclusive is increased. As known, the locking-in property of the loop is improved by means of this switch-over.
As this loop gain cannot be infinitely large, the situation shown in FIG. 2 does not as a rule occur, that is to say there always remains a residual error. This means that the edge of the reference signal of FIG. 2c occurs, in the nominal state, at an instant which slightly deviates from instant t o , so that the voltage supplied to oscillator 5 slightly deviates from the value V o . The circuit of FIG. 1 is improved in this respect.
The control voltage which is supplied to oscillator 5 is also supplied to an amplifier 17. The output voltage thereof is the voltage V 2 which is supplied to pulse generator 11. Amplifier 17 is so dimensioned that the abovementioned error is corrected. If the error is, for example, such that the falling edge of the signal of FIG. 2c occurs somewhat too early relative to instant t o then amplifier 17 must have a gain of such a value and such a sign that voltage V 2 in FIG. 3a increases by a suitable value. This cause the falling edges in FIG. 3e and, consequently, in FIG. 3g to be shifted to the left. Due to the operation of the auxiliary control loop, when the gate pulses of FIG. 3g are substantially symmetrical in the synchronized state relative to instant t o , the rising edges in FIG. 3g are shifted to the right so that the gate pulses are given a shorter duration. The consequence of the outlined shift is that the flyback pulses occur somewhat later than is the case in FIG. 3f, so that also the signal Q s of FIG. 3c is shifted to the right. This means an identical shift of the falling edges of the signal of FIG. 3b and, consequently, a decrease of voltage V 1 . In this manner a small error is introduced in the auxiliary control loop so that the flyback pulses are slightly shifted relative to the reference signal, whose position along the time axis does not depend on voltage V 1 but, as a consequence of which, with a suitable design of amplifier 17, the flyback pulses are fixed relative to the synchronizing pulses. The center instant of a flyback pulse thus occurs at instant t o . A certain value can be assigned to voltage V 2 in the absence of a control voltage at the input terminal of amplifier 17; the duration of the gate pulses is adjusted by this setting. It will be obvious that a similar adjustment can also be applied in the case amplifier 17 is not present.
The foregoing discusses the idealised wave forms of FIGS. 2 and 3. It is obvious that both the leading and trailing edges in, for example, FIG. 2b and the edges in, for example, FIG. 2c have in practice no infinitely steep slope but a kind of sawtooth shape. Consequently, the symmetry aimed at means that the center instants of the pulses in FIG. 2b and of the edges in FIG. 2c occur substantially simultaneously, wherein center instant must be understood to mean in the first-mentioned case the instant located in the center of the time interval between which the signal is higher than half its maximum value and in the second case the instant at which half of the maximum value is achieved.
During the locking-in of the auxiliary control loop the position of the gate pulses varies in the described circuit along the time axis while that of the reference signal remains unchanged. It is clear that an implementation can be realised in which the position of the gate pulses is not affected
by the control, while the position of the reference signal varies.
With the exception of capacitors which are part of filters 4 and 15, the described circuits can be integrated in a semiconductor body. In the preceding the oscillator has in the nominal state double the line frequency. It will be obvious that this is not essential for the invention, that is to say the invention can also be used if the nominal frequency is the line frequency or another multiple thereof.



PHILIPS 26C871 CHASSIS K12 (20AX) PHILIPS TRD (Tuning Remote Digital) Search type tuning system Chassis K12:Dics-Digital Tuning System For TV Receivers" by N.V. Philips' Gloeilampenfabrieken, Netherlands, 2/1977

A wide variety of "search" or "signal seeking" tuning systems for radio and television receivers are known which provide for automatically tuning only those channels which have acceptable reception characteristics and for skipping past thosechannels which have unacceptable reception characteristics. Such tuning systems typically include a number of signal detectors for determining when a received RF carrier has acceptable reception characteristics. For example, a search type tuning systemfor a television receiver may include: an AFT (automatic fine tuning) detector for determining when an IF carrier derived from the received RF carrier has a frequency within a predetermined range of its desired value; and AGC (automatic gain control)detector for determining when the received RF carrier has an amplitude greater than a predetermined value; and a synchronization detector to determine when synchronization pulses derived from the received RF carrier have the proper frequency.

Tuning systems are also known which include a memory having memory locations associated with each channel in a tuning range for storing information as to whether the associated station or channel is preferred or not. Such "memory" type tuningsystems may be utilized as an alternative to the "search" type tuning systems to select only those channels with acceptable reception characteristics in a given location.

Both "search" and "memory" type tuning systems require a considerable amount of complex and expensive circuitry, in addition to the basic tuning system for tuning each channel in a tuning range, for tuning only those channels with acceptablereception characteristics. Thus, there is a need for a tuning system which requires only a relatively small amount of circuitry in addition to the basic tuning system for tuning only channels with acceptable reception characteristics.
The present invention relates to a television set which includes a picture display device, an alpha numerical character generating circuit connected to the said device, a control device and means for checking analogue data relating to the operation of the set, such as volume, brightness and color. The system commonly used on television receivers for tuning into the required channels is the so-called FREQUENCY SYNTHESIZER system. This system, made possible by the advent of integrated circuits, offers a number of advantages over other known systems, such as the conventional potentiometer type MECHANICAL MEMORY systems and the more recent so-called VOLTAGE SYNTHESIZER systems. The frequency synthesizer system is fully electronic enabling any channel to be called up directly by the user who formulates the channel number on a keyboard or other control device. The system usually consists of a quartz-controlled reference oscillator, a phase lock loop, a programmable divider and a computer which supplies the number to be sent to the programmable divider in response to the number of the channel set by the user. Thanks to the phase lock loop, for each channel number set by the user, the frequency of the local oscillator on the set is kept so stable and accurate that the set is tuned with great precision to the corresponding channel signal. For further details concerning frequency synthesizer tuning systems, refer to the article entitled "A Frequency Synthesizer for Television Receivers" by E. G. Breeze, published in the November, 1974 issue of the "Transactions BTR" Magazine, or "Digital Television Tuner Uses MOS LSI and Non Volatile Memory" by L. Penner, published in the April 1, 1976 issue of "Electronics".

The PHILIPS TRD Channel selection is controlled by a frequency synthesizer a sweep of available channels is made by a channel selecting arrangement and this sweep is arranged to be stopped when a signal is received. When the sweeping is stopped a fine tuning arrangement takes control to respond to the frequency of the received signal and to compensate for any drift of that signal.
According to this invention there is provided a receiver comprising frequency synthesizer controlled channel selection means which includes a fine tuning arrangement; means for initiating a sweep of available channels by the channel selection means; means for stopping the sweep on reception of a signal and means, operable on cessation of sweeping and responsive to the frequency of the signal, and arranged to control the fine tuning arrangement to compensate for frequency drift of the signal.
The receiver may be in the form of a television receiver.
The means operable a cessation of sweeping may comprise level detector means arranged to receive a signal whose level is representative of the frequency of the received signal and to provide an output signal when a predetermined frequency drift is detected.
In a preferred form two level comparators are provided each arranged to receive the frequency representative signal and a respective reference level and to provide an output respectively representative of an upward and downward frequency drift exceeding predetermined limits.
The signal whose level is representative of the frequency of the received signal may be provided by automatic frequency control (A.F.C.) means conveniently in the form of an A.F.C. discriminator.
The means operable or cessation of sweeping may be arranged to control the fine tuning arrangement via a signal path which includes means for blocking said signal path until the said signal is received.
The means for blocking may be in the form of gate means connected to the said signal path and arranged to receive a second input a signal indicative of the receipt of the said signal.
The means for initiating a sweep may comprise an operator control coupled to control input means of the channel selection means, and the means for stopping sweeping is operative to isolate the operator control from the said control input means.
The operator may be coupled to the channel selection means via gating means operative to open an operation of the operator control and the means for stopping sweeping may provide a signal operative to block the gating means or receipt of the said signal.
The means for stopping sweeping may include means for detecting the reception of the said signal which in a preferred form of television receiver comprises a sync comparator operative to compare video signals with line flyback signals and to provide an output signal whose level is indicitive of the reception of the said signal.
The frequency synthesizer system lends itself well to a number of different modes of television chanel tuning;
direct selection by formulating the required channel number as described above television channels are numbered: for example, in the European C.C.I.R. standard, V.H.F. band channels are numbered from 2 to 12 and U.H.F. band channels from 21 to 69; in the American Standard, VHF channels are numbered from 2 to 13 and UHF from 14 to 83).
memory selection: each of a certain set of keys corresponds to a preselected and memorised channel;
automatic scanning of all the channels of a given standard, or of all the channels contained in the memory or continuous scanning of all the frequency bands involved.
The first application enables immediate, direct selection of any one of the channels in the relative standard (60 in Europe, 82 in America).
the second enables faster detection of one of a limited number of preferred channels.
The third is a fast, simple way of finding out which standard channels can be received, which channels have been memorised and whether other broadcasting stations exist on non-standard frequencies such as the private broadcasting stations in Italy (there are currently over a hundred operating).

Other References:
Olson et al., "The Practical Application of On-Screen Display to a Television Receiver", IEEE Transactions on Broadcast and TV Receivers, _Aug. 1973, pp. 169-175.
Walker, "For TV Tuners a Digital Look", Electronics, Jun. 26, 1975, pp. 65-66.
Evans et al., "Direct Address Television Tuning and Display System Using Digital MOS Large Scale Integration", IEEE Transactions on Consumer Electronics, vol. CE-22, No. 4, pp. 267-288, Nov. 1976.
Electronics, vol. 48, No. 24, Nov. 27, 1975, "Philips TV Set Indicates Station Tuning and Color Settings on Screen", pp. 6E and 8E.
Werner, "Linear Color Bar Display for CTV Sets", Radio Mentor Electronic, vol. 41, No. 9, pp. 350-351, Sep. 1975.


A)- A television tuning system employs a frequency synthesizer system for establishing the tuning of the receiver. A first programmable frequency divider controlled by a reversible counter is connected between the output of a reference oscillator and a phase comparator to which the output of the local oscillator, after passing through another programmable frequency divider, also is applied. The phase comparator output is a tuning voltage used to control the tuning of the local oscillator. A logic circuit is coupled to sense predetermined relationships of signals from a picture carrier detector, a sound carrier detector, an AFT discriminator circuit, and the presence of vertical synchronization signal components for changing the count in the reversible binary counter to adjust the first programmable frequency divider to compensate for channel frequency offsets which may occur in excess of the pull-in range of the AFT discriminator circuit. To permit operation of the
receiver as a signal seek receiver, a pair of signal seek pushbuttons for the "up" and for the "down" direction, respectively, are provided. Operation of either of these pushbuttons functions in conjunction with further logic circuitry and in conjunction with timing circuitry to automatically step tune the receiver channel-by-channel in the selected direction until a channel with a signal present is sensed by the first logic circuit, whereupon the signal seek circuit operation is disabled until one or the other of the signal seek pushbuttons is reactivated.
1. A frequency synthesizer signal seek tuning system for a tuner of a television receiver capable of receiving a composite television signal, said system including in combination:

reference oscillator means providing a reference signal at a predetermined frequency;

local oscillator means in the tuner providing a variable output frequency in response to the application of a control signal thereto;

a programmable frequency divider having an input coupled to said reference oscillator means for producing an output signal having a frequency which is a programmable fraction of the frequency of the signal applied to the input thereto from saidreference oscillator means;

means coupled to the output of said programmable frequency divider and the output of said local oscillator means for developing a control signal and applying such control signal to said local oscillator means for controlling the frequency ofoperation thereof;

channel selection means coupled to said programmable frequency divider for establishing a predetermined initial programmable fraction therein each time a new channel is selected by said channel selection means;

control means coupled to the output of the tuner of the television receiver and further coupled to said programmable frequency divider for controlling said frequency divider to change the programmable fraction thereof in response to predeterminedconditions of the signals from the tuner; and

signal seek tuning means coupled to said channel selection means and said control means for causing said channel selection means to select a new channel in response to said predetermined conditions of the tuner signals persisting for a predetermined time period.

2. The combination according to claim 1, wherein the composite television signal has at least carrier signal components and synchronizing signal components and further including carrier sensing means coupled to receive at least the carriersignal components of the composite signal from the tuner and providing an output voltage indicative of the tuning of said receiver to a carrier component of said composite signal; and synchronizing signal component sensing means coupled to receive atleast said synchronizing signal components of the composite signal for providing a first predetermined output with synchronizing signal components sensed thereby; wherein said control means is coupled to the outputs of said carrier sensing means andsaid synchronizing signal components sensing means and further coupled to said programmable frequency divider means for changing the programmable fraction thereof in response to first predetermined conditions of signals at the outputs of said carriersensing means and said synchronizing signal components sensing means and the operation of said signal seek tuning means being terminated in response to second predetermined conditions of signals at the outputs of said carrier sensing means and saidsynchronizing signal components sensing means.

3. The combination according to claim 1, further including first and second switches in said signal seek tuning means for initiating a signal seek operation in the "up" and "down" directions, respectively, operation of one of said first andsecond switches causing said channel selection means to select the next channel in the selected direction and establishing said predetermined initial programmable fraction in said programmable frequency divider in response thereto.

4. The combination according to claim 3, wherein said control means terminates operation of said signal seek means in response to detection of second predetermined conditions of the signals from the tuner.

5. The combination according to claim 1, wherein said predetermined conditions of the tuner signals comprise first and second predetermined conditions, respectively; said programmable frequency divider has its input coupled to the output ofsaid reference oscillator means; and wherein said control means includes reversible digital counter means coupled to said programmable frequency divider, and logic circuit means coupled to the output of the tuner for causing said counter means to countin one direction when said first predetermined conditions exist and to count in the opposite direction when said second predetermined conditions exist.

6. The combination according to claim 5, further including additional means coupled to said counter means and coupled to said logic circuit means for inhibiting operation of said signal seek tuning means and for preventing a change in the countof said counter means when third predetermined signal conditions exist in the tuner output.

7. The combination according to claim 6, further including a second programmable frequency divider coupled to the output of said local oscillator means and producing an output signal having a frequency which is a programmable fraction of thefrequency of the signal applied to the input thereto from said local oscillator means; and wherein said channel selection means is further coupled to said second programmable frequency divider for controlling said second programmable frequency dividerto establish the programmable fraction thereof each time a new channel is selected by said channel selection means.

B)- A tuning system for a television receiver includes a local oscillator which is controlled first by a phase lock loop arrangement and then by an AFT discriminator arrangement for tuning the receiver to non-standard as well as standard frequency carriers. The phase lock loop arrangement includes a programmable divider for dividing the local oscillator frequency by a programmable factor corresponding to the presently selected channel. When the local oscillator is being controlled by the AFT discriminator arrangement, the count accumulated by the programmable divider during a reference interval determines how far the local oscillator frequency has drifted from its nominal value. If a predetermined frequency offset has been exceeded, control is returned to phase lock loop control and the programmable factor is incrementally changed.

1. In a system for tuning a television receiver to the various channels a viewer may select, apparatus comprising:

local oscillator means for generating a local oscillator signal;

counter means for generating a frequency divided signal by counting a predetermined number of periods of said local oscillator signal, said predetermined number being proportional to the frequency of said local oscillator signal;

means for generating a reference frequency signal;

phase control means for generating a control signal representing the phase and frequency deviation between said frequency divided signal and said reference frequency signal;

mode switching means for selectively coupling said control signal to said local oscillator means; said mode switching means initially coupling said control signal to said local oscillator means;

said local oscillator means changing the frequency of said local oscillator signal in response to said control signal until said frequency divided signal and said reference frequency signal to be in a predetermined phase and frequency relation;

said counter means accumulating a nominal number of counts during a predetermined portion of said frequency divided signal when said frequency divided signal and said reference signal are in said predetermined phase and frequency relationship;

means for generating a lock signal when said frequency divided signal and said reference frequency signal are in said predetermined phase and frequency relationship;

said mode switching means decoupling said control signal from said local oscillator means in response to said lock signal;

means for generating a count signal when said control signal is decoupled from said local oscillator means, said count signal having a duration with a predetermined time relationship to said reference frequency signal;

means responsive to said count signal for disabling said counter means from counting when said control signal is decoupled from said local oscillator means except during the duration of said count signal; and

means for generating an offset signal representing the deviation between the count accumulated by said counter means during a time interval corresponding to said predetermined portion of said frequency divided signal when said control signal isdecoupled from said local oscillator means and said nominal number of counts, said offset signal being coupled to said mode switching means to control the coupling of said control signal to said local oscillator means.

2. The apparatus recited in claim 1 wherein said means for generating said offset signal includes:

memory means for generating an output signal having a first amplitude when said memory means is set and a second amplitude when said memory means is reset, said output signal being coupled to said mode switching means as said offset signal;

means for resetting said memory means prior to the occurrence of said time interval corresponding to said predetermined portion of said frequency divided signal when said control signal is decoupled from said local oscillator means;

means for setting said memory means if the count accumulated by said counter during said time interval corresponding to said predetermined portion of said frequency divided signal when said control signal is decoupled from said local oscillatormeans is less than said nominal number of counts by a first predetermined deviation; and

means for resetting said memory means if the count accumulated by said counter means during said time interval corresponding to said predetermined portion of said frequency divided signal when said control signal is decoupled from said localoscillator means is greater than said nominal number of counts by a second predetermined deviation.

3. The apparatus recited in claim 1 wherein said counter means derives said frequency divided signal by counting a first number of periods during a first portion of said frequency divided signal and by counting a second number of periods duringa second portion of said frequency divided signal.

4. The apparatus recited in claim 3 wherein the various channels a viewer may select are partitioned into frequency bands, said first number is related to the channel selected by a viewer and said second number is related to the frequency bandin which the selected channel resides.

5. The apparatus recited in claim 4 wherein said predetermined portion is at least a part of said second portion.

6. The apparatus recited in claim 5 wherein said counter includes:

variable modulus frequency divider means for selectively dividing the frequency of said local oscillator signal by a first factor or a second factor, said first factor being related to the frequency spacing between channels in at least one ofsaid bands;

decade counter means for counting periods of the output signal of said variable modulus frequency divider;

channel number comparator means for generating a channel match signal when the number of periods counted by said decade counter means equals said first number, said decade counter means being reset in response to said channel match signal;

first factor stop comparator means for generating a first factor stop signal when the number of periods counted by said decade counter means equals a third number, said third number being also related to the band in which the selected channelresides but less than said second number, said variable modulus divider means being caused to divide by said second factor in response to said first factor stop signal; and

added count comparator means for generating an added count match signal when the number of periods counted by said decade counter means equals said second number, said decade counter means being reset in response to said added count match signal,said variable modulus divider means being caused to divide by said first factor in response to said added count match signal.

7. The apparatus recited in claim 6 wherein said nominal number of counts equals said second number.

8. The apparatus recited in claim 7 wherein said means for generating said offset signal includes means for resetting at least said decade counter means and for causing said variable modulus divider to divide by said first factor in response tothe initiation of said count signal.

9. The apparatus recited in claim 7 wherein said means for generating said offset signal includes:

memory means for generating an output signal when said memory means is set and a second amplitude when said memory means is reset, said output signal being coupled to said mode switching means as said offset signal;

means for resetting said memory means prior to the occurrence of said first factor stop signal during the duration of said count signal when said control signal is decoupled from said local oscillator;

means for inhibiting the generation of said added count signal when said control signal is decoupled from said local oscillator;

means for setting said memory means if the count accumulated by said counter means after said first factor stop signal when said control signal is decoupled from said local oscillator means is less than said second number by a first predetermineddeviation; and

means for resetting said memory means if the count accumulated by said counter means after said first factor stop signal when said control signal is decoupled from said local oscillator means is greater than said second number by a secondpredetermined deviation.

10. The apparatus recited in claim 9 wherein said means for generating said offset signal includes means for repetitively generating said offset signal.

11. The apparatus recited in claim 1 wherein said means for disabling said counter means includes input switching means for selectively decoupling said local oscillator signal from said counter means when said control signal is decoupled fromsaid local oscillator means except in response to said count signal; and

said counter means includes means for generating an illegal signal when an illegal channel has been selected;

said input switching means also decoupling said local oscillator signal from said counter means in response to said illegal signal.

12. The apparatus recited in claim 11 wherein:

said means for generating said illegal signal includes band selection means for generating a band traversed signal whenever the count accumulated by said counter corresponds to the boundary of a band and means for generating a band signalrepresenting the band in which the selected channel resides in accordance with which of said band traversed signals have been generated during said first portion of said frequency divided signal, said means for generating a band signal generating saidillegal signal when a band signal is not generated.

13. The apparatus recited in claim 11 wherein said means for generating said reference frequency also includes means for deriving a signal having a predetermined frequency; and said input means includes means for coupling said signal having apredetermined frequency to said counter means in response to said illegal signal.
Description: The present invention pertains to television tuning systems including a phase locked loop frequency synthesizerand particularly pertains to frequency counters which may be utilized in such systems.

In concurrently filed U.S. patent application Ser. No. 70,849, and now U.S. Pat. No. 4,031,549 by Henderson et al., assigned to the same assignee as the present invention, there is described a tuning device system for a television receiverwhich includes a phase locked loop for tuning a local oscilator to the nominal local oscillator frequencies required to tune the receiver to RF carriers at standard broadcast frequencies allocated to the various channels a viewer may select. The tuningsystem also includes an automatic fine tuning (AFT) frequency discriminator for tuning the local oscillator to minimize any deviation between the frequency of an actual picture carrier and the nominal picture carrier frequency. If the receiver iscoupled to a television distribution system which provides RF carriers having nonstandard frequencies arbitrarily near respective ones of the standard broadcast frequencies, when the phase locked loop has achieved lock at a nominal frequency, a modecontrol unit selectively couples the discriminator and a frequency drift control circuit to the local oscillator. If the frequency of the local oscillator drifts more than a predetermined offset from the frequency synthesized under phase locked loopcontrol because no carrier has been detected by the discriminator, discriminator and drift control are terminated so that the receiver will not be tuned to an undesired carrier such as, for example, the lower adjacent channel sound carrier, and phaselocked loop control is reinitiated to synthesize a local oscillator signal having a frequency incremented from the frequency of the originally synthesized local oscillator signal by a predetermined amount. After the phase locked loop is locked at anincremented frequency, discriminator control is again initiated. If, during this cycle of discriminator control, the local oscillator again drifts more than the predetermined offset from the incremented local oscillator frequency because no carrier isdetected by the discriminator, phase locked loop control is again reinitiated to synthesize a local oscillator signal having a frequency decremented from the frequency of the originally synthesized local oscillator signal by a predetermined amount. Ifduring any discriminator control cycle the local oscillator has not drifted further than the predetermined offset because the discriminator has tuned the local oscillator to a carrier within the predetermined offset, phase locked loop control is notreinitiated and the tuning sequence is complete.

In order to reduce the complexity, and therefore the cost, of an implementation of such a tuning system, it is desirable that individual potions of the system be capable of performing more than one function. For example, in copending UnitedStates Patent Application Ser. No. 663,097 filed for R. M. Rast on Feb. 27, 1976, and now U.S. Pat. No. 4,009,439 and assigned to the same assignee as the present invention, which is hereby incorporated by reference, there is described a frequencydivider for a television tuning phase locked loop tuning system. For each channel a viewer selects, the divider divides the frequency of the local oscillator signal by a number proportional to the nominal local oscillator frequency by forming a signalincluding first and second portions having durations respectively equal to first and second numbers of periods of the local oscillator signal. The first number is related to the selected channel number. The second number is related to the frequencyband in which the selected channel resides. To generate signals including in which band the selected channel resides for use in the phase locked loop itself and in the local oscillator to control its frequency range, a band selection unit is included asan integral part of the divider.

In accordance with the present invention, a programmable counter which may be used, for example, in a phase locked loop portion of a tuning system of the type decribed in the concurrently filed Henderson et al. application referenced above todivide the frequency of the local oscillator by a number proportional to the nominal local oscillator frequency for a selected channel is arranged so that it may also serve to generate a signal indicating whether or not the frequency of the localoscillator has drifted beyond a predetermined frequency offset after phase locked loop control of the local oscillator has been terminated. When the local oscillator is under phase locked loop control, the programmable counter accumulates a nominalnumber of counts during a predetermined portion of its output signal. Means are provided for generating a count signal after phase locked loop control of the local oscillator has been terminated. The count signal has a duration with a predeterminedtime relationship to a reference signal to which the local oscillator signal is locked when the local oscillator is under phase locked loop control. The counter is disabled from counting when the local oscillator is not under phase locked loop controlexcept during the duration of the count signal. Offset detection means, in response to the count signal, generates an offset signal representing the deviation between the count accumulated during a time interval corresponding to the predeterminedportion after phase locked loop control of the local oscillator has been terminated to determine how far the frequency of the local oscillator has drifted from the frequency synthesized under phase locked loop control.





C)- A tuning system for a television receiver includes a phase locked loop (PLL) configuration and an automatic fine tuning (AFT) configuration which are selectively enabled to operate to tune the receiver to nonstandard as well as standard frequency RF carriers which may be provided by cable and master antenna systems. After the selection of a new channel, the operations of the PLL and AFT configurations are sequentially enabled by a mode control apparatus. During the operation of the AFT configuration, an offset detector determines when the frequency of the local oscillator signal is caused to be more than a predetermined offset from its value established during the previous operation of the PLL configuration. In response, the mode control unit reestablishes the operation of the PLL configuration. Channel selection apparatus causes a new channel to be selected after a predetermined number of alternate operating cycles of the two configurations.

1. Apparatus for selectively tuning a receiver to any one of a plurality of RF carriers associated with respective channels, comprising:
local oscillator means for generating a local oscillator signal;
mixer means for combining a selected one of said RF carriers with said local oscillator signal to derive an IF signal having at least one carrier with a nominal frequency value;
phase locked loop (PLL) means for selectively controlling said local oscillator means when enabled to operate to cause said local oscillator signal to have a programmed frequency substantially equal to the product of a programmable factor and the frequency of a frequency reference signal;
programmable fac
tor control means for determining programmable factor in accordance with the channel selected and for generating a CHANGE signal when a new channel is selected;
lock means for generating a LOCK signal when said local oscillator signal has a frequency substantially equal to said programmed frequency;
automatic fine tuning (AFT) means for selectively controlling said local oscillator means when enabled to operate to reduce a deviation between the actual frequency of said IF carrier and said nominal frequency value;
offset detector means for generating an OFFSET signal when the frequency of said local oscillator signal is caused to be offset from said programmed frequency by a predetermined amount during the operation of said AFT means;
mode control means for enabling the operation of said PLL means in response to said CHANGE signal, for enabling the operation of said AFT means in response to said LOCK signal and for again enabling the operation of said PLL means in response to said OFFSET signal; and
channel selection means for causing said programmable factor control means to select the programmable factor associated with the next channel when said OFFSET signal is generated a predetermined number of times.
2. The appara
tus recited in claim 1 wherein:
said predetermined number of times is equal to one.
3. The apparatus recited in claim 1 wherein:
said programmable factor control means is coupled to counter means for counting the number of times said OFFSET signal is generated to change said programmable factor by an increment less than the difference between programmable factors associated with respective adjacent channels when said OFFSET signal is generated a second predetermined number of times less than said first mentioned predetermined number of times; and
said channel selection means is also coupled to said counter means for causing said programmable factor control means to select the programmable factor associated with the next channel when said OFFSET signal is generated said first mentioned predetermined number of times.
4. The apparatus recited in claim 3 wherein:
said programmable factor control means increases said programmable factor by said increment in response to a first generation of said OFFSET signal and decreases said programmable factor by said increment in response to a second generation of said OFFSET signal and changes said programmable factor to the value associated with the next channel in response to a third generation of said OFFSET signal.
5. The apparatus recited in claim 4 wherein:
said programmable factor control means includes inhibiting means for inhibiting said programmable factor control means from changing said programmable factor to the value in response to said OFFSET signal after a predetermined time longer than the time required to tune said receiver to a selected channel.
Description:
BACKGROUND OF THE PRESENT INVENTION
The present invention relates to search type tuning systems.
A wide variety of "search" or "signal seeking" tuning systems for radio and television receivers are known which provide for automatically tuning only those channels which have acceptable reception characteristics and for skipping past those channels which have unacceptable reception characteristics. Such tuning systems typically include a number of signal detectors for determining when a received RF carrier has acceptable reception characteristics. For example, a search type tuning system for a television receiver may include: an AFT (automatic fine tuning) detector for determining when an IF carrier derived from the received RF carrier has a frequency within a predetermined range of its desired value; and AGC (automatic gain control) detector for determining when the received RF carrier has an amplitude greater than a predetermined value; and a synchronization detector to determine when synchronization pulses derived from the received RF carrier have the proper frequency.
Tuning systems are also known which include a memory having memory locations associated with each channel in a tuning range for storing information as to whether the associated station or channel is preferred or not. Such "memory" type tuning systems may be utilized as an alternative to the "search" type tuning systems to select only those channels with acceptable reception characteristics in a given location.
Both "search" and "memory" type tuning systems require a considerable amount of complex and expensive circuitry, in addition to the basic tuning system for tuning each channel in a tuning range, for tuning only those channels with acceptable reception characteristics. Thus, there is a need for a tuning system which requires only a relatively small amount of circuitry in addition to the basic tuning system for tuning only channels with acceptable reception characteristics.
SUMMARY OF THE PRESENT INVENTION
The present invention is an improvement to the type of electronic tuning system which includes first tuning means for tuning a tuner to standard frequencies associated with respective channels, second tuning means for tuning the tuner to reduce deviations between the frequency of an IF carrier generated by the tuner and its desired or nominal value that may arise due to, e.g., offsets in the frequencies of received RF carriers, and mode switching means for selectively applying the first and second tuning control signals to the tuner. In this type of electronic tuning system, the operation of the first tuning means is enabled after a new channel is selected and the operation of the second tuning means is enabled after the first tuning means has completed its operation. During the operation of the second tuning means, an offset detector determines when the frequency of a local oscillator signal generated by the tuner becomes offset from value established during the operation of the first tuning means and causes the operation of the first tuning means to again be enabled.
In accordance with the present invention, search means are provided in the above described type of electronic tuning system for causing a new channel to be selected if no RF carrier is tuned by the end of a predetermined number of operating cycles of the second tuning means.


PHILIPS 26C871 CHASSIS K12 (20AX) RGB HYBRID AMPLIFIER 4822 212 20307 3122 128 58455 CUT-OFF BEAM CONTROL CIRCUIT.























The RGB Amplifier in the chassis PHILIPS K12 is operating on the G1 instead on katode in conventional schemes.

These are realized with HYBRID IC'S technology and they're in ceramic substrate.


PHILIPS CHASSIS K12 (20AX) CRT TUBE RGB AMPLIFIER DETAIL RGB HYBRID AMPLIFIER 4822 212 20307 3122 128 58455


PHILIPS 26C871 CHASSIS K12 (20AX) Hybrid RGB Amplifiers on CRT Socket.
Driving directly: G1 blue G1 red G1 green.Hybrid IC Technology on Ceramic substrate.



On a ceramic substrate, spiral-type inductors of a single layer wiring of a metal thin film are provided and respectively connected to a wiring pattern formed on another face of the substrate via through holes. A semiconductor chip is flip-chip mounted on the substrate in a face-down manner. On the face of the semiconductor chip, capacitors composed of a highly dielectric material, resistors formed by an ion implantation method or a thin-film forming method, and FETs are provided, respectively. Interconnection between the substrate and an external circuit board is achieved employing terminals formed at end faces of the substrate. The terminals have a concave shape with respect to the end face of the substrate. Thus, there is no need to use a package, and miniaturization and reduction in cost of a high-performance hybrid IC is achieved.

1. A hybrid IC comprising:
a substrate including a front face, a back face opposite the front face, and side faces interposed between the front face and the back face which define an outer perimeter of the substrate;
at least one inductor formed on at least one of the front face and the back face of the substrate;
a semiconductor chip mounted on the front face of the substrate by flip-chip bonding;
at least one terminal formed in a predetermined portion of the side faces of the substrate,
wherein the semiconductor chip comprises a plurality of circuit elements provided therein, at least one of the plurality of circuit elements being an MIM capacitor having a metal-insulation film-metal (MIM) structure, the insulation film being composed of a highly dielectric material.


2. A hybrid IC according to claim 1 further comprising at least one matching circuit for matching an input signal to the circuit elements provided inside the semiconductor chip, the matching circuit comprising at least one inductor.

3. A hybrid IC according to claim 2, wherein a wiring pattern is formed of a single metal layer on both the front and back faces of the substrate, the wiring patterns on the respective front and back faces of the substrate being interconnected with each other via through holes, and the at least one inductor comprised in the matching circuit is formed in the wiring pattern on one of the respective front and back faces of the substrate.

4. A hybrid IC according to claim 2, wherein the matching circuit is constituted only by inductors and comprises at least one serial inductor and at least one parallel inductor.

5. A hybrid IC according to claim 4, wherein the parallel inductor comprised in the matching circuit is a spiral-type inductor, outermost wiring of the spiral-type inductor being grounded.

6. A hybrid IC according to claim 2, wherein the inductors comprised in the matching circuit are a spiral-type inductor or a meander-type inductor.

7. A hybrid IC according to claim 2, wherein the matching circuit comprises an inductor and a capacitor, the capacitor being formed inside the semiconductor chip.

8. A hybrid IC according to claim 7, wherein the inductor comprised in the matching circuit is a spiral-type inductor or a meander-type inductor.

9. A hybrid IC according to claim 1, wherein the at least one terminal includes at least an RF terminal functioning as an input terminal for an RF signal, an LO terminal functioning as an input terminal for an LO signal, an IF terminal functioning as an output terminal for an IF signal, a ground terminal, and a supply terminal.


---------------------------------------

HERE BELOW A DETAILED DESCRIPTION OF THE PHILIPS CHASSIS K12 CRT DRIVING TECHNOLOGY:

PHILIPS 26C871 CHASSIS K12 (20AX) PHILIPS CHASSIS K12 Automatic gray scale control circuit for a color television receiver

The present invention relates to a novel automatic gray scale control circuit for a color television receiver. The circuit senses the cut-off voltage of each gun during the blanking interval, and uses a voltage equal to the cut-off voltage to energize the driver and bias the gun during the video field. The effect is to standardize the emission of each of the three guns against variation in gun cut-off voltage and to produce improved gray scale accuracy at the lowest emission levels. Since the gray scale adjustment is optimized at the lowest emission levels, where the eye is most intolerant to error in hue, one may avoid the need for manual adjustment of the cut-off point, and in cases where the gain does not vary widely from gun to gun, avoid the need for separate gain adjustment. Thus, the circuit may be used either to simplify or eliminate the color set up process at the factory when the receiver is manufactured. It may also reduce or avoid the need for readjustment after periods of use.
PHILIPS CHASSIS K12 CRT Beam current control apparatus:
PHILIPS 26C871 CHASSIS K12 (20AX) Introducing beam current control:

In a television picture display device wherein a cathode of a picture display tube is driven by an emitter-follower and a control signal for a beam current reference level control circuit is obtained from the collector circuit of this emitter-follower, measures are taken to compensate for leakage currents from and to the cathode. To this end a blacker-than-black current compensation circuit is provided while furthermore it is ensured that the blacker-than-black curent can be processed by the beam current reference level control circuit.




1. A television picture display device for displaying pictures derived from video signals, said display device comprising a picture display tube having a cathode; an emitter-follower device coupled to said cathode for producing a beam current for driving said picture display tube; a beam current reference level control circuit coupled to said emitter-follower device for controlling the black level of the beam current; a blacker-than-black current compensation circuit incorporated in said beam current reference level control circuit for compensating for a leakage current in said cathode caused by a blacker-than-black level in the video signal; and a blacker-than-black current conduction circuit coupled to said cathode to enable compensation of said leakage current when said beam current is blanked.

2. A television picture display device as claimed in claim 1, wherein the blacker-than-black current conduction circuit comprises a direct current source coupled to the cathode of the picture display tube for keeping said emitter-follower device conductive at the occurrence of a blacker-than-black current in the cathode circuit of the picture display tube thereby allowing for the compensation of said blacker-than-black signal.



3. A television picture display device as claimed in claim 2, wherein the direct current source comprises a first and second resistor serially connected to a supply voltage said first resistor being a.c. coupled to the base of the emitter-follower device.

4. A television picture display device as claimed in claim 1, which further comprises a second emitter-follower device, of an opposite conduction type as said first-mentioned emitter-follower device, also coupled to said picture display tube cathode, and wherein said blacker-than-black current conduction circuit comprises a difference-forming circuit, coupled to the collector of the second emitter-follower device and coupled to an input of said beam current reference level control circuit.

5. A television picture display device as claimed in claim 4, wherein said difference-forming circuit comprises a current mirror circuit having an input and an output, the input of which is coupled to the collector of the second emitter-follower device and the output to the collector of the first-mentioned emitter-follower device.

6. A television picture display device as claimed in claims 2, 3, 4, 5 or 1, which further comprises a heater, a wehnelt electrode connection of the picture display tube and a leakage current conducting circuit, said heater and said wehnelt electrode connection being coupled to the collector of the first-mentioned emitter-follower device through a said leakage current conducting circuit.

Description:
BACKGROUND OF THE INVENTION
The invention relates to a television picture display device having a picture display tube, a cathode of which is driveable by an emitter-follower, the collector of this emitter-follower being coupled to an input of a beam current reference level control circuit.
Dutch Patent Application No. 7604463 discloses a television picture display device of the above-defined type. In this device a control of the black level, serving as the reference level, of the beam current, to a constant value takes inter alia place by means of a voltage produced across the collector resistor of the emitter-follower. Although in principle this control should furnish a very constant black level this appears not to be the case.
SUMMARY OF THE INVENTION
It is an object of the invention to improve the constancy of the controlled reference level of the beam current.
A television picture display device of the above-defined type according to the invention is therefore characterized in that the beam current reference level control circuit comprises a blacker-than-black current compensation circuit by which the influence of the blacker-than-black current on the beam current reference level control circuit is compensated for while a blacker-than-black current conductive circuit is coupled to the cathode of the picture display tube so that the beam current reference level control circuit can also process a blacker-than-black current of the picture display tube occurring in case of a blanked beam current.
It should be noted that the use of a blacker-than-black current compensation circuit in a beam current reference level control circuit is known per se from the Dutch Patent Application No. 6903362. In that case, however, the picture display tube is controlled via the wehnelt electrode. When picture display devices to which the invention relates are controlled via the cathode, a blacker-than-black current compensation appears to be impossible without further measures. Applicants found, namely, that the cathode current of the picture display tube, in the case of a blanked beam current, may have a direction which may cut off the emitter-follower so that no measuring data about the collector resistance of the emitter-follower become available, and a blacker-than-black current compensation is not possible. By coupling a blacker-than-black current conduction circuit to the cathode of the picture display tube in such a manner that also the blacker-than-black current, occurring with a blanked beam current, can be processed by the beam current reference level control circuit, a blacker-than-black current compensation is possible. The blacker-than-black current conduction circuit may be a circuit supplying a constant direct current to the cathode of the picture display tube which ensures that the emitter-follower cannot be cut off if the picture display tube, in the case of a suppressed beam current, carries a cathode current which might cut off the emitter-follower, or a circuit which can take over the blacker-than-black current from the emitter-follower and pass it on to the beam current reference level control circuit.
DESCRIPTION OF THE DRAWINGS
The invention will now be further explained with reference to the drawing.
In the drawing
FIG. 1 shows a circuit of a picture display device according to the invention in which the emitter-follower can be kept conductive by means of a direct current and

FIG. 2 shows a further circuit of a picture display device according to the invention in which the emitter-follower current can be taken over by another circuit and passed to a control circuit.
DESCRIPTION OF THE PREFERRED EMBODIMENT
In FIG. 1 a video signal is applied to an input of an adder circuit 3. A control signal originating from an output 7 of a beam current reference level control circuit 9 appears at a further input 5 of the adder circuit 3. This control signal is added to the video signal and the sum signal is applied to the base of an emitter-follower 13 via an amplifier 11.
The emitter of the emitter-follower 13 drives a cathode of a picture display tube 14. The collector circuit of the emitter-follower 13 comprises a resistor 15, an end of which is connected to an input 17 of the beam current reference level control circuit 9. The beam current supplied by the emitter-follower 13 flows through this resistor 15.
The input 17 is, at the same time, the input of an amplifier 19, an output 21 of which is connected to an input 25 of an amplifier 27 via a switch 23. A capacitor 29 is also connected to the input 25. The switch 23 closes periodically under the influence of a signal derived from an output 31 of a switching signal generator 33 during the occurrence of the reference level, for example the black level, in the video signal.
Consequently a voltage, which is a measure of the cathode current of the picture display tube 14 during the occurrence of the reference level, is produced across the capacitor 29. This cathode current is composed of a beam current and a leakage current. To compensate for the influence of this leakage current, a switch 35, which is also connected to the output 21 of the amplifier 19, is periodically closed during the occurrence of a blacker-than-black level in the video signal, under the influence of a signal originating from an output 37 of the switching signal generator 33.
The switching signal generator 33 is synchronized with the video signal by a synchronisation signal, applied to an input 39 thereof, obtained from the video signal.
A capacitor 41, connected to the output of the switch 35, now has a voltage there across which is a measure of the leakage current of the cathode of the picture display tube 14. This voltage is supplied to an input 43 of the amplifier 27. The amplifier 27 amplifies the difference of the voltages across the capacitors 29 and 41 so that a control signal is produced at the output 7 thereof which is a measure of the beam current of the picture display tube during the occurrence of the reference level in the video signal. This control signal counteracts changes in the beam current reference level which corresponds to the video signal reference level.
The leakage current of the picture display tube 14 may sometimes be directed towards the cathode of that tube. In that case the emitter-follower 13 would be cut off and the leakage current could not be measured in the above described manner. Therefore a direct current is supplied to the emitter-follower 13 via two resistors 45, 47, which are connected to a positive supply voltage which may be in the order of approximately 40 μA. This direct current keeps the emitter-follower 13 in the conducting state thereof.
To enable also a compensation of this direct current in the the blacker-than-black compensation circuit, constituted by the switch 35, the capacitor 41 and the difference formation in the amplifier 27, the value of this direct current must not be dependent on the video signal. Therefore this video signal is applied, via a capacitor 49, to the junction of the resistors 45, 47 so that the voltage across the resistor 45 becomes independent of the video signal.
A second emitter-follower 51, which is also driven by a video signal, is also connected to the cathode of the picture display tube 14. The function of this second emitter-follower 51 is to enable a sufficiently rapid change of the charge of the cathode capacitance in the case of positive-going voltage transients in the video signal. This second emitter-follower plays no part in the measurements of the beam current reference value because the measurements are performed in periods in which the level in the video signal is constant for some time.
The variation in the leakage current in the cathode circuit of the picture display tube 14 can be many times larger than that in the beam current, which condition occurs if the reference level in the video signal is present. The variation in the voltage difference across the capacitors 28 and 41 would then be many times smaller than the variation in the voltage across one of the capacitors 28, 41. This might adversely affect the accuracy of the control system. To prevent this, two resistors 53 and 55 are provided which pass the leakage current from the wehnelt circuit and the heater circuit to the resistor 15 and, consequently, compensate the cathode leakage current to a large extent.
It will be obvious that the direct current supplied to the cathode of the picture display tube may be obtained, if so desired, by means of a transistor connected as a current source. This transistor should then be suitable for a rather high voltage because the voltage at the cathode of the picture display tube may change very much.
In FIG. 2 elements corresponding to elements of the circuit of FIG. 1 have been given the same reference numerals as in FIG. 1.
The blacker-than-black current compensation circuit of FIG. 2 is arranged somewhat differently then in FIG. 1. The capacitor 41 is now arranged in series with the output 21 of the amplifier 19 and the two switches 23 and 35, and the input 43 of the amplifier 27 is connected to ground. The switch 35 now operates as a clamping switch which ensures that the blacker-than-black level is connected to ground and the voltage across the capacitor 29 becomes a measure of the beam current occurring at the reference level in the video signal.
A further difference relative to the circuit of FIG. 1 is that the collector circuit of the second emitter-follower 51 includes a circuit which acts as blacker-than-black current conduction circuit and supplies any current flowing to the cathode to the input 17 of the beam current reference level control circuit 9 so that also these currents can be measured. The direct current supply circuit (45, 47) at the cathode of the picture display tube can then be dispensed with.
The collector current of the second emitter-follower 51 is supplied to the resistor 15 via two current mirror circuits. A first current mirror circuit is constituted by a series arrangement of a resistor 57 and a diode 59 in parallel with the series arrangement of the base-emitter path of a transistor 61 and a resistor 63 to a positive supply voltage. The collector current of the transistor 61 is supplied to a second current mirror circuit having a transistor 65 and a diode 67, which is in parallel with the base-emitter path of the transistor 65. The collector of the transistor 61 is connected to the resistor 15 through which the difference in the collector currents of the two emitter-followers 13, 51 now flows. Independent of the direction of the cathode currents of the picture display tube 14, a voltage, which is a measure of that cathode current, is now produced across the resistor 15.
Instead of determining the difference current by means of current mirror circuits in the described manner, it is alternatively possible, if so desired, to use other difference-determining circuits.
If so desired also the measuring data for a beam current limiting control of the resistor 15 can be obtained in the described circuits.
The amplifier 19 may comprise a circuit which limits the amplitude of the video signal outside the instants in which measuring takes place. This may be a circuit operated by an auxiliary signal or a self-switching circuit, for example a diode limiter circuit.
If the picture display tube is a color display tube having several electron guns, the emitter-followers for each of the guns may have the resistor 15 in common and a sequential measurement may take place at a reference level sequentially occurring in the different video signals, so that only a portion of the control circuits is not common.
It will be obvious that the choice of the measuring instants and the associated occurrence of the reference levels and blacker-than-black levels are not important for the essence of the invention and may be chosen in a suitable manner.
The blacker-than-black current compensation circuits 9 of the above-described embodiments are interchangeable.
The amplifier 27 may comprise a level reference circuit so that the value of the beam current is determined which is associated with the corresponding reference level in the video signal.

PHILIPS 26C871 CHASSIS K12 (20AX) System for stabilizing cathode ray tube operation:
-------------------------------------------------------
The invention pertains to a video display apparatus which includes a cathode ray tube having at least one electron gun and means for deriving a source of excitatory voltage signal representative of picture information. In accordance with the invention there is provided a system for stabilizing the display intensity attributable to the electron gun comprising means coupling the source of voltage signal to the gun for generating a stabilized current in the gun, the level of current in the gun being substantially independent of variations in the operating characteristics of the gun. In the preferred embodiment of the invention a test signal is periodically applied at a predetermined level to the gun. A sampler samples the beam current of the gun during the test signal and generates a correction signal in accordance with the sample value. The correction signal is applied to the electron gun so as to stabilize its reference current level.



1. In a television display apparatus which includes a cathode ray tube having at least one electron gun and means for applying a television video signal to said electron gun; a system for stabilizing the display intensity attributable to said electron gun, comprising:
means for generating first and second test signals during the vertical blanking intervals of said television video signal;
means for applying said first and second test signals to said electron gun during first and second portions, respectively, of said vertical blanking intervals;
means for sampling the beam current of said electron gun during said first and second portions and for generating first and second correction signals, respectively, in accordance with the sampled values; and
means for applying said first and second correction signals to said electron gun so as to stabilize the reference current level of said electron gun.


2. The system as defined by claim 1 wherein said first and second correction signals are applied to grids of said electron gun.

3. The system as defined by claim 2 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.

4. The system as defined by claim 1 wherein means are provided for maintaining the correction signals during the intervals between the successive test signals.

5. The system as defined by claim 1 wherein said first and second test signals are at white and black level viedo, respectively.

6. The system as defined by claim 5 wherein said first correction signal is applied as a multiplying factor to said television video signal.

7. The system as defined by claim 6 wherein the corrected television video signal is applied to the control grid of said electron gun.

8. The system as defined by claim 6 wherein the corrected television video signal is applied to the cathode of said electron gun.

9. The system as defined by claim 6 wherein said second correction signal is applied as a DC reference level to the corrected television video signal.

10. The system as defined by claim 1 wherein said means for sampling the beam current comprises a resistor in series with the cathode of said gun.

11. In a video display apparatus which includes a cathode ray tube having a plurality of electron guns and means for applying a plurality of television video signals representative of color picture information to said electron guns; a system for balancing the color screen temperature of said cathode ray tube, comprising:
means for generating first and second test signals during the vertical blanking intervals of said television video signal;
means for applying said first and second test signals to said electron guns during first and second portions, respectively, of said vertical blanking intervals;
means for sampling the beam current of each electron gun during said first and second portions and for generating first and second correction signals, respectively, for each electron gun in accordance with the sampled values; and
means for applying said first and second correction signals to their respective electron guns so as to balance the screen color temperature of said cathode ray tube.


12. The system as defined by claim 11 wherein said first and second correction signals are applied to grids of said electron guns.

13. The system as defined by claim 12 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.

14. The system as defined by claim 11 wherein means are provided for maintaining the correction signals during the intervals between successive test signals.

15. The system as defined by claim 11 wherein said first and second test signals are at white and black level video, respectively.

16. The system as defined by claim 15 wherein said first correction signal is applied as a multiplying factor to each of said plurality of television video signals.

17. The system as defined by claim 16 wherein the corrected plurality of television video signals are applied to the control grids of their respective electron guns.

18. The system as defined by claim 16 wherein the corrected plurality of television video signals are applied to the cathodes of their respective electron guns.

19. The system as defined by claim 16 wherein said second correction signals are applied as DC reference levels to the corrected television video signals.

20. The system as defined by claim 11 wherein said means for sampling the beam current comprises a plurality of resistors in series with the cathode of said electron guns.

Description:
BACKGROUND OF THE INVENTION
This invention relates to improvements in video display apparatus and, more particularly, to a system for stabilizing the display intensity or "color temperature" of a cathode ray tube. The subject matter of this invention is related to subject matter disclosed in copending U.S. application Ser. No. 572,128 of C. W. Smith and R. H. McMann, filed of even date herewith and assigned to the same assignee.
Conventional television display systems employing kinescope cathode ray tubes are subject to performance degradation resulting from instabilities in the operating characteristics of the kinescope or the circuits which drive or bias the kinescope. Prior techniques have been developed which serve to stabilize the signals driving a kinescope. For example, the drive voltages applied to the cathodes of a color kinescope can be stabilized using a feedback scheme; e.g., circuitry which periodically senses the drive voltage at input "black" and "white" levels of operation and corrects for deviations from standard reference voltages by gain adjustment. DC voltages applied to the kinescope can also be stabilized by using precise voltage regulation techniques.
There remains, however, the recognized problem of kinescope electron gun drift which manifests itself as a drift in screen color temperature in a three gun color kinescope. As the electron guns age, their generated beam current per unit of applied voltage (which can be considered a transconductance function) varies, the variations being generally non-uniform in the three different guns. This is a cause of noticeable and undesirable drifts in the display screen color.
The major sources of drift are: aging or long term variations caused by a gradual decrease in cathode activity, not necessarily constant or uniform for each cathode; and cathode operating temperature. The relatively long term variations in emission are caused by filament voltage changes and heat build-up in the gun area, generally a function of how many hours a display tube has been operating. Dynamic heating of each gun depends on the ratio of gun currents drawn to provide the colored picture being instantaneously presented. For example, a long persisting mostly red field causes red gun current almost exclusively, thereby causing an unbalanced heating of the red cathode, which changes its emission characteristics to a different degree than the other cathodes, this change remaining until relative cooling occurs.
Cathode thermal current, I th , is represented by the Dushman equation: I th = SA 0 T 2 e - b s /T amperes
where S and A 0 are constants and b 0 = Dushman constant ≉ 11,600° for an oxide coated cathode.
The derivative of the natural logarithm of this equation gives the change in emission with respect to temperature change: dI th /I th = 2 + (b 0 /t ) (dT/T)
the temperature of the CRT cathode is approximately 1,160° K, which yields (dI th /I th) = 12dT/T
typical ambient temperature variations, such as in a display monitor, are about 40° C, so that the net change of gun current is of the order of 12 . 40/1,160 ≉ 40%
Therefore, a 1° C change in cathode temperature yields about a 1% change in gun current, if the gun is fixed bias and not near cut-off.
It is an object of the present invention to provide a stabilizing system which overcomes the problems set forth.
SUMMARY OF THE INVENTION
The invention pertains to a video display apparatus which includes a cathode ray tube having at least one electron gun and means for deriving a source of excitatory voltage signal representative of picture information. In accordance with the invention there is provided a system for stabilizing the display intensity attributable to the electron gun comprising means coupling the source of voltage signal to the gun for generating a stabilized current in the gun, the level of current in the gun being substantially independent of variations in the operating characteristics of the gun.
In the preferred embodiment of the invention a test signal is periodically applied at a predetermined level to the electron gun. A sampler samples the beam current of the gun during the test signal and generates a correction signal in accordance with the sample value. The correction signal is applied to the gun so as to stabilize its reference current level.
Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified diagram of a color television display kinescope;
FIGS. 2A, 2B and 2C are block diagrams of embodiments of the invention which utilize periodically applied test signals;
FIG. 3 is a schematic representation of an embodiment of the invention which employs a "constant current" technique;
FIG. 4 is a schematic representation of another embodiment of the invention employing a differential amplifier; and
FIG. 5 is a schematic representation of another embodiment of the invention employing direct cathode temperature sensing and heater control.
DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, there is shown a simplified diagram of a color television display cathode ray tube or kinescope 10 as driven by excitatory video voltage signals designated R, G and B, these signals having typical ranges of about 100 volts peak-to-peak. The kinescope 10 has three electron guns, each including a cathode and associated grids. For clarity of illustration, only one of the three guns, designated by reference numeral 11, is represented in some detail, but it will be appreciated that two other complete electron guns (indicated in the Figure by only the two dashed cathodes coupled to the G and B inputs) are normally provided and are substantially identical to the gun 11. Hereinafter, and in the description of the embodiments of the invention, the circuitry associated with only one electron gun in a given kinescope will be described for illustrative clarity, but it will be understood that if the kinescope has two or more guns, similar circuitry can be employed in conjunction with the remaining guns.
The electron gun 11 comprises a cathode 21 and first, second and third grids, 22, 23, and 24, which are sometimes designated as "grid 1," "grid 2," and "grid 3," or as the "control electrode," the "accelerating electrode," and the "focusing electrode," respectively. Generated electrons impinge on an anode 25 near display screen 26 which is coated with an electron-sensitive phosphor as is conventional in the art. Typical voltages applied to the cathode, grid 1, grid 2, grid 3 and the anode are about 235 volts, 150 volts, 700 volts, 5000 volts and 25,000 volts, respectively. In alternate modes of operation, the excitatory voltage input signal may be applied to a control grid with the remaining grid and cathode voltages being set at appropriate values.
Referring to FIG. 2A, there is shown an embodiment of the invention which comprises a system for stabilizing the display intensity or "color temperature" of the electron guns in a kinescope 30. An excitatory voltage signal at input terminal 31, which may be the R, B or G signal in a color system or the luminance signal in a black and white system, is coupled through an adder 41 and DC restorer circuit 42 to grid 1 of the kinescope 30. Cathode 43 is coupled through a resistor R 1 to ground reference. A bias voltage is applied to grid 2 via a voltage amplifier 44 which receives a signal on a line 58A which determines the level of the bias voltage applied to grid 2. Suitable focus and anode voltages are applied to grid 3 and the anode from sources not shown.
The vertical and horizontal synchronizing signals of the composite television signal, available in the television receiver, are applied to a line counter 51 which is adapted to count horizontal scanlines of the television field and to be reset to zero at the end of each television field. The counter generates a first output on a line 51A during the scanlines 15-17 of each television field and a signal on line 51B during lines 18-20 of each television field, all of the lines 15-20 occuring during the vertical blanking period. The signal on line 51A enables a gate 55 and also enables a sample-and-hold circuit 56. The signal on line 51B enables a gate 57 and a sample-and-hold circuit 58. The gates 55 and 57 respectively receive voltages at reference "black level" and "white level." The outputs of gates 55 and 57 are coupled over lines 55A and 57A, respectively, to inputs of the adder 41.
Operation of the system of FIG. 2A is as follows: During lines 15-17 of the vertical blanking interval the gate 55 is enabled so that black level voltage is coupled through adder 41 and circuit 42 to grid 1. With this voltage applied to grid 1 the cathode current should ideally have a certain nominal value that does not vary with the tube life or cathode temperature but, as indicated above in the Background, this is not generally the case in actual practice. The actual cathode current is sampled across resistor R 1 , and a voltage representative of this current is coupled to the sample-and-hold circuit 56 which is enabled to sample the voltage across resistor R 1 during the lines 15-17. The circuit 56 holds the sampled voltage through the subsequent video field and couples the held voltage to circuit 42 via line 56A, this voltage serving to adjust the DC reference level of the output of circuit 42. In this manner, the voltage on line 56A controls the bias level at grid 1 so as to correct for any variations in the cathode current at nominal black level. Thus, for example, if at some point in operation the cathode current for a black level input voltage is lower than its nominal value, the voltage drop across sampling resistor R 1 will also be low. This will decrease the output of sample-and-hold circuit 56 fed to circuit 42 which, in turn, will cause the bias level at grid 1 to decrease (typically, to a less negative value with respect to the cathode). A lesser negative bias level on the control grid 1 will, in turn, cause a proportionate increase in the electron current flowing from cathode 43; the desired result.
Similarly, during lines 18-20 of the vertical blanking period white level voltage is applied via adder 41 and amplifier 42 to grid 1, and during this time the cathode current is sampled by circuit 58 which is enabled to sample by the signal on line 51B. During the remainder of the television field, the bias voltage applied to grid 2, via voltage amplifier 33, is a function of the voltage which had been sampled by circuit 58. For example, in an instance where the cathode current sensed at a white level voltage input is lower than the nominal value, the resultant low voltage sampled by circuit 58 will cause the grid 2 accelerating voltage to decrease. This causes the sampled voltage at black level to appear too negative (when next sampled during the succeeding vertical blanking interval) which, in turn, results in a decrease in grid bias by the black level circuit causing the desired increase in beam current over prior conditions, as previously described.
The embodiment of FIG. 2B is similar to that of FIG. 2A except that the output of sample-and-hold circuit 58 (which is a measure of the sampled white level current) is coupled to an analog multiplier circuit 59, which is in series with DC restorer circuit 52. In this embodiment, corrections resulting from both the white level and black level measurements are achieved via grid 1, with operation otherwise being substantially as described above.







In the embodiment of FIG. 2C the electron gun is driven by application of the video signal to the cathode 43 via a complementary emitter-follower 120 which comprises NPN transistor 121 and PNP transistor 122. (The system to the left of blocks 42 and 56 is the same as in FIG. 2B). The transistor emitters are coupled to the cathode 43 of kinescope 30 and the transistor bases receive the video signal from DC restorer circuit 42. The collector of transistor 121 is coupled to a suitable bias voltage, e.g., 150 volts, and the collector of transistor 122 is coupled to ground reference potential through sampling resistor R 1 .
In operation, during the lines 15-20 the test signals are applied via circuit 42 and cathode 43 is driven while the cathode current is sampled by resistor R 1 , a typical value for which is 1K ohm. Transistor 122 is "on" during the white level test signal (output of circuit 42 about 25 volts) and the black level test signal (output of circuit 42 about 125 volts), and the gun current-representative voltages sampled across resistor R 1 are coupled to the appropriate sample-and-hold circuits as previously described. During the active portion of the television field the analog multiplier 59 and DC restorer circuit 42 apply appropriate corrections, with transistor 122 normally "on." During rapid lighter-to-darker transitions of the video signal the transistor 121 turns momentarily "on" and the tube capacitance and stray capacitance (collectively represented by C in the Figure can be thought of as charging. Diode D 1 prevents inordinate voltage drops across R 1 during the active picture area when R 1 is not used for sampling.
In the embodiment of FIG. 3 the video voltage signal at terminal 61 is coupled to cathode 71 of a kinescope 75 by the parallel combination of capacitor 62 and amplifier 63 in a series with resistor R 2 . Amplifier 63 comprises transistors 64 and 65 and has a voltage gain of about 5 and an output capability of about 500 volts. The resistor R 2 is selected to be substantially greater than the input impedance of the cathode 71 and preferably has a resistance at least five times higher than the cathode resistance. Since the effective cathode resistance is the inverse of the gun transconductance (about 8.6 micromhos), a suitable value for R 2 is of the order of 600K ohms. Accordingly, the amplifier 63 in conjunction with resistor R 2 operates as a so-called "constant current" source, which effectively transforms the voltage signal at terminal signal to a current source input to the cathode 71, this current source input being relatively insensitive to variations in the kinescope characteristics. Since normal wiring capacitance and electron gun interelectrode capacitance render high frequency response impractical in a high impedance amplifier drive, the higher frequency portions of the video signal are shunted across the amplifier by capacitor 62 which may have a typical value of about 0.05 microfarads. The higher frequency signals arrive at substantially the same relative level as the low frequencies, thereby preserving their relationship. This is because the lower frequency signals are amplified by a factor of 5 and then undergo a one-fifth loss by virtue of the voltage divider action of resistor R 2 and the cathode impedance.
FIG. 4 shows a further embodiment wherein the video voltage signal at an input terminal 81 is applied to one input of a differential amplifier comprising transistors 82, 83 and 84. The output stage 84 drives the grid 1 electrode of kinescope 90 through series peaking inductor L 1 and shunt peaking inductor L 2 . The cathode 91 of kinescope 90 is coupled to ground reference potential through resistor R 3 which is used to continuously monitor the cathode current, the line 89 coupling a voltage representative of the cathode current to the other input of the differential amplifier; viz., the base of transistor 83.
In operation, the voltage developed across resistor R 3 is proportional to the cathode current. This voltage, for a stable transconductance, should be in a stable relationship with respect to input voltage at terminal 81, and R 3 is selected empirically at a value, typically about 2K ohms, which generates a sample voltage nominally equal to the input voltage at terminal 81. When a deviation exists between the inputs to transistors 82 and 83, the output of the differential amplifier adjusts up or down to correct for the difference, thereby adjusting control of the drive to grid 1 and correcting for drifts in the kinescope transconductance.
A characteristic of the circuit of FIG. 4 is that it linearizes the electron gun transfer function which normally is non-linear, the non-linear function conventionally being known as "gamma" of the kinescope. Television video signals are conventionally precorrected for the gamma of the kinescope. In a color kinescope the gamma may be different for each gun, making it difficult to match the effective light output attributable to each gun over the grey scale; a problem known as "tracking" in the prior art. The present invention allows use of an inverse gamma circuit (which eliminates the precorrection in the conventional television signal) and the linearized gun transfer functions reduce tracking problems.
The invention has been described with reference to particular embodiments, but it will be understood that variations within the spirit and scope of the invention will occur to those skilled in the art. For example, the circuits of the "constant current" generator of FIG. 3 or the differential amplifier of FIG. 4 may be of other suitable forms. Also, in the embodiment of FIG. 2, sampling could be achieved during any suitable blanking or active period. The beam could be deflected off the tube face during sampling time to avoid displaying the trace during this time. Finally, stabilization of cathode temperatures could be achieved directly, such as by providing heater/thermistor stabilization circuits for each cathode. A suitable circuit is shown in FIG. 5 wherein a negative temperature coefficient thermistor 101 is attached to the cathode metal. V 0 is a precision voltage source providing a voltage typically in the range 5-12 volts and R 0 is selected as being substantially equal to the resistance of the thermistor at nominal cathode temperature. If the cathode becomes unduly hot, the resistance of thermistor 101 will decrease which, in turn, causes the voltage at terminal 103 to decrease. This results in a decreased output of operational amplifier 102, so that the cathode heater drive is reduced, as desired. Insufficient cathode temperature can be seen to cause the opposite effect.
PHILIPS 26C871 CHASSIS K12 (20AX) Television display apparatus including a beam current clamping control circuit:

A beam current clamping control circuit in which in case of a too large deviation of the desired value of the field frequency measured beam current an accelerated correction of this deviation is effected.



1. Television display apparatus including a beam current clamping control circuit having a beam current measuring circuit operable by a pulse generator and coupled to a television display tube for measuring, during at least part of a line scan time of a field blanking time a beam current reference level to be corrected, a level insertion circuit for inserting the reference level during the measuring time into a video signal to be applied to the television display tube and a level correction circuit coupled to an output of the measuring circuit and to a control electrode of the television display tube, the measuring circuit including a threshold circuit and a storage circuit, characterized in that the threshold circuit is a circuit which applies a signal to an output thereof when a too large beam current occurs, said output being coupled to an operation signal input of a circuit means for extending the charge correction time of the storage circuit per field period.

2. Television display apparatus as claimed in claim 1, characterized in that the circuit extending the charge correction time is a circuit means for increasing the measuring frequency, whereby a greater number of measurements per unit time is effected.

3. Television display apparatus as claimed in claim 1, characterized in that the circuit extending the charge correction time is a change-over switch a first input of which is coupled to an input of the measuring circuit, a second input is coupled to a beam current independent charging circuit coupled to a supply source and an output is coupled to the storage circuit.

4. Television display apparatus as claimed in claim 1, characterized in that the pulse generator includes a counting circuit having a feedback which can be switched on by the threshold circuit.

5. A beam current clamping control circuit for a television display tube comprising a beam current measuring circuit means for measuring during at least part of a line scan time of a field blanking time a beam current reference level to be corrected, a pulse generator coupled to said measuring circuit, a level insertion circuit means coupled to said pulse generator for inserting the reference level during the measuring time into a video signal to be applied to the television display tube, a level correction circuit coupled to an output of the measuring circuit, the measuring circuit including a threshold circuit means for coupling to said tube for applying a signal to an output thereof when a beam current above a selected value occurs, a storage circuit, and a circuit means for extending the charge correction time of the storage circuit per field period having an input coupled to said threshold circuit output and an output coupled to said storage circuit.

Description:
The invention relates to television display apparatus including a beam current clamping control circuit
comprising a beam current measuring circuit coupled to a television display tube and operable by a pulse generator for measuring during at least part of a line scan time of a field blanking period a beam current reference level to be corrected, a level insertion circuit for inserting during the measuring time the reference level into a video signal to be applied to the television display tube, and a level correction circuit coupled to an output of the measuring circuit and to a control electrode of the television display tube, the measuring circuit including a threshold circuit and a storage circuit.

Television display apparatus of this type is known from U.S. Patent No. 3,562,409 in which the threshold circuit ensures that in case of a too large deviation of the beam current relative to the desired value the drive of the storage circuit is limited.

It is an object of the invention to provide improved television display apparatus of the kind described in the preamble which is characterized in that the threshold circuit is a circuit which in case of occurrence of a too large beam current applies a signal to an output thereof which output is coupled to an operation signal input of a circuit extending the charge corrections time of the storage circuit per field period.

Due to the limiting circuit in the circuit arrangement described in the abovementioned U.S. Patent Specification, in combination with the short measuring time available it could occur in the known circuit arrangement that, for example, after switching on the apparatus a very brightly lit picture occurred for several seconds. The storage circuit must include a capacitor having a fairly large capacitance the charge of which must be corrected in the known circuit with a current limited by the threshold circuit during the measuring time.

As a result of the step according to the invention the threshold circuit does not serve to limit the current intensity during the correction of the charge but to activate a circuit in case of a too large deviation of the nominal beam current, which circuit accelerates a feedback of the beam current to the nominal value by realising an extended charge correction time for the storage circuit. Consequently a feedback of the beam current to a level which is not troublesome can be obtained in a very quick manner without the current intensity in circuit elements correcting the charge of the storage circuit becoming too large.

The extended charge correction time of the storage circuit can be obtained by applying a correction charge from a current source which is independent of the measuring value under the influence of the threshold circuit during a time which is considerably longer than the measuring time, or by increasing the measuring frequency so that a current source which is dependent on the measuring value can recharge the storage circuit more frequently per unit of time.

The invention will now be described with reference to the drawing and some embodiments.

In the drawing:

FIG. 1 illustrates by way of a block-schematic diagram a television display apparatus according to the invention.

FIG. 2 illustrates by way of a block-schematic diagram a further elaboration of a television display apparatus according to the invention,

FIG. 3 likewise illustrates by way of a block-schematic diagram a further embodiment of a television display apparatus according to the invention,

FIG. 4 illustrates partly by way of a block-schematic diagram and partly by way of a principle circuit diagram a colour television display apparatus according to the invention including a sequential measuring circuit and

FIG. 5 shows a number of wave forms as may occur in the circuit of FIG. 4.

In FIG. 1 a video signal is applied to an input 1 of a level insertion circuit 3 which signal is provided with a reference level every time during some line times of a field some time after a field flyback with the aid of a signal obtained from an output 7 of a pulse generator 9 and applied to a further input 5. The video signal with the reference level is passed from an output 11 of the level insertion circuit 3 to an input 13 of a beam current level correction circuit 15. A level correction quantity obtained from an output 19 of a measuring circuit 21 is applied to a further input 17 of the beam current level correction circuit 15. A video signal having a reference level and an added level correction quantity is obtained from an output 23 and is applied to an input 25 of an amplifier 27 an output 29 of which is connected to the wehnelt electrode of a television display tube 31. A cathode of the television display tube 31 is connected to an input 33 of the measuring circuit 21.

The measuring circuit 21 includes a gating circuit 35 connected to the input 33 which applies a quantity dependent on the beam current to an output 37 during the occurrence of the reference level. The gating circuit 35 is arranged with the aid of a gating signal applied to a gating signal input 39 and originating from an output 41 of the pulse generator 9.

The quantity dependent on the beam current produced during the occurrence of the reference level is applied from the output 37 of the gating circuit 35 to an input 43 of a detection circuit 45 and to an input 47 of a threshold circuit 49.

An output 51 of the detection circuit 45 is connected in the normal operating condition to a storage capacitor 53 which constitutes a storage circuit with the circuit arrangement connected thereto and which has a time constant which is long relative to the field period. The beam current level correction quantity occurring at the output 19 of the measuring circuit 21 is then obtained from the storage capacitor 53 which quantity readjusts the beam current to a constant value.

The threshold circuit 49 has an output 55 which is connected to an operation signal input 57 of a circuit 59 extending the charge correction time of the storage circuit. The circuit 59 extending the charge correction time includes a second storage capacitor 60 which can retain a voltage optionally provided by the threshold circuit for some time and a changeover switch 61 an operation signal input 63 of which is connected to the operation signal input 57 of the circuit 59 extending the recharge time. The changeover switch 61 has an input 67 which is connected to the output 51 of the detection circuit 45 and an input 69 which is connected through a resistor 71 to a positive supply voltage. An output 73 of the change-over switch is connected to the storage capacitor 53 and the output 19 of the measuring circuit 21.

In the normal operating condition the change-over switch 61 occupies the position shown and the above-described beam current control occurs.

When the beam current is very large during the measuring time, which means that the voltage at the storage capacitor 53 is very low, threshold circuit 49 applies a voltage to its output 55 which sets the change-over switch 61 to the position not shown and, dependent on the discharge time of the second storage capacitor 60, retains it in that position for some time, for example, several hundred line times. The resistor 71 then constitutes a current source independent of the measuring value which increases the voltage across the storage capacitor 53. During the next measurement the threshold circuit 49 determines whether this increase has been sufficient or not so that the change-over switch 61 can remain in the position shown or must be reset once more for some time.

The pulse generator 9 has an input 75 to which field frequency pulses derived from field synchronising or field flyback pulses are applied and an input 77 to which pulses derived from line synchronizing or line flyback pulses are applied. The input 75 is connected to an input 79 of a shift register 81 which in this case has four sections but of which the number of sections can of course be chosen arbitrarily. A line frequency pulse originating from the input 77 serves as a clock pulse for the shift register 81 into which, for example, at the end of the field flyback time a one is shifted which is shifted one section further at every subsequently occurring clock pulse. The last two sections of the shift register have outputs 83 and 85 which are connected to inputs 87 and 89, respectively, of a gating circuit 91 which has a further input 93 connected to the input 77. The gating circuit 91 supplies signals to two outputs 95 and 97 which signals are applied to the outputs 7 and 41 of the pulse generator 9 and which have the functions described hereinbefore.

In FIG. 2 corresponding components have the same reference numerals as those in FIG. 1. For the description of this Figure reference is made to FIG. 1.

The circuit arrangement of FIG. 2 differs from that of FIG. 1 in that the second storage capacitor 60 of the circuit 59 extending the recharge time of the first storage capacitor 53 is replaced by a trigger circuit 99 a set input of which is the input 57 which is connected to the output 55 of the threshold circuit and a reset input 101 of which is connected to the input 75 of the pulse generator 9 to which the field frequency pulses are applied. An output 103 of the trigger circuit is connected to the input 63 of the change-over switch 61 and to an operation signal input 105 of a second change-over switch 107 in the pulse generator 9. An input 109 of the second change-over switch 107 is connected to an output 111 of the shift register 81 and an input 113 is connected to the input 75 for field frequency pulses from the pulse generator 9. An output 115 of the change-over switch 107 is connected to the input 79 of the shift register 81.

In the position shown of the change-over switches 61, 107 the operation of the circuit arrangement is the same as in the case of FIG. 1. When a too high beam current is detected by the threshold circuit 49, the trigger circuit 99 will be set and the change-over switches 61 and 107 will be brought to the position not shown. The storage capacitor 53 will then be charged through the resistor 71 likewise as in the case of FIG. 1. The change-over switch 107 connects the output 111 of the shift register 81 to its input 79 so that always a one circulates in the shift register 81 and a continuous measurement of the beam current is effected until the threshold circuit 49 no longer detects a too high beam current and due to the output voltage dropping out or due to the next field frequency pulse at the reset input 101 the trigger circuit 99 is reset and the normal state is restored.

In FIG. 3 corresponding components have the same reference numerals as those in FIGS. 1 and 2 and reference is made to the description associated with the relevent Figures.

The circuit arrangement differs from that of FIG. 2 by the absence of the first change-over switch 61. Consequently, when a too high beam current occurs the normal control loop is maintained and only due to the second change-over switch 107 the shift register 81 is enabled so that a strongly increased measuring frequency and an accelerated feedback occurs through the normal control loop to the normal state. The recharge time of the storage capacitor 53 is in this case extended because per field period a larger number of measurements and associated recharges of this capacitor is effected.

FIG. 4 shows a colour television receiver including a circuit arrangement according to the invention in which the principle as described with reference to FIG. 2 is used. The circuit arrangement has a colour television display apparatus having a sequential beam current measuring circuit whose principle is described in prior application Ser. No. 402,159, filed Oct. 1, 1973, now abandoned.

When a colour television signal is applied to an input 201 of a high frequency-intermediate frequency and detection section 203, a luminance signal Y is produced at an output 205, a chrominance signal Chr is produced at an output 207 and a synchronizing signal S is produced at an output 209.

The synchronizing signal S is applied to an input 211 of a time base generator 213 connected to the output 209. Deflection currents for a television display tube 221 are obtained at two outputs 215 and 217 and an EHT for the supply of the display tube 221 is obtained at an output 223.

An output 227 of the time base generator 213 applies line flyback pulses to an input 229 and an output 231 applies field flyback pulses to an input 233 of a pulse generator 235. These pulses are shown in FIG. 5 by the waveforms 529 and 533, respectively.

Furthermore FIG. 5 shows a number of waveforms 537, 509, 514, 544, 548, 520, 539, 541, 543, 547, 549, 551, 553, 656, 555, 565 and 563 and a number of instants t 1 , t 1 +T 1 , t 3 to t 10 , t 10a , and t 10 + T 2 , t 10 + 2T 2 , T 11 , t 11 + T 1 , t 11 + 2 T 1 , and t 12 which are important for explaining the operation of the circuit arrangement. The waveforms are not shown to scale.

The pulse generator 235 has a number of outputs 237, 239, 241, 243, 244, 245, 247, 249, 251, 253, 255 and an input 256 at which the waveforms 537, 539, 541, 543, 545, 547, 549, 551, 553, 555 and 556, respectively, are present.

The output 255 of the pulse generator 235 is connected to an input 257 of a level insertion circuit 259 an input 261 of which is connected to the output 205 of the section 201 and receives the luminance signal Y therefrom. The level insertion circuit 259 has an output 263 at which the modified luminance signal denoted by the waveform 563 of FIG. 5 is produced which includes a reference level 521 during three line times t 5 -t 6 , t 7 -t 8 , t 9 -t 10 at the commencement of the field, which level is inserted with the aid of the wave-form 555 applied to the input 257.

The waveform 565 is then produced at a further output 265 of the level insertion circuit 259, which waveform is applied to an input 267 of a chrominance signal amplifier 269 for suppressing the chrominance signal applied to an input 271 connected to the output 207 of the section 201.

The output 263 of the level insertion circuit 259 is connected to inputs 285, 287 and 289 of suppression and level correction circuits 291, 293 and 295, respectively, inputs 297, 299 and 301 of which are connected to outputs 247, 249 and 251 of the pulse generator 235 and inputs 303, 305 and 307 of which are connected to outputs 309, 311 and 313, respectively, of a demodulator and matrix circuit 315 to whose input 317 a chrominance signal originating from an output 319 of the chrominance signal amplifier 219 is applied.

The demodulator and matrix circuit applies a (B-Y), (G-Y) and (R-Y) colour difference signal to its outputs 309, 311 and 313, respectively. These colour difference signals are combined in the suppression and level correction circuits 291, 293 and 295 with the modified luminance signal applied to the inputs 285, 287 and 289 to form colour signals R, G and B, while as a result of the signals with the waveforms 547, 549, 551 at the inputs 297, 299 and 301 the reference level 521 originating from the luminance signal is suppressed in a special sequence. In this example a sequence is maintained in which only a reference level is left in the R-signal from t 5 to t 6 , in the G signal from t 7 to t 8 and in the B signal from t 9 to t 10 .

The suppression and level correction circuits 291, 293 and 295 furthermore have outputs 339, 341, 343 connected to the wehnelt electrode of the red, blue and green guns of the display tube 221 and inputs 345, 347 and 349 connected to the output 237 of the pulse generator 235 for receiving a suppression signal of the waveform 537 which prevent a signal supply to the display tube 221 during the time base flyback times. Inputs 351, 353 and 355 are furthermore connected to outputs 357, 359 and 361, respectively, of a measuring circuit 362 which outputs are connected to storage capacitors 363, 365 and 367, respectively, whose other ends are connected to earth. The storage capacitors 363, 365 and 367 are connected to switches 377, 378 and 379 respectively, operation signal inputs 383, 384 and 385 of which are connected to outputs 239, 241 and 243, respectively, of the pulse generator 235.

The switch 377 conducts from t 5 to t 6 , the switch 378 conducts from t 7 to t 8 and the switch 379 conducts from t 9 to t 10 . Each of these switches introduces a level applied to an input 381 thereof into the relevant storage capacitors 363, 365, 367.

The cathodes of the television display tube 221 are interconnected and are connected to an input 389 of the measuring circuit 362. Sequentially by each cathode voltages is generated across a resistor 393 connected to the input 389 which resistor is shunted by a diode 394 and is connected at its other end to a voltage of + 130 Volt during the said periods. This generated voltage produces a corresponding voltage across the storage capacitors 363, 365 and 367 which is retained during the next field flyback time and is passed on for beam current control to the inputs 351, 353 and 355 of the suppression and level correction circuits 291, 293 and 295. The two cathodes which are not measured then do not convey any beam current.

An input 391 of the measuring circuit is connected to the output 245 and an input 392 is connected to the output 253 of the pulse generator 235.

The screen grids of the guns of the television display tube 221 are each connected to an adjusting point of potentiometers 395, 396 and 397 between + 130 Volt and a higher voltage ++.

A signal occurring at the cathodes of the television display tube 221 produces a voltage across the resistor 393 which voltage is limited by the diode 394 blocked during the measuring periods. This voltage is applied to the base of a pnp transistor 401 whose emitter is connected to the other end of the resistor 393. The collector of the transistor 401 is connected to earth through a resistor 403, connected to earth through a capacitor 405 for high frequencies and has a negative feedback to the base through a resistor 407.

A signal amplified by the transistor 401 is applied through a series arrangement of a capacitor 409, a resistor 410 and a resistor 411 to the base of an npn transistor 413. The collector of an npn transistor 415 serving as a clamping switch is connected between the resistors 410 and 411. The emitter is connected to a clamping voltage V kl and the base is connected to the input 391 of the measuring circuit 362.

As a result of the waveform applied to the input 391, which waveform is the inverse form of waveform 544, the transistor 415 is cut off during the occurrence of the signal produced by the reference level 521. During the preceding line periods the capacitor 511 has reached a constant charge condition (clamped) through the then conducting transistor 415 because both the luminance signal and the chrominance signal are suppressed and the cathodes of the display tube 221 do not convey any current.

During the period t 4 -t 10 signals caused by the reference level 521 occur successively during the periods t 5 -t 6 , t 7 - t 8 and t 9 - t 10 at the successive cathodes of the display tube 221 which signals are applied in an amplified manner to the base of the transistor 413 and which furthermore appear at the emitter of an npn transistor 412 connected to the base of the transistor 413.

When the signals have an amplitude which is not too large they are passed on by the transmitter 413 through its emitter and a resistor 423 to the base of an npn transistor 425.

When the signals at the base of the transistor 413 have a too large amplitude the emitter of the transistor 412 will become more negative than its base connected to a threshold voltage V dr and this transistor 412 will start conducting and hence operate a set input of a trigger circuit 414 connected to its collector which then provides a positive voltage for its output 416. This positive voltage (waveform 556) is applied to an output 418 which is connected to the input 256 of the pulse generator 235 and which causes a variation to a free-running state which will be described hereinafter, while this voltage also controls the base of an npn transistor 422 through a resistor 420 and the emitter of this transistor is connected to earth while the collector is connected to the base of the transistor 413. The base of this transistor 413 then is no longer controlled because the transistor 422 acts as a short circuit for its input signal. The trigger circuit 414 furthermore has a reset input 424 to which a field flyback pulse (waveform 533) originating from the output 231 of the time base generator 213 is applied so that the trigger circuit 414 is reset every time at the commencement of the field flyback.

In the state in which the beam current is not too large the transistors 412 and 422 do not conduct and the signal is passed on through the transistor 413 to the base of the transistor 425 whose emitter is connected to the collector of an npn transistor 427 whose emitter is connected to earth and whose base is connected through a resistor 428 to the input 392 of the measuring circuit. The collector of the transistor 425 is connected through a resistor 430 to the base of an npn transistor 433 whose emitter is connected through a resistor 435 to the input 381 of the sequence switches 377, 378 and 379.

The collector of the transistor 425 is connected through a resistor 432 to the emitter of an npn transistor 434 arranged as an emitter follower whose base is connected through a resistor 436 to an input 438 of the measuring circuit 362 which is connected to the output 244 of the pulse generator 235 at which the waveform 544 occurs. This transistor 434 conducts during the measuring period and furthermore every time during a number of line times in the field scan time when the pulse generator 235 has acquired a free-running state (waveform 544) due to a too high beam current with the aid of the trigger circuit 414.

The transistor 427 conducts due to the waveform 553 during the measuring periods so that in the periods t 5 -t 6 , t 7 -t 8 , t 9 -t 10 the emitter of the transistor 425 is connected to earth through the transistor 427 and the transistor 425 acts as an amplifier and passes on a signal to the base of the transistor 433 and recharges through its emitter the storage capacitors 363, 365 and 367 during the corresponding periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 , respectively.

In the state of the circuit arrangement where a too large beam current has been detected and where the trigger circuit 414 is set, the transistor 425 does not conduct due to the short circuit of the base of the transistor 413 so that then the storage capacitors 363, 365 and 367 are recharged by the emitter follower 434, 433 every time during the periods when the waveform 544 is positive. This is effected a large number of times during field scan periods following the set of the trigger circuit 414 so that the storage capacitors are charged quickly to a higher voltage to reduce the beam current through the control loops as quickly as possible again.

The operation of a control loop will now be described. This control loop not only includes the television dislay tube 221 and the measuring circuit 362 but also the suppression and level correction circuit 295.

A modified luminance signal Y m according to the waveform 563 is applied to the input 289 in which signal the reference level 521 is present during the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 and which level is suppressed from t 1 to t 5 . The input 289 is connected to the base of an npn transistor 601 whose emitter is connected to earth through a resistor 603 and whose collector is connected through a resistor 605 to the emitter of an npn transistor 607. The collector of the transistor 607 is connected to a positive voltage. The base is connected to the input 307 and receives a red colour difference signal -(R-Y) which is suppressed from t 1 to t 10a .

Furthermore the emitter of the transistor 601 is connected to the emitter of an npn transistor 609 whose collector is connected to a positive voltage and whose base is connected to the input 301.

A voltage having the waveform 547 is applied to the input 301 so that the transistor 609 conducts during the periods t 7 -t 8 and t 9 -t 10 and thus cuts off the transistor 601 so that also the transistor 607 does not convey current and the signal at the collector of the transistor 601 is suppressed.

When the transistor 609 does not conduct a signal is generated at the collector of the transistor 601 which signal is a combination of the -(R-Y) signal supplied through the emitter follower 607 and the -Y m signal amplified through the transistor 601. This combination is a -R signal in which a level corresponding to the level 521 is present during the period t 5 -t 6 and which is suppressed in the line periods t 1 -t 5 and t 6 -t 10a . This signal is applied to the base of an npn transistor 611 whose collector is connected to a positive voltage and whose emitter is connected through a resistor 613 to the collector of an npn transistor 615 whose emitter is connected to earth through a resistor 617 and whose base is connected to a reference voltage of 1.4 V.

The emitter of the transistor 615 is furthermore connected to the emitters of two npn transistors 619 and 621 whose collectors are connected to a positive supply voltage.

A level correction voltage originating from the capacitor 367 and applied to the input 355 is transferred to the base of the transistor 619 through an npn transistor 623 arranged as an emitter follower while a suppression signal having the waveform 537 applied to the input 349 is passed on to the base of the transistor 621. The latter signal ensures the common suppression of the beam current during the line and field flyback periods. Due to the fact that the otherwise cut-off transistor 621 is blocked during these flyback periods, the transistor 615 is cut off and no signal is passed to the collector of this transistor because then the emitter circuit of the transistor 611 is interrupted.

The level correction voltage applied to the input 355 is then applied through the emitters of the transistors 623 and 619 to the emitter of the transistor 615 and influences the direct current through the resistor 613 provided by the transistor 615 and hence of the direct current level of the -R signal passed through the emitter of the transistor 611 to the collector of the transistor 615.

The collector of the transistor 615 is connected to the base of an npn transistor 625 whose collector is connected to a positive voltage and whose emitter is connected through an adjustable resistor 629 to the base of an npn transistor 631. The emitter of the transistor 631 is connected to earth and the collector is connected to the emitter of an npn transistor 633 whose collector is connected through a resistor 635 to a positive supply voltage of +130 V and whose base is adjusted to a bias voltage of +5 V. The base of the transistor 631 receives a negative feedback voltage from the collector of the transistor 633 through a potential divider 637, 639 to a negative voltage.

A red colour signal amplified by the transistors 631 and 633 is obtained from the collector of the transistor 633 and is applied through the output 343 to the wehnelt electrode of the red gun of the display tube 221. This signal includes the correction level originating from the capacitor 363 with which the beam current in the red gun is adjusted to a desired value.

The amplification of the circuit arrangement is adjustable with the resistor 629 so as to perform for example, a white point correction. Due to the control loop such an adjustment has substantially no influence on the beam current which is produced by the reference level 521 so that the black level and hence the colour of dark picture parts does not change due to the adjustment.

The modified luminance signal Y m for the input 289 is obtained in the level insertion circuit 259.

A luminance signal is applied to the input 261 which signal is applied to an input 701 of an amplifier 703. Furthermore the amplifier 703 has an input 707 to which an adjustable direct voltage is applied with the aid of a potentiometer 709 which serves for luminance adjustment and an input 771 to which a suppression signal is applied as is shown by the waveform 555. The black level of the picture 520 in the waveform 563 is adjustable with the aid of the potentiometer 709 relative to the level occurring during the suppression periods. The waveform 563 is the luminance signal which occurs at the output 263 across an emitter resistor 713 of an npn transistor 715 arranged as an emitter follower whose base is connected to an output 705 of the amplifier 703.

A signal having the waveform 555 is applied to the input 257 of the level insertion circuit through a capacitor 717, which signal is passed at one end through a resistor 721 to the base of an npn transistor 723 and at the other end through a potential divider 725, 727 to the base of an npn transistor 729.

During the most positive parts of the waveform 555 a low voltage is produced across a collector resistor 731 of the transistor 723. The level of the signal during the periods t 5 -t 10 lies below the cut-off point of the transistor 727 so that this is not found back in the collector signal 565 of this transistor. As a result of the potential divider 725, 727 connected to the positive voltage the transistor 729 only reacts to the most negative parts of the signal 555 and the transistor 729 is cut off during the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 so that then positive going square-wave voltages occur at the collector of this transistor.

The collector of the transistor 729 is connected through a resistor 733 to a potential divider including a resistor 735 and a series arrangement of a diode 736 and a resistor 737. The voltage at the wiper of this potential divider has a constant value of + 2.2 V which also occurs at the collector of the transistor 729 during the said periods. This voltage is passed on through a resistor 738 to the base of an npn transistor 739 whose collector is connected to a positive supply voltage and whose emitter is connected to the emitter of the transistor 715. During the periods t 5 -t 6 , t 7 -t 8 and t 9 -t 10 the emitter of the transistor 739 is brought to a voltage of +1.5 V due to its base voltage so that the transistor 715 is cut off and the reference level 521 is produced at the output 263. The rest of the period the transistor 739 is cut off and a signal is applied to the output 263 through the transistor 715.

In the waveform 563 arrows show that the black level 520 of the signal is adjustable relative to the constant reference level 521 which as a result of the said control corresponds to a constant beam current valve in the guns of the display tube 221.

The pulses for the various parts of the circuit arrangement are supplied by the pulse generator 235.

This generator has four trigger circuits 801, 803, 805 and 807. A signal which relative to the signal 533 at the input is delayed over a time T 1 is applied to a set input 809 of the trigger 801 from the input 233 through a delay circuit including a resistor 811 and a capacitor 813. This signal is shown in the waveform 509. Before this pulse appears the triggers 801, 803, 805 and 807 are assumed to be in the reset condition. At the instant t 1 + T 1 the trigger 801 is brought to the set condition. A signal represented by the waveform 514 then appears at an output 814 thereof which signal is applied to four AND gate circuits 817, 819, 821 and 823.

Furthermore an inverted set signal from the trigger 801 is applied to the gate 817 as well as a line frequency pulse signal originating from the input 229.

In addition a signal represented by the waveform 544 originating from an output 816 of the trigger 803 and a signal originating from an AND gate 817 are applied to the gate 819.

The gate 821 furthermore receives a signal having a waveform 518 from an output 818 of the trigger 805 and a signal originating from an AND gate 829.

Furthermore the gate 823 receives a signal having a waveform 520 from an output 820 of the trigger 807 and an inverted line frequency pulse signal originating from the input 229. An output of this gate 823 is connected through a delay circuit including a resistor 831 and a capacitor 833 to an AND gate 835 which also receives a line frequency pulse signal from the input 229. The output of this gate 835 is connected to the reset inputs of all four triggers. The gates 827 and 829 receive an inverted signal from the input 229 and an output signal from the triggers 805 and 807, respectively.

Furthermore a switchable feedback is present between the output 814 of the trigger 801 and the set input thereof, which feedback is only switched on when the beam current in the display tube 221 is too high. This feedback starts from the output 814 through a resistor 837 which is connected to the base of an npn transistor 839 whose emitter is connected to earth and whose collector is connected through a resistor 841 to the input 256 and is connected to the output of the trigger circuit 414, the base of a transistor 843 connected to the collector of the transistor 839 having its collector connected to a positive supply voltage and being connected through a resistor 845 connected to the emitter of this transistor 843 to the set input 809 of the trigger 801. Together with the capacitor 813 the resistor 845 constitutes a delay circuit having a time delay T 2 . The feedback is not present when the beam current is so low that the trigger circuit 414 is not set; the voltage at the collector of the transistor 839 is then low and the transistor 843 is cut off. This condition is assumed to be present at the commencement of the time axis in FIG. 5.

When the voltage at the input 256 becomes high due to the trigger 414 coming in the set condition the feedback will be switched on. The transistor 839 will then act as an inverter.

When at the instant t 1 + T 1 the trigger 801 is set, the trigger 803 is blocked at the same time by the inverted set signal from the trigger 801 applied to the gate 817. The triggers 803, 805 and 807 then remain in the reset condition. After the end of the set pulse from the trigger 801, i.e. after the instant t 3 = t 2 +T 1 the gate circuit 817 becomes conducting at the instant t 4 due to the next line frequency pulse and brings the trigger 803 in the set condition. The gate 819 then becomes conducting after the end of the line pulse under the influence of the gate 827 and applies a pulse through a delay network 845, 847 to an input of an AND gate 849 to which also the line frequency signals of the input 229 are applied. At the next line pulse at the instant t 6 the trigger 805 is set so that the gate 821 provides a pulse which is delayed by a network 851, 853 and is applied to an input of an AND gate 855 to which furthermore the line frequency pulse signal from the input 229 is applied. This gate 855 becomes conducting at the next line pulse at the instant t 8 under the influence of the gate 829 and brings the trigger 807 to the set condition.

A pulse is obtained from the output of the gate 823 which begins after termination of the line
pulse and which is applied delayed through the network 831, 833 to the gate 835 which then passes the next line pulse at the instant t 10 so that the triggers 801, 803, 805 and 807 are reset.

When meanwhile the trigger circuit 414 has not reached the set condition during the time between t 5 and t 10 in which the beam currents in the display tube are measured, the triggers 801, 803, 805 and 807 remain in the reset condition until the next field pulse.

When the trigger circuit 414 changes to the set condition due to a too high beam current for example between t 5 and t 6 , the described feedback from the output 814 of the trigger 801 is provided at its set input 809 and a positive pulse will appear again at the instant t 10 + T 2 at the input 809 which pulse will bring the trigger 809 to the set condition again so that at an instant t 10 + 2T 2 the trigger 803 is set whereafter the triggers repeat the above-described conditions every time.

At the next field pulse at the instant t 11 , however, the trigger 414 is reset so that the feedback in the pulse generator 235 is interrupted and a set cycle of the triggers 801, 803, 805 and 807 already started is terminated at the instant t 12 when the gate 835 applies a line pulse to the reset input of the trigger 801 so that voltage at the output 814 remains equally low and all triggers are reset. After the line pulse drops out at its reset input the trigger 801 is brought immediately to the set condition so that at the next line pulse which lies after the instant which is T 1 later than the trailing edge of the field pulse 533 the trigger 803 is set again and three line times later everything is reset and remains reset when the beam current has become sufficiently low due to the repeated recharge of the capacitors 363, 365, 367 in the measuring circuit 362.

A number of gate circuits supplying the output signals from the pulse generator 235 are coupled to the outputs of the trigger circuits.

The output 239 is connected to an output of an AND gate 857 which has an input connected to the output 816 of the trigger 803, an inverted input which is connected to the output 818 of the trigger 805 and an inverted input which is connected to the input 229 of the pulse generator. The output of this gate then applies the waveform 539.

The output 241 is connected to an output of an AND gate 859 and input of which is connected to the output 818 of the trigger 805, an inverted input is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 859 provides an output signal having the waveform 541.

The output 243 is connected to an output of an AND gate 861 an input of which is connected to the output 820 of the trigger 807 and an inverted input is connected to the input 229 of the pulse generator 235. The AND gate 861 provides an output signal having the waveform 543.

The output 244 is connected to the output 816 of the trigger 803 and the output 245 is connected to an inverted output of this trigger.

The output 247 is connected to an output of an OR gate 863, the output 249 is connected to an output of an OR gate 865 and the output 251 is connected to an output of an OR gate 867. The inputs of the gate 863 are connected to the outputs of the gates 861 and 859, the inputs of the gate 865 are connected to the outputs of the gates 861 and 857 and the inputs of the gate 867 are connected to the outputs of the gates 857 and 859. The gates 863, 865 and 867 supply the signals 547, 549 and 551, respectively.

The output 253 is connected to an output of an AND gate 869 an input of which is connected to the output 816 of the trigger 803 and an inverted input is connected to the input 219 of the pulse generator 235. The waveform 553 is supplied by this gate.

The output 237 is connected to an output of an OR gate 871 whose inputs are connected to the inputs 229 and 233 of the pulse generator. The waveform 537 is provided by the gate 871.

The output 255 is connected to an output of a gate and superimposition circuit 873 an input of which is connected to an inverted output of the trigger 801, an inverted input is connected to the output of the gate 871 and an inverted input is connected to the output of the gate 869. The gate and superimposition circuit 873 provides the waveform 555.

Since the latter waveform is applied through the capacitor 717 to the input 257 of the level insertion circuit 259, an unsatisfactory amplitude selection will take place when the trigger 801, 803, 805 and 807 run free for a long period so that a charge of the capacitors 363, 365, 367 in the measuring circuit 362 is effected independently of the beam current when it has exceeded a given maximum value as described in the foregoing. The level shift due to this capacitor 717 and the results thereof are not important for the understanding of the invention and are therefore not shown in the waveforms.

Although the control voltage in the described embodiments is applied to a wehnelt electrode of the display tube it may alternatively be applied to a different control electrode.

The insertion of the reference level may of course alternatively be effected in a different manner such as, for example, by clamping the video signal on the control signal.

For switching over the described functions in case of a too large beam current value a schmitt trigger or a monostable multivibrator may be used if desired instead of a bistable trigger circuit having a set and reset, input, or an output signal from the threshold circuit may be used.

The type of measuring circuit is not important for using the step according to the invention. Instead of a sequence measuring circuit it is alternatively possible to use a simultaneous measuring circuit in which all beam currents are simultaneously measured in the case of a multigun display tube. Also the input circuit of the measuring circuit may of course be adapted as desired.

If desired other counting circuits may be used instead of a shift register.

PHILIPS CHASSIS K12 Television receiver including a beam current limiting circuit :

1. A beam current limiting circuit for a cathode ray display tube having at least one cathode, said circuit comprising an isolation circuit having a high impedance input means for coupling to said cathode and an output, and time constant circuit means for generating a beam current limiting signal in accordance with the cathode beam current having an input coupled to said isolation circuit output and an output means for providing said beam current limiting signal.

2. A circuit as claimed in claim 1 wherein said isolation circuit comprises an amplifier.

3. A circuit as claimed in claim 1, wherein the display tube has a plurality of interconnected cathodes, said beam current limiting circuit further comprising a parallel combination of a first resistor and a series circuit including a diode and a second resistor, said parallel combination being adapted to be coupled to a supply source, the junction of the diode and the second resistor being coupled to the isolation circuit input means, and a control circuit means for maintaining a reference level in the cathode current constant having an input means for coupling to said cathodes.

4. A circuit as claimed in claim 1, wherein the display tube has a plurality of interconnected cathodes, and further comprising a resistor coupled between said cathodes and a supply source, a capacitor coupled said cathodes, and a circuit means for recovering a direct-current component coupled between said capacitor and the input means of said isolation circuit.

5. A circuit as claimed in claim 1, wherein the display tube has a plurality of cathodes, and further comprising a plurality of resistors respectively coupled between said cathodes and the input means of said isolation circuit, a threshold circuit, a plurality of diodes coupled between said cathodes respectively and an input of said threshold circuit, the isolation circuit including a circuit means for obtaining a voltage which is a measure of the mean value of the overall cathode current and the threshold circuit including a circuit means for obtaining a voltage which is a measure of the peak values in each of the cathode currents.

6. A circuit as claimed in claim 1, further comprising a resistor and a diode coupled between said cathode and a source of a supply voltage, a measuring device means for measuring the black level in the beam current having an input coupled across the diode, and the resistor and the diode being coupled to the input means of the isolation circuit.

7. A circuit as claimed in claim 1, wherein said tube has a plurality of control electrodes, and further comprising a radio frequency, intermediate frequency, and detector section having luminance and chrominance signal outputs; first and second amplifiers each having signal inputs coupled to said outputs respectively, gain control inputs coupled to said time constant circuit output means, and outputs; a demodulator coupled to said second amplifier output; and a matrix circuit having inputs coupled to said first amplifier output and said demodulator, and a plurality of output means for coupling to said control electrodes respectively.


Description:
The invention relates to a television receiver having a beam current limiting circuit which includes a converting circuit with a time constant network for converting the current through the cathode of a display tube to a beam current limiting signal, by means of which overdriving of the display tube is avoided, characterized in that the time constant network is connected to the cathode via a separating circuit so that the converting circuit substantially cannot affect the current through the display tube.
U.S. Pat. No. 3,735,029 describes a television receiver of the abovementioned type in which the cathode of the display tube is connected to the mains voltage via a time constant network which is a parallel circuit of a capacitor with a series circuit of a zener diode and a resistor.
When proportioning the high voltage supply the properties of the time constant network in the cathode circuit of the display tube must be taken into account, whilst it is not possible to apply, for example, a peak detection circuit to prevent defocussing due to the occurrence of short-duration peak signals at the display tube.
It is an object of the invention to mitigate these drawbacks.
Hence a television receiver of the aforementioned type according to the invention is characterized in that the time constant network is connected to the cathode via a separating circuit so that the converting circuit substantially cannot affect the current through the display tube.

For example, there may be derived from a small resistor in a cathode circuit of the display tube a voltage which is a measure of the current carried by the cathode circuit concerned. Via a separating circuit, for example an amplifier and matched time constant networks, both information about the mean value of this current and information about any peak values which may occur in it can be derived from this voltage in simple manner, without the cathode circuit being affected. This enables a suitable beam current limiting quantity to be composed.
Embodiments of the invention will be described, by way of example, with reference to the accompanying diagrammatic drawings, in which:
FIG. 1 illustrates a television receiver in which a circuit for generating a beam current limiting voltage is included in the cathode circuit of a display tube according to the invention.
FIG. 2 illustrates a television receiver as shown in FIG. 1, representing the manner in which a clamping circuit which controls a beam current reference level can also be connected to the cathodes of the display tube, and
FIG. 3 shows another embodiment of a television receiver provided with a circuit for generating a beam current limiting quantity according to the invention.


Referring now to FIG. 1, a television signal is supplied to an input 1 of a high-frequency, intermediate-frequency and demodulation section 3 of a television receiver. The section 3 at a first output 5 provides a luminance signal Y and at a second output 7 delivers a chrominance signal CHR. The luminance signal Y is supplied via an amplifier 9 to an input 11 of a matrix circuit 13. The chrominance signal CHR is applied via an amplifier 15 to an input 17 of a demodulating circuit 19 which supplies colour difference signals (R-Y) and (B-Y) to inputs 21 and 23 respectively of the matrix circuit 13. The matrix circuit 13 then delivers colour signals R, G and B which are applied to the control electrodes of a display tube 25.
The cathodes of the display tube 25 are interconnected and through a resistor 27 have a supply voltage Vk applied to them. The resistor 27 can be so small as to cause no appreciable negative feedback.
Across the resistor 27 a voltage is produced which is proportional to the beam current flowing through the display tube 25. This voltage is applied via a capacitor 29 to the junction of the cathode of a diode 31 and a resistor 33. To the anode of the diode 31 is applied a positive voltage such, for example 1.4 volts, that the lowest signal voltages which may appear at the cathode of the diode 31 are clamped at a voltage level of about 0.7 volt. Via a resistor 35 the signal at the cathode of the diode 31 is supplied to the base of a transistor 37 which as a result produces across its emitter resistor 39 a signal voltage the lowest value is about zero volts when the voltage at a supply terminal 41 is zero volts.
The voltage at the emitter of the transistor 37 is applied via a resistor 43 to a capacitor 45 across which a direct voltage is set up which is a measure of the mean value of the cathode current of the display tube 25. Together with the capacitor 45 the resistor 43 forms a time constant network which is isolated, by means of the transistor 37 from the cathode circuit of the display tube and consequently does not affect it. The voltage across the capacitor 45 is applied via a resistor 47 to the base of a transistor 49 which acts as a threshold circuit and passes collector current only if its base voltage is of the order of 0.7 volt. The collector of the transistor 49 is connected to a supply terminal 55 via two resistors 51 and 53. The junction of the resistors 51 and 53 is connected to a capacitor 57 and to the collector of a transistor 59 the base of which is connected to the emitter of the transistor 37.
The transistor 59 acts as a threshold circuit for signal voltages at the emitter of the transistor 37 and passes current only if this signal voltages assumes high values. As a result a voltage which depends upon the amplitude of the said peak signal voltages is set up across the capacitor 57. The transistor 49 produces a further voltage across the capacitor 57 which depends upon the mean value of the current through the display tube so that there is set up across the capacitor 57 a control voltage which depends upon different forms of undesirable overloading of the display tube 25. Also the peak detection circuit with the transistor 49 and the capacitor 57 is isolated from the cathode circuit and cannot affect it.
The voltage across the capacitor 57 serves as beam current limiting quantity and is supplied to control inputs 60 and 61 of the amplifiers 9 and 15 respectively, enabling the contrast and the saturation of the displayed picture to be corrected. Obviously a brightness correction may, if desired, be effected by means of the control voltage obtained across the capacitor 57.
Thus the circuit in the cathode circuit of the display tube acts as a converting circuit by which the cathode current of the display tube is converted into a beam current limiting quantity.
To the cathode resistor 27 of the display tube 25 a direct voltage Vk is applied. As an alternative, a driving voltage may be applied to this cathode resistor. In this case a difference voltage measuring circuit must be connected across the resistor 27 to enable the voltage across the resistor 27 to be measured.
When a diode is so connected between the cathode resistor 27 and the supply voltage Vk as to have its pass direction from the resistor 27 to the supply voltage Kk, the input of a measuring device for measuring the black value of the beam current can be connected across the diode. This measuring device may deliver a control signal by means of which the said black value is maintained constant. In the following embodiments other possibilities of measuring the black value of the beam current are shown.
FIG. 2 shows how not only a circuit for obtaining a beam current limiting quantity but also a control circuit for obtaining a constant black value of the beam currents of the display tube which can be included in the cathode circuit of this tube.
Corresponding component parts of the circuit are designated by the same reference numerals as in FIG. 1.
The interconnected cathodes of the display tube 25 here are connected to the resistor 27 via a diode 63, the series combination of the resistor 27 and the diode 63 being shunted by a resistor 65. The value of the resistor 65 is much higher than that of the resistor 27, being, for example, 100 kΩ and 330 Ω respectively. For very small cathode voltages the diode 63 is nonconductive so that substantially only the large resistor 65 is operative in the cathode circuit. The said small cathode voltages are important with respect to the measurement of the black level and are applied to the input of an amplifier 67.
Larger cathode currents cause, via the diode 63, the small resistor 27 to become operative so that the voltage at the cathodes of the display tube is limited and a beam current limiting quantity is derived from the resistor 27 via a converting circuit 69, which may be of the construction as shown in FIG. 1.
The amplifier 67 supplies a signal to a sequential measuring circuit 71 which during, for example, three line periods in each field blanking period sequantially measures the black values in the beam currents at the different cathodes of the display tube and converts them into control voltages which are applied to level control inputs 73, 75, 77 of colour signal amplifiers 79, 81, 83 respectively.
In this circuit all the information about the beam currents of the display tube both with respect to beam current limiting and to level control is derived from the cathode circuit of the display tube substantially without affecting this cathode circuit which permits simple proportioning and independent and reliable operation of these and other circuits.


FIG. 3, in which corresponding parts are designated by the same reference numerals as in FIG. 1 and 2, shows a method of preventing defocussing of each individual beam. Each of the cathodes of the display tube 25 is connected to a resistor 85, 87, 89, respectively and to the anode of a diode 91, 93, 95 respectively. The cathodes of the diodes 91, 93, 95 are connected to the input of a threshold circuit in the form of a transistor 97 the emitter of which is connected via a series combination of two diodes 99 and 101 to the voltage Vk. Consequently the transistor 97 passes current only if the voltage at one of the cathodes of the display tube 25 exceeds a given threshold value, in the present case about 2.8 volts. The collector current of the transistor 97 and hence the direct voltage across a capacitor 103 included in its collector circuit are a measure of a peak currents which occur at the three cathodes. By means of this circuit the peak value of each of the cathode currents is measured so that defocussing of each beam is avoided.
The overall cathode current is further supplied from the junction of the three resistors 85, 87, 89 via a diode 105 to the base of a transistor 107 which is connected as a current amplifier and the emitter of which is connected to the base of a transistor 109. The collector circuit of the transistor 107 includes a capacitor 111 across which a direct voltage is produced which is a measure of the mean value of the joint cathode currents.
The voltages across the capacitors 103 and 111 are combined in a combining circuit 113 which, in its simplest form may be a resistor network to form a desired beam current control voltage or current.
From the collector circuit of the transistor 109 a signal is obtained by means of which the black level in the beam current can be measured. Between the collector of the transistor 109 and the base of the transistor 107 a resistor 115 is connected which has a large value and in the case of small beam current values of the display tube 25 determines the gain of the transistor 109.
If desired, the resistors 85, 87, 89 may be variable to enable the influence of differences in the characteristics of the display tube 25 to be eliminated.
In the embodiments shown, amplifier circuits were used as separating circuit, it is also possible to connect the time constant network, for example via a large resistor, to the cathode and to use a d.c. voltage amplification of a signal which is formed at the time constant network

Other References:

Siemens “Control IC for Single-Ended and Push-Pull Switched-Mode Power Supplies (SMPS)”, , Semiconductor Group, TDA 4718 A.
“Feed Forward Converter SMPS with Several Output Voltages (5V/10A, ± 12V/2A)”, SIEMENS Application Note, TDA 4718 and SIPMOS®FET.
Mammano, Robert A., “Applying the UCC3570 Voltage-Mode PWM Controller to Both Off-Line and DC/DC Converter Designs”, Unitrode Corporation, Application Note U-150, Advanced Technology 1994.
Balakrishnan, Balu, “Three Terminal Off-Line Switching Regulator Reduces Cost and Parts Count”, Official Proceedings of the Twenty-Ninth International Power Conversion Conference, at 267 (1994).
Balakrishnan, Balu, “Next Generation, Monolithic Off-Line Switcher Improves Performance, Flexibility”, Power Integrations, Inc., PCIM Apr. 2000.
Davis, Sam, “Why Don't More Universities Teach Power Electronics Design?” PCIM Apr. 2000.
Linear Technology LT1070/LT1071 Data Sheet, (1989).
Linear Technology, LT1072 Data Sheet, (1988).
Linear Technology, LT1074/LT1076 Data Sheet, (1994).
Lenk, John D., “Simplified Design of Switching Power Supplies,” Butterworth-Heinemann (1995).
Pressman, Abraham I., “Switching Power Supply Design,” McGraw-Hill, Inc. (1998).
Xunwei Zhou et al.; Improve Light Load Efficiency for Synchronous Rectifier Buck Converter, IEEE, at 295 (1999).
Balu Balakrishnan, Low-power switchers expand reach, Electronic Engineering Times, Aug. 29, 1994, at 52.
Design of Isolated Converters Using Simple Switchers, Application Note 1095, National Semiconductor (Aug. 1998) (“LM285X Data Sheet”).
CS5124/6 Data Sheet, Cherry Semiconductor (1999) (CS5124 Data Sheet).
Irving M. Gottlieb, Power Supplies, Switching Regulators, Inverters, and Converters .
Panov and Jovanovic, Adaptive Off-Time Control For Variable-Frequency, Soft-Switched Flyback Converter At Light Loads, 1999 IEEE.
Xunwei Zhou, Mauro Donati, Luca Amoroso, Fred C. Lee, Improved Light-Load Efficiency for Synchronous Rectifier Voltage Regulator Module, IEEE Transactions on Power Electronics, vol. 15., No. 5., Sep. 2000.
Wayne M. Austin, Variable-pulse modulator improves power-supply regulation, Jun. 25, 1987.
F. J. De Stasi, T. Szepesi, A 5A 100 KHZ Monolitihc Bipolar DC/DC Converter, The European Power Electronics Association (1993).
Unitrode Current Mode PWM Spec sheet for US1846/7, UC2846/7, UC3836/7.
Motorola, Inc., A 100 kHz FET Switcher, TDT-101 TMOS Power Fet Design Tips sheet.
M. Goodman and O. Kuhlmann, Current mode control of switching regulators, IEEE, Oct. 1984.
Micro Linear preliminary spec sheet, ML4803, 8-Pin PFC and PWM Controller Combo, Feb. 1999.
Fairchild Advance Specification for FAN7554/D product, Rev. 0.1, 2000.
Robert Boschert, Flyback converters: Solid-state solution to low-cost switching power supplies, Electronics, Dec. 21, 1978.
Ravindra Ambatipudi, Improving Transient Response of Opto-Isolated Converters, PC/M May 1997.
Linear Technology's LT1070/LT1071 Design Manual, Application Note 19, Jun. 1986.
Linear Technology's LT1241 Data Sheet.
Jim Williams, Regulator IC speeds design of switching power supplies .
Carl Nelson, Switching controller chip handles 100W from a 5-pin package, Electronic Design, Dec. 26, 1985.
Siemens TDA 4714 C, TDA 4716 C, Sep. 1994.
Siemens TDA 4718 A, Dec. 1995.
Texas Instruments TL5001, TL5001A.
Unitrode Corporation UCC1809-1/-2/ UCC2809-1/-2/UCC3809-1/12 Data Sheet—Nov. 1999.
L. Calderoni, L. Pinol, V. Varoli, Optimal Feed-Forward Compensation for PWM DC/DC Converters, IEEE, 1990.
L. Calderoni, L. Pinol, V. Varoli, Optimal Feed-Forward Compensation for PWM DC/DC Converters with “Linear” and “Quadratic” Conversion Ratio, IEEE, 1992.
Maige, Philippe, “A Universal Power Supply Integrated Circuit for TV and Monitor Applications”.
LM2825 Application Information Guide.
Design of Isolated Converters Using Simple Switchers.
Motorola—Low cost 1.0 A Current Source for Battery Chargers.
Infineon Technologies Application Note: AN-SMPS-1683X-1.
Cherry Semiconductor High Performance, Integrated Current Mode PWM Controllers.
Cherry Semiconductor High Performance, Integrated Current Mode PWM Controllers CS5124/6.
Abstract data sheet for FA3641P.
Fairchild Semiconductor FAN7554/D Versatile PWM Controller.
Ambatipudi, Ravindra, Improving Transient Response of Opto-Isolated Converters.
National Semiconductor LM2825 Integrated Power Supply 1A DC-DC Converter.
Williams, Jim, “Regulator IC speeds design of switching power supplies.”
Nelson, Carl “Switching controller chip handles 100 W from a-5-pin package.”
Unitrode Corporation UCC1570/UCC2570/UCC3570 Data Sheet—Apr. 1999, Revised Jul. 2000.
STMicroelectronics, VIPer100/SP, VIPer100A/ASP data sheet (May 1999).
FA3641P(N), FA3647P(N) Spec Sheet.
Keith Billings, Switchmode Power Supply Handbook, McGraw-Hill, Inc. (1989).
Xunwei Zhou et al.; “Improve Light Load Efficiency for Synchronous Rectifier Buck Converter,” 1999 IEEE at 295.
Balakrishnan, Balu “Next Generation, Monolithic Off-Line Switcher Improves Performance, Flexibility,” Power Integrations, Inc., PCIM Apr. 2000.
Linear Technology LT 1070 Design Manual.
Siemens IC for Switched-Mode Power Supplies spec.
De Stasi, et al. “A 5A 100 Khz monolithic bipolar DC/DC converter”.
Linear Technology 5A and 2.5A High Efficiency Switching Regulators.
Boschert, Robert. “Flyback converters: solid-state solution to low-cost switching power supplies,” , Electronics, Dec. 21, 1978.
Linear Technology data sheet—5A and 2.5A High Efficiency Switching Regulators.
R. Mammano, Application Note U-150 Applying the UCC3570 Voltage-Mode PWM Controller to Both Off-Line and DC/DC Converter Designs.
Unitrode Corporation UCC1570/UCC2570/UCC3570—Low Power Pulse Width Modulator—data sheet (Apr. 1999, Revised Jul. 2000).
Power Integrations, Inc.'S Disclosure of Asserted Claims and Preliminary Infringement Contentions, Power Integrations, Inc. v. System General Corporation & System General USA, United States District Court, Northern District of California, San Francisco Division, Case No. C04 2581 JSW, Apr. 15, 2005.
Power Integrations, Inc.'S Revised Disclosure of Asserted Claims and Preliminary Infringement Contentions, Power Integrations, Inc. v. System General Corporation & System General USA, United States District Court, Northern District of California, San Francisco Division, Case No. C04 2581 JSW, May 24, 2005.
Defendants System General Corporation and System General USA's Preliminary Invalidity Contentions, Power Integrations, Inc. v. System General Corporation& System General USA, United States District Court, Northern District of California, San Francisco Division, Case No. C04 2581 JSW, May 27, 2005.
Fourth Joint Status Report, Power Integrations, Inc. v. System General Corporation& System General USA, United States District Court, Northern District of California, San Francisco Division, Case No. C04 2581 JSW, Jul. 5, 2006.
Final Initial and Recommended Determinations, In the Matter of Certain Power Supply Controllers and Products Containing the Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, May 15, 2006.
Respondent System General Corporation's Petition for Review of the Final Intial Determination, In the Matter of Certain Power Supply Controllers and Products Containing the Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, May 26, 2006.
Complainant Power Integration, Inc.'s Opposition to Respondent System General Corp.'s Petition for Review of the Final Intial Determination, In the Matter of Certain Power Supply Controllers and Products Containing the Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Jun. 5, 2006.
Response of the Office of Unfair Import Investigations to Respondent System General Corp.'s Petition for Review of the Final Intial Determination, In the Matter of Certain Power Supply Controllers and Products Containing the Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Jun. 5, 2006.
Notice of Commission Determination Not to Review a Final Initial Determination of Violation of Section 337; Schedule for Filing Written Submissions on Remedy, The Public Interest, and Bonding, In the Matter of Certain Power Supply Controllers and Products Containing the Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Jun. 30, 2006.
International Trade Commission, In The Matter Of Certain Power Supply Controllers And Products Containing The Same; Notice Of Commission Determination Not To Review a Final Initial Determination of Violation of Section 337; Schedule for Filing Written Submissions on Remedy, the Public Interest, and Bonding, Federal Register, vol. 71, No. 131 at 38901-02, Jul. 10, 2006.
Brief for Appellant System General Corp., System General Corp. v. International Trade Commission and Power Integrations, Inc., United States Court of Appeals for the Federal Circuit, On appeal from the United States International Trade Commission in Investigation No. 337-TA-541, Apr. 23, 2007.
Complainant Power Integrations, Inc.'s Posthearing Statement (Fully-Redacted), In the Matter of Certain Power Supply Controllers and Products Containing Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Feb. 10, 2006.
Respondent System General Corporation's Post-Hearing Brief (Fully-Redacted), In the Matter of Certain Power Supply Controllers and Products Containing Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Feb. 10, 2006.
Post-Hearing Brief of the Commission Investigative Staff (Fully-Redacted), In the Matter of Certain Power Supply Controllers and Products Containing Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Feb. 14, 2006.
Complainant Power Integrations, Inc.'s Posthearing Reply Statement (Fully-Redacted), In the Matter of Certain Power Supply Controllers and Products Containing Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Feb. 24, 2006.
Respondent System General Corporation's Post-Hearing Reply Brief (Fully-Redacted), In the Matter of Certain Power Supply Controllers and Products Containing Same, United States International Trade Commission, Washington, DC 20436, Before the Honorable Paul J. Luckern, Administrative Law Judge, Inv. No. 337-TA-541, Feb. 24, 2006.
United States Court of Appeals for the Federal Circuit 2007-1082, Judgement, System General Corp. v. International Trade Commission and Power Integrations, Inc., On Appeal from the United States International Trade Commission, In Case No. 337-TA-541, Before the Honorable Pauline Newman, Circuit Judge, the Honorable Raymond C. Clevenger, III, Senior Circuit Judge, and Timothy B. Dyk, Circuit Judge, Nov. 19, 2007.
“Advanced Voltage Mode Pulse Width Modulator,” UNITRODE Corp., UCC15701/2, UCC25701/2, UCC35701/2, Jan. 2000, pp. 1-10.
“Advance Information: High Voltage Switching Regulator,” MC33362, MOTOROLA Inc., Motorola Analog IC Device Data, Rev 2, 1996, pp. 1-12.



No comments:

Post a Comment

The most important thing to remember about the Comment Rules is this:
The determination of whether any comment is in compliance is at the sole discretion of this blog’s owner.

Comments on this blog may be blocked or deleted at any time.
Fair people are getting fair reply. Spam and useless crap and filthy comments / scrapers / observations goes all directly to My Private HELL without even appearing in public !!!

The fact that a comment is permitted in no way constitutes an endorsement of any view expressed, fact alleged, or link provided in that comment by the administrator of this site.
This means that there may be a delay between the submission and the eventual appearance of your comment.

Requiring blog comments to obey well-defined rules does not infringe on the free speech of commenters.

Resisting the tide of post-modernity may be difficult, but I will attempt it anyway.

Your choice.........Live or DIE.
That indeed is where your liberty lies.